Device and method for improving error counting of gated single-photon detector
By setting the signal transmission time and signal processing flow of the gated single-photon detector, the error counting problem caused by device delay uncertainty is solved, and the effect of reducing system error rate and improving performance is achieved.
Patent Information
- Application Number
- CN202410453142.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-16
- Publication Date
- 2025-07-18
AI Technical Summary
Due to the uncertainty of device delay, existing gated single-photon detectors may have half of the gated signal in the system, resulting in error detection counts, improving system error rate and affecting performance.
The CPU controller, counting module, numerical input module and analysis and processing module are used to set the transmission time of the gate control signal and the gate control signal to ensure that the gate control signal is turned on before the gate control signal is met. The interference signal is removed through the serial detector and filter, the identification circuit forms a pulse signal, and the signal extraction circuit performs detection and counting.
Effectively reduce system error rate, improve performance, and ensure that detection counts are generated only when the corresponding door control signal is opened, reducing error counts.
Smart Images

Figure CN120333612A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of gated single-photon detectors, and more specifically, it relates to a device and method for improving the error counting of gated single-photon detectors. Background Art
[0002] The single-photon detector is one of the core modules in the quantum secure communication system. The performance of the single-photon detector has a great impact on the quantum secure communication system. Common single-photon detectors adopt a gated design scheme;
[0003] Currently, common single-photon detectors on the market adopt a gated type as Figure 4 shown. The usual method is to simultaneously control the "gating control signal + coincidence gate control signal", and then turn off the gating signal and the coincidence gate signal. In this way, the negative voltage of the single-photon detector drops below the avalanche voltage, and then no after-pulse signal will be generated, nor will the optical signal be discriminated. Subsequently, in the actual system operation, the after-pulse probability of the system can be reduced. Here, as Figure 5 shown. In the actual system operation, such as setting a dead time control of 5 μs, the 5 μs dead time control function can be achieved by closing 5 μs / T cycles. However, due to the delay uncertainty of the devices in the actual system, the actual closed dead time may be 5 μs + Δt. Since the Δt time is uncertain, there may be a half gating signal in the system. This is as Figure 6 shown. Due to the appearance of this half gating signal, its differential signal may be inside the coincidence gate signal. In this way, the rising edge of the "half gating signal" will be discriminated, and then an incorrect detection count will be generated. This incorrect detection count will cause an increase in the error rate in the system, thereby affecting the performance of the system; Summary of the Invention
[0004] The present invention provides a device and method for improving the error counting of gated single-photon detectors, which solves the technical problem that due to the delay uncertainty of the devices in the related technology, there may be a half gating signal in the system, and then an incorrect detection count will be generated, thereby causing an increase in the error rate in the system and affecting the system performance.
[0005] The present invention provides a device and method for improving the error counting of gated single-photon detectors,
[0006] The device for improving the error counting of gated single-photon detectors includes:
[0007] A CPU controller for periodically transmitting a gating control signal and a coincidence gate control signal;
[0008] A gating generation circuit for receiving the gating control signal transmitted by a detection CPU controller and transmitting the gating control signal;
[0009] A first resistor for reducing the pressure in the line transmitting the gating control signal;
[0010] A first filter for removing interference signals in the gating control signal transmitted by the gating generation circuit;
[0011] A serial detector for serially detecting the differential signal and avalanche signal generated by the differential and integral effects of the gating control signal and transmitting the differential signal and avalanche signal;
[0012] A second filter for removing interference signals in the differential signal and avalanche signal transmitted by the serial detector and transmitting the differential signal and avalanche signal;
[0013] A second resistor for reducing the pressure in the line transmitting the differential signal and avalanche signal;
[0014] A discrimination circuit for discriminating the differential signal and avalanche signal transmitted by the second filter, then forming a pulse signal and transmitting the pulse signal;
[0015] A coincidence gate generation circuit for receiving the coincidence gate control signal transmitted by the CPU controller and transmitting the coincidence gate control signal;
[0016] A signal extraction circuit for detecting and comparing the pulse signal and the coincidence gate control signal, and then generating a detection count;
[0017] The CPU controller is respectively connected to the gating generation circuit and the coincidence gate generation circuit for signal transmission. The gating generation circuit and the first filter are connected in parallel to the first resistor and the serial detector. The second filter is connected in parallel to the serial detector and the second resistor. The second filter is connected to the discrimination circuit by wireless signal. Both the discrimination circuit and the coincidence gate generation circuit are connected to the signal extraction circuit for signal transmission.
[0018] Preferably, the CPU controller includes:
[0019] A counting module for automatically counting and transmitting the counting data;
[0020] A numerical input module for setting time values and transmitting the set numerical signals;
[0021] An analysis and processing module for receiving the data transmitted by the counting module and the numerical input module, then performing comparative analysis, and further transmitting an opening and closing signal;
[0022] A signal transmission module, which is used to receive the signals transmitted by the analysis and processing module and then transmit the gating control signal and the coincidence gate control signal.
[0023] Preferably, the analysis and processing module is connected to the counting module and the numerical input module for signal reception, the analysis and processing module is connected to the signal transmission module for signal transmission, and the signal transmission module is respectively connected to the gating generation circuit and the coincidence gate generation circuit for signal transmission.
[0024] The method for improving the mis-counting device of the gated single-photon detector, the method includes the following steps:
[0025] Step 1, set the transmission time of the gating control signal and the coincidence gate control signal;
[0026] Through the numerical input module, set the transmission time of the gating control signal and the coincidence gate control signal, and then transmit it to the analysis and processing module. For example, if the transmission time of the coincidence gate control signal is set to MT, then the transmission time of the gating control signal is set to XT, where both X and M are natural numbers, T is the period of the gating control signal, and X is less than M;
[0027] Step 2, transmit the gating control signal and the coincidence gate control signal;
[0028] Run the counting module to make the counting module perform automatic counting work, and then transmit the counting time to the analysis and processing module. Then, through the analysis and processing module, compare the time transmitted by the counting module with the time set by the numerical input module. For example, when the time transmitted by the counting module is at XT, the gating control signal is transmitted to the gating generation circuit through the signal transmission module, and when the time transmitted by the counting module is at MT, the coincidence gate control signal is transmitted to the coincidence gate generation circuit through the signal transmission module;
[0029] Step 3, perform detection and counting work;
[0030] After the gating generation circuit receives the gating control signal, it detects the gating control signal and then transmits it to the first filter, the serial detector, and the second filter in sequence. The first filter filters the gating control signal, and the serial detector detects and transmits the differential signal and the avalanche signal generated by the gating control signal. The second filter filters the differential signal and the avalanche signal and then transmits them to the discrimination circuit. Then, through the detection of the discrimination circuit, the pulse signal is transmitted to the signal extraction circuit. When the coincidence gate generation circuit receives the coincidence gate control signal, it transmits it to the signal extraction circuit. Finally, through the operation of the signal extraction circuit, the coincidence gate control signal and the pulse signal are compared. When both of them are available, a detection count is generated.
[0031] The beneficial effects of the present invention are as follows:
[0032] The device and method for improving the error counting of a gated single-photon detector, through the coordinated use of a counting module, a numerical input module, and an analysis and processing module, enable the user to set the transmission time of the gate control signal and the coincidence gate control signal. Subsequently, the gate control signal can be opened before the coincidence gate control signal, ensuring that when the coincidence gate control signal is opened, there will definitely be a complete gate control signal. Compared with traditional gated single-photon detectors, even if half a gate signal appears in the system, since there is no coincidence gate control signal, the signal extraction circuit will not generate a detection count, thereby effectively reducing the error rate of the system and improving the performance of the system. Description of the Drawings
[0033] Figure 1 is the signal transmission diagram of the gated single-photon detector of the present invention;
[0034] Figure 2 is the working timing diagram of the signal transmission diagram of the CPU controller of the present invention;
[0035] Figure 3 is the working timing diagram of the gated single-photon detector of the present invention;
[0036] Figure 4 is the signal transmission diagram of the existing gated single-photon detector;
[0037] Figure 5 is the working timing diagram of the existing gated single-photon detector;
[0038] Figure 6 is the timing schematic of the error counting generation of the existing gated single-photon detector.
[0039] In the figure: 1. CPU controller; 2. Gate generation circuit; 3. First resistor; 4. First filter; 5. Serial detector; 6. Second filter; 7. Second resistor; 8. Discrimination circuit; 9. Coincidence gate generation circuit; 10. Signal extraction circuit; 11. Counting module; 12. Numerical input module; 13. Analysis and processing module; 14. Signal transmission module. Detailed Embodiments
[0040] The subject matter described herein will now be discussed with reference to example embodiments. It should be understood that discussing these embodiments is only to enable those skilled in the art to better understand and thus implement the subject matter described herein. Without departing from the scope of protection of the content of this specification, changes can be made to the functions and arrangements of the elements discussed. Each example can omit, substitute, or add various processes or components as needed. Additionally, the features described relative to some examples can also be combined in other examples.
[0041] As Figures 1-3 shown, a device for improving the error counting of a gated single - photon detector. The device for improving the error counting of a gated single - photon detector includes:
[0042] A CPU controller 1, configured to intermittently transmit a gating control signal and a coincidence gate control signal at regular intervals;
[0043] A gating generation circuit 2, configured to receive the gating control signal transmitted by the detecting CPU controller 1 and perform a transmission operation on the gating control signal;
[0044] A first resistor 3, used to reduce the pressure in the line for transmitting the gating control signal;
[0045] A first filter 4, used to remove the interference signals in the gating control signal transmitted by the gating generation circuit 2;
[0046] A serial detector 5, configured to serially detect the differential signal and the avalanche signal generated by the differential - integration effect of the gating control signal and perform a transmission operation on the differential signal and the avalanche signal;
[0047] A second filter 6, used to remove the interference signals in the differential signal and the avalanche signal transmitted by the serial detector 5 and perform a transmission operation on the differential signal and the avalanche signal;
[0048] A second resistor 7, used to reduce the pressure in the line for transmitting the differential signal and the avalanche signal;
[0049] A discrimination circuit 8, configured to discriminate the differential signal and the avalanche signal transmitted by the second filter 6, then form a pulse signal and perform a transmission operation on the pulse signal;
[0050] A coincidence gate generation circuit 9, configured to receive the coincidence gate control signal transmitted by the CPU controller 1 and perform a transmission operation on the coincidence gate control signal;
[0051] A signal extraction circuit 10, configured to detect and compare the pulse signal and the coincidence gate control signal, and then generate a detection count;
[0052] The CPU controller 1 is respectively connected to the gating generation circuit 2 and the coincidence gate generation circuit 9 for signal transmission. The gating generation circuit 2 and the first filter 4 are connected in parallel with the first resistor 3 and the serial detector 5. The second filter 6 is connected in parallel with the serial detector 5 and the second resistor 7. The second filter 6 is connected to the discrimination circuit 8 for wireless signal connection. Both the discrimination circuit 8 and the coincidence gate generation circuit 9 are connected to the signal extraction circuit 10 for signal transmission;
[0053] In this embodiment, the CPU controller 1 transmits the gating control signal and the coincidence gate control signal to the gating generation circuit 2 and the coincidence gate generation circuit 9 respectively, and then operates the gating generation circuit 2 and the coincidence gate generation circuit 9. The gating generation circuit 2 can detect the gating control signal and transmit the gating control signal to the first filter 4. Then, through the filtering of the first filter 4, the gating control signal is transmitted to the serial detector 5. Then, the differential signal and the avalanche signal generated by the gating control signal are led to the second filter 6 by the serial detector 5. Then, the second filter 6 filters the differential signal and the avalanche signal. Then, through the discrimination of the discrimination circuit 8, the pulse signal is transmitted to the signal extraction circuit 10. The coincidence gate generation circuit 9 can transmit the coincidence gate control signal to the signal extraction circuit 10. Finally, the signal extraction circuit 10 detects the pulse signal and the coincidence gate control signal. The first resistor 3 and the second resistor 7 can reduce the pressure during transmission. When the signal extraction circuit 10 detects the pulse signal and the coincidence gate control signal, if the signal extraction circuit 10 does not detect one of the pulse signal or the coincidence gate control signal, no detection count is provided. If the signal extraction circuit 10 detects both the pulse signal and the coincidence gate control signal at the same time, a detection count is provided;
[0054] The CPU controller 1 includes:
[0055] A counting module 11 for performing automatic counting and transmitting the counting data;
[0056] A numerical value input module 12 for setting the time value and transmitting the set numerical signal;
[0057] An analysis and processing module 13 for receiving the data transmitted by the counting module 11 and the numerical value input module 12, then performing comparative analysis, and further transmitting the opening and closing signal;
[0058] A signal transmission module 14 for receiving the signal transmitted by the analysis and processing module 13 and then transmitting the gating control signal and the coincidence gate control signal;
[0059] The analysis and processing module 13 is respectively connected to the counting module 11 and the numerical input module 12 for signal reception, and the analysis and processing module 13 is connected to the signal transmission module 14 for signal transmission. The signal transmission module 14 is respectively connected to the gating generation circuit 2 and the coincidence gate generation circuit 9 for signal transmission;
[0060] In this embodiment, the numerical input module 12 can be used to set the transmission times of the gating control signal and the coincidence gate control signal for the analysis and processing module 13. Then, in cooperation with the counting transmission of the counting module 11 and the data comparison of the analysis and processing module 13, the signal transmission module 14 respectively transmits the gating control signal and the coincidence gate control signal to the gating generation circuit 2 and the coincidence gate generation circuit 9 at a fixed time;
[0061] The method for improving the error counting device of the gated single-photon detector includes the following steps:
[0062] Step 1, set the transmission times of the gating control signal and the coincidence gate control signal;
[0063] Through the numerical input module 12, set the transmission times of the gating control signal and the coincidence gate control signal, and then transmit them to the analysis and processing module 13. For example, if the transmission time of the coincidence gate control signal is set to MT, then the transmission time of the gating control signal is set to XT, where both X and M are natural numbers, T is the period of the gating control signal, and X is less than M;
[0064] Step 2, transmit the gating control signal and the coincidence gate control signal;
[0065] Run the counting module 11 to make the counting module 11 perform automatic counting work, and then transmit the counting time to the analysis and processing module 13. Then, through the analysis and processing module 13, compare the time transmitted by the counting module 11 with the time set by the numerical input module 12. For example, when the time transmitted by the counting module 11 is at XT, the gating control signal is transmitted to the gating generation circuit 2 through the signal transmission module 14, and when the time transmitted by the counting module 11 is at MT, the coincidence gate control signal is transmitted to the coincidence gate generation circuit 9 through the signal transmission module 14;
[0066] Step 3, perform detection and counting work;
[0067] After the gating generation circuit 2 receives the gating control signal, it detects the gating control signal and then transmits it to the first filter 4, the serial detector 5, and the second filter 6 in sequence. Among them, the first filter 4 filters the gating control signal, and the serial detector 5 detects and transmits the differential signal and the avalanche signal generated by the gating control signal. Moreover, the second filter 6 filters the differential signal and the avalanche signal and then transmits them to the discrimination circuit 8. After being detected by the discrimination circuit 8, the pulse signal is transmitted to the signal extraction circuit 10. When the coincidence gate generation circuit 9 receives the coincidence gate control signal, it transmits it to the signal extraction circuit 10. Finally, through the operation of the signal extraction circuit 10, the coincidence gate control signal and the pulse signal are compared. When both of them are available, a detection count is generated;
[0068] It should be noted that because XT is always less than MT, when the coincidence gate control signal is opened, a complete gating control signal will definitely appear. Even if a "half gating signal" appears at (M - X)T, since there is no coincidence gate signal at this position, it will not be discriminated by the signal extraction circuit 10, and thus an incorrect detection count will not be generated. As shown here Figure 3 shown.
[0069] The above describes the embodiments of this embodiment, but this embodiment is not limited to the above specific implementation manners. The above specific implementation manners are only illustrative and not restrictive. Under the inspiration of this embodiment, those of ordinary skill in the art can also make many forms, all of which fall within the protection scope of this embodiment.
Claims
1. An apparatus for improving the error counting of a gated single - photon detector, characterized in that the apparatus for improving the error counting of the gated single - photon detector includes: a CPU controller (1) for periodically transmitting a gated control signal and a coincidence gate control signal; a gated generation circuit (2) for receiving the gated control signal transmitted by the detection CPU controller (1) and transmitting the gated control signal; a first resistor (3) for reducing the pressure in the line for transmitting the gated control signal; a first filter (4) for removing interference signals in the gated control signal transmitted by the gated generation circuit (2); a serial detector (5) for serially detecting the differential signal and the avalanche signal generated by the differential - integral effect of the gated control signal and transmitting the differential signal and the avalanche signal; a second filter (6) for removing interference signals in the differential signal and the avalanche signal transmitted by the serial detector (5) and transmitting the differential signal and the avalanche signal; a second resistor (7) for reducing the pressure in the line for transmitting the differential signal and the avalanche signal; a discrimination circuit (8) for discriminating the differential signal and the avalanche signal transmitted by the second filter (6), then forming a pulse signal and transmitting the pulse signal; a coincidence gate generation circuit (9) for receiving the coincidence gate control signal transmitted by the CPU controller (1) and transmitting the coincidence gate control signal; a signal extraction circuit (10) for detecting and comparing the pulse signal and the coincidence gate control signal, and then generating a detection count; the CPU controller (1) is respectively connected to the gated generation circuit (2) and the coincidence gate generation circuit (9) for signal transmission. The gated generation circuit (2) and the first filter (4) are connected in parallel to the first resistor (3) and the serial detector (5). The second filter (6) is connected in parallel to the serial detector (5) and the second resistor (7). The second filter (6) is connected to the discrimination circuit (8) by wireless signal. Both the discrimination circuit (8) and the coincidence gate generation circuit (9) are connected to the signal extraction circuit (10) for signal transmission.
2. An apparatus for improving the error counting of a gated single photon detector according to claim 1, characterized in that, The CPU controller (1) includes: a counting module (11) for automatically counting and transmitting the counting data; a numerical input module (12) for setting time values and transmitting the set numerical signals; an analysis and processing module (13) for receiving the data transmitted by the counting module (11) and the numerical input module (12), then performing comparative analysis, and further transmitting an opening - closing signal; a signal transmission module (14) for receiving the signal transmitted by the analysis and processing module (13) and then transmitting the gated control signal and the coincidence gate control signal.
3. An apparatus for improving the error counting of a gated single-photon detector according to claim 2, characterized in that, The analysis and processing module (13) is respectively connected to the counting module (11) and the numerical input module (12) for signal reception. The analysis and processing module (13) is connected to the signal transmission module (14) for signal transmission. The signal transmission module (14) is respectively connected to the gated generation circuit (2) and the coincidence gate generation circuit (9) for signal transmission.
4. A method for improving the error counting of a gated single photon detector according to claims 1-3, characterized in that, The method includes the following steps: Step 1, set the transmission times of the gating control signal and the coincidence gate control signal; Through the numerical input module (12), set the transmission times of the gating control signal and the coincidence gate control signal, and then transmit them to the analysis and processing module (13). For example, if the transmission time of the coincidence gate control signal is set to MT, then the transmission time of the gating control signal is set to XT, where both X and M are natural numbers, T is the period of the gating control signal, and X is less than M; Step 2, transmit the gating control signal and the coincidence gate control signal; Run the counting module (11) to make the counting module (11) perform automatic counting work, and then transmit the counting time to the analysis and processing module (13). Then, through the analysis and processing module (13), compare the time transmitted by the counting module (11) with the time set by the numerical input module (12). For example, when the time transmitted by the counting module (11) is at XT, transmit the gating control signal to the gating generation circuit (2) through the signal transmission module (14), and when the time transmitted by the counting module (11) is at MT, transmit the coincidence gate control signal to the coincidence gate generation circuit (9) through the signal transmission module (14); Step 3, perform detection counting work; When the gating generation circuit (2) receives the gating control signal, detect the gating control signal, and then transmit it to the first filter (4), the serial detector (5), and the second filter (6) in sequence. Among them, the first filter (4) filters the gating control signal, and the serial detector (5) detects and transmits the differential signal and the avalanche signal generated by the gating control signal. The second filter (6) filters the differential signal and the avalanche signal, and then transmits them to the discrimination circuit (8). Then, through the detection of the discrimination circuit (8), transmit the pulse signal to the signal extraction circuit (10). When the coincidence gate generation circuit (9) receives the coincidence gate control signal, transmit it to the signal extraction circuit (10). Finally, through the operation of the signal extraction circuit (10), compare the coincidence gate control signal and the pulse signal. When both are available, generate a detection count.