Soft start circuit, soft start method, signal generation method, and electronic device
Through the combined design of bias circuit, shunt circuit and output circuit, the voltage shock and temperature drift problems during startup of the low-voltage difference linear regulator are solved, smooth startup and high-stability output are achieved, and it is suitable for power management of low-voltage difference linear regulators.
Patent Information
- Application Number
- CN202510779275.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-12
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2045-06-12
AI Technical Summary
Existing low-dropout linear regulators experience a transient output voltage surge during startup, causing abnormal operation of subsequent circuits. Furthermore, the soft-start process relies on external capacitors or complex control logic, increasing system size or design complexity. Furthermore, the output voltage stability and temperature coefficient characteristics are insufficient.
A combined design of bias circuit, shunt circuit and output circuit is adopted. Bias current and voltage are generated by a reference power supply. Multiple parallel shunt branches and switch branches are used to gradually adjust the output voltage to achieve smooth startup, reduce the impact of temperature drift, and simplify the circuit structure.
It achieves smooth startup of the output voltage without voltage jump, has excellent zero temperature coefficient characteristics, simplifies circuit design, saves chip area, and improves the stability and reliability of the power supply system.
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Figure CN120335376B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of circuit technology, and in particular to a soft start circuit, a soft start method, a signal generation method, and an electronic device. Background Art
[0002] With the advancement of integrated circuit technology, low-voltage, low-power applications are becoming increasingly widespread. Low-dropout linear regulators (LDOs), as an important power management circuit, are widely used in systems such as smart terminals, wearable devices, and IoT terminals. However, when LDOs are powered on, they can experience a transient surge in output voltage, causing malfunctions in downstream circuits. Therefore, the soft-start issue of LDOs warrants attention. Summary of the Invention
[0003] In view of this, the embodiments of the present application provide a soft start circuit, a soft start method, a signal generation method, and an electronic device, in order to provide a soft start circuit with a simple structure, a smooth start process, high output stability, and a good zero temperature coefficient characteristic, so as to meet the needs of higher performance power management. In the first aspect, a soft start circuit is provided, comprising: a bias circuit, a shunt circuit, a shunt control circuit, and an output circuit; the bias circuit is connected to a reference power supply, and is connected to the shunt control circuit and the shunt circuit, and is configured to provide a bias current and a bias voltage based on the reference power supply; the shunt circuit is connected to the output circuit, and includes a plurality of shunt branches arranged in parallel, and is configured to shunt the bias current; the shunt control circuit is connected to the output circuit, and includes a plurality of switch branches, the switch branches are correspondingly connected to the shunt branches, and is configured to select the plurality of shunt branches based on a control signal and adjust the bias current; the output circuit is configured to gradually increase the output voltage based on the current progressive effect of the shunt circuit.
[0004] The above soft-start circuit features a smooth, voltage-free soft-start process. The output voltage is minimally affected by temperature fluctuations, exhibiting an excellent zero temperature coefficient. Furthermore, the circuit structure is simple and easy to integrate. Starting control eliminates the need for external large-capacity capacitors, saving chip area. This application can significantly improve the stability and overall performance of the power supply system, making it particularly suitable for applications sensitive to starting voltage variations or requiring high system reliability.
[0005] Optionally, the bias circuit includes: a first current source, a first bias switch tube, a second bias switch tube, a third bias switch tube and a fourth bias switch tube; the first bias switch tube is configured to generate a first bias voltage based on the bias current of the first current source, wherein the drain of the first bias switch tube is connected to the first current source and the gate of the first bias switch tube, and the gate of the first bias switch tube is connected to the gate of the second switch tube; the drain of the second bias switch tube is coupled to the drain of the third bias switch tube, the gate of the second bias switch tube is coupled to the shunt circuit, and the source of the first bias switch tube and the source of the second bias switch tube are grounded; the third bias switch tube is configured to generate a second bias voltage based on the bias current, wherein the drain of the third bias switch tube is coupled to the gate of the third bias switch tube, the source of the third bias switch tube and the source of the fourth bias switch tube are coupled to the reference power supply, and the gate of the third bias switch tube is coupled to the gate of the fourth bias switch tube; the drain of the fourth bias switch tube is coupled to the shunt control circuit.
[0006] Optionally, the switch branch includes: a first switch tube; the shunt branch includes: a first transistor; the drain of the first switch tube is coupled to the drain of the fourth bias switch tube, the source of the first switch tube is coupled to the drain of the first transistor, and the gate of the first switch tube is coupled to the control signal; the source of the first transistor is grounded, the gate of the first transistor is coupled to the gate of the second bias switch tube, and between multiple shunt branches, the gates of multiple first transistors are interconnected.
[0007] Optionally, the output circuit includes: a first resistor and a first capacitor; the first end of the first resistor is coupled to the drain of the first switching tube, and the second end is coupled to the source of the first transistor; the first capacitor is connected in parallel with the first resistor, and the first end of the first capacitor serves as the output end of the soft start circuit.
[0008] Optionally, it also includes: a control circuit configured to provide a control signal to the shunt control circuit, the control circuit including: a NOT logic gate, an OR logic gate, a second capacitor, a first flip switch, a second flip switch, and a Schmitt trigger; the input of the NOT logic gate is coupled to the enable signal of the soft start circuit, and the output is coupled to the first input of the OR logic gate; the second input of the OR logic gate is coupled to the first signal, and the output of the OR logic gate is coupled to the gate of the first flip switch; the second capacitor is coupled between the source and drain of the first flip switch, and the source is grounded; the gate of the second flip switch is coupled to the gate of the first flip switch, the source of the second flip switch is coupled to the second current source, and the drain of the second flip switch is coupled to the drain of the first flip switch; the input of the Schmitt trigger is coupled to the drain of the first flip switch, and the output outputs the first signal.
[0009] Optionally, the shunt control circuit further includes: a plurality of D flip-flops configured to combine and determine the control signal according to a preset switching logic.
[0010] In a second aspect, a soft start method is provided for the soft start circuit of the first aspect, comprising: generating a bias current and a bias voltage based on a bias circuit; shunting the bias current through a shunt circuit to reduce the initial output voltage; and controlling the shunt control circuit to shut down multiple shunt branches of the shunt circuit, thereby reducing the shunt current and increasing the output voltage until a predetermined output voltage value is reached.
[0011] In a third aspect, a method for generating a control signal of a soft start circuit is provided, which is used for the control circuit of the soft start circuit of the first aspect, including: when the enable signal is configured to be low, the gate voltage of the first flip switch is high, the first flip switch is in the on state, and the second flip switch is in the off state; controlling the enable signal to be high, adjusting the first flip switch to the off state, the second flip switch to the on state, and charging the second capacitor through the second flip switch, when the voltage of the second capacitor reaches a first threshold voltage, controlling the output of the first signal; using the first signal, driving the first flip switch to the on state and the second flip switch to the off state, so that the second capacitor discharges through the first flip switch, when the voltage of the second capacitor reaches the second threshold voltage, controlling the output of the first signal to stop, thereby generating a periodic control signal.
[0012] In a fourth aspect, a soft start device is provided, comprising: a bias unit for generating a bias current and a bias voltage based on a bias circuit; a shunt unit for shunting the bias current through the shunt circuit to reduce the initial output voltage; and a control unit for controlling the shunt control circuit to shut down multiple shunt branches of the shunt circuit, reduce the shunt current, and increase the output voltage until a predetermined output voltage value is reached.
[0013] In a fifth aspect, an electronic device is provided, comprising the soft start circuit of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The following is a brief introduction to the drawings used in describing the embodiments of this application:
[0015] Figure 1 A circuit structure diagram of a soft start circuit provided in some embodiments of the present application is shown;
[0016] Figure 2 A circuit structure diagram of another soft start circuit provided in some embodiments of the present application is shown;
[0017] Figure 3 A waveform diagram of a soft start circuit startup process provided in some embodiments of the present application is shown;
[0018] Figure 4 A schematic structural diagram of a control circuit provided in some embodiments of the present application is shown;
[0019] Figure 5 A schematic diagram of a control circuit timing waveform provided in some embodiments of the present application is shown;
[0020] Figure 6 A schematic flow chart of a soft start method provided in some embodiments of the present application is shown;
[0021] Figure 7 A schematic flow chart showing a method for generating a control signal for a soft start circuit provided in some embodiments of the present application is shown;
[0022] Figure 8 A structural schematic diagram of a soft start device provided in some embodiments of the present application is shown. DETAILED DESCRIPTION
[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the specific implementation methods of the present application will be described below with reference to the accompanying drawings. The drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings or embodiments can be obtained based on these drawings or embodiments without inventive work. Adjustments and improvements made without departing from the concept of the present application are all within the scope of protection of the present application.
[0024] To simplify the drawings, the figures schematically illustrate only the portions relevant to the embodiments and do not represent the actual structure of the products. Furthermore, to simplify the drawings and facilitate understanding, in some figures, only a portion of components with the same structure or function are schematically depicted; in practice, more or fewer components with the same structure or function may exist.
[0025] With the advancement of integrated circuit technology, low-voltage, low-power applications are becoming increasingly widespread. As a key power management circuit, low-dropout (LDO) linear regulators (LDRs) are widely used in systems such as smart terminals, wearable devices, and IoT terminals. LDOs regulate input voltage to a precise output voltage. Their operating principle is based on feedback. Through internal components such as a pass transistor, amplifier, and feedback resistor, they can stably maintain the output voltage at a set value. They typically exhibit extremely low self-noise and a high power supply rejection ratio (PSRR), making them very useful in applications requiring a low-noise power supply. Traditional designs require low dropout voltage, high-precision output voltage, and excellent load transient response. In practical applications, LDOs often require a soft-start function to prevent transient output voltage surges during power-up, which can cause malfunctions in downstream circuits, or power supply noise issues caused by sudden changes in load current. This soft-start function allows the output voltage to gradually increase at a set rate, reducing current surges during system startup, protecting load circuits, and improving overall system stability and reliability. Existing low-dropout linear regulator (LDO) implementations commonly suffer from the following issues: First, the soft-start process relies on external capacitors or complex control logic, increasing system size and design complexity. Second, the soft-start linearity and controllability are insufficient, which can easily lead to uneven output voltage rise or even oscillation. Third, the output voltage stability is poor under temperature fluctuations, with significant temperature drift. Therefore, an LDO design with a simple structure, smooth startup, high output stability, and a good zero temperature coefficient is urgently needed to meet the needs of higher-performance power management.
[0026] The present application aims to provide a soft start circuit to overcome the problems of uneven soft start, large temperature drift and complex structure in the prior art.
[0027] The following is a description with reference to the accompanying drawings:
[0028] Figure 1A circuit structure diagram of a soft start circuit provided in some embodiments of the present application is shown. In a first aspect, a soft start circuit is provided, comprising: a bias circuit 110, a shunt circuit 120, a shunt circuit 130, and an output circuit 140; the bias circuit 110 is connected to a reference power supply and to the shunt circuit 130 and the shunt circuit 120, and is configured to provide a bias current and a bias voltage based on the reference power supply; the shunt circuit 120 is connected to the output circuit 140 and includes a plurality of shunt branches arranged in parallel and configured to shunt the bias current; the shunt circuit 130 is connected to the output circuit 140 and includes a plurality of switch branches, the switch branches being connected to the shunt branches in correspondence and configured to select the plurality of shunt branches based on a control signal to adjust the bias current; and the output circuit 140 is configured to gradually increase the output voltage based on the current progressive effect of the shunt circuit 120.
[0029] The above soft start circuit generates a bias current and a bias voltage through a reference power supply, and is connected one-to-one with multiple switch branches in the shunt circuit 130 and multiple shunt branches in the shunt circuit 120, so that the multiple switch branches, under the action of at least one control signal, turn on or off each shunt branch, and control the output voltage to gradually rise in a step-like manner, so that the voltage of the soft start circuit gradually rises during the startup process, so that the output voltage is in a certain proportional relationship with the input voltage. The soft start circuit provided in the present application has the performance characteristics of a smooth soft start process and no voltage jump, the output voltage is less affected by temperature changes, and has an excellent zero temperature coefficient characteristic, and the circuit structure is simple and easy to integrate. The startup control does not require an external large-capacity capacitor, saving chip area. Through the above improvements, the present application can significantly improve the stability and overall performance of the power supply system, and is particularly suitable for application scenarios that are sensitive to startup voltage changes or have high requirements for system reliability.
[0030] Figure 2The figure shows a circuit structure diagram of another soft start circuit provided in some embodiments of the present application. The bias circuit 110 includes: a first current source Is1, a first bias switch tube B1, a second bias switch tube B2, a third bias switch tube B3 and a fourth bias switch tube B4; the first bias switch tube B1 is configured to generate a first bias voltage based on the bias current of the first current source Is1, wherein the drain of the first bias switch tube B1 is connected to the first current source Is1 and the gate of the first bias switch tube B1, and the gate of the first bias switch tube B1 is connected to the gate of the second switch tube; the drain of the second bias switch tube B2 is coupled to the drain of the third bias switch tube B3, and the second bias switch tube B4 is coupled to the drain of the third bias switch tube B3. The gate of the bias switch tube B2 is coupled to the shunt circuit 120, the source of the first bias switch tube B1 and the source of the second bias switch tube B2 are grounded; the third bias switch tube B3 is configured to generate a second bias voltage based on the bias current, wherein the drain of the third bias switch tube B3 is coupled to the gate of the third bias switch tube B3, the source of the third bias switch tube B3 and the source of the fourth bias switch tube B4 are coupled to the reference power supply, and the gate of the third bias switch tube B3 is coupled to the gate of the fourth bias switch tube B4; the drain of the fourth bias switch tube B4 is coupled to the shunt circuit 130.
[0031] In the above embodiment, the first current source Is1 generates a bias current, and then generates a first bias voltage through the first bias switch tube B1 and provides it to the second bias switch tube B2. The second bias switch tube B2 is used as an auxiliary bias to stabilize the branch current reference and ensure that the shunt branch operates in a suitable working range. The second bias voltage is generated by the third bias switch tube B3 and provided to the fourth bias switch tube B4. The fourth bias switch tube B4 generates a stable bias current for subsequent current distribution of the shunt branch. At the same time, the second bias switch tube B2 provides a stable gate voltage reference for use by the transistors in the multiple shunt branches, ensuring that during the soft start process of the multiple shunt branches, even as the switch branches operate, the transistors in the shunt branches can still maintain the correct bias, and the shunt current will not be inaccurate or drift due to unstable gate-source voltage.
[0032] Continue to refer Figure 2 The switch branch includes: a first switch tube S1; the shunt branch includes: a first transistor M1; the drain of the first switch tube S1 is coupled to the drain of the fourth bias switch tube B4, the source of the first switch tube S1 is coupled to the drain of the first transistor M1, and the gate of the first switch tube S1 is coupled to the control signal; the source of the first transistor M1 is grounded, the gate of the first transistor M1 is coupled to the gate of the second bias switch tube B2, and the gates of multiple first transistors M1 are interconnected between multiple shunt branches.
[0033] The output circuit 140 includes: a first resistor R1 and a first capacitor C1; a first end of the first resistor R1 is coupled to the drain of the first switch tube S1, and a second end is coupled to the source of the first transistor M1; the first capacitor C1 is connected in parallel with the first resistor R1, and the first end of the first capacitor C1 serves as the output end of the soft start circuit.
[0034] The shunt circuit 130 may include multiple first switching transistors S1, and the shunt circuit 120 may include multiple first transistors M1. The first switching transistors S1 and the first transistors M1 in the same branch are connected accordingly, for example, the source of the first switching transistor S1 is connected to the drain of the first transistor M1. For example, n shunt branches consisting of the first switching transistors S1 and the first transistors M1 form shunt branches with currents I1, I2, ..., In. By setting the sizes of the multiple first transistors M1 to Mn so that the sum of the currents I1 to In is less than the bias current ITOL provided by the fourth bias switching transistor B4, the initial voltage of the output voltage Vout1 before the soft start circuit is enabled can be expressed by Formula 1:
[0035]
[0036] The current ITOL is the current flowing into the shunt circuit 130 through the fourth bias switch B4.
[0037] When the soft start circuit is enabled, the shunt circuit 130 turns off the first switch tubes S1 to Sn step by step, so that the voltage rises step by step. When the kth switch is turned off, the output voltage Vout can be expressed by Formula 2:
[0038]
[0039] When all the first switch tubes S1 to Sn are turned off, the output voltage Vout1 can be expressed by Formula 3:
[0040]
[0041] As can be seen from the above equation, the final output voltage Vout1 is proportional to the voltage VBG of the current Is1 forming the current source. The diverted and converged current forms the output voltage Vout1 across the first resistor R1, which is then stabilized by the first capacitor C1 to generate the final output voltage Vout. Therefore, the loop feedback characteristics of the soft-start circuit ensure that the final output voltage Vout is also proportional to VBG, thereby achieving a zero-temperature-coefficient stable supply voltage. It should be noted that the final output voltage Vout can serve as the reference voltage Vref for the low-dropout linear regulator.
[0042] Figure 3A waveform diagram illustrating the startup process of a soft-start circuit provided in some embodiments of the present application is shown. In the diagram, EN represents the enable signal, CTR1 represents the trigger signal of the first switch S1, CTR2 represents the trigger signal of the first switch S2, and CTRn represents the trigger signal of the first switch Sn. It can be seen that the output voltage Vout1 exhibits a step-by-step upward trend as the first switches are gradually turned off. The first capacitor C1 further smoothes the output voltage waveform to form the output voltage Vout2.
[0043] Figure 4 A structural schematic diagram of a control circuit provided in some embodiments of the present application is shown, wherein the control circuit is configured to provide a control signal to the shunt circuit 130, and the control circuit includes: a NOT logic gate, an OR logic gate, a second capacitor, a first flip switch, a second flip switch, and a Schmitt trigger; the input of the NOT logic gate is coupled to the enable signal of the soft start circuit, and the output is coupled to the first input of the OR logic gate; the second input of the OR logic gate is coupled to the first signal, and the output of the OR logic gate is coupled to the gate of the first flip switch; a second capacitor is coupled between the source and drain of the first flip switch, and the source is grounded; the gate of the second flip switch is coupled to the gate of the first flip switch, the source of the second flip switch is coupled to the second current source, and the drain of the second flip switch is coupled to the drain of the first flip switch; the input of the Schmitt trigger is coupled to the drain of the first flip switch, and the output outputs the first signal.
[0044] In the above control circuit, EN is the enable signal for the low-dropout linear regulator. Before the low-dropout linear regulator is enabled, the enable signal EN is at a low level. At this time, the first signal CT1 is at a high level, controlling the first flip switch SWN1 to open, the second flip switch SWP1 to close, and the voltage Vc on the second capacitor Cc to 0V. When the enable signal EN for the low-dropout linear regulator is at a high level, the second flip switch SWP1 is turned on, the first flip switch SWN1 is turned off, and the bias current Ib charges the second capacitor Cc, causing the voltage Vc on the second capacitor Cc to rise linearly. When the voltage Vc rises to the rising flip voltage VH of the Schmitt trigger, the output level SM_O of the Schmitt trigger is set to 1, controlling the first flip switch SWN1 to open, and the second flip switch SWP1 to close. The capacitor CC discharges through SWN1. When the voltage VC drops to the falling flip voltage VL of the Schmitt trigger, the output level SM_O of the Schmitt trigger is set to 0, controlling the first flip switch SWN1 to close, and the second flip switch SWP1 to open. Figure 5A schematic diagram of a control circuit timing waveform provided in some embodiments of the present application is shown. According to the above control process cycle, the output level SM_O of the Schmitt trigger finally outputs a periodic square wave signal. In the subsequent circuit, a combinational logic can be formed by a trigger or other signal control device to control the conduction or shutdown of multiple switching devices in the shunt circuit 130.
[0045] In some embodiments, continue with reference to Figure 4 The control circuit further includes: a plurality of D flip-flops configured to determine the control signal in combination according to a preset switching logic.
[0046] Figure 6 A flowchart of a soft start method provided in some embodiments of the present application is shown. The soft start method is used for the soft start circuit provided in the above embodiments, including:
[0047] S610: Generate a bias current and a bias voltage based on a bias circuit;
[0048] S620: shunting the bias current through the shunt circuit to reduce the initial output voltage;
[0049] S630: Control the shunt control circuit to shut down multiple shunt branches of the shunt circuit, reduce the shunt current, and increase the output voltage until a predetermined output voltage value is reached.
[0050] The specific principles and effects of the above soft start method have been explained in the above embodiments and will not be described in detail here.
[0051] Figure 7 A flow chart of a method for generating a control signal for a soft start circuit provided in some embodiments of the present application is shown. The control signal generation method is used to control the control circuit of the soft start circuit of the first aspect, comprising:
[0052] S710: When the configuration enable signal is at a low level, the gate voltage of the first flip switch is at a high level, the first flip switch is in an on state, and the second flip switch is in an off state;
[0053] S720: Control the enable signal to be high, adjust the first flip switch to the off state, the second flip switch to the on state, and charge the second capacitor through the second flip switch. When the voltage of the second capacitor reaches the first threshold voltage, control the output of the first signal;
[0054] S730: Using the first signal, drive the first flip switch to the on state and the second flip switch to the off state, so that the second capacitor discharges through the first flip switch. When the voltage of the second capacitor reaches the second threshold voltage, the control stops outputting the first signal, thereby generating a periodic control signal.
[0055] The specific principles and effects of the above control signal generation method have been explained in the above embodiments and will not be described in detail here.
[0056] Based on the same technical concept, Figure 8 A structural schematic diagram of a soft start device provided in some embodiments of the present application is shown, including: a bias unit 810, used to generate a bias current and a bias voltage based on a bias circuit; a shunt unit 820, used to shunt the bias current through the shunt circuit to reduce the initial output voltage; and a control unit 830, used to control the shunt control circuit to shut down multiple shunt branches of the shunt circuit, reduce the shunt current, and increase the output voltage until a predetermined output voltage value is reached.
[0057] The specific implementation and beneficial effects of the soft start device described above can be found in the detailed description of the soft start circuit and soft start method embodiments described above, and are not further elaborated here. The division of the above units is merely a division of logical functions. In actual implementation, they can be fully or partially integrated into a single physical entity, or physically separated. Furthermore, the above units can be implemented as software invoked by a processor. Alternatively, the above units can be implemented as hardware circuits, with the functions of some or all of the units being implemented through the design of the hardware circuits. The hardware circuits can be understood as one or more processors. For example, in some embodiments, the hardware circuits are application-specific integrated circuits (ASICs), which implement the functions of some or all of the above units through the design of the logical relationships between the components within the circuits. In another embodiment, the hardware circuits can be implemented as programmable logic devices (PLDs), which can include a large number of logic gates. The logical relationships between the logic gates are configured using configuration files to implement the functions of some or all of the above units. The units of the above devices can be implemented entirely through programs invoked by the processor, entirely through hardware circuits, or partially through programs invoked by the processor, with the remainder implemented through hardware circuits.
[0058] Based on the same technical concept, the present application also provides an electronic device, including the soft start circuit provided in the above embodiment.
[0059] In this application, unless otherwise specified or limited, ordinal numbers such as "first" and "second" are used solely to distinguish and describe related objects and should not be understood to indicate or imply the relative importance or order of the related objects. Furthermore, ordinal numbers do not represent the number of related objects. For example, "first capacitor" may include one capacitor or multiple capacitors.
[0060] "Multiple" includes two or more, and other quantifiers are similar.
[0061] The terms "or" and "and / or" in this application are used to describe the relationship between associated objects, which represents non-exclusive inclusion. For example, "A and / or B" and "A or B" can both include: "A alone", "B alone", or "A and B", where "A" and "B" can include a single object or multiple objects. For another example, "A, B and / or C", "A, B or C" and "A, B and C" can both include: "A alone", "B alone", "C alone", "A and B", "A and C", "B and C", or "A, B and C", where "A", "B" and "C" can include a single object or multiple objects. In addition, " / " in this application is used to represent the "or" relationship between the preceding and following associated objects. In this application, "at least one of A or B" and "one or more of A and B" have the same meaning as "A or B" above, and "one or more of A, B and C" and "at least one of A, B or C" have the same meaning as "A, B or C" above. "One or more of A, B and C" have the same meaning as "A, B or C" above.
[0062] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments. In addition, the above embodiments can be freely combined as needed.
Claims
1. A soft start circuit, characterized in that: Applied to low voltage drop linear regulator, including: bias circuit, shunt circuit, shunt control circuit and output circuit; The bias circuit is connected to a reference power supply, and is connected to the shunt control circuit and the shunt circuit, and is configured to provide a bias current and a bias voltage based on the reference power supply; The shunt circuit is connected to the output circuit and includes a plurality of shunt branches arranged in parallel, and is configured to shunt the bias current. The bias current is shunted by the shunt circuit to reduce the initial output voltage; The shunt control circuit is connected to the output circuit and includes a plurality of switch branches, each of which is connected to the shunt branches correspondingly. The switch branches are configured to switch on the plurality of shunt branches and switch off the plurality of shunt branches based on a control signal, adjust the bias current, and increase the output voltage until the output voltage reaches a predetermined value. Wherein, the switch branch includes: a first switch tube; the shunt branch includes: a first transistor; A control circuit configured to provide a control signal to the shunt control circuit, the control circuit comprising: a NOT logic gate, an OR logic gate, a second capacitor, a first flip switch, a second flip switch, and a Schmitt trigger; The input end of the NOT logic gate is coupled to the enable signal of the soft start circuit, and the output end is coupled to the first input end of the OR logic gate; The second input terminal of the OR logic gate is coupled to the first signal, and the output terminal of the OR logic gate is coupled to the gate of the first flip switch; The second capacitor is coupled between the source and drain of the first flip switch, and the source is grounded; The gate of the second flip switch is coupled to the gate of the first flip switch, the source of the second flip switch is coupled to the second current source, and the drain of the second flip switch is coupled to the drain of the first flip switch; The input end of the Schmitt trigger is coupled to the drain of the first flip switch, and the output end outputs the first signal; The output circuit is configured to gradually increase the output voltage based on the current progressive effect of the shunt circuit.
2. The soft start circuit according to claim 1, wherein: The bias circuit includes: a first current source, a first bias switch tube, a second bias switch tube, a third bias switch tube and a fourth bias switch tube; The first bias switch is configured to generate a first bias voltage based on the bias current of the first current source, wherein the drain of the first bias switch is connected to the first current source and the gate of the first bias switch, and the gate of the first bias switch is connected to the gate of the second bias switch; The drain of the second bias switch tube is coupled to the drain of the third bias switch tube, the gate of the second bias switch tube is coupled to the shunt circuit, and the source of the first bias switch tube and the source of the second bias switch tube are grounded; The third bias switch is configured to generate a second bias voltage based on the bias current, wherein a drain of the third bias switch is coupled to a gate of the third bias switch, a source of the third bias switch and a source of the fourth bias switch are coupled to the reference power supply, and a gate of the third bias switch is coupled to a gate of the fourth bias switch; A drain of the fourth bias switch tube is coupled to the shunt control circuit.
3. The soft start circuit according to claim 2, wherein: The drain of the first switch tube is coupled to the drain of the fourth bias switch tube, the source of the first switch tube is coupled to the drain of the first transistor, and the gate of the first switch tube is coupled to the control signal; The source of the first transistor is grounded, the gate of the first transistor is coupled to the gate of the second bias switch tube, and the gates of multiple first transistors are connected to each other between the multiple shunt branches.
4. The soft start circuit according to claim 3, characterized in that: The output circuit includes: a first resistor and a first capacitor; A first end of the first resistor is coupled to the drain of the first switch tube, and a second end of the first resistor is coupled to the source of the first transistor; The first capacitor is connected in parallel with the first resistor, and a first end of the first capacitor serves as an output end of the soft start circuit.
5. The soft start circuit according to claim 4, characterized in that: The shunt control circuit further includes: a plurality of D flip-flops configured to combine and determine the control signal according to a preset switching logic.
6. A method for generating a soft start circuit control signal, characterized in that: The control circuit for the soft start circuit according to claim 1, comprising: When the enable signal is configured to be low, the gate voltage of the first flip switch is high, the first flip switch is in the on state, and the second flip switch is in the off state; controlling the enable signal to be high, adjusting the first flip switch to an off state and the second flip switch to an on state, charging the second capacitor through the second flip switch, and controlling the output of the first signal when the voltage of the second capacitor reaches a first threshold voltage; The first signal is used to drive the first flip switch to the on state and the second flip switch to the off state, so that the second capacitor discharges through the first flip switch. When the voltage of the second capacitor reaches a second threshold voltage, the control stops outputting the first signal, thereby generating a periodic control signal.
7. A soft start device, characterized in that: The control circuit for the soft start circuit according to claim 1, comprising: a bias unit, configured to generate the bias current and the bias voltage based on the bias circuit; a shunt unit, configured to shunt the bias current through the shunt circuit to reduce the initial output voltage; A control unit is used to control the shunt control circuit to shut down the multiple shunt branches of the shunt circuit, reduce the shunt current, and increase the output voltage until a predetermined output voltage value is reached.
8. An electronic device, characterized in that: The soft start circuit comprises the soft start circuit according to any one of claims 1 to 5.
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