Initialization method of controller, controller and related equipment
By mirroring EEPROM data into RAM inside the controller and using the NVM initialization module to find valid data, the problem of cumbersome and time-consuming communication links during the initialization process of the MCU controller is solved, and a fast and reliable initialization process is achieved.
Patent Information
- Application Number
- CN202510423489.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-03
- Publication Date
- 2025-07-18
AI Technical Summary
In the prior art, the initialization process of the MCU controller requires frequent reading of data from external EEPROM, resulting in cumbersome and long-term communication links, affecting the timeliness of initialization and user experience.
Mirror the EEPROM data sector of the external storage medium into the controller's internal RAM, and search for valid data in the RAM image through the NVM initialization module to realize the internal initialization of the controller.
It greatly reduces the complexity of controller initialization and data reading link, shortens initialization time, improves initialization speed and system reliability, and reduces power consumption.
Smart Images
Figure CN120335875A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of automotive electronics technology, and particularly to an initialization method for a controller, a controller, and related devices. Background Art
[0002] With the popularization of automotive intelligence, the MCU (Microcontroller Unit) is increasingly used as an important control chip in intelligent vehicles. The startup timeliness of the MCU has a significant impact on various control performances of the vehicle, such as unlocking and greeting guests, and the quick recovery ability after a fault restart. In the field of automotive electronics technology, this integrated circuit chip, the MCU, is one of the core components of the electronic control module (ECU) of a complex system, responsible for executing control programs and processing data. Currently, the controller software programs executed by ECUs used in the automotive electronics field are mostly developed based on the Classic Autosar Platform, which provides a standardized software architecture for automotive electronic systems. However, when the controller software program developed based on this platform is configured to be initialized and started by the MCU, it often needs to read the corresponding control instruction data from an externally simulated EEPROM to complete the initialization and startup. This technical implementation process requires frequent calls to the interfaces provided by the controller's FLS (Flash) driver, and data access is performed according to the communication mechanism defined between the current MCU controller and the external storage medium (such as QSPI). There are many upstream and downstream functional modules involved in the communication, and the link is cumbersome, which takes a long time. Thus, to a certain extent, it affects the timeliness of the MCU initialization and startup for controlling the vehicle layout, and the user experience is not good. Summary of the Invention
[0003] In view of this, embodiments of this application provide an initialization method, device, storage medium, and electronic device for a controller to at least partially solve the above problems.
[0004] In a first aspect, embodiments of this application provide an initialization method for a controller, including:
[0005] Transmitting an analog EEPROM data sector from the external storage medium to the internal RAM of the controller to implement a RAM mirror of the external storage medium inside the controller;
[0006] Searching for valid data that supports the initialization in the RAM mirror through the NVM initialization module of the controller, where the NVM initialization module is a functional component inside the controller for storing non-volatile data;
[0007] When the controller is powered on for the initialization, reading the valid data from the RAM mirror to initialize and start the controller.
[0008] Optionally, in an embodiment of the present application,
[0009] The NVM initialization module of the controller scans and supports valid data for the initialization in the RAM image, including:
[0010] When the simulated EEPROM data sector is configured to store data using multiple partitions and each partition is set with a corresponding identifier to identify the attributes of the data stored in different partitions through the identifier, according to the identifier, find the valid data corresponding to the initialization control instruction from the simulated EEPROM data sector.
[0011] Optionally, in an embodiment of the present application, the transferring the simulated EEPROM data sector from the external storage medium to the internal RAM of the controller includes:
[0012] Transfer the simulated EEPROM data sector from the external storage medium to the internal RAM of the controller in a manner of high communication main frequency or multiple cores in parallel.
[0013] Optionally, in an embodiment of the present application, the method further includes: based on the RAM image and the identifier, detect whether there is a partition that needs to be repaired in the simulated EEPROM data sector;
[0014] If there is a partition that needs to be repaired, perform a repair operation on the partition that needs to be repaired before the next data is written to the simulated EEPROM data sector.
[0015] Optionally, in an embodiment of the present application, the method further includes: after the controller powers on and completes the initialization, discard the image in the internal RAM of the controller.
[0016] Optionally, in an embodiment of the present application, the method further includes: after discarding the image data in the internal RAM of the controller, release the RAM storage space occupied by the discarded image data to other modules for use at different times.
[0017] Optionally, in an embodiment of the present application, the method further includes: after the controller powers on and completes the initialization, switch the data access mode of the controller to directly access the external storage medium for reading and writing operation of the controller running data.
[0018] In a second aspect, based on the initialization method of a controller described in the first aspect of the present application, an embodiment of the present application further provides a controller, including:
[0019] A mirroring module, configured to transfer an analog EEPROM data sector from the external storage medium to the internal RAM of the controller, so as to implement RAM mirroring of the external storage medium inside the controller;
[0020] A scanning module, configured to find valid data supporting the initialization in the RAM mirror through the NVM initialization module of the controller, where the NVM initialization module is a functional component for storing non-volatile data inside the controller;
[0021] An initialization module, configured to read the valid data from the RAM mirror to start the controller initialization when the controller is powered on for the initialization.
[0022] In a third aspect, an embodiment of the present application further provides a computer storage medium, on which computer-executable instructions are stored, and when the computer-executable instructions are executed, any one of the controller initialization methods described in the first aspect of the embodiments of the present application is executed.
[0023] In a fourth aspect, an embodiment of the present application further provides an electronic device, including: a processor, a memory, a communication interface, and a communication bus, where the processor, the memory, and the communication interface complete communication with each other through the communication bus;
[0024] The memory is used to store at least one executable instruction, and the executable instruction causes the processor to execute any one of the controller initialization methods described in the first aspect of the embodiments of the present application.
[0025] The present application provides a controller initialization method, apparatus, and related devices, including: transferring an analog EEPROM data sector from the external storage medium to the internal RAM of the controller to implement RAM mirroring of the external storage medium inside the controller; finding valid data supporting the initialization in the RAM mirror through the NVM initialization module of the controller, where the NVM initialization module is a functional component for storing non-volatile data inside the controller; when the controller is powered on for the initialization, reading the valid data from the RAM mirror to start the controller initialization. This solution internally stores the data that needs to be read from the external storage medium during controller initialization in the form of RAM mirroring inside the controller, so that valid data supporting the initialization can be quickly obtained during controller initialization, greatly reducing the complexity of controller initialization and the data reading link, and effectively reducing the time required for controller initialization. Description of the Drawings
[0026] To more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments recorded in the embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings.
[0027] Figure 1 Schematic diagram of the working process of an initialization method for a controller provided by an embodiment of the present application;
[0028] Figure 2 Schematic diagram of the structure of a controller provided by an embodiment of the present application.
[0029] Figure 3 Schematic diagram of the structure of an electronic device provided by an embodiment of the present application. Detailed implementation manners
[0030] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present application, the following will clearly and completely describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art shall fall within the protection scope of the embodiments of the present application.
[0031] It should be understood that the various steps recorded in the method embodiments of the present application can be executed in different orders and / or in parallel. In addition, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present application is not limited in this regard.
[0032] Embodiment 1
[0033] The embodiment of the present application provides an initialization method for a controller. As Figure 1 shown, Figure 1 Schematic diagram of the working process of an initialization method for a controller provided by an embodiment of the present application, including:
[0034] Step S101: Transfer the analog EEPROM data sector from the external storage medium to the internal RAM of the controller to implement a RAM mirror of the external storage medium inside the controller. In the embodiment of the present application at this stage, when it is determined that the controller needs to be initialized, the instruction data supported by the controller in the external storage medium is transferred to the RAM of the controller at one time, and a RAM mirror is performed on it in the form of an internal analog EEPROM data sector, so that subsequent data access processes do not need to be carried out through buses such as I2C or SPI, and the access speed of the data supporting the controller initialization can be further improved on the basis of internal storage. And this overall process is relatively simple and easy to implement.
[0035] Step S102: Use the NVM initialization module of the controller to find the valid data in the RAM image that supports the initialization. Here, the NVM initialization module is a functional component inside the controller for storing non-volatile data. In the embodiments of the present application, the NVM initialization module (non-volatile memory) is a functional component inside the controller for storing non-volatile data, which can avoid data loss caused by power-off or restart and can well support the quick recovery of the controller after restart. In the embodiments of the present application, for microcontrollers such as MCUs or dedicated data processing chips, the NVM (Non-Volatile Memory) initialization module is an important module for storing non-volatile memory (NVM). Its core feature is that data is not lost after power-off to ensure that the NVM can be correctly configured and run when the system starts. Its cooperative functions are to store firmware (program code), save configuration parameters, record operation data, and achieve data persistence. For vehicle ECUs, the NVM initialization module is also used to store engine calibration parameters, fault codes (DIC), allocate and initialize command queues and doorbell registers, and notify the controller that there are new commands to be processed. It often has multiple registers for storing device capabilities, configuration options, queue information, etc. The NVM initialization module is provided with a corresponding data buffer for temporarily storing the data read from the NVM or the data to be written. In the embodiments of the present application, at this stage, the NVM initialization module scans the RAM image to determine the valid data originally stored in the external storage medium to support the controller initialization, skips redundant hardware self-checks and complex links, can shorten the time to find valid data, and ensure the accuracy of the target valid data found. In addition, in the embodiments of the present application, at this stage, the NVM initialization module scans the analog EEPROM sector to determine the valid data, which can also prevent the wear of specific blocks of the external storage caused by the write operations during the frequent initialization process of the controller. For example, the NVM initialization module can dynamically allocate write positions through sector status detection during initialization to disperse the number of erasures and writes to the external storage medium storage area. The NVM initialization module can also quickly locate the valid sectors through predefined metadata structures such as header flags and index tables during the initialization stage. Especially for automotive controller ECUs, by finding the corresponding data storage index table through the NVM initialization module at startup and only loading the necessary calibration data during operation, the initialization startup time of the controller can be shortened from hundreds of milliseconds to dozens of milliseconds, achieving a balance of system costs, improving system reliability and flexibility.
[0036] Step S103: When the controller is powered on for the initialization, read the valid data from the RAM mirror for the initialization startup of the controller. In the embodiment of the present application, in this stage, the valid data for supporting the controller initialization is obtained from the internal RAM mirror of the controller, eliminating the process of accessing external storage media required in the traditional initialization, that is, there is no need to frequently call the interface provided by the FLS driver to initiate the FLS task - establish communication with the external NVM - initiate the initialization instruction - obtain the valid data - feedback to the upstream, etc. The spelling of the data access link is shortened, and the data storage in the internal RAM mirror of the controller itself is more stable and reliable. While reducing the possibility of initialization errors, since the access speed of the RMA itself is much higher than that of the external storage media, the initialization response time is significantly reduced, so that the time required for the initialization process remains within a relatively constant time range and will not increase significantly with the increase of the data blocks stored in the external storage media. In addition, the power consumption for reading and writing data from the internal RAM is relatively lower than that from the external storage media. Especially when the initialization node frequently accesses data, using the internal RAM can also help reduce the overall power consumption of the system to a certain extent, which is more suitable for application scenarios of devices such as battery-powered intelligent vehicles.
[0037] Optionally, in an embodiment of the present application, the NVM initialization module of the controller scans the valid data in the RAM mirror that supports the initialization, including: when the analog EEPROM data sector is configured to store data using multiple partitions and each partition is set with a corresponding identifier to identify the attributes of the data stored in different partitions through the identifier, according to the identifier, find the valid data corresponding to the initialization control instruction from the analog EEPROM data sector. Among them, the identifier can be, for example, a data activation area identifier, a data block identifier, an address identifier, etc. The embodiment of the present application does not limit this here. In the application scenario of the embodiment of the present application, the EEPROM data sector in the external storage media is generally implemented based on a FLASH memory, which is essentially a non-volatile memory and can be used to save configuration data or information that needs to be stored long-term. For the vehicle control scenario, in this stage of the embodiment of the present application, the analog EEPROM data sector in the internal RAM of the controller stores data using multiple partitions, and a unique identifier is set for each partition. When data scanning or database searching is required, it is not necessary to traverse the entire storage area, and the target valid data can be quickly located based on the identifier. At the same time, it is also more convenient to manage or erase the data stored in the analog EEPROM data sector, thereby extending the service life of the controller RAM to a certain extent.
[0038] Optionally, in an implementation manner of the embodiments of the present application, transferring the analog EEPROM data sector from the external storage medium to the internal RAM of the controller includes: transferring the analog EEPROM data sector from the external storage medium to the internal RAM of the controller in a manner of using a high communication main frequency or multiple cores in parallel. In the embodiments of the present application, the high communication main frequency means that the communication interface of the controller is configured to be able to perform data transmission at a relatively high frequency, thereby improving the data transmission speed. Multiple cores in parallel means that the controller adopts a multi-core architecture. For example, in the dual-core ARM Cortex-A / M series, the data to be written into the internal RMA is split into multiple threads and written by different cores in parallel. Multiple cores can process different tasks or data simultaneously, or read data from different storage partitions, improving the overall data writing efficiency. Through this method, the embodiments of the present application can implement a RAM mirror of the valid data stored in the external memory medium in the internal RAM of the controller faster, thereby improving the initialization speed of the controller to a certain extent. It is very suitable for time-sensitive and highly reliable embedded scenario applications.
[0039] Optionally, in an embodiment of the present application, the method further includes: detecting whether there is a partition that needs to be repaired in the analog EEPROM data sector based on the RAM mirror and the identifier; if there is a partition that needs to be repaired, performing a repair operation on the partition that needs to be repaired before the next data is written to the analog EEPROM data sector. In the actual application scenario of the embodiments of the present application, in the data sector of the analog EEPROM, the identifier (Header) can be used as the basis for data sector partition detection and repair operations, such as information such as the magic value, status flag, CRC check code, and erase count of the identifier field. In this stage of the embodiments of the present application, by parsing the field information included in the identifier of the data block in the RAM mirror, it is determined whether there is a partition that needs to be repaired in the data sector of the analog EEPROM. For example, if the partition is in the factory state, the partition is full, the partition is illegal, etc., during the implementation process, not only can the determined partition that needs to be repaired be quickly located, but also the specific reason for the failure of the partition that needs to be repaired can be accurately and efficiently determined. After determining the cause of the failure, information such as the cause of the failure or the determined repair logic is cached in a variable inside the controller. After the initialization is completed, before the next data write operation is performed, the repair operation corresponding to the cause of the failure is executed. This can not only avoid the impact of erase / write access to the analog EEPROM data sector during initialization on the initialization response efficiency, but also prevent the occurrence of situations such as initialization operation failure or system crash due to sector failure during the erase / write operation, and ensure the consistency of the data stored in the sector, so as to maintain the long-term reliability and storage health status of the data in the analog EEPROM data sector, and improve the service life of the internal RAM of the controller to a certain extent.
[0040] Optionally, in one embodiment of the present application, the method further includes: after the controller is powered on to perform the initialization, the mirror data in the internal RAM of the controller is discarded. In the actual application scenario of the embodiment of the present application, the internal RAM resources of the controller are often relatively limited. In the field of vehicle control technology, after the controller arranged on the vehicle body completes the initialization startup, the working process of the controller often no longer needs these data within a short period of time, and the response efficiency of the working process does not have particularly high timeliness or other special requirements. Discarding these RAM images can save space, will not have a significant adverse effect on the work of the controller after initialization, and is more reasonable and low-cost. Use the resources of various parts of the system. In addition, in a possible application scenario, if the initialization instruction contains sensitive data such as encryption keys or security configuration information, it is discarded after the initialization is completed, which can also prevent malicious theft of key information through memory transfer and other means, so as to increase the difficulty of external attackers to reverse analyze the control logic of the controller.
[0041] Optionally, in an implementation of the embodiment of the present application, the method further includes: after discarding the mirror data in the internal RAM of the controller, the RAM storage space occupied by the abandoned mirror data is released in time for use by other modules. To avoid resource waste caused by static occupation, especially for embedded systems with limited hardware resources, such as MCUs used in the field of body control technology, the internal RAM is usually small. The embodiment of the present application here uses a dynamic release method of time-divided release to significantly improve the overall memory utilization of the system. At the same time, if RAM, such a memory, is released at one time, it may bring a certain degree of peak load to the controller. Time-divided release also helps to balance the controller resources, avoid the resources released in a short time from being quickly occupied, causing the controller to produce performance jitter and instantaneous high load, and affect the working stability of the controller. At the same time, this method also helps the tasks being executed by the controller to obtain the memory needed to be used faster, without having to wait for the space occupied by the original entire initialization valid data to be fully released before allocation, and to utilize the work of real-time systems and high-response applications. In addition, time-divided release can also reduce the generation of RAM memory fragments, improve memory utilization and service life.
[0042] Optionally, in an embodiment of the present application, the method further includes: after the controller is powered on and the initialization is completed, switching the data access mode of the controller to directly access the external storage medium for reading and writing the controller operation data. In the embodiment of the present application, after the initialization is completed, for the access to the analog EEPROM data such as reading and writing operations, since there are no special requirements such as high timeliness, the data access communication mode of the controller can be switched to directly access the external storage medium for data reading and writing operations, rather than continuing to access the internal mirrored RAM data, so as to save the internal resources of the controller. At the same time, this method can also avoid the process of having to write the data in the mirrored RAM back to the external storage medium uniformly after writing, so as to avoid the additional processing time brought by this write-back operation and the impact on the service life caused by the frequent erasing and writing of the external storage medium.
[0043] The present application provides an initialization method for a controller, including: transmitting an analog EEPROM data sector from the external storage medium to the internal RAM of the controller to implement a RAM mirror of the external storage medium inside the controller; searching for valid data supporting the initialization in the RAM mirror through the NVM initialization module of the controller, where the NVM initialization module is a functional component for storing non-volatile data inside the controller; when the controller is powered on for the initialization, reading the valid data from the RAM mirror to start the controller initialization. This solution internally stores the data that needs to be read from the external storage medium during the controller initialization in the form of a RAM mirror inside the controller, so that the controller can quickly obtain the valid data supporting the initialization during the initialization, greatly reducing the complexity of the controller initialization and the data reading link, and effectively reducing the time required for the controller initialization.
[0044] Embodiment 2
[0045] Based on the controller initialization method provided in Embodiment 1 of the present application, the present application also provides a corresponding controller here, as Figure 2 shown Figure 2 is a schematic structural diagram of a controller 20 provided in an embodiment of the present application. The controller 20 includes:
[0046] A mirroring module 201, configured to transmit an analog EEPROM data sector from the external storage medium to the internal RAM of the controller to implement a RAM mirror of the analog EEPROM data sector inside the controller;
[0047] A scanning module 202, configured to find valid data that supports the initialization in the RAM image through the NVM initialization module of the controller, where the NVM initialization module is a functional component inside the controller for storing non-volatile data;
[0048] An initialization module 203, configured to read the valid data from the RAM image for controller initialization startup when the controller is powered on for the initialization.
[0049] Optionally, in an implementation manner of the embodiment of the present application, the scanning module 202 is further configured to, when the analog EEPROM data sector is configured to store data using multiple partitions and each partition is set with a corresponding identifier to identify the attributes of the data stored in different partitions through the identifier, find the valid data corresponding to the initialization control instruction from the analog EEPROM data sector according to the identifier.
[0050] Optionally, in an implementation manner of the embodiment of the present application, the mirroring module 201 is further configured to transfer the analog EEPROM data sector from an external storage medium to the internal RAM of the controller in a manner of high communication main frequency or multiple cores in parallel.
[0051] Optionally, in an embodiment of the present application, the device 20 further includes a repair module (not shown in the figure), and the repair module is configured to detect whether there is a partition that needs to be repaired in the analog EEPROM data sector based on the RAM image and the identifier; if there is a partition that needs to be repaired, perform a repair operation on the partition that needs to be repaired before the next data is written to the analog EEPROM data sector.
[0052] Optionally, in an embodiment of the present application, the device 20 further includes a release module (not shown in the figure), and the release module is configured to discard the image in the internal RAM of the controller after the controller is powered on and the initialization is completed.
[0053] Optionally, in an embodiment of the present application, the release module is further configured to: after discarding the image data in the internal RAM of the controller, release the RAM storage space occupied by the discarded image data to other modules for use at different times.
[0054] Optionally, in an embodiment of the present application, the method further includes a switching module (not shown in the figure), and the switching module is configured to switch the data access mode of the controller to directly access an external storage medium for reading and writing controller operation data after the controller is powered on and the initialization is completed.
[0055] The present application provides a controller. A mirroring module is set up to transfer analog EEPROM data sectors from the external storage medium to the internal RAM of the controller, so as to implement a RAM mirror of the analog EEPROM data sectors inside the controller; A scanning module is provided to find valid data supporting the initialization in the RAM mirror through the NVM initialization module of the controller, where the NVM initialization module is a functional component for storing non-volatile data inside the controller; An initialization module is provided to read the valid data from the RAM mirror for the initialization startup of the controller when the controller is powered on for the initialization. The overall functional module structure of the controller is simple and easy to implement. Through the coordinated work of the three included modules, the controller changes the need to read from the external storage medium during initialization to accessing and reading the data in the internal RAM of the controller by means of data RAM mirroring inside the controller, so that valid data supporting the initialization can be quickly read during the initialization of the controller, greatly reducing the complexity of the controller initialization and the data reading link, and effectively reducing the time required for the initialization of the controller.
[0056] Embodiment III
[0057] The embodiment of the present application also provides a storage medium, on which a computer program is stored, and when the program is executed by a processor, it implements any one of the controller initialization methods described in Embodiment I of the present application.
[0058] Embodiment IV
[0059] The embodiment of the present application also provides an electronic device, as Figure 3 shown Figure 3 is a schematic structural diagram of an electronic device 30 provided by the embodiment of the present application. The electronic device 30 includes:
[0060] One or more processors 301, a communication interface 302, a memory 303, and a communication bus 304. The processors 301, the memory 303, and the communication interface 302 complete mutual communication through the communication bus 304;
[0061] The memory 303 is used to store one or more programs;
[0062] When the one or more programs are executed by the one or more processors 301, the one or more processors 301 implement any one of the controller initialization methods described in Embodiment I of the present application.
[0063] So far, the present application has described specific embodiments of the present subject matter. In some cases, the acts recited in the claims may be performed in a different order and still achieve the desired result. Additionally, the processes depicted in the figures do not necessarily require the particular order or sequential order shown to achieve the desired result. In certain embodiments, multitasking and parallel processing may be advantageous.
[0064] In the 1990s, it was quite obvious to distinguish whether an improvement in a technology was an improvement in hardware (e.g., improvement in circuit structures such as diodes, transistors, switches, etc.) or an improvement in software (improvement in method processes). However, with the development of technology, many improvements in method processes today can be regarded as direct improvements in hardware circuit structures. Almost all designers obtain the corresponding hardware circuit structure by programming the improved method process into the hardware circuit. Therefore, it cannot be said that an improvement in a method process cannot be implemented with a hardware entity module. For example, a Programmable Logic Device (PLD) (such as a Field Programmable Gate Array (FPGA)) is such an integrated circuit whose logical function is determined by a user's programming of the device. Designers can program by themselves to "integrate" a digital system layer on a single PLD, without having to ask a chip manufacturer to design and fabricate a dedicated integrated circuit chip. Moreover, nowadays, instead of manually fabricating integrated circuit chips, this programming is mostly implemented using "logic compiler" software, which is similar to the software compiler used in program development and writing. The original code before compilation also has to be written in a specific programming language, which is called a Hardware Description Language (HDL). And there is not only one type of HDL, but many types, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, RHDL (Ruby Hardware Description Language), etc. Currently, the most commonly used are VHDL (Very-High-Speed Integrated Circuit Hardware Description Language) and Verilog. Those skilled in the art should also be aware that by simply performing a little logical programming on the method process with the above-mentioned several hardware description languages and programming it into an integrated circuit, it is easy to obtain a hardware circuit that implements the logical method process.
[0065] The controller can be implemented in any suitable manner. For example, the controller can take the form of, for example, a microprocessor or a processor and a computer-readable medium storing computer-readable program code (such as software or firmware) executable by the (micro)processor, logic gates, switches, an application specific integrated circuit (ASIC), a programmable logic controller, and an embedded microcontroller. Examples of the controller include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicone Labs C8051F320. The memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art also know that in addition to implementing the controller in the form of pure computer-readable program code, it is entirely possible to make the controller implement the same function in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, such a controller can be considered a hardware component, and the devices included therein for implementing various functions can also be regarded as the structures within the hardware component. Or even, the devices for implementing various functions can be regarded as either software modules for implementing the method or the structures within the hardware component.
[0066] The system layer, device, module, or unit illustrated in the above embodiments can be specifically implemented by a computer chip or an entity, or by a product having certain functions. A typical implementation device is a computer. Specifically, the computer can be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.
[0067] For the convenience of description, when describing the above devices, they are described separately as various units according to their functions. Of course, when implementing the present application, the functions of each unit can be implemented in the same or multiple software and / or hardware.
[0068] It should also be noted that the term "comprising", "including", or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, commodity, or device comprising a series of elements not only includes those elements but also includes other elements not explicitly listed, or further includes elements inherent to such a process, method, commodity, or device. Without further limitation, an element defined by the statement "comprising one..." does not exclude the existence of another identical element in the process, method, commodity, or device comprising the element.
[0069] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system layer, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.
[0070] The present application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application can also be practiced in a distributed computing environment where tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media including storage devices.
[0071] Each embodiment in this specification is described in a progressive manner. For the same or similar parts among the embodiments, reference can be made to each other. Each embodiment focuses on the differences from other embodiments. In particular, for the system layer embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and reference can be made to the corresponding parts of the method embodiments for the relevant content.
[0072] The above are only the embodiments of the present application and are not intended to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.
Claims
1. A method for initializing a controller, characterized in that, Including: Transferring an analog EEPROM data sector from the external storage medium to the internal RAM of the controller to implement a RAM mirror of the external storage medium inside the controller; Searching for valid data supporting the initialization in the RAM mirror through the NVM initialization module of the controller, where the NVM initialization module is a functional component for storing non-volatile data inside the controller; When the controller is powered on for the initialization, reading the valid data from the RAM mirror to start the controller initialization.
2. The initialization method of the controller according to claim 1, wherein The scanning for valid data supporting the initialization in the RAM mirror through the NVM initialization module of the controller includes: When the analog EEPROM data sector is configured to store data using multiple partitions and each partition is set with a corresponding identifier to identify the attributes of the data stored in different partitions through the identifier, searching for the valid data corresponding to the initialization control instruction from the analog EEPROM data sector according to the identifier.
3. The initialization method of the controller according to claim 1, characterized in that, The transferring an analog EEPROM data sector from the external storage medium to the internal RAM of the controller includes: Transferring an analog EEPROM data sector from the external storage medium to the internal RAM of the controller in a manner of using a high communication main frequency or multiple cores in parallel.
4. The initialization method of the controller according to claim 2, characterized in that The method further includes: Detecting whether there is a partition that needs to be repaired in the analog EEPROM data sector based on the RAM mirror and the identifier; If there is a partition that needs to be repaired, performing a repair operation on the partition that needs to be repaired before the next data is to be written to the analog EEPROM data sector.
5. The initialization method of the controller according to claim 1, characterized in that The method further includes: After the controller is powered on and the initialization is completed, discarding the RAM mirror data inside the controller.
6. The initialization method of the controller according to claim 5, characterized in that, The method further includes: After discarding the RAM mirror data inside the controller, releasing the RAM storage space occupied by the RAM mirror data to other modules for use at different times.
7. The initialization method of the controller according to claim 1, characterized in that, The method further includes: After the controller is powered on and the initialization is completed, switching the data access mode of the controller to directly access the external storage medium to perform read and write operations on the controller running data.
8. A controller, characterized in that, Including: A mirror module, configured to transfer an analog EEPROM data sector from the external storage medium to the internal RAM of the controller to implement a RAM mirror of the external storage medium inside the controller; A scanning module, configured to search for valid data supporting the initialization in the RAM mirror through the NVM initialization module of the controller, where the NVM initialization module is a functional component for storing non-volatile data inside the controller; An initialization module, configured to read the valid data from the RAM mirror to start the controller initialization when the controller is powered on for the initialization.
9. A computer storage medium, characterized in that, A computer storage medium stores computer-executable instructions, and when the computer-executable instructions are executed, the initialization method of the controller according to any one of claims 1-8 is executed.
10. An electronic device, characterized in that, Including: A processor, a memory, a communication interface, and a communication bus, where the processor, the memory, and the communication interface complete communication with each other through the communication bus; The memory is used to store at least one executable instruction, and the executable instruction causes the processor to perform operations corresponding to the initialization method of the controller according to any one of claims 1-7.