Downsampling method, device and equipment based on lvds channel and medium

Abstract

The invention provides a down-sampling method and device based on an lvds channel, equipment and a medium. Comprising the steps that the bit number of data to be transmitted and a corresponding lead code are determined, the data to be transmitted are transmitted according to a serdes channel, initial data are obtained, and the data to be transmitted are data obtained through an lvds channel; determining the group number of the target data and groups in each target data group according to the digit, and determining the target data corresponding to the initial data according to the clock of the serdes channel and a preset combination rule; for each target data group, extracting median data in each group to obtain down-sampling data corresponding to the target data group, and determining a target group matched with the lead code in each group according to a preset check number; determining a target identifier according to the number of the target groups and a preset threshold, and determining target downsampling data according to the target identifier and the downsampling data; therefore, the accuracy of sampling the data at different rates and the quality of the sampling result are improved.

Description

Technical Field

[0001] This application relates to the field of communication sampling technologies, and in particular, to a downsampling method, apparatus, device, and medium based on an LVDS channel. Background Art

[0002] For the interconnection between communication devices or chips on the internal circuit board of a device, many are connected through Low-Voltage Differential Signaling (LVDS) lines, and the communication rate is showing a significant upward trend. While this technological evolution brings efficient data transmission, it also poses higher challenges to signal integrity and reliability.

[0003] Existing downsampling methods generally generate a sampling clock through a clock recovery circuit, then adjust the phase relationship between the edge of the clock and the data edge so that the edge of the sampling clock aligns with the exact middle of the data to be sampled, and then obtain parallel data through a serial-to-parallel conversion circuit.

[0004] However, existing downsampling methods have problems of low sampling efficiency and low accuracy of sampling results. Summary of the Invention

[0005] This application provides a downsampling method, apparatus, device, and medium based on an LVDS channel to solve the problems of low sampling efficiency and low accuracy of sampling results in existing downsampling methods.

[0006] In a first aspect, this application provides a downsampling method based on an LVDS channel. The method includes: Determine the number of bits of the data to be transmitted and the corresponding preamble, and transmit the data to be transmitted according to the SerDes channel to obtain initial data, where the data to be transmitted is data obtained through the LVDS channel; Determine the number of groups of target data and the grouping within each target data group according to the number of bits, and determine the target data corresponding to the initial data according to the clock of the SerDes channel and a preset combination rule; For each target data group, extract the median data within each grouping to obtain downsampled data corresponding to the target data group, and determine the target grouping that matches the preamble in each grouping according to a preset number of checks; Determine a target identifier according to the number of target groupings and a preset threshold, and determine target downsampled data according to the target identifier and the downsampled data.

[0007] In some embodiments of this application, determining the number of bits of the data to be transmitted and the corresponding preamble, and transmitting the data to be transmitted according to the SerDes channel to obtain initial data includes: Obtain the data to be transmitted and determine the number of bits corresponding to the data to be transmitted; Determine the preamble and add the preamble before the data to be transmitted; Transmit the data to be transmitted with the preamble added according to the serdes channel to obtain the initial data.

[0008] In some embodiments of the present application, according to the number of bits, determine the number of groups of target data and the grouping in each corresponding target data group, and according to the clock on the user side of the serdes channel, the preset combination rule and the initial data, determine the target data corresponding to the initial data, including: According to the number of bits, determine the number of groups of target data and the grouping in the target data group; Delay the initial data by one clock cycle according to the clock to obtain the delayed data; Combine the initial data and the delayed data according to the preset combination rule to obtain the target data.

[0009] In some embodiments of the present application, combine the initial data and the delayed data according to the preset combination rule to obtain the target data, including: Determine the target number of groups corresponding to each target data group, and according to the sequence corresponding to the initial data, determine the initial high-order data in the initial data that is the same as the data of the target number of groups; According to the sequence corresponding to the delayed data, determine the delayed high-order data in the delayed data that is the same as the number of the target number of groups, and delete the delayed high-order data to obtain the delayed low-order data; Combine the initial high-order data and the delayed low-order data according to the preset combination rule to obtain the target data.

[0010] In some embodiments of the present application, for each target data group, extract the middle-bit data in each grouping to obtain the decimated data corresponding to the target data group, and according to the preset number of checks, determine the target grouping in each grouping that matches the preamble, including: Extract the middle-bit data of the grouping to obtain the decimated data; Determine the target counter corresponding to each grouping, and according to the data sequence of the grouping and the preset number of checks, determine the grouping check data of the middle sequence; Judge whether the grouping check data and the preamble match; If the grouping check data and the preamble match, determine the corresponding grouping as the target grouping and increase the count of the target counter corresponding to the grouping by 1; If the grouping check data and the preamble do not match, determine the grouping corresponding to the grouping check data as the non-target grouping.

[0011] In some embodiments of the present application, according to the number of target groups and a preset threshold, a target identifier is determined, and according to the target identifier and downsampled data, target downsampled data is determined, including: Determine the target counter corresponding to each group and its count to obtain the number of target groups; Compare the number of target groups with the preset threshold to obtain a comparison result; If the comparison result is that the number of target groups is greater than the preset threshold, determine the count identifier of the corresponding target counter to obtain the target identifier; If the comparison result is that the target number is not greater than the preset threshold, do not determine the count identifier of the target counter; According to the target identifier and the downsampled data, determine the target downsampled data.

[0012] In some embodiments of the present application, according to the target identifier and the downsampled data, determine the target downsampled data, including: Determine the downsampled data corresponding to each target data group, and according to the target identifier, determine the target data group corresponding to the target identifier in the target data group as the downsampled data group; Determine the downsampled data corresponding to the downsampled data group as the target downsampled data, and output the target downsampled data.

[0013] In a second aspect, the present application provides a downsampling device based on an LVDS channel. The device includes: A transmission module, configured to determine the number of bits of the data to be transmitted and the corresponding preamble, and transmit the data to be transmitted through the SerDes channel to obtain initial data, where the data to be transmitted is data obtained through the LVDS channel; A data determination module, configured to determine the number of groups of target data and the groups in each target data group according to the number of bits, and determine the target data corresponding to the initial data according to the clock of the SerDes channel and a preset combination rule; A grouping determination module, configured to extract the median data in each group for each target data group to obtain the downsampled data corresponding to the target data group, and determine the target group that matches the preamble in each group according to a preset number of checks; An identifier determination module, configured to determine a target identifier according to the number of target groups and a preset threshold, and determine target downsampled data according to the target identifier and the downsampled data.

[0014] In a third aspect, the present application provides a computer device, including: a processor, and a memory communicatively connected to the processor; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory to implement the method of the present application.

[0015] In a fourth aspect, the present application provides a computer-readable storage medium storing program code, which is used to implement the method of the present application when executed by a processor.

[0016] A downsampling method, device, equipment and medium based on an LVDS channel provided by the present application determine the number of bits of data to be transmitted and the corresponding preamble, and transmit the data to be transmitted through a SerDes channel to obtain initial data, where the data to be transmitted is data obtained through an LVDS channel; determine the number of groups of target data and the grouping within each target data group according to the number of bits, and determine the target data corresponding to the initial data according to the clock of the SerDes channel and a preset combination rule; for each target data group, extract the median data within each grouping to obtain downsampled data corresponding to the target data group, and determine the target grouping that matches the preamble in each grouping according to a preset verification number; determine a target identifier according to the number of target groupings and a preset threshold, and determine target downsampled data according to the target identifier and the downsampled data.

[0017] In this way, by utilizing the regularity of the preamble, a stable sampling interval can be located. Since the alternating regularity of the preamble can be detected by the receiving end, if the data in a data group matches this regularity, it indicates that the sampling phase corresponding to the data is in the data stable region (non-transition edge), and the metastability probability is significantly reduced; at the same time, accidental matching of the preamble regularity by a single group of data will be excluded because the counter does not reach the threshold, and only continuously stable preamble characteristics are recognized, filtering out accidental interference and improving the sampling accuracy and sampling quality for data at different rates. Description of the Drawings

[0018] The drawings here are incorporated into the specification and constitute a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.

[0019] Figure 1 It is a schematic flowchart of a downsampling method based on an LVDS channel provided by an embodiment of the present application; Figure 2 It is a sampling schematic diagram of a downsampling method based on an LVDS channel provided by an embodiment of the present application; Figure 3 It is a schematic structural diagram of a downsampling device based on an LVDS channel provided by an embodiment of the present application; Figure 4 It is a structural block diagram of equipment for executing a downsampling method based on an LVDS channel according to an embodiment of the present application. Detailed Embodiments

[0020] Exemplary embodiments will be described in detail herein, and examples thereof are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of apparatuses and methods consistent with some aspects of the present application as detailed in the appended claims.

[0021] The technical solution of the present application and how the technical solution of the present application solves the above technical problems will be described in detail below with specific embodiments. These several specific embodiments below can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below with reference to the accompanying drawings.

[0022] Figure 1 It is a schematic flowchart of a downsampling method based on an LVDS channel provided for an embodiment of the present application. As Figure 1 shown, the downsampling method based on an LVDS channel may include the following steps: S110. Determine the number of bits of the data to be transmitted and the corresponding preamble, and transmit the data to be transmitted according to the SerDes channel to obtain initial data, where the data to be transmitted is the data obtained through the LVDS channel.

[0023] Among them, LVDS (Low Voltage Differential Signaling) is a way of transmitting differential signals. As the underlying physical link, it uses Low Voltage Differential Signaling (LVDS) technology to achieve high-speed data transmission, which can provide a high-bandwidth and low-noise transmission medium for data, ensuring reliable transmission of data at the physical layer.

[0024] The data to be transmitted is the data that needs to be transmitted through the data transmission channel. The number of bits "data bit number" refers to the number of binary bits (bits) contained in the data, which is used to measure the length or scale of the data.

[0025] The preamble is a fixed regular binary bit sequence added to the original data frame header, which is used to identify the start position of the data frame and the synchronization clock phase, so as to avoid metastable interference through regular features in the subsequent process. For example, for a 1.25G bitstream, adding a 122-bit preamble of 0101, after these preambles become 1.25G serial data and are sampled by a 10G clock, the probability of metastability is the same as that of other data. Subsequently, by determining the regular feature 0101 included in the data, stable data without metastability can be determined, so as to identify the downsampled data in the stable state.

[0026] Serdes is a serializer that can realize the mutual conversion between parallel data and serial data. The serdes channel is based on serdes technology and is responsible for the transmission and processing of high-speed serial data. Its core function is to convert parallel data into serial data (transmitter serializer), transmit it through a high-speed channel, and then deserialize it into parallel data at the receiving end.

[0027] Based on this, metastable state refers to the situation in high-speed communication where, when the sampling clock edge of the receiving end is close to the data transition edge, the trigger may enter an uncertain state (neither a stable "0" nor a "1"), resulting in incorrect or abnormal sampling values. Therefore, when transmitting data at different rates, the data to be transmitted and its corresponding number of data bits and preamble codes can be determined, and the data to be transmitted can be transmitted according to the transmission channel to obtain the initial data, so that the regularity of the preamble code can be used to locate the stable sampling interval, thereby determining stable data that is not in a metastable state to meet the sampling requirements.

[0028] S120, determining the number of target data groups and the grouping in each target data group according to the number of bits, and determining the target data corresponding to the initial data according to the clock of the serdes channel and a preset combination rule.

[0029] The target data is data obtained by delaying the initial data according to the clock and combining the data according to a preset combination rule.

[0030] The grouping is a data grouping obtained by grouping the data in the target data group according to the number of bits of the data to be transmitted. For example, if the number of bits of the data to be transmitted is 8 bits and the data of the target data group is 64 bits, then the adjacent 8 bits of data in the target data group can be regarded as a corresponding data group according to the data sequence.

[0031] The clock can be the serdes user-side rxclk clock, that is, the clock used by the serdes user-side logic (such as the FPGA internal logic clock), which is used to control data delay, shift combination and other operations, and can delay the parallel data bus by one beat to provide a timing reference for generating multi-phase offset data.

[0032] The preset combination rule is a pre-set rule for combining data according to the number of bits, and may be a combination of low-bit data of initial data and high-bit data of data after clock delay.

[0033] For example, when 1.25 g of LVDS data is transmitted through a 10 G LVDS channel, the data after transmission needs to be decimated by 8 times. Suppose the data coming out of the SERDES receive channel is datai[63:0], and the data datai1[63:0] is obtained by delaying the data by one beat using the SERDES user-side rxclk clock; according to the preset combination rule, shifting and recombining can be performed to obtain an 8-group 64-bit wide data bus data1~data8 with different bit sequences, which are the target data and are respectively: data1=datai; data2={datai1[62:0],datai

[63] }; data3={datai1[61:0],datai[63:62]}; data4={datai1[60:0],datai[63:61]}; data5={datai1[59:0],datai[63:60]}; data6={datai1[58:0],datai[63:59]}; data7={datai1[57:0],datai[63:58]}; data8={datai1[56:0],datai[63:57]} Based on this, the initial data is delayed by a clock, and further according to the preset combination rule, the low-order data of the initial data and the high-order data in the delayed data are combined correspondingly, so as to obtain the target data, so that the data packets that meet the preamble rule in the target data can be determined subsequently, so as to determine the data that is not in the metastable state, and obtain the decimated data that meets the sampling requirements.

[0034] S130. For each target data group, extract the median data in each packet to obtain the decimated data corresponding to the target data group, and determine the target packets that match the preamble in each packet according to the preset number of checks.

[0035] Among them, the median data is the data located in the middle of the data packet. For example, if the data packet is [63, 65], the median data is

[59] .

[0036] The preset number of checks is a preset number, which is used to check whether there is continuous data in the data packet that matches the preamble. The alternating rule of the preamble can be detected by the receiving end. The data group that matches this rule indicates that the sampling phase is in the data stable region (non-transition edge), and the probability of metastability is significantly reduced.

[0037] For example, the data output from the serdes receive channel is datai[63:0]. The data is delayed by one beat using the serdes user-side rxclk clock to obtain data datai1[63:0]. The target data groups are as follows: data1 = datai; data2 = {datai1[62:0], datai

[63] }; data3 = {datai1[61:0], datai[63:62]}; data4 = {datai1[60:0], datai[63:61]}; data5 = {datai1[59:0], datai[63:60]}; data6 = {datai1[58:0], datai[63:59]}; data7 = {datai1[57:0], datai[63:58]}; data8 = {datai1[56:0], datai[63:57]}; Then, from the above 8 groups of 64-bit wide buses, the middle bit data is extracted from every 8-bit data to obtain 8 channels of 8-bit wide data datx, where the range of x is 1 to 8. For example, dat1 can include {data1

[59] , data2

[51] , data3

[43] , data4

[35] , data5

[27] , data6

[19] , data7

[11] , data8[3]}. That is, according to the number of bits of the data to be transmitted, the target data group datai[63:0] is divided into 8 data groups, and the median data of each data group is extracted to obtain the corresponding decimated data dat1.

[0038] Based on this, the target data group is divided according to the number of bits of the data to be transmitted to obtain data groups, and according to the data sequence corresponding to the data groups, the middle data is extracted to obtain the decimated data corresponding to the target data group, so as to subsequently match the data and preamble in each group according to the number of checks, and thus determine the target decimated data that meets the sampling requirements among multiple groups of decimated data.

[0039] S140. Determine the target identifier according to the number of target groups and the preset threshold, and determine the target decimated data according to the target identifier and the decimated data.

[0040] Among them, the preset threshold is a threshold set in advance, which is used to determine whether the number of target groups meets the requirements; the accidental matching of the preamble rule in a single group of data will be excluded because the counter does not reach the threshold, and only the continuous and stable preamble characteristics are recognized to filter out accidental interference.

[0041] An identifier marked as a counter, which is used to record the number of target packets, so as to determine the number of target packets according to the number recorded in the counter and compare it with a preset threshold; the target identifier is the identifier corresponding to the counter whose recorded number is greater than the preset threshold, and is used to represent the target packet including the continuous and stable preamble feature.

[0042] The target decimated data is the stable data that meets the sampling requirements.

[0043] It can be understood that after sampling a low-frequency signal with a high-frequency clock, one original bit of data will become several bits. Since it is not a synchronous clock, metastability will occur when the data jumps. What was originally 0 becomes 1, and what was originally 1 becomes 0. Therefore, the data sampled by the high-frequency clock is randomly disordered and messy, and its regularity only appears in the middle section of the data; for a 1.25g signal, when sampled with a 10g clock, one bit of data becomes 8 bits. Since it is not a synchronous clock, this 8-bit data is not 8 1s or 8 0s, and the data of the two edges of this data is randomly unpredictable; at the user side, a low frequency is required, and 10g logic cannot be implemented. Therefore, the frequency needs to be reduced, that is, this 1-bit-wide 10g serial data needs to be changed into multi-bit-wide parallel data and the working clock frequency is reduced to achieve this. For example, the data bus uses 64 bits wide. In this 64-bit-wide data, there are actually only 8 meaningful data, and each data is represented by 8 bits; the data coming out of the serdes has undergone serial-to-parallel conversion. For a long string of data, it is random where the conversion starts specifically, which will result in that sometimes there are only 7 complete meaningful signals in this 64-bit data, and one signal is incomplete. That is, for two adjacent 8-bit valid signals, a partial bit of one data appears in the previous 64 bits. Therefore, it is necessary to shift to restore these 8 complete valid data. Because it is random, it is not known how many bits of this data with "a partial bit of one data appears in the previous 64 bits" are misaligned. Therefore, it is necessary to compare the number of target packets with the preset threshold to determine the target identifier corresponding to the target packet greater than the preset threshold, so as to determine the target decimated data corresponding to the target identifier from multiple groups of decimated data.

[0044] Based on the feasible implementation manner of S110 above, the present application further provides steps for determining the number of bits of the data to be transmitted and the corresponding preamble, and transmitting the data to be transmitted according to the serdes channel to obtain the initial data, including: Obtain the data to be transmitted and determine the number of bits corresponding to the data to be transmitted; Determine the preamble and add the preamble to the front of the data to be transmitted; According to the serdes channel, the data to be transmitted with the preamble added is transmitted to obtain the initial data.

[0045] Among them, the data to be transmitted is the data content itself that needs to be transmitted without adding a preamble code, for example, it can be an 8-bit data. By adding a preamble code as a frame header before the data is transmitted through the high-speed LVDS bus, these preamble codes are converted into serial data. After sampling, the probability of their metastable state appearing is the same as that of the payload data, so that it can be detected by the receiving end with the help of the alternating rule of the preamble code. The data group matching this rule indicates that the sampling phase is in the data stable area (non-jump edge).

[0046] Based on this, a regular preamble code is added before the initial data to be transmitted, so that the initial data after subsequent channel transmission includes the regular data corresponding to the preamble code. By identifying the regular data, stable sampling data that is not in a metastable state is determined, thereby outputting target down-sampling data that meets the sampling requirements.

[0047] Based on the feasible implementation of S120 above, the present application further provides a method for determining the number of target data groups and the corresponding grouping in each target data group according to the number of bits, and determining the target data corresponding to the initial data according to the clock on the user side of the serdes channel, the preset combination rule and the initial data, including the steps of: According to the number of digits, determine the number of groups of target data and the grouping in the target data group; According to the clock, the initial data is delayed by one clock cycle to obtain delayed data; According to the preset combination rules, the initial data and the delayed data are combined to obtain the target data.

[0048] Based on this, by determining the number of bits of the data to be transmitted, for example, if the data to be transmitted is 8 bits of data, it can be determined that according to the preset combination rule, the initial data and the delayed data delayed by one clock cycle are combined, and the obtained target data is 8 groups, and each target data group can include 8 data groups.

[0049] Based on the feasible implementation of S120 above, the present application further provides combining the initial data and the delayed data according to a preset combination rule to obtain target data, including the steps of: Determine the target group number corresponding to each target data group, and determine the initial high-order data in the initial data that is the same as the data of the target group number according to the sequence corresponding to the initial data; According to the sequence corresponding to the delayed data, the delayed high-order data having the same number as the target group number in the delayed data is determined, and the delayed high-order data is deleted to obtain the delayed low-order data; According to the preset combination rule, combine the initial high-order data and the delayed low-order data to obtain the target data.

[0050] Among them, the target group number can be understood as the sequence of this target data group among all target data groups. For example, if all target data groups are data1~data8, then the target group number of data1 is the first group, and the target group number of data8 is the eighth group.

[0051] The sequence can be understood as the arrangement order of the data. For example, arranged from left to right, the "high-order data" usually refers to the binary bits with larger bit numbers in the parallel data bus, corresponding to the high valid bits of the data. The parallel data bus adopts the numbering method of "[MSB:LSB]". For example, datai[63:0] represents a 64-bit bus, where datai

[63] is the highest bit (MSB, Most Significant Bit), and datai[0] is the lowest bit (LSB, Least Significant Bit).

[0052] The initial high-order data is the data of the bits in the initial data whose numbers correspond to the target group number. For example, if the target group number is the second group, the number corresponding to this target group number is 2, and the initial data is datai[63:0], then the corresponding initial high-order data is datai[63:62].

[0053] The delayed high-order data is the data of the bits in the delayed data whose numbers correspond to the target group number. For example, if the target group number is the second group, the number corresponding to this target group number is 2, and the delayed data is datai1[63:0], then the corresponding delayed high-order data is datai1[63:62], and the delayed low-order data is datai1[61:0].

[0054] For example, the initial data coming out of the serdes receive channel is datai[63:0], the delayed data is datai1[63:0], there are 8 target data groups in total, and the data group corresponding to data2 is selected. Then the target group number corresponding to data2 is the second group, and the number corresponding to this target group number is 2. According to the binary arrangement of the delayed data, the corresponding 2-bit high-order data in the delayed data is determined as datai1[63:62], and the delayed low-order data is datai1[61:0]; while the initial high-order data in the initial data is datai[63:62]; by determining the delayed low-order data as the high-order of the target data and the initial high-order data as the low-order of the target data, the target data is obtained as data2={datai1[62:0],datai

[63] }.

[0055] Based on this, the combined shift is the core step in generating the multi-phase offset data bus. By means of delay and shift operations, 8 groups of 64-bit data with different phases are generated, providing redundant candidates for subsequent downsampling. The preset combination rule can be understood as splicing the low bits of the delayed data with the high bits of the initial data, and at the same time, each piece of data is shifted right by 1 bit, thereby generating 8 groups of 64-bit buses with sequentially offset phases.

[0056] Based on the feasible implementation manners of the above S130, the present application further provides, for each target data group, extracting the median data in each group to obtain the downsampled data corresponding to the target data group, and determining, according to the preset number of checks, the target groups that match the preamble in each group, including the steps of: Extracting the median data of the group to obtain the downsampled data; Determining the target counter corresponding to each group, and determining the group check data of the intermediate sequence according to the data sequence of the group and the preset number of checks; Judging whether the group check data matches the preamble; If the group check data matches the preamble, determining the corresponding group as the target group, and increasing the count of the target counter corresponding to the group by 1; If the group check data does not match the preamble, determining the group corresponding to the group check data as the non-target group.

[0057] Among them, the target counter is used to record the number of target groups that match the preamble.

[0058] The group check data is the data located in the intermediate sequence of the data group and used to check whether it matches the preamble. For example, in bits 0 to 63 of the target data group, if 7 bits are extracted from every 8 bits, then the 8-bit data is the data group corresponding to the target data group, and the 7 bits are the group check data for verification.

[0059] Further, the preset number of checks can be 4, 6, and 7. For example, from bits 0 to 63 of the target data group, if 7 bits are extracted from every 8 bits, it is determined whether the 7-bit data satisfies the regular alternation of the preamble rule, that is, whether one bit extracted from these 7 bits is 01010101 or 10101010 corresponding to the preamble. If it is satisfied, the selection flag sel7x of the current path of data is set to 1, otherwise it is set to 0.

[0060] Based on this, by determining whether the group check data in the data group satisfies the regular alternation feature corresponding to the preamble, the target groups that match the preamble are determined, and the number of target groups is recorded by the counter, so as to determine the target downsampled data according to the number of target groups and their corresponding identifiers subsequently.

[0061] Based on the feasible implementation manners of the above S140, the present application further provides steps for determining a target identifier according to the number of target groups and a preset threshold, and determining target downsampled data according to the target identifier and the downsampled data, including: Determine the target counter corresponding to each group and its count to obtain the number of target groups; Compare the number of target groups with the preset threshold to obtain a comparison result; If the comparison result is that the number of target groups is greater than the preset threshold, determine the count identifier of the corresponding target counter to obtain the target identifier; If the comparison result is that the target number is not greater than the preset threshold, do not determine the count identifier of the target counter; Determine the target downsampled data according to the target identifier and the downsampled data.

[0062] Wherein, the count identifier is the identifier corresponding to the counter. For example, from bits 0 to 63 of the target data group, 7 bits are extracted from every 8 bits, and it is determined whether the 7-bit data satisfies the preamble rule. Each data group corresponds to 1 counter, which can be represented by cnt1 to cnt8 and is used to record the number of data groups that satisfy the preamble rule. If a certain counter among cnt1 to cnt8 is greater than the set threshold, such as 6, determine the corresponding counter identifier, and the identifier can be represented by sel_bit7[X]. For example, the identifier corresponding to the counter cnt1 is sel_bit7[1]. If cnt1 > 6, determine the corresponding identifier sel_bit7[1], so as to subsequently determine the target downsampled data from multiple groups of downsampled data according to this identifier.

[0063] Based on the feasible implementation manners of the above S140, the present application further provides steps for determining target downsampled data according to the target identifier and the downsampled data, including: Determine the downsampled data corresponding to each target data group, and determine the target data group corresponding to the target identifier in the target data group as the downsampled data group according to the target identifier; Determine the downsampled data corresponding to the downsampled data group as the target downsampled data, and output the target downsampled data.

[0064] The downsampled data group is the target data group corresponding to the target identifier in each target data group; for example, the identifier corresponding to the counter cnt1 is sel_bit7[1], and the preset threshold is 6. If cnt1>6, the corresponding target identifier sel_bit7[1] is determined, and the target data group corresponding to the target identifier is data1. The downsampled data is obtained by extracting the median data from the data group in the target data group. That is to say, after determining the target data group corresponding to the target identifier, the corresponding target downsampled data group can be determined. data1 corresponds to The down-sampled data group is dat1, dat1 includes {data1

[59] , data2

[51] , data3

[43] , data4

[35] , data5

[27] , data6

[19] , data7

[11] , data8【3】}, then the target down-sampled data is dat1 including {data1

[59] , data2

[51] , data3

[43] , data4

[35] , data5

[27] , data6

[19] , data7

[11] , data8【3】}.

[0065] Please refer to Figure 2 , Figure 2 A sampling schematic diagram of a downsampling method based on an LVDS channel provided in an embodiment of the present application; Figure 2 As shown, before sharing the high-speed LVDS bus, data of different rates are added with preambles as frame headers. After these preambles become serial data, they are sampled and the probability of their metastable state is the same as that of the payload data. For N-bit oversampled data, first delay one beat, then reassemble the two adjacent beats of data into a predictable N-possible bit format data bus, extract the middle bit of every N bits of each possible bit format data bus, and form the corresponding downsampled data. By analyzing and counting the regularity of these data preambles, metastable states are avoided, and the group of data buses where metastable data happens to appear at the edge of the bit data is selected, and the bit in the middle is extracted to complete the downsampling. If the sampling is N times oversampling, in the formed data bus, search for signs of preamble frame headers of N-1 and N-2 bits of data from every N bits of data. For example, a 1.25g code stream plus a 122-bit preamble 0101, these preambles become 1.25g serial data and are used by a 10g clock. The probability of metastable state is similar to that of other data, such as Figure 3It is 1.25g serial data, which is the lower 24-bit parallel data of a 64-bit wide bus coming out of serdies through 8-fold oversampling of a 10g channel. 8-fold decimation processing is required. As can be seen from the waveform, from timing 743 to 762 is the preamble. Bits 5 to 12 are the same data, among which there are metastable states on bits 5, 11, and 12; bits 13 to 20 are one bit, among which there are metastable states on bits 13 and 20. One bit needs to be extracted from bits 8 or 9, and one bit needs to be extracted from bits 16 to 17. In this way, 8-fold decimation is completed.

[0066] In some embodiments of the present application, by determining the preamble with an alternating pattern and adding a preamble with a fixed pattern as the frame header to the data before sharing high-speed lvds buses with data at different rates, it is ensured that the data after oversampling through serdes still includes the regular data corresponding to the preamble. These preambles are sampled, and the probability of metastable states appearing is the same as that of the payload data. Thus, the alternating pattern of the preambles can be detected by the receiving end. The data group that matches this pattern indicates that the sampling phase is in the stable data region (non-transition edge), so as to determine the stable sampling data. Further, by performing a combination of delay and shift on the transmitted data, a group of target data with sequentially offset phases, each group corresponding to a different sampling phase; by extracting the data of the middle bit from the data grouping of each group of data, multiple groups of decimated data are determined, and it is longitudinally detected whether each group of data conforms to the 01 alternating pattern of the preamble to generate a selection flag, and then the continuous validity of the flag is counted by a counter, so as to lock a stable data path, shield the metastable interference, and achieve reliable decimation.

[0067] In this way, through steps such as delay shift bit sequence generation, decimated data capture, metastable state avoidance, frame pattern learning, measurement and search, selection and determination of multi-channel decimated data, optimization algorithms in the decimation selection process, frame header search algorithms, etc., using the regularity of the preamble to locate the stable sampling interval, the alternating pattern of the preambles can be detected by the receiving end. The data group that matches this pattern indicates that the sampling phase is in the stable data region (non-transition edge), and the probability of metastable states is significantly reduced; at the same time, the accidental matching of the preamble pattern by a single group of data will be excluded because the counter does not reach the threshold, and only the continuously stable preamble characteristics are recognized, filtering out accidental interference, and improving the accuracy of sampling data at different rates and the quality of sampling results.

[0068] Figure 3 It is a schematic structural diagram of a decimation device 300 based on an lvds channel provided by an embodiment of the present application. As Figure 3 shown, the decimation device 300 based on an lvds channel includes: a transmission module 310, a data determination module 320, a grouping determination module 330, and an identification determination module 340; where: The transmission module 310 is configured to determine the number of bits of the data to be transmitted and the corresponding preamble, and transmit the data to be transmitted according to the serdes channel to obtain the initial data, where the data to be transmitted is the data obtained through the lvds channel; The data determination module 320 is configured to determine the number of groups of the target data and the grouping in each target data group according to the number of bits, and determine the target data corresponding to the initial data according to the clock of the serdes channel and the preset combination rule; The grouping determination module 330 is configured to, for each target data group, extract the median data in each grouping to obtain the downsampled data corresponding to the target data group, and determine the target grouping that matches the preamble in each grouping according to the preset number of checks; The identification determination module 340 is configured to determine the target identification according to the number of target groupings and the preset threshold, and determine the target downsampled data according to the target identification and the downsampled data.

[0069] In the embodiment of the present application, the transmission module 310 may also be specifically configured to: Obtain the data to be transmitted and determine the number of bits corresponding to the data to be transmitted; Determine the preamble and add the preamble to the front of the data to be transmitted; Transmit the data to be transmitted with the preamble added according to the serdes channel to obtain the initial data.

[0070] In the embodiment of the present application, the data determination module 320 may also be specifically configured to: Determine the number of groups of the target data and the grouping in the target data group according to the number of bits; Delay the initial data by one clock cycle according to the clock to obtain the delayed data; Combine the initial data and the delayed data according to the preset combination rule to obtain the target data.

[0071] In the embodiment of the present application, the data determination module 320 may also be specifically configured to: Determine the target number of groups corresponding to each target data group, and determine the initial high-order data in the initial data that is the same as the data of the target number of groups according to the sequence corresponding to the initial data; Determine the delayed high-order data in the delayed data that is the same as the number of the target number of groups according to the sequence corresponding to the delayed data, and delete the delayed high-order data to obtain the delayed low-order data; Combine the initial high-order data and the delayed low-order data according to the preset combination rule to obtain the target data.

[0072] In the embodiment of the present application, the grouping determination module 330 may also be specifically configured to: Extract the median data of the groups to obtain downsampled data; Determine the target counters corresponding to each group, and determine the grouped check data of the intermediate sequence according to the data sequence of the group and the preset number of checks; Determine whether the grouped check data matches the preamble; If the grouped check data matches the preamble, determine the corresponding group as the target group, and increment the count of the target counter corresponding to the group by 1; If the grouped check data does not match the preamble, determine the group corresponding to the grouped check data as a non-target group.

[0073] In the embodiment of the present application, the identification determination module 340 may further be specifically configured to: Determine the target counters corresponding to each group and their counts to obtain the number of target groups; Compare the number of target groups with a preset threshold to obtain a comparison result; If the comparison result is that the number of target groups is greater than the preset threshold, determine the count identifier of the corresponding target counter to obtain a target identifier; If the comparison result is that the target number is not greater than the preset threshold, do not determine the count identifier of the target counter; Determine the target downsampled data according to the target identifier and the downsampled data.

[0074] In the embodiment of the present application, the identification determination module 340 may further be specifically configured to: Determine the downsampled data corresponding to each target data group, and determine the target data group corresponding to the target identifier in the target data group as the downsampled data group according to the target identifier; Determine the downsampled data corresponding to the downsampled data group as the target downsampled data, and output the target downsampled data.

[0075] Figure 4 This is a schematic structural diagram of the device provided in the embodiment of the present application. As Figure 4 shown, the device 400 includes: The device 400 may include components such as a processor 401 with one or more processing cores, a memory 402 with one or more computer-readable storage media, and a communication component 403. Among them, the processor 401, the memory 402, and the communication component 403 are connected through a bus 404.

[0076] In a specific implementation process, at least one processor 401 executes computer execution instructions stored in the memory 402, so that at least one processor 401 executes the above-mentioned downsampling method based on the lvds channel.

[0077] For the specific implementation process of the processor 401, reference can be made to the above method embodiments. Their implementation principles and technical effects are similar, and will not be elaborated here in this embodiment.

[0078] Further, the processor may be a central processing unit (Central Processing Unit, CPU for short), or may also be other general-purpose processors, digital signal processors (Digital Signal Processor, DSP for short), application specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), etc. The general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the method disclosed in this application can be directly implemented by the execution of the hardware processor, or can be implemented by the combination of hardware and software modules in the processor.

[0079] The memory may include high-speed memory (Random Access Memory, RAM), and may also include non-volatile memory (Non-volatile Memory, NVM), such as at least one disk memory.

[0080] The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For the convenience of representation, the bus in the drawings of this application is not limited to only one bus or one type of bus.

[0081] In some embodiments, a computer program product is also proposed, including a computer program or instruction. When the computer program or instruction is executed by the processor, the steps in any of the above-mentioned downsampling methods based on the lvds channel are implemented.

[0082] For the specific implementation of each of the above operations, reference can be made to the previous embodiments and will not be elaborated here.

[0083] Those of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructions, or by controlling related hardware through instructions. The instructions can be stored in a computer-readable storage medium and loaded and executed by the processor.

[0084] To this end, an embodiment of the present application provides a computer-readable storage medium, which stores multiple pieces of program code that can be loaded by a processor to execute the steps in any one of the downsampling methods based on the LVDS channel provided by the embodiment of the present application.

[0085] Among them, the storage medium may include: read-only memory (ROM, Read Only Memory), random access memory (RAM, Random Access Memory), a magnetic disk, an optical disc, etc.

[0086] According to one aspect of the present application, a computer program product or a computer program is provided. The computer program product or the computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium.

[0087] Since the instructions stored in the storage medium can execute the steps in any one of the downsampling methods based on the LVDS channel provided by the embodiment of the present application, the beneficial effects that can be achieved by any one of the downsampling methods based on the LVDS channel provided by the embodiment of the present application can be realized. For details, see the previous embodiments and will not be elaborated here.

[0088] Those skilled in the art will readily think of other implementation manners of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any variations, uses, or adaptations of the present application, and these variations, uses, or adaptations follow the general principles of the present application and include common general knowledge or conventional technical means in the technical field not disclosed in the present application. The specification and the embodiments are only regarded as exemplary, and the true scope and spirit of the present application are pointed out by the claims above.

[0089] It should be understood that the present application is not limited to the exact structure already described and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present application is only limited by the appended claims.

Claims

1. A downsampling method based on an LVDS channel, characterized in that The method includes: Determine the number of bits of the data to be transmitted and the corresponding preamble, and transmit the data to be transmitted through the serdes channel to obtain initial data, where the data to be transmitted is the data obtained through the lvds channel; Determine the number of groups of target data and the grouping in each target data group according to the number of bits, and determine the target data corresponding to the initial data according to the clock of the serdes channel and a preset combination rule; For each target data group, extract the median data in each grouping to obtain the downsampled data corresponding to the target data group, and determine the target grouping in each grouping that matches the preamble according to a preset number of checks; Determine a target identifier according to the number of target groupings and a preset threshold, and determine target downsampled data according to the target identifier and the downsampled data.

2. The method according to claim 1, wherein The step of determining the number of bits of the data to be transmitted and the corresponding preamble, and transmitting the data to be transmitted through the serdes channel to obtain initial data includes: Obtain the data to be transmitted and determine the number of bits corresponding to the data to be transmitted; Determine the preamble and add the preamble to the front of the data to be transmitted; Transmit the data to be transmitted with the preamble added through the serdes channel to obtain the initial data.

3. The method according to claim 1, wherein The step of determining the number of groups of target data and the corresponding grouping in each target data group, and determining the target data corresponding to the initial data according to the clock on the user side of the serdes channel, a preset combination rule, and the initial data includes: Determine the number of groups of target data and the grouping in the target data group according to the number of bits; Delay the initial data by one clock cycle according to the clock to obtain delayed data; Combine the initial data and the delayed data according to the preset combination rule to obtain the target data.

4. The method according to claim 3, wherein The step of combining the initial data and the delayed data according to the preset combination rule to obtain the target data includes: Determine the target number of groups corresponding to each target data group, and determine the initial high-order data in the initial data that is the same as the data of the target number of groups according to the sequence corresponding to the initial data; Determine the delayed high-order data in the delayed data that has the same number as the target number of groups according to the sequence corresponding to the delayed data, and delete the delayed high-order data to obtain delayed low-order data; Combine the initial high-order data and the delayed low-order data according to the preset combination rule to obtain the target data.

5. The method according to claim 1, characterized in that The step of, for each target data group, extracting the median data in each grouping to obtain the downsampled data corresponding to the target data group, and determining the target grouping in each grouping that matches the preamble according to a preset number of checks includes: Extract the median data of the grouping to obtain the downsampled data; Determine the target counter corresponding to each of the groups, and determine the packet check data of the intermediate sequence according to the data sequence of the group and the preset check number; Judge whether the packet check data matches the preamble; If the packet check data matches the preamble, determine the corresponding group as the target group, and increment the count of the target counter corresponding to the group by 1; If the packet check data does not match the preamble, determine the group corresponding to the packet check data as a non-target group.

6. The method according to claim 1, wherein The determining the target identifier according to the number of target groups and a preset threshold, and determining the target decimated data according to the target identifier and the decimated data includes: Determine the target counter corresponding to each of the groups and its count, to obtain the number of target groups; Compare the number of target groups with the preset threshold to obtain a comparison result; If the comparison result is that the number of target groups is greater than the preset threshold, determine the count identifier of the corresponding target counter to obtain the target identifier; If the comparison result is that the target number is not greater than the preset threshold, do not determine the count identifier of the target counter; Determine the target decimated data according to the target identifier and the decimated data.

7. The method according to claim 6, wherein The determining the target decimated data according to the target identifier and the decimated data includes: Determine the decimated data corresponding to each of the target data groups, and determine, according to the target identifier, the target data group corresponding to the target identifier in the target data group as the decimated data group; Determine the decimated data corresponding to the decimated data group as the target decimated data, and output the target decimated data.

8. A downsampling device based on an LVDS channel, characterized in that, The apparatus is used to execute a decimation method based on an LVDS channel according to any one of claims 1-7 above. The apparatus includes: A transmission module, configured to determine the number of bits of the data to be transmitted and the corresponding preamble, and transmit the data to be transmitted through the SerDes channel to obtain initial data, where the data to be transmitted is data obtained through the LVDS channel; A data determination module, configured to determine the number of groups of target data and the packets in each target data group according to the number of bits, and determine the target data corresponding to the initial data according to the clock of the SerDes channel and a preset combination rule, where the data to be transmitted is data obtained through the LVDS channel; A packet determination module, configured to, for each of the target data groups, extract the median data in each of the packets to obtain the decimated data corresponding to the target data group, and determine the target packet that matches the preamble in each of the packets according to a preset check number; An identifier determination module, configured to determine a target identifier according to the number of target packets and a preset threshold, and determine target decimated data according to the target identifier and the decimated data.

9. A device, characterized in that, Including: One or more processors; A memory; One or more programs, wherein the one or more programs are stored in a memory and configured to be executed by one or more processors, and the one or more programs are configured to perform the method according to any one of claims 1 to 7 above.

10. A computer-readable storage medium, characterized in that, Program code is stored in a computer-readable storage medium, and the program code can be called by a processor to perform the method according to any one of claims 1 to 7 above.

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