Light emitting device

Abstract

The invention provides a light-emitting device, an optical device, and an information processing device, in which a drive element and a light-emitting element array are easier to approach compared with a configuration in which a circuit element is provided on the drive element side of the light-emitting element array. The light-emitting device includes: a wiring substrate; a light-emitting element array provided on the wiring substrate, the light-emitting element array having a first side surface and a second side surface facing each other, and a third side surface and a fourth side surface facing each other and connecting the first side surface and the second side surface; a driving element which is provided on the wiring substrate on the first side surface side and drives the light-emitting element array; a first circuit element and a second circuit element arranged side by side in a direction along the second side surface on the wiring substrate on the second side surface side; and a wiring member provided on the third side surface side and the fourth side surface side and extending from an upper surface electrode of the light-emitting element array toward the outside of the light-emitting element array.

Description

[0001] This divisional application is a divisional application of the invention patent application with the application date of February 5, 2020, the application number of 202010080557.6, and the invention name of "Light-emitting device, optical device, and information processing device". Technical Field

[0002] The present invention relates to a light-emitting device, an optical device, and an information processing device. Background Art

[0003] Patent Document 1 describes the following imaging device: a light source; a light diffusion member having a plurality of lenses arranged adjacent to each other on a predetermined plane and diffusing the light emitted from the light source; and an imaging element that receives the reflected light reflected by the subject from the light diffused by the light diffusion member, and the plurality of lenses are arranged such that the period of the interference fringes in the diffused light is three pixels or less.

[0004] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2018-054769

[0005] However, when it is desired to reduce the inductance of the circuit for driving the light-emitting element array, etc., sometimes wirings such as bonding wires are provided not only on one side surface side of the light-emitting element array but also on multiple side surface sides. And sometimes a plurality of circuit elements such as a light-receiving element or a temperature detection element are arranged close to the side surface of the light-emitting element array.

[0006] In this case, a structure can be considered in which a plurality of circuit elements are separately arranged on the wiring substrate on the driving element side for driving the light-emitting element array and on the wiring substrate on the side opposite to the driving element with the light-emitting element array interposed therebetween, and wirings such as bonding wires are provided on the remaining side surface sides.

[0007] However, if circuit elements are arranged between the light-emitting element array and the driving element, the path of the wiring pattern connecting the light-emitting element array and the driving element is restricted, which may sometimes cause an increase in the inductance of the circuit. Summary of the Invention

[0008] The present invention provides a light-emitting device or the like having a structure that can more easily bring the driving element and the light-emitting element array closer to each other compared to a structure in which circuit elements are provided on the driving element side of the light-emitting element array.

[0009] The invention according to Solution 1 is a light-emitting device, which includes: a wiring substrate; a light-emitting element array having a first side surface and a second side surface facing each other, and third side surfaces and fourth side surfaces facing each other that connect the first side surface and the second side surface, and is disposed on the wiring substrate; a driving element disposed on the wiring substrate on the first side surface side and driving the light-emitting element array; a first circuit element and a second circuit element arranged in a direction along the second side surface on the wiring substrate on the second side surface side; and a wiring component disposed on the third side surface side and the fourth side surface side and extending outward from the upper surface electrode of the light-emitting element array.

[0010] In the light-emitting device according to Solution 1, the invention according to Solution 2, at least one of the first circuit element and the second circuit element is a light-receiving element that receives light emitted from the light-emitting element array.

[0011] In the light-emitting device according to Solution 1, the invention according to Solution 3, at least one of the first circuit element and the second circuit element is a temperature detection element that detects the temperature of the light-emitting element array.

[0012] In the light-emitting device according to any one of Solutions 1 to 3, the invention according to Solution 4, no wiring component extending outward from the upper surface electrode of the light-emitting element array is provided between the second side surface and the first circuit element and the second circuit element.

[0013] In the light-emitting device according to any one of Solutions 1 to 4, the invention according to Solution 5, the first circuit element and the second circuit element each have a plurality of terminals. The first circuit element is disposed closer to the third side surface side than the second circuit element, and the wirings respectively connected to the plurality of terminals of the first circuit element are led out to the third side surface side. The second circuit element is disposed closer to the fourth side surface side than the first circuit element, and the wirings respectively connected to the plurality of terminals of the second circuit element are led out to the fourth side surface side.

[0014] In the light-emitting device according to any one of Solutions 1 to 5, the invention according to Solution 6, a light diffusion component that diffuses light emitted from the light-emitting element array toward the outside is provided on the emission path of the light-emitting element array.

[0015] In the light-emitting device according to Solution 6, the invention according to Solution 7, at least one of the first circuit element and the second circuit element is a light-receiving element that receives light emitted from the light-emitting element array, and the light diffusion component is disposed at a position where the light-emitting element array and the light-receiving element overlap when viewed from above.

[0016] In the light-emitting device described in any one of Aspects 1 to 7 of the invention according to Aspect 8, the light-emitting element array has a plurality of light-emitting elements connected in parallel with each other.

[0017] The invention according to Aspect 9 is an optical device, comprising: the light-emitting device described in any one of Aspects 1 to 8; and a light-receiving unit that receives reflected light emitted from the light-emitting element array included in the light-emitting device and reflected by a measurement object, and the light-receiving unit outputs a signal corresponding to the time from when the light is emitted from the light-emitting element array until it is received by the light-receiving unit.

[0018] The invention according to Aspect 10 is an information processing device, comprising: the optical device described in Aspect 9; and a shape determination unit that determines the three-dimensional shape of the measurement object based on the reflected light that is emitted from the light-emitting element array included in the optical device, reflected by the measurement object, and received by the light-receiving unit included in the optical device.

[0019] The invention according to Aspect 11 is the information processing device described in Aspect 10, further comprising: an authentication processing unit that performs an authentication process related to the use of its own device based on the determination result in the shape determination unit.

[0020] Advantages of the Invention

[0021] According to the first aspect of the present invention, it is easier to bring the driving element closer to the light-emitting element array compared to a structure in which a circuit element is provided on the driving element side of the light-emitting element array.

[0022] According to the second aspect of the present invention, the light emitted from the light-emitting element array is received at a position close to the light-emitting element array.

[0023] According to the third aspect of the present invention, the temperature of the light-emitting element array is detected at a position close to the light-emitting element array.

[0024] According to the fourth aspect of the present invention, it is easier to arrange the circuit element and the light-emitting element array closer to each other compared to a case where wiring components are provided between the second side surface and the first circuit element and between the second side surface and the second circuit element.

[0025] According to the fifth aspect of the present invention, it is easier to arrange the two circuit elements and the light-emitting element array closer to each other compared to a case where the wiring connected to the first circuit element and the wiring connected to the second circuit element are led out on the same side.

[0026] According to the sixth aspect of the present invention, the light emitted from the light-emitting element array is irradiated over a wider range compared to a structure without a light diffusion component.

[0027] According to the seventh aspect of the present invention, the amount of light received by the light receiving element from the light emitted from the light emitting element array and reflected by the light diffusing member is increased compared to the case where it is not provided at a position overlapping the light emitting element array and the light receiving element.

[0028] According to the eighth aspect of the present invention, light of high light intensity is irradiated compared to a structure in which the light emitting element is driven individually.

[0029] According to the ninth aspect of the present invention, an optical device capable of performing three-dimensional measurement is provided.

[0030] According to the tenth aspect of the present invention, an information processing device capable of measuring a three-dimensional shape is provided.

[0031] According to the eleventh aspect of the present invention, an information processing device equipped with an authentication process based on a three-dimensional shape is provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Embodiments of the present invention will be described in detail with reference to the following drawings.

[0033] Figure 1 is a diagram showing an example of an information processing device;

[0034] Figure 2 is a block diagram for explaining the structure of the information processing device;

[0035] Figure 3 is a top view of the light emitting element array;

[0036] Figure 4 is a diagram for explaining the cross-sectional structure of one VCSEL in the light emitting element array;

[0037] Figure 5 is a diagram for explaining an example of the light diffusing member. Figure 5 In (a) is a top view, Figure 5 In (b) is Figure 5 a cross-sectional view taken along the line VB-VB in (a);

[0038] Figure 6 is a diagram showing an example of an equivalent circuit for driving the light emitting element array by low-side driving;

[0039] Figure 7 is a diagram for explaining a light emitting device to which this embodiment is applied, Figure 7 In (a) is a top view, Figure 7 In (b) is Figure 7 a cross-sectional view taken along the line VIIB-VIIB in (a), Figure 7 In (c) is Figure 7 a cross-sectional view taken along the line VIIC-VIIC in (a);

[0040] Figure 8 This is a diagram for explaining the wiring patterns provided on the wiring substrate and the base material in the light-emitting device to which this embodiment is applicable. Figure 8 In (a), it is the surface of the wiring substrate. Figure 8 In (b), it is the surface of the base material. Figure 8 In (c), it is the back surface of the base material.

[0041] Figure 9 This is a top view for explaining the light-emitting device shown for comparison. Figure 9 In (a), it is the top view. Figure 9 In (b), it is Figure 9 A cross-sectional view under the IXB-IXB line of (a) in it. Figure 9 In (c), it is Figure 9 A cross-sectional view under the IXC-IXC line of (a) in it.

[0042] Figure 10 This is a diagram for explaining the wiring patterns provided on the wiring substrate and the base material in the light-emitting device shown for comparison. Figure 10 In (a), it is the surface of the wiring substrate. Figure 10 In (b), it is the surface of the base material. Figure 10 In (c), it is the back surface of the base material.

[0043] Symbol Explanation

[0044] 1 - Information processing device, 2 - User interface (UI) unit, 3 - Optical device, 4, 4' - Light-emitting device, 5 - 3D sensor, 6 - Resistance element, 7, 70 - Capacitor, 8 - Optical device control unit, 9 - System control unit, 10 - Wiring board, 11-1, 11-2, 111-1F, 111-2F, 111-1B, 111-2B - Anode wiring pattern for light-emitting element array, 12, 112F, 112B - Cathode wiring pattern for light-emitting element array, 13, 113F, 113B - Anode wiring pattern for PD, 14, 114F, 114B - Cathode wiring pattern for PD, 15, 115F, 115B - Anode wiring pattern for TD, 16, 116F, 116B - Cathode wiring pattern for TD, 20 - Light-emitting element array, 21A, 21B, 22A, 22B - Side surfaces, 23A, 23B, 23C - Bonding wires, 30 - Light diffusion component, 40 - Light-receiving element (PD) for light quantity monitoring, 45 - Element (TD) for temperature detection, 50 - Driving unit, 51 - MOS transistor, 52 - Signal generation circuit, 60 - Holding unit, 81 - Shape determination unit, 82 - Power supply, 83 - Power supply line, 84 - Ground line, 91 - Authentication processing unit, 100 - Substrate, 200 - Semiconductor substrate, 202 - Lower DBR, 206 - Active region, 208 - Upper DBR, 210 - Current narrowing layer, 210A - Oxidation region, 210B - Conductive region, 214 - Cathode electrode, 218 - Anode electrode, M - Mesa, VCSEL - Vertical cavity surface emitting laser. Detailed Embodiment

[0045] Hereinafter, with reference to the drawings, embodiments of the present invention will be described in detail.

[0046] In many cases, the information processing device is configured such that it identifies whether the access of a user who has accessed the information processing device is permitted, and permits the use of its own device, i.e., the information processing device, only when the user is authenticated as a user whose access is permitted. So far, methods for authenticating users based on passwords, fingerprints, irises, etc. have been used. Recently, a higher security authentication method has been demanded. As such a method, authentication based on a three-dimensional image such as a user's face shape has been gradually carried out.

[0047] Here, as an example, the information processing device is described as a portable information processing terminal, and the user is authenticated by recognizing the face shape captured as a three-dimensional image. In addition, the information processing device can be applied to information processing devices such as personal computers (PCs) other than portable information processing terminals.

[0048] Furthermore, the structures, functions, methods, etc. described in this embodiment can also be applied to the recognition of a three-dimensional shape other than the recognition of a facial shape as the object to be measured. That is, it can also be applied to the recognition of the shape of an object other than the face. And it is not limited to the distance to the object to be measured.

[0049] (Information processing device 1)

[0050] Figure 1 This is a diagram showing an example of the information processing device 1. As described above, as an example, the information processing device 1 is a portable information processing terminal.

[0051] The information processing device 1 includes a user interface unit (hereinafter, referred to as the UI unit.) 2 and an optical device 3 for acquiring a three-dimensional image. The UI unit 2 is formed by integrating, for example, a display device that displays information to the user and an input device that inputs a command for information processing through the operation of the user. The display device is, for example, a liquid crystal display or an organic electroluminescence (EL) display, and the input device is, for example, a touch panel.

[0052] The optical device 3 includes a light emitting device 4 and a three-dimensional sensor (hereinafter, referred to as the 3D sensor.) 5. The light emitting device 4 irradiates light toward the object to be measured for acquiring a three-dimensional image, and in the example described here, irradiates light toward the face. The 3D sensor 5 acquires the light irradiated by the light emitting device 4 and reflected by the face. Here, it is assumed that a three-dimensional image of the face is acquired according to the so-called ToF (Time of Flight) technology based on the flight time of light. Hereinafter, even when acquiring a three-dimensional image of the face, the face is also referred to as the object to be measured. In addition, a three-dimensional image can also be acquired for an object other than the face as the object to be measured. Sometimes, acquiring a three-dimensional image is referred to as 3D sensing. The 3D sensor 5 is an example of a light receiving unit.

[0053] In addition, the information processing device 1 is configured as a computer including a CPU, a ROM, a RAM, etc. In addition, the ROM includes a non-volatile rewritable memory, such as a flash memory. Moreover, by expanding the program or constants stored in the ROM into the RAM and executed by the CPU, the information processing device 1 operates and executes various information processes.

[0054] Figure 2 This is a block diagram for explaining the structure of the information processing device 1.

[0055] The information processing device 1 includes the above-described optical device 3, the optical device control unit 8, and the system control unit 9. The optical device control unit 8 controls the optical device 3. Moreover, the optical device control unit 8 includes a shape determination unit 81. The system control unit 9 controls the entire information processing device 1 as a system. Moreover, the system control unit 9 includes an authentication processing unit 91. Moreover, a UI unit 2, a speaker 92, and a two-dimensional camera (in Figure 2 which, is labeled as a 2D camera.) 93, etc. are connected to the system control unit 9.

[0056] Hereinafter, the description will be made in order.

[0057] The light-emitting device 4 included in the optical device 3 includes a wiring substrate 10, a base material 100, a light-emitting element array 20, a light diffusion member 30, a light-receiving element for light quantity monitoring (in Figure 2 and hereinafter, labeled as PD.) 40, a temperature detection element (in Figure 2 and hereinafter, labeled as TD.) 45, a drive unit 50, a holding unit 60, and a capacitor 70. Moreover, the light-emitting device 4 includes passive elements such as a resistance element 6 and a capacitor 7 in order to operate the drive unit 50. The drive unit 50 includes drive elements for driving the light-emitting element array 20 as described later. Therefore, in the figure, it is labeled as a drive unit (drive element). In addition, two capacitors 70 are illustrated, but it may be one, or may be more than two. Moreover, the resistance element 6 and the capacitor 7 may each be multiple. Here, sometimes the capacitor 70, 3D sensor 5, resistance element 6, capacitor 7, etc. other than the light-emitting element array 20, PD 40, TD 45, and drive unit 50 are not distinguished from each other and are all labeled as circuit components.

[0058] The light-emitting element array 20, PD 40, and TD 45 are provided on the base material 100. The base material 100 is composed of an electrically insulating member. Moreover, the base material 100, the drive unit 50, the capacitor 70, the resistance element 6, and the capacitor 7 are provided on the wiring substrate 10. That is, the light-emitting element array 20, PD 40, and TD 45 are provided on the wiring substrate 10 via the base material 100. Here, it is assumed that even when passing through the base material 100, the light-emitting element array 20, PD 40, and TD 45 are provided on the wiring substrate 10. In addition, as an example, the drive unit 50 is composed of a semiconductor integrated circuit.

[0059] The light-emitting element array 20 is configured as an array in which a plurality of light-emitting elements are two-dimensionally arranged (refer to Figure 3)。As an example, the light-emitting element is a vertical cavity surface emitting laser (VCSEL). Hereinafter, the description will be made with the light-emitting element being a vertical cavity surface emitting laser VCSEL. Moreover, the vertical cavity surface emitting laser VCSEL is labeled as VCSEL. The light-emitting element array 20 emits light in a direction perpendicular to the surface of the wiring substrate 10 or the base material 100. When performing three-dimensional sensing by ToF technology, the light-emitting element array 20 is required to emit pulsed light with a frequency of 100 MHz or more and a rise time of 1 ns or less (hereinafter, labeled as emitted light pulse). And when taking face authentication as an example, the distance irradiated by the light is about 10 cm to about 1 m. Moreover, the range for measuring the 3D shape is about 1 m square. In addition, the distance irradiated by the light is labeled as the measurement distance, and the range for measuring the 3D shape of the object to be measured is labeled as the measurement range or the irradiation range. And the surface assumed to be set within the measurement range or the irradiation range is labeled as the irradiation surface.

[0060] PD40 is a pin-type photodiode or the like composed of a p-type Si region serving as an anode, an i (intrinsic) type Si region, and an n-type Si region serving as a cathode, which outputs an electrical signal corresponding to the amount of received light (hereinafter, labeled as the received light amount). Moreover, an anode electrode is provided in the p-type Si region, and a cathode electrode is provided in the n-type Si region. In addition, PD40 is an example of a first circuit element and an example of a light-receiving element.

[0061] TD45 is a temperature detection element for detecting the temperature of the base material 100. TD45 is, for example, a surface-mounted negative temperature coefficient thermistor (NTC: Negative Temperature Coefficient Thermistor) or a positive temperature coefficient thermistor (PTC: Positive Temperature Coefficient Thermistor). The resistance value of the negative temperature coefficient thermistor decreases as the temperature rises, and the resistance value of the positive temperature coefficient thermistor rises sharply when it exceeds a certain temperature. Utilizing the above characteristics of TD45, the temperature of the base material 100 is detected to indirectly monitor the temperature of the light-emitting element array 20. Therefore, TD45 is preferably arranged close to the light-emitting element array 20, for example. The thermistor does not have a polarity, but there are elements with a polarity among other temperature sensor elements. In addition, TD45 is an example of a second circuit element.

[0062] The light diffusion member 30 is disposed so as to cover the light-emitting element array 20 and the PD 40. That is, the light diffusion member 30 is separated from the light-emitting element array 20 and the PD 40 on the base material 100 by a preset distance by the holding portion 60 provided on the base material 100. In addition, the fact that the light diffusion member 30 covers the light-emitting element array 20 and the PD 40 means that the light diffusion member 30 is disposed on the light emission path of the light emitted from the light-emitting element array 20 and is disposed in such a manner that the light emitted from the light-emitting element array 20 transmits through the light diffusion member 30. It means a state where the light-emitting element array 20 and the PD 40 overlap the light diffusion member 30 in a plan view. Here, the plan view means the case of observing in the xy plane in (a) etc. in the following Figure 3 , Figure 7 . In addition, the PD 40 is preferably arranged close to the light-emitting element array 20 at a position covered by the light diffusion member 30 in such a manner that it is easy to receive a part of the light reflected by the light diffusion member 30 in the light emitted from the light-emitting element array 20. In Figure 2 , the light diffusion member 30 is disposed so as to also cover the TD 45, but the light diffusion member 30 may not cover the TD 45. If the light diffusion member 30 does not cover the TD 45, the area of the expensive light diffusion member 30 can be reduced.

[0063] The holding portion 60 is provided at the edge portion of the light diffusion member 30 and holds the light diffusion member 30. Here, the holding portion 60 is disposed so as to surround the light-emitting element array 20, the PD 40, and the TD 45. Here, it is assumed that the outer shape of the base material 100, the outer shape of the light diffusion member 30, and the outer shape of the holding portion 60 are the same. Therefore, the outer edges of the base material 100, the light diffusion member 30, and the holding portion 60 overlap. In addition, the outer shape of the base material 100 may be larger than the outer shape of the light diffusion member 30 or the outer shape of the holding portion 60.

[0064] Details of the wiring substrate 10, the base material 100, the light-emitting element array 20, the light diffusion member 30, the driving portion 50, and the holding portion 60 in the light-emitting device 4 will be described later.

[0065] The 3D sensor 5 has a plurality of light receiving units. For example, each light receiving unit is configured to receive pulsed reflected light from a measured object (hereinafter referred to as a received pulse) of the emitted light pulse from the light emitting element array 20, and accumulate charges corresponding to the time until the received light for each light receiving unit. The 3D sensor 5 is configured as a CMOS device having two gates and charge accumulation parts corresponding to them for each light receiving unit. Then, by alternately applying pulses to the two gates, the generated photoelectrons are rapidly transferred to either of the two charge accumulation parts. Charges corresponding to the phase difference between the emitted light pulse and the received pulse are accumulated in the two charge accumulation parts. Moreover, the 3D sensor 5 outputs, as a signal, a digital value corresponding to the phase difference between the emitted light pulse and the received pulse for each light receiving unit via an AD converter. That is, the 3D sensor 5 outputs a signal corresponding to the time from when the light is emitted from the light emitting element array 20 until it is received by the 3D sensor 5. In addition, the AD converter may include the 3D sensor 5 or may be provided outside the 3D sensor 5.

[0066] As described above, when taking face authentication as an example, the light emitting element array 20 is required to irradiate light within an irradiation range of about 10 cm to about 1 m in distance and about 1 m square. Moreover, the 3D sensor 5 receives the reflected light from the measured object to measure the 3D shape of the measured object. Therefore, the light emitting element array 20 requires a large output and effectively dissipates the heat generated by the light emitting element array 20, and requires suppressing the overheating of the light emitting element array 20.

[0067] The shape determination unit 81 of the optical device control unit 8 obtains the digital value obtained for each light receiving unit from the 3D sensor 5, and calculates the distance to the measured object for each light receiving unit. Then, based on the calculated distance, the 3D shape of the measured object is determined.

[0068] When the determined result determined by the shape determination unit 81, that is, the 3D shape of the measured object, is the 3D shape previously stored in a ROM or the like, the authentication processing unit 91 of the system control unit 9 performs authentication processing related to the use of the information processing device 1. In addition, as an example, the authentication processing related to the use of the information processing device 1 refers to the processing of whether to permit the use of the own device, that is, the information processing device 1. For example, when it is determined that the 3D shape of the measured object, that is, the face, is the same as the face shape stored in a storage component such as a ROM, the use of the information processing device 1 including various application programs provided by the information processing device 1 is permitted.

[0069] As an example, the above-mentioned shape determination unit 81 and authentication processing unit 91 are constituted by programs. And they may also be constituted by integrated circuits such as ASICs or FPGAs. Moreover, they may be constituted by software such as programs and integrated circuits such as ASICs.

[0070] In Figure 2 Figure 2 , the optical device 3, the optical device control unit 8, and the system control unit 9 are shown separately from each other, but the system control unit 9 may include the optical device control unit 8. Further, the optical device control unit 8 may be included in the optical device 3. Moreover, the optical device 3, the optical device control unit 8, and the system control unit 9 may be integrally formed.

[0071] Next, before explaining the light-emitting device 4, the circuit that drives the light-emitting element array 20, the light diffusion member 30, and the light-emitting element array 20 that constitute the light-emitting device 4 will be explained. In addition, the circuit that drives the light-emitting element array 20 includes a drive unit 50, a capacitor 70, a PD 40, and a TD 45.

[0072] (Structure of the light-emitting element array 20)

[0073] Figure 3 is a top view of the light-emitting element array 20. The shape of the light-emitting element array 20 in a top view, that is, the planar shape, is a quadrilateral, and a plurality of VCSELs are arranged in a two-dimensional array. The right direction of the paper surface is set as the x direction, and the upper direction of the paper surface is set as the y direction. The direction orthogonal to the x direction and the y direction in the counterclockwise direction is set as the z direction. In addition, the x, y, and z directions in each drawing are the same. In addition, the surface refers to the surface on the +z direction side, and the back surface refers to the surface on the -z direction side. The same applies to other cases. In addition, as Figure 3 shown, it is not necessary for a plurality of VCSELs to be arranged at the intersections of the lattice. For example, they may be arranged at the vertices of a plurality of adjacent triangles, or other arrangements may be possible.

[0074] The VCSEL is a light-emitting element that has an active region serving as a light-emitting region provided between a lower multilayer film mirror and an upper multilayer film mirror laminated on a semiconductor substrate 200 (refer to Figure 4 ) and emits a laser beam in the vertical direction of the semiconductor substrate 200, that is, the +z direction. Thus, two-dimensional array formation can be easily achieved. As an example, the number of VCSELs included in the light-emitting element array 20 is 100 to 1000. In addition, a plurality of VCSELs are connected in parallel to each other and are driven in parallel. The above number of VCSELs is an example, and the number of VCSELs in the light-emitting element array 20 can be set according to the measurement distance or measurement range.

[0075] On the surface of the light-emitting element array 20, a plurality of anode electrodes 218 (refer to Figure 4 ) common to the VCSELs are provided. On the back surface of the light-emitting element array 20, a cathode electrode 214 (refer to Figure 4)。That is, multiple VCSELs are connected in parallel. By driving multiple VCSELs in parallel, compared with the case of driving each VCSEL separately, high-intensity light is emitted simultaneously and irradiates the object to be measured.

[0076] Here, the side on the +x direction side of the light-emitting element array 20 having a quadrilateral planar shape is marked as side surface 21A, the side on the -x direction side is marked as side surface 21B, the side on the +y direction side is marked as side surface 22A, and the side on the -y direction side is marked as side surface 22B. Side surface 21A and side surface 21B are opposed to each other. Side surface 22A and side surface 22B connect side surface 21A and side surface 21B respectively and are opposed to each other. Here, side surface 21A is an example of the first side surface, side surface 21B is an example of the second side surface, side surface 22A is an example of the third side surface, and side surface 22B is an example of the fourth side surface.

[0077] (Structure of VCSEL)

[0078] Figure 4 It is a diagram for explaining the cross-sectional structure of one VCSEL in the light-emitting element array 20. The VCSEL is a VCSEL of a λ resonator structure. The upward direction of the paper surface is set as the z direction.

[0079] The VCSEL is composed of an n-type lower distributed Bragg reflector (DBR: Distributed Bragg Reflector) 202 in which AlGaAs layers with different Al compositions are alternately stacked on a semiconductor substrate 200 such as n-type GaAs, an active region 206 including a quantum well layer sandwiched between an upper spacer layer and a lower spacer layer, and a p-type upper distributed Bragg reflector 208 in which AlGaAs layers with different Al compositions are alternately stacked. Hereinafter, the distributed Bragg reflector is marked as DBR.

[0080] The n-type lower DBR 202 is a laminate in which an Al 0.9 Ga 0.1 As layer and a GaAs layer are set as a pair, and the thickness of each layer is λ / 4n r (where λ is the oscillation wavelength, n r is the refractive index of the medium) and they are alternately stacked for 40 cycles. The carrier concentration after doping with an n-type impurity, i.e., silicon, is, for example, 3×10 18 cm -3 .

[0081] The active region 206 is composed of a lower spacer layer, a quantum well active layer, and an upper spacer layer stacked. For example, the lower spacer layer is an undoped Al 0.6 Ga 0.4 As layer, the quantum well active layer is an undoped InGaAs quantum well layer and an undoped GaAs barrier layer, and the upper spacer layer is an undoped Al0.6 Ga 0.4 As layer.

[0082] The p-type upper DBR 208 forms a stacked body with a pair of a p-type Al 0.9 Ga 0.1 As layer and a GaAs layer, and the thickness of each layer is λ / 4n r , and they are stacked in 29 cycles. The carrier concentration after doping with a p-type impurity, i.e., carbon, is, for example, 3×10 18 cm -3 . For example, preferably, a contact layer made of p-type GaAs is formed on the uppermost layer of the upper DBR 208, and a current constriction layer 210 of p-type AlAs is formed on the lowermost layer or inside the upper DBR 208.

[0083] By etching the semiconductor layer stacked from the upper DBR 208 to the lower DBR 202, a cylindrical mesa M is formed on the semiconductor substrate 200. As a result, the current constriction layer 210 is exposed on the side surface of the mesa M. Through an oxidation process, an oxidized region 210A that starts to be oxidized from the side surface of the mesa M and a conductive region 210B surrounded by the oxidized region 210A are formed in the current constriction layer 210. In addition, in the oxidation process, the oxidation rate of the AlAs layer is faster than that of the AlGaAs layer, and the oxidized region 210A is oxidized from the side surface of the mesa M toward the inside at a substantially constant rate. Therefore, the planar shape of the conductive region 210B becomes a shape that reflects the outer shape of the mesa M, i.e., a circular shape, and its center is substantially aligned with the axis of the mesa M indicated by the dash-dotted line. In the present embodiment, the mesa M has a columnar structure.

[0084] A metal annular p-side electrode 212 such as Ti / Au is formed on the uppermost layer of the mesa M. The p-side electrode 212 makes an ohmic contact with the contact layer provided on the upper DBR 208. The surface of the upper DBR 208 inside the annular p-side electrode 212 becomes a light exit port 212A for emitting a laser beam to the outside. That is, in the VCSEL, light is emitted in a direction perpendicular to the semiconductor substrate 200, and the axis of the mesa M becomes the optical axis. Moreover, a cathode electrode 214 is formed on the back surface of the semiconductor substrate 200 as an n-side electrode. In addition, the surface of the upper DBR 208 inside the p-side electrode 212 is a light emitting surface. That is, the optical axis direction of the VCSEL becomes the light emission direction.

[0085] Moreover, an insulating layer 216 is provided to cover the surface of the mesa M in a manner that excludes the portion where the anode electrode (anode electrode 218 described later) connected to the p-side electrode 212 and the light exit port 212A. Moreover, except for the light exit port 212A, the anode electrode 218 is provided in ohmic contact with the p-side electrode 212. In addition, the anode electrode 218 is provided to be common among a plurality of VCSELs. That is, among the plurality of VCSELs constituting the light-emitting element array 20, the respective p-side electrodes 212 are connected in parallel through the anode electrode 218. In addition, the anode electrode 218 is an example of the upper surface electrode of the light-emitting element array.

[0086] In addition, the VCSEL can oscillate in a single transverse mode or in a multi-transverse mode. As an example, the optical output of one VCSEL is 4 mW to 8 mW. Therefore, for example, when the light-emitting element array 20 is composed of 500 VCSELs, the optical output of the light-emitting element array 20 becomes 2 W to 4 W. In such a high-output light-emitting element array 20, the heat generation from the light-emitting element array 20 is large.

[0087] (Structure of the light diffusion member 30)

[0088] Figure 5 FIG. is an illustration of an example of the light diffusion member 30. Figure 5 In (a) of FIG., it is a top view, Figure 5 and in (b) of FIG., it is Figure 5 a cross-sectional view taken along the line VB-VB in (a) of FIG. In Figure 5 In (a) of FIG., the right direction of the paper surface is set as the x direction, and the upper direction of the paper surface is set as the y direction. The direction orthogonal to the x direction and the y direction in the counterclockwise direction is set as the z direction. Therefore, in Figure 5 In (b) of FIG., the right direction of the paper surface becomes the x direction, and the upper direction of the paper surface becomes the z direction.

[0089] As Figure 5 shown in (b) of FIG., the light diffusion member 30 includes a glass substrate 31 with two parallel and flat surfaces and a resin layer 32 provided on the back surface of the glass substrate 31 and formed with irregularities for diffusing light. The light diffusion member 30 further expands the divergence angle of the light incident from the VCSEL of the light-emitting element array 20 and emits it. That is, the irregularities formed on the resin layer 32 of the light diffusion member 30 refract or scatter the light so that the divergence angle β of the emitted light is larger than the divergence angle α of the incident light. That is, as Figure 5As shown in (b), compared with the divergence angle α of the light emitted from the VCSEL, the divergence angle β of the light that transmits through the light diffusion member 30 and is emitted from the light diffusion member 30 becomes larger (α < β). Therefore, when the light diffusion member 30 is used, the area of the illumination surface irradiated by the light emitted from the light-emitting element array 20 expands compared to the case where the light diffusion member 30 is not used. Also, the light density in the illumination surface decreases. Additionally, the light density refers to irradiance, and the divergence angles α and β are full width at half maximum (FWHM).

[0090] Moreover, the light diffusion member 30 has, for example, a quadrilateral planar shape, and the width W in the x direction x and the longitudinal width W in the y direction y are 1 mm to 10 mm, and the thickness t in the z direction d is 0.1 mm to 1 mm. And if the light diffusion member 30 has the above size and shape, it can particularly provide a light diffusion member suitable for face authentication of a portable information processing terminal or measurement at a relatively short distance of about several meters. Additionally, the planar shape of the light diffusion member 30 can also be other shapes such as a polygon or a circle.

[0091] (The circuit for driving the light-emitting element array 20)

[0092] When it is desired to drive the light-emitting element array 20 at a higher speed, for example, low-side driving is preferably performed. Low-side driving means a structure in which a driving element such as a MOS transistor is located on the downstream side of the current path with respect to a driving object such as a VCSEL. Conversely, a structure in which the driving element is located on the upstream side is called high-side driving.

[0093] Figure 6 is a diagram showing an example of an equivalent circuit for driving the light-emitting element array 20 by low-side driving. In Figure 6 , the VCSEL, driving unit 50, capacitor 70, power supply 82, PD40, light quantity detection resistance element 41 for detecting the current flowing through PD40, TD45, and temperature detection resistance element 46 for detecting the current flowing through TD45 of the light-emitting element array 20 are shown. Additionally, the capacitor 70 is connected in parallel with the power supply 82.

[0094] Furthermore, the power supply 82 is provided in Figure 2 the optical device control unit 8 shown. The power supply 82 generates a DC voltage with the + side set to the power supply potential and the - side set to the ground potential. The power supply potential is supplied to the power line 83, and the ground potential is supplied to the ground line 84.

[0095] As described above, the light-emitting element array 20 is composed of a plurality of VCSELs connected in parallel. The anode electrode 218 of the VCSEL (refer to Figure 4 ) is connected to the power line 83.

[0096] The drive unit 50 includes an n-channel MOS transistor 51 and a signal generation circuit 52 that turns on and off the MOS transistor 51. The drain of the MOS transistor 51 is connected to the cathode electrode 214 of the VCSEL (refer to Figure 4 ). The source of the MOS transistor 51 is connected to the ground line 84. Further, the gate of the MOS transistor 51 is connected to the signal generation circuit 52. That is, the VCSEL and the MOS transistor 51 of the drive unit 50 are connected in series between the power supply line 83 and the ground line 84. The signal generation circuit 52 generates an “H level” signal that turns on the MOS transistor 51 and an “L level” signal that turns off the MOS transistor 51 under the control of the optical device control unit 8.

[0097] One terminal of the capacitor 70 is connected to the power supply line 83, and the other terminal is connected to the ground line 84. That is, the capacitor 70 is connected in parallel with the power supply 82. When there are a plurality of capacitors 70, the plurality of capacitors 70 are connected in parallel. Further, the capacitor 70 is, for example, an electrolytic capacitor or a ceramic capacitor.

[0098] The cathode electrode of the PD 40 is connected to the power supply line 83, and the anode electrode is connected to one terminal of the light quantity detection resistance element 41. Further, the other terminal of the light quantity detection resistance element 41 is connected to the ground line 84. That is, the PD 40 and the light quantity detection resistance element 41 are connected in series between the power supply line 83 and the ground line 84. Further, the connection point of the PD 40 and the light quantity detection resistance element 41, that is, the output terminal 42, is connected to the optical device control unit 8.

[0099] One terminal of the temperature detection resistance element 46 is connected to the power supply line 83, and the other terminal is connected to one electrode of the TD 45. Further, the other electrode of the TD 45 is connected to the ground line 84. That is, the temperature detection resistance element 46 and the TD 45 are connected in series between the power supply line 83 and the ground line 84. Further, the connection point of the temperature detection resistance element 46 and the TD 45, that is, the output terminal 47, is connected to the optical device control unit 8.

[0100] Next, a method for driving the low side, that is, the light emitting element array 20, will be described.

[0101] First, assume that the signal generated by the signal generation circuit 52 in the drive unit 50 is at the “L level”. In this case, the MOS transistor 51 is in the off state. That is, current does not flow between the source and drain of the MOS transistor 51. Therefore, current does not flow in the series-connected VCSELs either. The VCSELs do not emit light.

[0102] At this time, the capacitor 70 is charged by the power supply 82. That is, one terminal of the capacitor 70 connected to the power supply line 83 becomes the power supply potential, and the other terminal connected to the ground line 84 becomes the ground potential. The capacitor 70 stores charges determined by the capacitance, the power supply voltage (= power supply potential - ground potential), and time.

[0103] Next, when the signal generated by the signal generation circuit 52 in the drive unit 50 becomes "H level", the MOS transistor 51 transfers from the off state to the on state. Then, the charges stored in the capacitor 70 are discharged, so that current flows through the series-connected MOS transistor 51 and VCSEL, and the VCSEL emits light.

[0104] Moreover, when the signal generated by the signal generation circuit 52 in the drive unit 50 becomes "L level", the MOS transistor 51 transfers from the on state to the off state. Thereby, the light emission of the VCSEL is stopped. Then, the charging of the capacitor 70 by the power supply 82 starts again.

[0105] As described above, each time the signal output by the signal generation circuit 52 transfers between "L level" and "H level", the MOS transistor 51 repeats conduction and cutoff, so that the light emission of the VCSEL repeats the non-light emission state (i.e., non-light emission) and the light emission state. That is, light pulses are emitted from the VCSEL. The repetition of conduction and cutoff of the MOS transistor 51 is sometimes referred to as switching. Here, as shown in the equivalent circuit of Figure 6 the current path to the light-emitting element array 20 composed of the light-emitting element array 20, the MOS transistor 51, the capacitor 70, etc. is marked as the circuit or circuitry for driving the light-emitting element array 20.

[0106] Here, the MOS transistor 51 is an example of a drive element for driving the light-emitting element array 20. The drive element can be a field-effect transistor or a bipolar transistor other than the MOS transistor. That is, the drive unit 50 is constituted by including the drive element. Therefore, here, the drive unit 50 is sometimes referred to as the drive element.

[0107] In addition, it is also possible to directly supply charges (current) from the power supply 82 to the VCSEL without providing the capacitor 70, but by storing charges in the capacitor 70 and discharging the stored charges when the MOS transistor 51 transfers from conduction to cutoff and supplying current to the VCSEL sharply, the start-up time of the light emission of the VCSEL is shortened.

[0108] PD40 is connected in the reverse direction between the power supply line 83 and the ground line 84 via the light quantity detection resistance element 41. Therefore, in a state where light is not irradiated, no current flows. As described above, if PD40 receives a part of the light reflected by the light diffusion member 30 in the light emitted from the VCSEL, a current corresponding to the received light quantity flows in PD40. Therefore, the current flowing through PD40 is measured as the voltage of the output terminal 42, thereby detecting the light output of the light emitting element array 20. Here, the optical device control unit 8 controls the light output of the light emitting element array 20 so that the light output becomes a preset light output. For example, when the light output of the light emitting element array 20 is less than the preset light output, the optical device control unit 8 increases the current flowing through the VCSEL by increasing the power supply potential of the power supply 82 and increasing the amount of charge stored in the capacitor 70. On the other hand, when the light output of the light emitting element array 20 is more than the preset light output, the current flowing through the VCSEL is reduced by reducing the power supply potential of the power supply 82 and reducing the amount of charge stored in the capacitor 70. Thus, the light output of the light emitting element array 20 is controlled.

[0109] Moreover, when the received light quantity of PD40 extremely decreases, the light diffusion member 30 comes off or is damaged, and the light emitted from the light emitting element array 20 may directly irradiate the outside. In this case, the optical device control unit 8 controls the light output of the light emitting element array 20. For example, the emission of light from the light emitting element array 20, that is, the irradiation of light to the object to be measured, is stopped.

[0110] As described above, PD40 is provided to detect the light output of the light emitting element array 20. Therefore, the farther PD40 is arranged from the light emitting element array 20, the smaller the received light quantity becomes, and the lower the detection sensitivity of the light output of the light emitting element array 20. Therefore, PD40 is preferably arranged near the light emitting element array 20, for example.

[0111] TD45 is connected in series with the temperature detection resistance element 46 between the power supply line 83 and the ground line 84. Therefore, the output terminal 47 becomes a voltage obtained by dividing the power supply voltage (= power supply potential - ground potential) by the temperature detection resistance element 46 and TD45. When TD45 is, for example, a negative temperature coefficient thermistor (NTC), as described above, the resistance value decreases as the temperature of the base material 100 rises. Then, the voltage of the output terminal 47 decreases as the temperature of the base material 100 rises. The optical device control unit 8 detects the temperature of the base material 100, that is, the light-emitting element array 20, from the voltage of the output terminal 47. In addition, regarding the light-emitting element array 20, when the temperature exceeds a preset allowable temperature, the operation of the light-emitting element array 20 becomes unstable, or the light-emitting element array 20 is damaged. Here, when it is detected from the voltage of the output terminal 47 that the temperature of the light-emitting element array 20 exceeds the allowable temperature, the optical device control unit 8 controls the drive unit 50 to suppress the current flowing through the light-emitting element array 20 or cut off the current flowing through the light-emitting element array 20. Thereby, overheating of the light-emitting element array 20 is suppressed.

[0112] As described above, TD45 is provided to detect the temperature of the light-emitting element array 20. Therefore, the farther TD45 is arranged from the light-emitting element array 20, the smaller the temperature change of TD45 becomes, and the lower the detection sensitivity of the temperature of the light-emitting element array 20 becomes. Therefore, TD45 is preferably arranged near the light-emitting element array 20, for example.

[0113] That is, PD40 and TD45 are an example of circuit elements to be arranged close to the light-emitting element array 20.

[0114] (Light-emitting device 4)

[0115] Next, the light-emitting device 4 will be described in detail.

[0116] Figure 7 It is a diagram for explaining the light-emitting device 4 to which this embodiment is applied. Figure 7 In (a) of is a plan view, Figure 7 In (b) of is Figure 7 A cross-sectional view taken along line VIIB-VIIB in (a) of. Figure 7 In (c) of is Figure 7 A cross-sectional view taken along line VIIC-VIIC in (a) of. Here, in Figure 7 In (a) of, the right direction of the paper surface is set as the x direction, and the upper direction of the paper surface is set as the y direction. The direction orthogonal to the x direction and the y direction in the counterclockwise direction is set as the z direction. Therefore, in Figure 7 In (b) of, Figure 7 In (c) of, the right direction of the paper surface becomes the x direction, and the upper direction of the paper surface becomes the z direction. The same applies to the same drawings shown below.

[0117] As shown in Figure 7 (b) of Figure 7 and (c) of Figure 7 , the light-emitting device 4 is provided with a base material 100 and a driving unit 50 on the wiring substrate 10. Moreover, a light-emitting element array 20, a PD 40, a TD 45, and a holding unit 60 are provided on the base material 100. A light diffusion member 30 is provided on the holding unit 60. Moreover, as shown in

[0118] as shown in Figure 7 (a) of Figure 6 , in the light-emitting device 4, the PD 40, the TD 45, the light-emitting element array 20, and the driving unit 50 are arranged linearly in the x direction. That is, the driving unit 50 including a driving element, i.e., a MOS transistor 51 (refer to

[0119] ) is provided on the side 21A side of the light-emitting element array 20, and the PD 40 and the TD 45 are provided on the side 21B side of the light-emitting element array 20. Moreover, the PD 40 and TD 45 lines are arranged along the direction of the side 21B. That is, the PD 40 and the TD 45 are arranged and configured in the order of TD 45 and PD 40 in the y direction on the side 21B side of the light-emitting element array 20. Figure 7 By such a configuration, as shown in Figure 9 (a) of Figure 6 , the distance D1 from the end portion on the driving unit 50 side, i.e., the side 21A, of the light-emitting element array 20 to the end portion on the light-emitting element array 20 side of the driving unit 50 becomes shorter than the distance D2 in a comparative example described later (refer to Figure 8 (a) of

[0120] Before explaining the cross-sectional views of the light-emitting device 4 shown in Figure 7 (b) of Figure 7 and (c) of , the wiring patterns provided on the wiring substrate 10 and the base material 100 will be described in detail.

[0121] Figure 8 This is a diagram for explaining the wiring patterns of the wiring substrate 10 and the base material 100 provided in the light-emitting device 4 to which this embodiment is applied. Figure 8 In (a), it is the surface of the wiring substrate 10. Figure 8 In (b), it is the surface of the base material 100. Figure 8 In (c), it is the back surface of the base material 100.

[0122] The wiring substrate 10 is, for example, a three-layer multi-layer substrate. That is, the wiring substrate 10 includes a first conductive layer, a second conductive layer, and a third conductive layer from the surface side on which the base material 100 or the drive unit 50 etc. are mounted. Moreover, insulating layers are provided between the first conductive layer and the second conductive layer and between the second conductive layer and the third conductive layer. For example, the third conductive layer is set as the power supply line 83, and the second conductive layer is set as the ground line 84.

[0123] The first conductive layer, the second conductive layer, and the third conductive layer are composed of conductive materials such as metals like copper (Cu), silver (Ag), or conductive pastes containing these metals. The insulating layer is composed of, for example, epoxy resin and ceramics.

[0124] Figure 8 In (a), the wiring pattern based on the first conductive layer of the wiring substrate 10 is shown, while the wiring patterns based on the ground line 84, that is, the second conductive layer, and the power supply line 83, that is, the third conductive layer, are not shown. The second conductive layer and the third conductive layer are mucous membranes except for the parts where vias used for connecting to the wiring pattern formed by the first conductive layer are provided.

[0125] As Figure 8 shown in (a), through the first conductive layer, anode wiring patterns 11-1, 11-2 for the light-emitting element array that form a part of the current path to the light-emitting element array 20, a cathode wiring pattern 12 for the light-emitting element array, an anode wiring pattern 13 for the PD that forms a part of the current path to the PD 40, a cathode wiring pattern 14 for the PD, an anode wiring pattern 15 for the TD that forms a part of the current path to the TD 45, and a cathode wiring pattern 16 for the TD are formed. Additionally, when not differentiating between the anode wiring patterns 11-1, 11-2 for the light-emitting element array and the cathode wiring pattern 12 for the light-emitting element array etc., they are marked as wiring patterns or wirings. The same applies to other cases.

[0126] Thus, by forming the wiring substrate 10 as a multilayer substrate, with the power supply line 83 as the third conductive layer and the ground line 84 as the second conductive layer, it is easy to suppress fluctuations in the power supply potential and the ground potential. Moreover, the wiring pattern formed by the first conductive layer and the second conductive layer or the third conductive layer are electrically connected via vias. A via is, for example, a conductive portion formed by filling a conductive material in a hole that penetrates the wiring substrate 10 in the thickness direction.

[0127] Here, the anode wiring patterns 11-1 and 11-2 for the light-emitting element array are wirings that are connected to the anode electrodes 218 of the light-emitting element array 20 via the wiring patterns provided on the base material 100. The cathode wiring pattern 12 for the light-emitting element array is a wiring that connects the cathode electrode 214 of the light-emitting element array 20 and the drain of a MOS transistor 51, which is an example of a driving element of the driving unit 50, via the wiring patterns provided on the base material 100.

[0128] The anode wiring pattern 13 for the PD is a wiring that is connected to the anode electrode of the PD 40 via the wiring patterns provided on the base material 100. The cathode wiring pattern 14 for the PD is a wiring that is connected to the cathode electrode of the PD 40 via the wiring patterns provided on the base material 100. In addition, the anode electrode and the cathode electrode of the PD 40 are the terminals of the PD 40.

[0129] The anode wiring pattern 15 for the TD is a wiring that is connected to one terminal (the + side terminal when there is a polarity) of the TD 45 via the wiring patterns provided on the base material 100. The cathode wiring pattern 16 for the TD is a wiring that is connected to the other terminal (the - side terminal when there is a polarity) of the TD 45 via the wiring patterns provided on the base material 100.

[0130] Moreover, via the first conductive layer, a wiring pattern is formed to which circuit components such as a capacitor 70, a resistor element 6, and a capacitor 7 are connected. In addition, illustrations of these wiring patterns are omitted.

[0131] The planar shape of the cathode wiring pattern 12 for the light-emitting element array is a quadrilateral. The anode wiring patterns 11-1 and 11-2 for the light-emitting element array are adjacently provided on the ±y direction sides of the cathode wiring pattern 12 for the light-emitting element array so as to oppose each other with the cathode wiring pattern 12 for the light-emitting element array interposed therebetween in the ±y directions.

[0132] The PD anode wiring pattern 13 and the PD cathode wiring pattern 14 are provided on the -x direction side of the light-emitting element array anode wiring patterns 11-1 and 11-2 and the light-emitting element array cathode wiring pattern 12. Moreover, the PD anode wiring pattern 13 is provided on the +y direction side, and the PD cathode wiring pattern 14 is provided in an L shape bent from the central portion of the wiring substrate 10 toward the +y direction side. That is, the wirings connected to the anode electrode and the cathode electrode of the PD 40 are led out to the side surface 22A side of the light-emitting element array 20.

[0133] The TD anode wiring pattern 15 and the TD cathode wiring pattern 16 are provided on the -x direction side of the light-emitting element array anode wiring patterns 11-1 and 11-2 and the light-emitting element array cathode wiring pattern 12. Moreover, the TD anode wiring pattern 15 is provided on the -y direction side, and the TD cathode wiring pattern 16 is provided in an inverted L shape bent from the central portion of the wiring substrate 10 toward the -y direction side. That is, the wirings connected to the two terminals of the TD 45 are led out to the side surface 22B side of the light-emitting element array 20.

[0134] The base material 100 is made of an electrically insulating material. In addition, since the light-emitting element array 20 is provided on the base material 100, it is preferably composed of a heat dissipation member that is electrically insulating and has a higher thermal conductivity than the wiring substrate 10. Examples of the electrically insulating heat dissipation member include ceramics such as silicon nitride and aluminum nitride. If the base material 100 is composed of a heat dissipation member, the heat generated by the light-emitting element array 20 is conducted through the base material 100 to the holding portion 60 and the light diffusion member 30, making it easier to dissipate heat, thereby improving the heat dissipation efficiency.

[0135] In Figure 8 On the surface of the base material 100 shown in (b) of [], the light-emitting element array anode wiring patterns 111-1F, 111-2F, the light-emitting element array cathode wiring pattern 112F, the PD anode wiring pattern 113F, the PD cathode wiring pattern 114F, the TD anode wiring pattern 115F, and the TD cathode wiring pattern 116F are formed. Except for the light-emitting element array cathode wiring pattern 112F, the light-emitting element array anode wiring patterns 111-1F, 111-2F, the PD anode wiring pattern 113F, the PD cathode wiring pattern 114F, the TD anode wiring pattern 115F, and the TD cathode wiring pattern 116F are respectively connected to Figure 8The anode wiring patterns 11-1, 11-2 for the light-emitting element array, the anode wiring pattern 13 for the PD, the cathode wiring pattern 14 for the PD, the anode wiring pattern 15 for the TD, and the cathode wiring pattern 16 for the TD provided on the wiring substrate 10 shown in (a) therein have the same planar shape. The length of the light-emitting element array cathode wiring pattern 112F in the x direction becomes shorter than that of the light-emitting element array cathode wiring pattern 12 of the wiring substrate 10. This is because a part of the +x direction side of the light-emitting element array cathode wiring pattern 12 is not covered with the base material 100.

[0136] On Figure 8 On the back surface of the base material 100 shown in (c) therein, there are formed an anode wiring pattern 111-1B, 111-2B for the light-emitting element array, a cathode wiring pattern 112B for the light-emitting element array, an anode wiring pattern 113B for the PD, a cathode wiring pattern 114B for the PD, an anode wiring pattern 115B for the TD, and a cathode wiring pattern 116B for the TD. The planar shapes of these wiring patterns are the shapes obtained by mirror-inverting the anode wiring patterns 111-1F, 111-2F for the light-emitting element array, the cathode wiring pattern 112F for the light-emitting element array, the anode wiring pattern 113F for the PD, the cathode wiring pattern 114F for the PD, the anode wiring pattern 115F for the TD, and the cathode wiring pattern 116F for the TD formed on the surface of the base material shown in (b) therein. Figure 8 Moreover, the anode wiring patterns 111-1F, 111-2F for the light-emitting element array, the cathode wiring pattern 112F for the light-emitting element array, the anode wiring pattern 113F for the PD, the cathode wiring pattern 114F for the PD, the anode wiring pattern 115F for the TD, and the cathode wiring pattern 116F for the TD formed on the surface of the base material 100 are electrically connected to the anode wiring patterns 111-1B, 111-2B for the light-emitting element array, the cathode wiring pattern 112B for the light-emitting element array, the anode wiring pattern 113B for the PD, the cathode wiring pattern 114B for the PD, the anode wiring pattern 115B for the TD, and the cathode wiring pattern 116B for the TD formed on the back surface of the base material 100 through conductive lines, i.e., vias, that penetrate through the base material 100 in the thickness direction between the wiring patterns with the same number. As

[0137] shown in (b) therein, Figure 7 and Figure 7 shown in (c) therein, the vias are marked with "V" for numbering the wiring patterns. For example, as Figure 7 shown in (b) therein, the anode wiring pattern 111-2F for the light-emitting element array provided on the surface is connected to the anode wiring pattern 111-2B for the light-emitting element array provided on the back surface through the via 111-2V. By using a plurality of vias to connect between a set of wiring patterns, the inductance of the circuit is reduced.

[0138] Moreover, asFigure 7 As shown in (a) of FIG.

[0139] First, the cathode electrode 214 of the light-emitting element array 20 is bonded to the cathode wiring pattern 112F for the light-emitting element array on the substrate 100 by a conductive adhesive or the like (see Figure 4 ). Further, the anode electrode 218 of the light-emitting element array 20 (see Figure 4 ) is connected to the anode wiring patterns 111-1F and 111-2F for the light-emitting element array by bonding wires 23A and 23B.

[0140] Moreover, the cathode electrode of the PD 40 is bonded to the PD cathode wiring pattern 114F on the substrate 100 by a conductive adhesive, and the anode electrode of the PD 40 is connected to the PD anode wiring pattern 113F on the substrate 100 by a bonding wire 23C. Further, one terminal (the + side terminal when polar) of the TD 45 is connected to the TD anode wiring pattern 115F on the substrate 100 by a conductive adhesive or solder, and the other terminal (the - side terminal when polar) of the TD 45 is connected to the TD cathode wiring pattern 116F on the substrate 100 by a conductive adhesive or solder.

[0141] Moreover, on Figure 8 the substrate 100 is mounted at the position indicated by the dotted line in (a) of FIG. Thus, the anode wiring patterns 11-1 and 11-2 for the light-emitting element array on the wiring substrate 10 are connected to the anode wiring patterns 111-1B and 111-2B for the light-emitting element array on the substrate 100, and the cathode wiring pattern 12 for the light-emitting element array on the wiring substrate 10 is connected to the cathode wiring pattern 112B for the light-emitting element array on the substrate 100. Similarly, the PD anode wiring pattern 13 on the wiring substrate 10 is connected to the PD anode wiring pattern 113B on the substrate 100, and the PD cathode wiring pattern 14 on the wiring substrate 10 is connected to the PD cathode wiring pattern 114B on the substrate 100. Further, the TD anode wiring pattern 15 on the wiring substrate 10 is connected to the TD anode wiring pattern 115B on the substrate 100, and the TD cathode wiring pattern 16 on the wiring substrate 10 is connected to the TD cathode wiring pattern 116B on the substrate 100. These connections are made by, for example, a conductive adhesive.

[0142] From Figure 8 it can be seen in (a) of FIG. that a part of the cathode wiring pattern 12 for the light-emitting element array on the +x direction side is not covered by the substrate 100. Therefore, the drive unit 50 is mounted so as to be connected to the part of the cathode wiring pattern 12 for the light-emitting element array on the wiring substrate 10 that is not covered by the substrate 100.

[0143] Thereby, it constitutesFigure 7 in (a) of Figure 7 in (b) of Figure 7 the light-emitting device 4 shown in (c).

[0144] If further described with reference to Figure 7 (a) of Figure 4 , the light-emitting element array 20 is disposed on the cathode wiring pattern 112F for the light-emitting element array of the base material 100, and the cathode electrode 214 of the light-emitting element array 20 (reference Figure 4 ) is connected to the cathode wiring pattern 112F for the light-emitting element array. Moreover, the anode electrode 218 of the light-emitting element array 20 (reference Figure 4 ) is connected to the anode wiring pattern 111-1F for the light-emitting element array of the base material 100 on the side 22A side of the light-emitting element array 20 through the bonding wire 23A, and the anode electrode 218 of the light-emitting element array 20 (reference Figure 4 ) is connected to the anode wiring pattern 111-2F for the light-emitting element array of the base material 100 on the side 22B side of the light-emitting element array 20 through the bonding wire 23B. Moreover, no anode wiring pattern for the light-emitting element array is provided on the side 21A, 21B sides of the light-emitting element array 20. That is, no bonding wire for connecting the anode electrode 218 and the anode wiring pattern for the light-emitting element array is provided on the side 21A, 21B sides of the light-emitting element array 20. Therefore, the driving unit 50 can be disposed close to the light-emitting element array 20, and an example of a circuit element to be disposed close to the light-emitting element array 20, namely, the PD40 and the TD45, can be disposed close to the light-emitting element array 20. Here, the bonding wires such as the bonding wires 23A, 23B are an example of wiring components extending from the upper surface electrode of the light-emitting element array 20 toward the outside of the light-emitting element array 20.

[0145] Moreover, as shown in the cross-sectional view under the VIIB-VIIB line shifted from the center in the y direction of the wiring substrate 10 toward the -y direction side in (b) of Figure 7 , the anode wiring pattern 111-2F for the light-emitting element array on the surface of the base material 100 is connected to the anode wiring pattern 111-2B for the light-emitting element array on the back surface of the base material 100 through the via hole 111-2V, and the anode wiring pattern 111-2B for the light-emitting element array is connected to the anode wiring pattern 11-2 for the light-emitting element array of the wiring substrate 10. The same applies to the anode wiring pattern 111-1F, the anode wiring pattern 111-1B, and the anode wiring pattern 11-1 for the light-emitting element array.

[0146] And, as Figure 7As shown in the cross-sectional view taken along line VIIc-VIIc in the central portion in the y direction of the wiring substrate 10 in (a), the cathode wiring pattern 112F for the light-emitting element array on the surface of the base material 100 is connected to the cathode wiring pattern 112B for the light-emitting element array on the back surface of the base material 100 via the through-hole 112V, and the cathode wiring pattern 112B for the light-emitting element array is connected to the cathode wiring pattern 12 for the light-emitting element array of the wiring substrate 10. The cathode wiring pattern 12 for the light-emitting element array is connected to the drive unit 50.

[0147] Moreover, the anode wiring patterns 11-1 and 11-2 for the light-emitting element array are connected to one terminal of the capacitor 70. Alternatively, the capacitor 70 may be provided for each of the anode wiring patterns 11-1 and 11-2 for the light-emitting element array.

[0148] As Figure 7 As shown in the cross-sectional view in (b), the cathode wiring pattern 116F for TD on the surface of the base material 100 is connected to the cathode wiring pattern 116B for TD on the back surface of the base material 100 via the through-hole 116V, and the cathode wiring pattern 116B for TD is connected to the cathode wiring pattern 16 for TD of the wiring substrate 10.

[0149] Similarly, the anode wiring pattern 115F for TD on the surface of the base material 100 is connected to the anode wiring pattern 115B for TD on the back surface of the base material 100 via the through-hole 115V, and the anode wiring pattern 115B for TD is connected to the anode wiring pattern 15 for TD of the wiring substrate 10.

[0150] The same applies to the wiring pattern connecting the PD40, and thus the description thereof is omitted.

[0151] In the light-emitting device 4 of the present embodiment, the drive unit 50 including the drive element is disposed close to the side surface 21A side of the light-emitting element array 20. Moreover, by disposing the PD40 and TD45 to be close to the light-emitting element array 20 in parallel on the side surface 21B side of the light-emitting element array 20, the PD40 and TD45 are disposed close to the light-emitting element array 20. Hereinafter, a light-emitting device 4' shown for comparison and not applicable to the present embodiment will be described.

[0152] (Light-emitting device 4' of the comparative example)

[0153] Figure 9 It is a plan view for explaining the light-emitting device 4' shown for comparison. Figure 9 (a) in is a plan view, Figure 9 (b) in is Figure 9 the cross-sectional view taken along line IXb-IXb in (a), Figure 9 (c) in is Figure 9A cross-sectional view taken along the IXC-IXC line in (a) above. In addition, in the light-emitting device 4', components having the same functions as those of the light-emitting device 4 are denoted by the same reference numerals as those of the light-emitting device 4, and their descriptions are omitted.

[0154] In the light-emitting device 4', on the base material 100, the PD40 is disposed between the light-emitting element array 20 and the drive unit 50. That is, in the light-emitting device 4', the PD40 and the TD45, which are to be disposed close to the light-emitting element array 20, are disposed with the light-emitting element array 20 therebetween. That is, the PD40 is disposed close to the side 21A side of the light-emitting element array 20, and the TD45 is disposed close to the side 21B side of the light-emitting element array 20. Therefore, the distance D2 between the side 21A of the light-emitting element array 20 and the end of the drive unit 50 on the light-emitting element array 20 side including the drive element becomes larger than the distance D1 of the light-emitting device 4. As a result, the inductance of the circuit for driving the light-emitting element array 20 increases, and it becomes difficult to turn on and off the light-emitting element array 20 at high speed.

[0155] Figure 10 This is a diagram for explaining the wiring patterns provided on the wiring substrate 10 and the base material 100 in the light-emitting device 4' shown for comparison. Figure 10 In (a) above, it is the surface of the wiring substrate 10, Figure 10 In (b) above, it is the surface of the base material 100, Figure 10 In (c) above, it is the back surface of the base material 100.

[0156] As Figure 10 shown in (a) above, the PD anode wiring pattern 13 and the PD cathode wiring pattern 14 are disposed so as to face each other in the ±y direction with the light-emitting element array cathode wiring pattern 12 therebetween. That is, the wirings connected to the anode electrode and the cathode electrode of the PD40 are led out in opposite directions along the side 21A of the light-emitting element array 20. Similarly, the TD anode wiring pattern 15 and the TD cathode wiring pattern 16 are disposed so as to face each other in the ±y direction. That is, the wirings connected to the anode electrode and the cathode electrode of the TD45 are led out in opposite directions along the side 21B of the light-emitting element array 20.

[0157] Moreover, as Figure 10 shown in (a) above, in the light-emitting device 4', in order to suppress an increase in the inductance of the circuit for driving the light-emitting element array 20, the planar shape of the light-emitting element array cathode wiring pattern 12 is set to a quadrilateral, and the cathode electrode 214 of the light-emitting element array 20 and the drain of the MOS transistor 51 of the drive unit 50 are connected linearly. For this purpose, the light-emitting element array cathode wiring pattern 12 and the PD cathode wiring pattern 114F are made to cross each other three-dimensionally with an electrically insulating member therebetween.

[0158] Therefore, as Figure 10in (b), Figure 10 As shown in (c), the length of the cathode wiring pattern 114B for PD in the y direction corresponding to the cathode wiring pattern 114F for PD is made shorter on the -y direction side than that of the cathode wiring pattern 114F for PD. Thereby, when the base material 100 is mounted on the portion indicated by the dashed line of the wiring substrate 10, short - circuiting due to contact between the cathode wiring pattern 114B for PD and the cathode wiring pattern 12 for the light - emitting element array is suppressed.

[0159] As described above, regarding the comparative example, i.e., the light - emitting device 4′, if the cathode wiring pattern 12 for the light - emitting element array is made quadrilateral in order to suppress an increase in the inductance of the circuit for driving the light - emitting element array 20, and an attempt is made to connect the cathode electrode 214 of the light - emitting element array 20 and the driving unit 50 in a straight - line shape, then the wirings become three - dimensional intersections. That is, an electrically insulating base material 100 is used.

[0160] On the other hand, in the light - emitting device 4 to which the present embodiment is applied, from Figure 8 in (a), Figure 8 in (b), Figure 8 in (c), it can be seen that no circuit elements are provided on the side 21A side of the light - emitting element array 20. Therefore, there is no need to provide wirings that cross the cathode wiring pattern 12 for the light - emitting element array. Therefore, in Figure 7 , Figure 8 , the base material 100 is used, but the base material 100 may not be used. That is, the light - emitting element array 20, the PD 40, and the TD 45 may be mounted on the wiring substrate 10 shown in (a) without passing through the base material 100. In such a case, the wiring substrate 10 may be made an electrically insulating heat - dissipating member. Figure 8 In the above - described case, the light - emitting element array 20, the PD 40, and the TD 45 may be mounted on the wiring substrate 10 shown in (a) without passing through the base material 100. In such a case, the wiring substrate 10 may be made an electrically insulating heat - dissipating member.

[0161] As described above, in the light - emitting device 4 to which the present embodiment is applied, the driving unit 50 including driving elements is disposed close to the side 21A side of the light - emitting element array 20. Moreover, the PD 40 and the TD 45 that are to be disposed close to the light - emitting element array 20 are arranged side - by - side along the side 21B on the side 21B side of the light - emitting element array 20. Thereby, it becomes easy to bring the light - emitting element array 20 close to the driving unit 50 including driving elements.

[0162] In addition, in the present embodiment, as an example of the first circuit element, a light - receiving element (PD 40) for light amount monitoring is described, and as an example of the second circuit element, a temperature - detecting element (TD 45) is described. However, as the first circuit element or the second circuit element, other circuit elements such as a capacitor 70 for supplying current to the light - emitting element array 20 may be arranged.

[0163] In addition, in the present embodiment, the light diffusing member 30 is used. However, instead of the light diffusing member 30, it may also be applied to a structure including components that transmit light, such as a transparent substrate like a protective cover, or optical components such as a condenser lens or a microlens array.

[0164] The above-described embodiments of the present invention are provided for purposes of illustration and description. In addition, the embodiments of the present invention do not comprehensively and exhaustively cover the present invention and do not limit the present invention to the disclosed forms. Obviously, various modifications and variations are apparent to those skilled in the art to which the present invention pertains. The present embodiment is selected and described in order to most easily illustrate the principles of the present invention and its applications. Thus, other technicians in the technical field can understand the present invention through various modification examples that are optimized for specific uses assumed to be various embodiments. The scope of the present invention is defined by the above claims and their equivalents.

Claims

1. A light-emitting device, comprising: A wiring substrate; An array of light-emitting elements disposed on a first side of the wiring substrate, the array of light-emitting elements having a first side surface and a second side surface facing each other and facing the wiring substrate, and a third side surface and a fourth side surface connecting the first side surface and the second side surface and facing each other; A driving element disposed on the first side surface side of the first side of the wiring substrate and driving the array of light-emitting elements; A first circuit element and a second circuit element, each having the shape of the wiring substrate, arranged on the wiring substrate on the second side surface side in a direction along the second side surface; A wiring component disposed on the third side surface side and the fourth side surface side, and extending from the top electrode of the array of light-emitting elements toward the outside of the array of light-emitting elements; And A wiring pattern connecting the array of light-emitting elements and the driving element.

2. The light-emitting device according to claim 1, wherein The array of light-emitting elements and the driving element are arranged linearly in a first direction, and the wiring pattern is arranged linearly in the first direction.

3. The light-emitting device according to claim 2, wherein The wiring substrate has a planar shape extending in a second direction perpendicular to the first direction, the wiring pattern is arranged in a third direction perpendicular to the first direction and the second direction, and the wiring pattern is sandwiched between the driving element and the wiring substrate at an end side in the first direction, and is sandwiched between the array of light-emitting elements and the wiring substrate at the other end side in the first direction.

4. The light-emitting device according to claim 3, wherein The wiring pattern is sandwiched between the wiring substrate and some of the driving elements, and is sandwiched between the wiring substrate and all light-emitting regions of the array of light-emitting elements.

5. The light-emitting device according to claim 3, wherein The length of the portion of the wiring pattern that is not sandwiched between the wiring substrate and the array of light-emitting elements or the driving element in the first direction is shorter than the length of the portion of the wiring pattern that is sandwiched between the wiring substrate and the array of light-emitting elements or the driving element in the first direction.

6. The light-emitting device according to claim 1, wherein The planar shape of the wiring pattern is a quadrilateral.

7. The light-emitting device according to claim 2, further comprising: The top electrode of the array of light-emitting elements; A second wiring pattern connected to the top electrode, wherein the second wiring pattern is arranged in a manner of sandwiching the wiring pattern such that the wiring pattern is located between the positive second direction side and the negative second direction side of the second wiring pattern in the second direction, and the second direction is perpendicular to the first direction.

8. The light-emitting device according to claim 1, further comprising: A substrate disposed between the bottom electrode of the array of light-emitting elements and the wiring pattern.

9. The light-emitting device according to claim 1, wherein The wiring pattern is formed on the front surface side of the wiring substrate.

10. The light-emitting device according to claim 1, wherein The wiring substrate is a multilayer substrate and includes vias provided in a lower layer below the wiring pattern.

11. The light-emitting device according to claim 1, wherein, The wiring substrate is a multilayer substrate and includes a power supply line provided in a lower layer below the wiring pattern.

12. The light-emitting device according to claim 1, wherein, The wiring substrate is a multilayer substrate and includes a ground line provided in a lower layer below the wiring pattern.

13. The light-emitting device according to claim 1, wherein, The wiring substrate is a multilayer substrate and includes a plurality of conductive layers, and the wiring pattern is formed on a first conductive layer, where the first conductive layer is a conductive layer on the front surface side of the wiring substrate.

14. The light-emitting device according to claim 1, wherein, The wiring pattern is provided between the light-emitting element array and the driving element, and no other circuit elements are provided between the light-emitting element array and the driving element.

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