Multi-vector modulation method considering common-mode voltage suppression under dead zone effect

Abstract

The invention relates to a multi-vector modulation method considering common-mode voltage suppression under a dead zone effect, which belongs to the field of inverter common-mode voltage suppression, and is characterized by comprising the following steps of: A, obtaining three candidate voltage vectors and duty ratios thereof through a space voltage vector method; step B, designing a three-vector and four-vector switch sequence according to a result of the step A; step C, designing hysteresis delta t by using the dead time, wherein the hysteresis is generally considered to be two times of the dead time; d, designing double-vector, three-vector and four-vector switching sequences considering the dead zone effect according to the switching sequence and the hysteresis delta t in the step B; and E, evaluating the switching times of the candidate switching sequence to select an optimal switching sequence, and constructing a driving signal. The hysteresis delta t designed by the invention is generally greater than two times of dead time, so that the method has the advantage of simple design; the provided modulation strategy can effectively reduce the common-mode voltage; the method can be widely applied to a multi-vector control strategy; and meanwhile, the switching frequency is reduced by effectively utilizing a redundant switching sequence.

Description

Technical Field

[0001] The present invention relates to the field of common-mode voltage suppression of inverters, and particularly to a multi-vector modulation method for common-mode voltage suppression considering dead-time effect. Background Art

[0002] In recent years, three-phase two-level inverters have been widely used in various industries. However, the rapid operation of power semiconductor switches will generate adverse common-mode voltage. High common-mode voltage can cause insulation damage, shorten the equipment life, affect the normal operation of control systems and electronic devices, and even cause misoperation of relays, leading to power system failures. Therefore, common-mode voltage suppression has always been a research hotspot.

[0003] Existing common-mode voltage suppression strategies mainly include strategies such as improving topologies and improving output pulses of control systems. In the latter, equivalent zero vectors, vector splitting, adjacent vectors, and many improved vector modulation methods based on these have been proposed. The cost function of model predictive control has the characteristics of multi-objective control and has also been used to suppress common-mode voltage. However, the above control methods do not consider the influence of dead-time effect and the like. In "Common-mode voltage mitigation with a predictive control method considering dead time effects of three-phase voltage source inverters", the influence of different vector combinations under dead-time effect is analyzed, and voltage vector preselection is performed to limit the common-mode voltage spike under dead-time effect. However, the control performance is significantly degraded. "An inverter common-mode voltage spike elimination method using hybrid voltage vector preselection and reference voltage prediction" proposes a hybrid voltage vector preselection method including hysteresis, but the design of hysteresis depends on the load model, so it is difficult to be applied to the case of variable load. "Virtual vector model predictive common-mode voltage suppression method for voltage source inverters" also adopts the above strategy, and the double-vector method effectively improves the steady-state performance. In the multi-vector modulation method for common-mode voltage suppression considering dead-time effect, the control strategy of "Model predictive pulse sequence control of permanent magnet synchronous motor with low torque ripple and common-mode voltage" is proposed, but the dead-time effect is not considered.

[0004] In order to fill the gap in multi-vector methods and common-mode voltage suppression strategies considering dead-time effect, the present invention proposes a multi-vector modulation method for common-mode voltage suppression considering dead-time effect. This method has the following advantages: 1. The proposed method does not need to consider the load equivalent model, so it can be widely applied to multi-vector control strategies; 2. When designing the hysteresis, the proposed method only needs to consider the dead-time, which has the advantage of simple design; 3. The proposed method has a relatively low switching frequency; 4. The The proposed method has better steady-state performance. Summary of the Invention

[0005] The object of the present invention is to provide a multi-vector modulation method for common-mode voltage suppression considering dead-time effect, so as to solve the problem that the common-mode voltage spikes of the multi-vector method under dead-time effect are difficult to completely suppress. The proposed hysteresis design method does not depend on the output equivalent model and is only related to the dead-time, so it can be widely applied to different control conditions.

[0006] To achieve the above object, the technical solution of the present invention is: a multi-vector modulation method for common-mode voltage suppression considering dead-time effect, including the following steps: Step S1, combining the volt-second balance principle, using the space vector modulation method to obtain the optimal voltage vector combination, including voltage vectors V m 、V n 、V0 and their duty cycles k m 、k n 、k0, and the duty cycles satisfy the following relationship: (k m +k n +k0)T s =T s (1) where, T s represents a control period; m, n represent the serial numbers of the voltage vectors. Step S2, dividing the voltage vector combination obtained in step 1 into four cases according to the duty cycle: Among them, the voltage vectors corresponding to case 1 are V m-1 、V m 、V n ; the voltage vectors corresponding to case 2 are V m 、V n 、V n+1 ; case 3 can select the voltage vectors and their duty cycles corresponding to case 1 or 2 according to the principle of reducing the number of switchings; the voltage vectors corresponding to case 4 are V m-1 、V m 、V n 、V n+1 . t m 、t n 、t0 are the duty cycles of the voltage vectors respectively. Step S3, introducing a hysteresis Δt to distinguish the boundary conditions of the duty cycles in step S2 under dead-time effect, and dividing the optimal voltage vector combination into a double-vector strategy, a triple-vector strategy and a quadruple-vector strategy. Step S4: According to the dual-vector strategy, three-vector strategy, and four-vector strategy in Step S3, select the optimal voltage vector combination using the principle of the lowest number of switching times. Among them, the number of switching times is S w The expression is as follows: Among them, x ∈ {a, b, c} represents the phase sequence of the three-phase two-level inverter, and S x and S x_old respectively represent the switching states of the voltage vectors in adjacent control cycles.

[0007] The present invention has the following remarkable effects compared with the prior art: (1) Compared with the existing common-mode voltage suppression strategy considering hysteresis, the proposed hysteresis design only considers the dead-time effect, so it can be widely applied to variable equivalent load fields such as motor control. (2) Compared with the existing common-mode voltage suppression strategy considering hysteresis, the proposed hysteresis design method is only affected by the dead-time and does not need to consider the output current amplitude, so it has the advantage of simple design. (3) Compared with the existing common-mode voltage suppression strategy considering the dead-time effect, the proposed control strategy has good steady-state performance. (4) Compared with the existing multi-vector common-mode voltage suppression strategy, the proposed control strategy can effectively reduce the switching frequency. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is the algorithm flowchart of the present invention.

[0009] Figure 2 is the control block diagram of the present invention applied in the field of induction motor control.

[0009] Figure 3 is the spatial distribution diagram of the three-vector and four-vector strategies of the present invention without considering the dead-time effect.

[0010] Figure 4 is the spatial distribution diagram of the dual-vector, three-vector, and four-vector strategies of the present invention considering the dead-time effect.

[0011] Figure 5 is the steady-state waveform of the present invention under different hysteresis Δt in the SIMULINK simulation environment.

[0012] Figure 6 is the comparison of the steady-state performance of the present invention under different hysteresis Δt in the SIMULINK simulation environment.

[0013] Figure 7 is the comparison of the switching frequency and common-mode voltage of the present invention and the single-vector method considering the dead-time effect under different working conditions.

[0014] Figure 8 This is the comparison of the steady-state performance of the present invention with the single-vector method considering the dead-time effect under various working conditions in the SIMULINK simulation environment.

[0015] Figure 9 This is the three-vector and four-vector strategy tables of the present invention without considering the dead-time effect.

[0016] Figure 10 This is the two-vector, three-vector, and four-vector strategy tables of the present invention considering the dead-time effect with an added hysteresis Δt. Detailed implementation manner

[0017] The technical solution of the present invention will be specifically described below with reference to the accompanying drawings.

[0018] As Figure 1 , shown in FIG. 2, the present invention proposes a multi-vector modulation method for common-mode voltage suppression considering the dead-time effect, which includes the following steps: Step S1: Sample the stator current I and speed ω of the induction motor, and calculate the optimal voltage vector by giving the speed reference value. Combining the volt-second balance principle, use the space vector modulation method to obtain the optimal voltage vector combination, including voltage vectors V m , V n , V0 and their duty cycles k m , k n , k0. The duty cycles satisfy the following relationship: (k m + k n + k0)T s = T s (4) where, T s represents a control period; m, n represent the serial numbers of the voltage vectors. Step S2: Divide the voltage vector combination obtained in Step 1 into four cases according to the duty cycle: Among them, the voltage vectors corresponding to Case 1 are V m-1 , V m , V n ; the voltage vectors corresponding to Case 2 are V m , V n , V n+1 ; Case 3 can select the voltage vectors and their duty cycles corresponding to Case 1 or 2 according to the principle of reducing the number of switchings; the voltage vectors corresponding to Case 4 are V m-1 , V m , V n , V n+1 . t m , t n, t0 are the duty cycles of the voltage vectors respectively. The above situation is summarized in Figure 9 . Step S3: Introduce a hysteresis Δt to distinguish the boundary conditions of the duty cycles in Step S2 under the dead-time effect, where the hysteresis Δt is set to twice the dead time, and then further divide the vector interval according to the hysteresis, as shown in Figure 4 . Using the designed hysteresis, the optimal voltage vector combination can be divided into double-vector, triple-vector, and quadruple-vector strategies. Step S4: According to the double-vector, triple-vector, and quadruple-vector strategies in Step S3, select the optimal voltage vector combination using the principle of the lowest number of switching times. Among them, the number of switching times S w The expression is as follows: where x ∈ {a, b, c} represents the phase sequence of the three-phase two-level inverter, and S x and S x_old represent the switching states of the voltage vectors in adjacent control periods respectively. Furthermore, the voltage vector combinations in Step S2 and Step S3 are as follows respectively: where V n+1 , V n , V m , V m-1 are adjacent voltage vectors and are arranged clockwise in the space vector. where old represents the serial number of the voltage vector in the previous control period. In summary, the present invention proposes a multi-vector modulation method for common-mode voltage suppression considering the dead-time effect, which completely suppresses the common-mode voltage spikes under the dead-time effect through the proposed multi-vector strategy and can be widely applied to occasions such as variable loads. Compared with the existing hysteresis design method considering the current amplitude, the proposed method only considers the dead time, so it has the advantage of simple design. In addition, the multi-vector strategy improves the steady-state performance at the same time and effectively reduces the switching frequency through the selection of the optimal vector sequence.

[0019] The present invention is simulated using MATLAB / SIMULINK, where Figure 5The waveforms of the phase-A current, torque, flux linkage, and common-mode voltage of the proposed method under the load conditions of 1000 r / min and 10 Nm with different hysteresis are given. Since the dead time is set to 2 μs, there are a large number of common-mode voltage spikes under the conditions of 0 μs and 2 μs of hysteresis. When the hysteresis increases to more than twice the dead time, the common-mode voltage spikes are completely eliminated. However, with the increase of the hysteresis, the deviation between the optimal voltage vector and the synthesized vector also increases, resulting in a decline in the steady-state performance. Therefore, it is necessary to reasonably select the relationship between the hysteresis and the dead time to achieve the purpose of suppressing the common-mode voltage spikes and having better steady-state performance. Under the Figure 5 working conditions, the steady-state performance with different hysteresis is as Figure 6 shown. Figure 7 The comparison of the proposed method with the method proposed in "A Method for Eliminating Common-Mode Voltage Spikes of Inverters by Using Hybrid Voltage Vector Preselection and Reference Voltage Prediction" in terms of switching frequency and common-mode voltage under the hysteresis of 0 μs and 4 μs is given. It should be noted that the hysteresis of the designed comparison method is 3 A. However, since the load current of the induction motor is not fixed and is greatly affected by the torque, obvious common-mode voltage spikes will appear when the torque increases, as shown in the second figure of Figure 7 . The proposed method also has a higher occurrence frequency of common-mode voltage spikes when the hysteresis is 0 μs. In terms of switching frequency, since the proposed method applies three voltage vectors in one control cycle while the comparison method only applies one vector, the switching frequency of the proposed method is higher. Figure 8 The comparison waveforms of the induction motor when the load is 15 Nm at 1000 r / min, 10 Nm at 1000 r / min, and 10 Nm and the speed changes from 1000 r / min to -1000 r / min are given. It can be seen that common-mode voltage spikes will be caused when the torque is 15 Nm and when the speed reverses to generate a large torque, while the proposed method completely suppresses the common-mode voltage spikes under different working conditions. In addition, thanks to the application of the common-mode voltage suppression method considering the dead-time effect in the multi-vector method, the proposed method shows better steady-state performance.

[0017] The above are the preferred embodiments of the present invention. All changes made according to the technical solution of the present invention that do not exceed the scope of the technical solution of the present invention in terms of the functions and effects produced belong to the protection scope of the present invention.

Claims

1. A multi-vector modulation method for common-mode voltage suppression considering dead-time effect, characterized in that The control method includes the following steps: Step S1. Combining the volt-second balance principle, the optimal voltage vector combination is obtained by using the space vector modulation method, including voltage vectors V m , V n , V0 and their duty cycles k m , k n , k0, and the duty cycles satisfy the following relationship: (k m + k n + k0)T s = T s (k m + k n + k0)T s = T s (1) Among them, T s represents a control period; m and n represent the sequence numbers of voltage vectors; Step S2: Divide the voltage vector combination obtained in step 1 into four cases according to the duty cycle: Among them, the voltage vectors corresponding to Case 1 are V m-1 , V m , V n ; the voltage vectors corresponding to Case 2 are V m , V n , V n+1 ; for Case 3, the voltage vectors and their duty cycles corresponding to Case 1 or 2 can be selected according to the principle of reducing the number of switchings; the voltage vectors corresponding to Case 4 are V m-1 , V m , V n , V n+1 . t m , t n and t0 are the duty cycles of the voltage vectors respectively; Step S3: Introduce a hysteresis Δt to distinguish the boundary cases of the duty cycle in step S2 under the dead-time effect, and divide the optimal voltage vector combination into a two-vector strategy, a three-vector strategy, and a four-vector strategy; Step S4: According to the double-vector strategy, triple-vector strategy, and quadruple-vector strategy in step S3, select the optimal voltage vector combination using the principle of the lowest number of switching times. Among them, the number of switching times is S w The expression is as follows: where x ∈ {a, b, c} represents the phase sequence of a three-phase two-level inverter, and S x and S x_old respectively represent the switching states of the voltage vectors in adjacent control cycles.

2. A multi-vector modulation method for common-mode voltage suppression considering the dead-time effect according to claim 1, characterized in that, The voltage vector combinations in the four cases in step S2 are as follows: Among them, V n+1 , V n , V m , V m-1 are adjacent voltage vectors and are arranged clockwise in the space vector.

3. A multi-vector modulation method for common-mode voltage suppression considering the dead-time effect according to claim 1, characterized in that The hysteresis Δt designed in step S3 is set according to the dead-time, generally considering it to be greater than twice the dead-time, so it has the advantage of simple design.

4. A multi-vector modulation method for common-mode voltage suppression considering dead-time effect according to claim 1, characterized in that, The voltage vector combinations of the two-vector, three-vector, and four-vector strategies in step S3 are as follows: Where, old represents the serial number of the voltage vector in the previous control cycle.

5. A multi-vector modulation method for common-mode voltage suppression considering dead-time effect according to claim 1, characterized in that, In step S4, by changing the order of the switching sequence, the average switching frequency can be effectively reduced.

6. A multi-vector modulation method for common-mode voltage suppression considering dead-time effect according to claim 1, characterized in that The proposed control strategy has better steady-state performance.

7. A multi-vector modulation method for common-mode voltage suppression considering dead-time effect according to claim 1, characterized in that The proposed control strategy does not consider the load equivalent model in the design process, so it can be widely applied to multi-vector control strategies with variable loads such as motor control.

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