FPGA data reconstruction method and device

By compressing and splitting FPGA data on the ground side, the problems of large transmission volume, low efficiency and low reliability in the traditional FPGA data reconstruction method are solved, and efficient and reliable data reconstruction is achieved, which is suitable for the field of aerospace electronic technology.

CN120342467APending Publication Date: 2025-07-18SHANGHAI SPACEFLIGHT INST OF TT&C & TELECOMM +1
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510568758.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-30
Publication Date
2025-07-18

AI Technical Summary

Technical Problem

Traditional FPGA data reconstruction methods have problems such as large data transmission volume, low transmission efficiency and low reliability in space missions.

Method used

The original FPGA data is compressed on the ground side, and split it into multiple reconstruction packets according to the preset reconstruction protocol, upload it to the satellite side, receive packet loss information on the satellite side and perform data reconstruction processing until the satellite side receives and stores all reconstruction packets.

Benefits of technology

Through data compression and splitting, the amount of data transmission in the satellite and ground is reduced, the transmission efficiency is improved, communication resources are saved, and the reliability of data transmission is ensured.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120342467A_ABST
    Figure CN120342467A_ABST
Patent Text Reader

Abstract

The invention relates to an FPGA (Field Programmable Gate Array) data reconstruction method and device. The method comprises the following steps: compressing FPGA original data to obtain compressed data; the FPGA refers to a field programmable gate array; splitting the compressed data into a plurality of reconstruction packets according to a preset reconstruction protocol; uploading the reconstructed packet to a satellite side; receiving packet loss information fed back by the satellite side; performing data reconstruction processing according to the packet loss information to obtain an updated reconstructed packet; and uploading the updated reconstruction packet to a satellite side until the satellite side completes receiving and storage of all reconstruction packets. Therefore, the FPGA original data can be compressed and split through the ground side to obtain the reconstructed packet, and the reconstructed packet is uploaded to the satellite side, so that the transmission quantity of satellite-ground data is reduced, the transmission efficiency is improved, communication resources are saved, and the reliability of the data in the transmission process can be ensured.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of aerospace electronics technology, and particularly to an FPGA data reconstruction method and apparatus. Background Art

[0002] On-orbit reconstruction is to upload reconstruction data from a ground station to a satellite through a space-ground communication link. In space missions, efficient and reliable reconstruction of data in on-orbit large-capacity Field Programmable Gate Arrays (FPGAs) is crucial for ensuring the normal operation and function upgrade of space systems.

[0003] However, due to the particularity of the space environment and the limitation of communication resources, traditional data reconstruction methods have problems such as large data transmission volume, low transmission efficiency, and low reliability. Summary of the Invention

[0004] Based on this, it is necessary to provide an FPGA data reconstruction method, apparatus, computer device, computer-readable storage medium, and computer program product that can achieve efficient and reliable data reconstruction for the above technical problems.

[0005] In a first aspect, this application provides an FPGA data reconstruction method applied to the ground side. The method includes:

[0006] Compress the FPGA original data to obtain compressed data; the FPGA refers to a Field Programmable Gate Array;

[0007] Split the compressed data into multiple reconstruction packets according to a preset reconstruction protocol;

[0008] Upload the reconstruction packets to the satellite side;

[0009] Receive the packet loss information feedback from the satellite side;

[0010] Perform data reconstruction processing according to the packet loss information to obtain updated reconstruction packets;

[0011] Upload the updated reconstruction packets to the satellite side until the satellite side completes the reception and storage of all reconstruction packets.

[0012] In one embodiment, the compressing the FPGA original data to obtain compressed data includes:

[0013] Compress the FPGA original data using the GZIP compression algorithm to obtain compressed data.

[0014] In one embodiment, before splitting the compressed data into multiple reconstruction packets according to a preset reconstruction protocol, the method further includes:

[0015] Set a preset reconstruction protocol, where the preset reconstruction protocol includes at least one of: data format, packet sequence number, check code, forwarding rate, forwarding port, and forwarding format.

[0016] In one embodiment, splitting the compressed data into multiple reconstruction packets according to the preset reconstruction protocol includes:

[0017] Splitting the compressed data into multiple reconstructed remote control uplink frames according to the preset reconstruction protocol; the reconstructed remote control uplink frames form reconstruction packets; wherein, each reconstructed remote control uplink frame adopts a preset format and includes a target identifier.

[0018] In a second aspect, the present application provides an FPGA data reconstruction method, which is applied to the satellite side. The method includes:

[0019] Receiving the reconstruction packets uploaded by the ground side, where the reconstruction packets are obtained by the ground side splitting the compressed data corresponding to the FPGA original data according to the preset reconstruction protocol;

[0020] Feeding back packet loss information to the ground side;

[0021] Receiving the updated reconstruction packets uploaded by the ground side until all the reconstruction packets are received and stored;

[0022] Restoring the reconstruction packets according to the preset reconstruction protocol to obtain the restored FPGA original data;

[0023] Sending the restored FPGA original data to the user terminal.

[0024] In one embodiment, the preset reconstruction protocol includes at least one of: data format, packet sequence number, check code, forwarding rate, forwarding port, and forwarding format.

[0025] In one embodiment, restoring the reconstruction packets according to the preset reconstruction protocol to obtain the restored FPGA original data includes:

[0026] Parsing all the reconstruction packets according to the preset reconstruction protocol and removing the protocol format to restore the compressed data;

[0027] Performing format verification on the compressed data to determine whether the file is in a compressed format;

[0028] If it is in a compressed format, perform decompression operation to obtain the restored FPGA original data.

[0029] In one embodiment, sending the restored FPGA original data to the user terminal includes:

[0030] Forward the restored original FPGA data to the user terminal at the rate and port specified by the remote control.

[0031] In a third aspect, the present application also provides an FPGA data reconstruction device, which is applied to the ground side. The device includes:

[0032] A compression module, configured to compress the original FPGA data to obtain compressed data; the FPGA refers to a field programmable gate array;

[0033] A splitting module, configured to split the compressed data into multiple reconstruction packets according to a preset reconstruction protocol;

[0034] An uploading module, configured to upload the reconstruction packets to the satellite side;

[0035] A receiving module, configured to receive the lost packet information fed back by the satellite side;

[0036] A reconstruction module, configured to perform data reconstruction processing according to the lost packet information to obtain updated reconstruction packets;

[0037] The uploading module is further configured to upload the updated reconstruction packets to the satellite side until the satellite side completes the reception and storage of all the reconstruction packets.

[0038] In a fourth aspect, the present application also provides an FPGA data reconstruction device, which is applied to the satellite side. The device includes:

[0039] A receiving module, configured to receive the reconstruction packets uploaded by the ground side, where the reconstruction packets are obtained by splitting the compressed data corresponding to the original FPGA data by the ground side according to a preset reconstruction protocol;

[0040] A feedback module, configured to feed back the lost packet information to the ground side;

[0041] The receiving module is further configured to receive the updated reconstruction packets uploaded by the ground side until all the reconstruction packets are received and stored;

[0042] A recovery module, configured to recover the reconstruction packets according to a preset reconstruction protocol to obtain the restored original FPGA data;

[0043] A sending module, configured to send the restored original FPGA data to the user terminal.

[0044] In a fifth aspect, the present application also provides a computer device, including a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, the steps in the method described in any one of the first aspect or the second aspect are implemented.

[0045] In a sixth aspect, the present application further provides an FPGA data reconstruction system, including the computer device described in the fifth aspect, which is used to implement the steps in the method described in any one of the first aspect or the second aspect.

[0046] In a seventh aspect, the present application further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements the steps in the method described in any one of the first aspect or the second aspect.

[0047] In an eighth aspect, the present application further provides a computer program product, including a computer program. When the computer program is executed by a processor, it implements the steps in the method described in any one of the first aspect or the second aspect.

[0048] For the above FPGA data reconstruction method and device, the original FPGA data is compressed to obtain compressed data; the FPGA refers to a field-programmable gate array; the compressed data is split into multiple reconstruction packets according to a preset reconstruction protocol; the reconstruction packets are uploaded to the satellite side; the packet loss information feedback from the satellite side is received; data reconstruction processing is performed according to the packet loss information to obtain updated reconstruction packets; the updated reconstruction packets are uploaded to the satellite side until the satellite side completes the reception and storage of all reconstruction packets. Thus, by compressing and splitting the reconstruction packets on the ground, the amount of data transmitted between the ground and the satellite is reduced, the transmission efficiency is improved, and communication resources are saved. Description of the Drawings

[0049] To more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments of the present application or related technologies. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other related drawings can be obtained based on these drawings.

[0050] Figure 1 It is a flowchart of an FPGA data reconstruction method provided by an embodiment of the present application;

[0051] Figure 2 It is a flowchart of another FPGA data reconstruction method provided by an embodiment of the present application;

[0052] Figure 3 It is a signaling interaction schematic diagram of an FPGA data reconstruction method provided by an embodiment of the present application. Detailed Embodiments

[0053] To make the objectives, technical solutions and advantages of this application more clear and understandable, the following further details this application in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely for explaining this application and are not used to limit this application.

[0054] Exemplarily, Figure 1 is a flowchart of a method for FPGA data reconstruction provided by an embodiment of this application. As Figure 1 shown, this method can be applied to the ground side and may include the following steps:

[0055] Step 101: Compress the FPGA original data to obtain compressed data.

[0056] In the embodiment of this application, data compression software can be pre-loaded in the devices on the ground side. Among them, the data compression software can compress the FPGA original data to obtain compressed data. Exemplarily, the GZIP compression algorithm can be used to compress the FPGA original data to obtain compressed data. Using the GZIP compression algorithm to compress the FPGA original data on the ground can reduce the amount of data uploaded to the ground and reduce the time overhead of uploading.

[0057] It should be understood that when selecting an algorithm for compressing the FPGA original data, factors such as compression ratio, compression time, and decompression time need to be considered. However, the embodiment of this application does not limit the specific method for compressing the FPGA original data on the ground side.

[0058] Step 102: Split the compressed data into multiple reconstruction packets according to a preset reconstruction protocol.

[0059] In the embodiment of this application, data splitting software can be pre-loaded in the devices on the ground side, and the compressed file is split into telecommand uplink frames through the data splitting software.

[0060] Optionally, before executing step 102, a preset reconstruction protocol can also be set first. The preset reconstruction protocol includes at least one of data format, packet sequence number, check code, forwarding rate, forwarding port, and forwarding format. Among them, this preset reconstruction protocol is a protocol specifically for on-orbit large-capacity FPGA data reconstruction to ensure the accuracy, scalability, and reliability of telecommand data uploading.

[0061] In this embodiment, a protocol specifically for on-orbit large-capacity FPGA data reconstruction is formulated. This protocol includes contents such as data format, transmission method, and check code. For example, the data format includes parts such as a data header, a data body, and a check code. The data header should include information such as data type, length, and sequence number to facilitate parsing and processing by on-board software. The data body should include the compressed data content, and the check code is used to detect whether errors occur during data transmission.

[0062] Exemplarily, the compressed data is split into multiple reconstructed remote control uplink frames according to a preset reconstruction protocol; the reconstructed remote control uplink frames form a reconstructed packet; wherein, each reconstructed remote control uplink frame adopts a preset format and includes a target identifier. Since each reconstructed frame has a specific format and identifier, it is convenient for management during the transmission and processing processes.

[0063] It should be understood that the size of each reconstructed packet can be reasonably set according to the bandwidth of the satellite communication link and the processing capacity of the on-board software. During the splitting process, it is necessary to ensure that each reconstructed packet contains a complete data block and can be transmitted independently. In addition, a sequence number and check information can be added to each reconstructed packet to facilitate recombination and verification by the on-board software.

[0064] Step 103, upload the reconstructed packet to the satellite side.

[0065] Optionally, the split reconstructed packets are uploaded to the satellite through a ground communication link. During the uploading process (the process of uploading the reconstructed packets to the satellite side), the error sequence number telemetry can be observed in real time. If a transmission error occurs, the reconstructed packet with the error can be retransmitted to ensure the integrity of the data.

[0066] Step 104, receive the packet loss information fed back by the satellite side.

[0067] Correspondingly, an on-board software is generally pre-loaded on the satellite side, and the packet loss information can be fed back based on this on-board software.

[0068] Step 105, perform data reconstruction processing according to the packet loss information to obtain an updated reconstructed packet.

[0069] In the embodiment of the present application, the ground side re-uploads the reconstructed packet according to the packet loss information.

[0070] Step 106, upload the updated reconstructed packet to the satellite side until the satellite side completes the reception and storage of all reconstructed packets.

[0071] In this embodiment, by compressing and splitting the reconstructed packet on the ground, the amount of data transmitted between the ground and the satellite is reduced, the transmission efficiency is improved, and communication resources are saved. In addition, measures such as error checking and packet loss retransmission in the reconstruction protocol ensure the accuracy and reliability of data transmission. After the ground side splits the data into reconstructed packets, the on-board software on the satellite side can process each packet one by one, reducing the difficulty and complexity and improving the processing efficiency.

[0072] It should be emphasized that this embodiment can select appropriate compression algorithms and reconstruction protocols according to different task requirements and data characteristics, and has high flexibility and adaptability.

[0073] Exemplarily, Figure 2The flowchart of another FPGA data reconstruction method provided by the embodiments of this application is as follows. As Figure 2 shown, this method can be applied to the satellite side and may include the following steps:

[0074] Step 201: Receive the reconstruction package uploaded by the ground side.

[0075] In the embodiments of this application, the satellite-side device can pre-load the on-board software and receive the reconstruction package uploaded by the ground side based on this on-board software. Among them, the reconstruction package is obtained by splitting the compressed data corresponding to the FPGA original data by the ground side according to a preset reconstruction protocol. Optionally, the preset reconstruction protocol includes at least one of data format, packet sequence number, check code, forwarding rate, forwarding port, and forwarding format.

[0076] Step 202: Feed back the packet loss information to the ground side.

[0077] In the embodiments of this application, when receiving the reconstruction package, the on-board software can detect the packet loss rate, obtain the packet loss information, and promptly feed back this packet loss information to the ground side.

[0078] Step 203: Receive the updated reconstruction package uploaded by the ground side until all the reconstruction packages are received and stored.

[0079] The ground side will reconstruct the compressed data packet according to the packet loss information fed back by the satellite side to ensure that the satellite side can receive all the reconstruction packages.

[0080] Step 204: Restore the reconstruction package according to the preset reconstruction protocol to obtain the restored FPGA original data.

[0081] Exemplarily, parse all the reconstruction packages according to the preset reconstruction protocol, remove the protocol format, and then restore the compressed data; perform format verification on the compressed data to determine whether the file is in a compressed format; if it is in a compressed format, perform decompression operation to obtain the restored FPGA original data. Among them, during the decompression process, attention should be paid to the integrity of the data.

[0082] Step 205: Send the restored FPGA original data to the user terminal.

[0083] Exemplarily, forward the restored FPGA original data to the user terminal at the rate and port specified by remote control; among them, during the sending process, it should be ensured that the data transmission order is correct. Thus, the on-orbit upgrade of the software is realized.

[0084] In the embodiments of the present application, the satellite side can pre-load the on-board software in advance. The on-board software can completely receive and store the reconstructed telecommand uplink frame, parse the uplink telecommand frame and restore the compressed reconstructed data, and restore the compressed reconstructed data into the original reconstructed data packet. Finally, the on-board software forwards the original reconstructed data packet to the user terminal at the rate and port specified by the telecommand. Thus, efficient and reliable data reconstruction is achieved, breakpoint resume is supported, and the time overhead of reconstruction is significantly reduced. In addition, it also has the advantages of flexibility and strong adaptability, can effectively solve the problem of reconstructing large-capacity FPGA data in space missions, and has important practical application value.

[0085] Exemplarily, Figure 3 is a signaling interaction schematic diagram of an FPGA data reconstruction method provided by an embodiment of the present application, as Figure 3 shown, which may include the following steps:

[0086] Step 301, the ground side compresses the FPGA original data to obtain compressed data.

[0087] Step 302, the ground side splits the compressed data into multiple reconstruction packets according to a preset reconstruction protocol.

[0088] Step 303, the ground side uploads the reconstruction packets to the satellite side.

[0089] Step 304, the satellite side receives the reconstruction packets uploaded by the ground side.

[0090] Step 305, the satellite side feeds back the lost packet information to the ground side.

[0091] Step 306, the ground side performs data reconstruction processing according to the lost packet information to obtain updated reconstruction packets.

[0092] Step 307, the ground side uploads the updated reconstruction packets to the satellite side.

[0093] Step 308, restore the reconstruction packets according to the preset reconstruction protocol to obtain the restored FPGA original data.

[0094] Step 309, send the restored FPGA original data to the user terminal.

[0095] Steps 301 to 309 in the embodiments of the present application are the integration of the above Figures 1 to 2 shown method. For the specific implementation process and technical effects, please refer to the relevant descriptions of each embodiment in the Figure 1 、 Figure 2 shown method, which will not be elaborated here.

[0096] It should be understood that although the steps in the flowcharts involved in the above-described embodiments are shown in sequence according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless specifically stated herein, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, at least some of the steps in the flowcharts involved in the above-described embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in rotation with at least some of the steps or stages in other steps or other steps.

[0097] Based on the same inventive concept, an embodiment of the present application also provides an FPGA data reconstruction device for implementing the FPGA data reconstruction method described above. The solution provided by this device to solve the problem is similar to the solution described in the above method. Therefore, the specific limitations in one or more embodiments of the FPGA data reconstruction device provided below can refer to the limitations on the FPGA data reconstruction method in the above text, and will not be repeated here.

[0098] Exemplarily, an FPGA data reconstruction device is provided, which may include: a compression module, a splitting module, an uploading module, and a reconstruction module;

[0099] Among them, the compression module is used to compress the FPGA original data to obtain compressed data; the FPGA refers to a field programmable gate array; the splitting module is used to split the compressed data into multiple reconstruction packets according to a preset reconstruction protocol; the uploading module is used to upload the reconstruction packets to the satellite side; the receiving module is used to receive the packet loss information fed back by the satellite side; the reconstruction module is used to perform data reconstruction processing according to the packet loss information to obtain updated reconstruction packets; the uploading module is further used to upload the updated reconstruction packets to the satellite side until the satellite side completes the reception and storage of all reconstruction packets.

[0100] Exemplarily, the compression module is specifically used to compress the FPGA original data by using the GZIP compression algorithm to obtain compressed data.

[0101] Exemplarily, the above device may further include: a setting module, which is used to set a preset reconstruction protocol, and the preset reconstruction protocol includes at least one of: data format, packet sequence number, check code, forwarding rate, forwarding port, and forwarding format.

[0102] Exemplarily, the splitting module is specifically configured to split the compressed data into multiple reconstructed remote control uplink frames according to a preset reconstruction protocol; the reconstructed remote control uplink frames form a reconstructed packet; wherein, each reconstructed remote control uplink frame adopts a preset format and includes a target identifier.

[0103] Exemplarily, another FPGA data reconstruction device is provided, and the device may include: a receiving module, a feedback module, a recovery module, and a sending module;

[0104] Among them, the receiving module is configured to receive the reconstructed packet uploaded by the ground side, and the reconstructed packet is obtained by splitting the compressed data corresponding to the FPGA original data by the ground side according to a preset reconstruction protocol; the feedback module is configured to feedback the packet loss information to the ground side; the receiving module is further configured to receive the updated reconstructed packet uploaded by the ground side until all the reconstructed packets are received and stored; the recovery module is configured to recover the reconstructed packet according to a preset reconstruction protocol to obtain the restored FPGA original data; the sending module is configured to send the restored FPGA original data to the user terminal.

[0105] Exemplarily, the preset reconstruction protocol includes at least one of: data format, packet sequence number, check code, forwarding rate, forwarding port, and forwarding format.

[0106] Exemplarily, the recovery module is specifically configured to parse all the reconstructed packets according to a preset reconstruction protocol, remove the protocol format, and then recover the compressed data; perform format verification on the compressed data to determine whether the file is in a compressed format; if it is in a compressed format, perform decompression operation to obtain the restored FPGA original data.

[0107] Exemplarily, the sending module is specifically configured to forward the restored FPGA original data to the user terminal at the rate and port specified by the remote control.

[0108] Each module in the above FPGA data reconstruction device can be implemented in whole or in part by software, hardware, and their combination. Each of the above modules can be embedded in the processor in the computer device in hardware form or be independent of it, or be stored in the memory in the computer device in software form, so that the processor can call and execute the operations corresponding to each of the above modules.

[0109] In an exemplary embodiment, a computer device is provided, which may be a server. The computer device includes a processor, a memory, an input / output interface (Input / Output, abbreviated as I / O), and a communication interface. Among them, the processor, the memory, and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store data. The input / output interface of the computer device is used to exchange information between the processor and external devices. The communication interface of the computer device is used to communicate with external terminals through a network connection. When the computer program is executed by the processor, it implements an FPGA data reconstruction method.

[0110] In an exemplary embodiment, a computer device is provided, including a memory and a processor. A computer program is stored in the memory, and when the processor executes the computer program, it implements the steps in the above method embodiments.

[0111] In an embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by the processor, it implements the steps in the above method embodiments.

[0112] In an embodiment, a computer program product is provided, including a computer program. When the computer program is executed by the processor, it implements the steps in the above method embodiments.

[0113] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use, and processing of relevant data need to comply with relevant regulations.

[0114] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in the present application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., without limitation. The processors involved in the embodiments provided in the present application can be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, data processing logics based on quantum computing, artificial intelligence (AI) processors, etc., without limitation.

[0115] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in the present application.

[0116] The above-described embodiments merely represent several implementation manners of the present application. The description thereof is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all fall within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.

Claims

1. An FPGA data reconstruction method, characterized in that, Applied to the ground side, the method includes: Compress the original FPGA data to obtain compressed data; the FPGA refers to a Field Programmable Gate Array; Split the compressed data into multiple reconstruction packets according to a preset reconstruction protocol; Upload the reconstruction packets to the satellite side; Receive the packet loss information feedback from the satellite side; Perform data reconstruction processing according to the packet loss information to obtain updated reconstruction packets; Upload the updated reconstruction packets to the satellite side until the satellite side completes the reception and storage of all reconstruction packets.

2. The method according to claim 1, characterized in that, The step of compressing the original FPGA data to obtain compressed data includes: Use the GZIP compression algorithm to compress the original FPGA data to obtain compressed data.

3. The method according to claim 1, characterized in that, Before splitting the compressed data into multiple reconstruction packets according to a preset reconstruction protocol, the method further includes: Set a preset reconstruction protocol, where the preset reconstruction protocol includes at least one of data format, packet sequence number, check code, forwarding rate, forwarding port, and forwarding format.

4. The method according to claim 1, wherein The step of splitting the compressed data into multiple reconstruction packets according to a preset reconstruction protocol includes: Split the compressed data into multiple reconstruction telecommand uplink frames according to a preset reconstruction protocol; the reconstruction telecommand uplink frames form the reconstruction packets; where each reconstruction telecommand uplink frame adopts a preset format and contains a target identifier.

5. A method for FPGA data reconstruction, characterized in that, Applied to the satellite side, the method includes: Receive the reconstruction packets uploaded from the ground side, where the reconstruction packets are obtained by splitting the compressed data corresponding to the original FPGA data by the ground side according to a preset reconstruction protocol; Feed back the packet loss information to the ground side; Receive the updated reconstruction packets uploaded from the ground side until all reconstruction packets are received and stored; Restore the reconstruction packets according to a preset reconstruction protocol to obtain the restored original FPGA data; Send the restored original FPGA data to the user terminal.

6. The method according to claim 5, wherein The preset reconstruction protocol includes at least one of data format, packet sequence number, check code, forwarding rate, forwarding port, and forwarding format.

7. The method according to claim 5, wherein The step of restoring the reconstruction packets according to a preset reconstruction protocol to obtain the restored original FPGA data includes: Parse all the reconstruction packets according to a preset reconstruction protocol, and after removing the protocol format, restore the compressed data; Perform format verification on the compressed data to determine whether the file is in a compressed format; If it is in a compressed format, perform decompression operation to obtain the restored original FPGA data.

8. The method according to claim 5, characterized in that, The step of sending the restored original FPGA data to the user terminal includes: Forward the restored original FPGA data to the user terminal at the rate and port specified by the telecommand.

9. An FPGA data reconstruction device, characterized in that, Applied to the ground side, the device includes: A compression module for compressing the original FPGA data to obtain compressed data; the FPGA refers to a Field Programmable Gate Array; A splitting module for splitting the compressed data into multiple reconstruction packets according to a preset reconstruction protocol; An upload module for uploading the reconstruction packets to the satellite side; A receiving module for receiving the packet loss information feedback from the satellite side; A reconstruction module for performing data reconstruction processing according to the packet loss information to obtain updated reconstruction packets; The uploading module is further configured to upload the updated reconstruction package to the satellite side until the satellite side completes the reception and storage of all the reconstruction packages.

10. An FPGA data reconstruction device, characterized in that, Applied to the satellite side, the device includes: A receiving module, configured to receive the reconstruction packages uploaded by the ground side, where the reconstruction packages are obtained by splitting the compressed data corresponding to the original FPGA data according to a preset reconstruction protocol by the ground side; A feedback module, configured to feedback the packet loss information to the ground side; The receiving module is further configured to receive the updated reconstruction packages uploaded by the ground side until the reception and storage of all the reconstruction packages are completed; A restoration module, configured to restore the reconstruction packages according to a preset reconstruction protocol to obtain the restored original FPGA data; A sending module, configured to send the restored original FPGA data to the user terminal.