Method for compensating rising edge time deviation of synchronizing signal based on clock pulse

Abstract

The invention discloses a method for compensating a rising edge moment deviation of a synchronous signal based on clock pulse, and aims to solve the problem of inaccurate calculation of a synchronous deviation compensation coefficient caused by factors such as unstable field anode voltage and insufficient accuracy of a measuring instrument at present. 12 synchronous signal deviation compensation coefficients are calculated by adopting a deviation compensation coefficient full-automatic calculation and verification algorithm for alignment of absolute time points of pulse edges of multiple paths of synchronous signals.

Description

Technical Field

[0001] The present invention belongs to the field of power conversion, and specifically relates to a method for compensating the deviation of the rising edge moment of a synchronous signal based on a clock pulse. Background Art

[0002] For example Figures 1 to 2 The excitation system shapes and modulates the sine wave of the anode voltage or the terminal voltage of the machine into a synchronous square wave signal (output voltage) through a hardware circuit. The rising edge of the synchronous square wave signal corresponds to the rising zero crossing of the sine wave. The excitation system uses the rising edge of the synchronous square wave as the time starting point of this cycle, and gives the control angle α* interruption in the synchronous interruption triggered by the rising edge of the synchronous square wave signal. After converting the phase of the given control angle α* into the interruption delay t α* After that, a trigger pulse is generated to trigger the rectifier bridge to convert the three-phase AC power supply on the anode side into a DC power supply. After the synchronous signal is connected to the shaping circuit, it is shaped from a sine wave into a square wave signal and then connected to the CPU. At the mutation point (rising edge or falling edge) of the synchronous signal, the rising edge or falling edge timer is triggered to latch the current timer count value, and the occurrence period and phase angle difference of the interruption moment are calculated in the interrupt service program. Then, the interruption moment is recorded in the interrupt service program. The time difference between two interruption moments of the same synchronous signal is the occurrence period T of the interruption moment. The time difference dT between the interruption moments of different synchronous signals can be converted into a phase angle difference according to the period T.

[0003] High-power power electronic devices usually need to use multiple thyristor three-phase rectifier bridges in parallel output. Conventional intelligent rectifier bridges can generate trigger pulses by themselves according to the control angle data α* output by the controller, and generally use one phase of the local three-phase synchronization to drive the trigger pulse. Tests show that for the same-phase synchronous signals of different intelligent rectifier bridges for 50Hz power frequency signals, the time deviation is very small, about 10μs, while for different-phase synchronous signals, even with 120° time compensation, the time deviation is still relatively large, possibly reaching more than 50μs.

[0004] For example, the IAEC6000 excitation system has a 12-level (3-phase synchronous signals for each of the 4 power cabinets) synchronous signal redundancy function. The 12-way synchronous signals are respectively taken from the respective three-phase anode voltage signals of the 4 power cabinets. There is an inherent random delay deviation of up to ±54μs in the hardware of the three-phase anode voltage signal acquisition loop of each power cabinet. This deviation is equivalent to a maximum deviation of ±1 degree of the control angle of the excitation system, which will have a certain impact on the current sharing coefficient of the entire excitation system. Therefore, in order to make up for the inherent deviation of the hardware, the IAEC6000 excitation system is designed with 12 synchronous compensation coefficients in software, which can perform deviation compensation for 12-way synchronous signals respectively to compensate for the fixed deviation values of the rising edge moments of different synchronous signals.

[0005] In order to calibrate and obtain 12 compensation coefficients, in the prior art, after manually selecting a certain path of synchronous signal, under the constant control angle control mode, by measuring the anode voltage value U in and the output voltage value U of a single power cabinet out , the actual control angle α is calculated. Its calculation formula is U out = 1.35cosαU in . Then, it is compared and subtracted from the given control angle α*, and the deviation compensation coefficient of this path of synchronous signal is obtained, which is also called the synchronous signal compensation angle Δα (Δα = α - α*). However, due to the frequent fluctuation of the on-site anode voltage affected by environmental factors, the manual selection of a certain path of synchronous signal is random. At the same time, the measurement accuracy of the used measuring instrument for high-harmonic voltage is insufficient, resulting in a certain dispersion error when testing 12 paths of synchronous signals respectively, making the accuracy of the calculated 12 synchronous compensation coefficients insufficient. Finally, it is manifested that the 12 synchronous compensation coefficients need to be calibrated and calculated multiple times during the on-site test process, with a large workload. At the same time, in the tests related to the current increase of the excitation system, the current sharing effect at a small output current is not ideal. Summary of the Invention

[0006] The present invention aims to solve the problem of inaccurate calculation of the synchronous deviation compensation coefficient caused by unstable on-site anode voltage and insufficient accuracy of the measuring instrument, and proposes a method for compensating the deviation of the rising edge moment of the synchronous signal based on clock pulses, adopting an automatic calculation and verification algorithm for the deviation compensation coefficient with the absolute moment points of the edges of multiple paths of synchronous signal pulses aligned, and calculating 12 synchronous signal deviation compensation coefficients.

[0007] The technical solution of the present invention is as follows: A method for compensating the deviation of the rising edge moment of the synchronous signal based on clock pulses includes the following specific steps:

[0008] Implement a point-to-point communication network between multiple intelligent rectifiers using single-mode optical fiber;

[0009] Through the communication network connecting all intelligent rectifiers, share the absolute clock pulse as a time stamp scale to all intelligent rectifiers, and the resolution of the absolute clock pulse is less than the time deviation of the same synchronous signal of different intelligent rectifiers;

[0010] Respectively compare the rising edges of each path of synchronous signal with the time stamp scale to calculate the interruption moments of each path of synchronous signal, the phase time differences of different phases in each path of synchronous signal, and the occurrence period T of the interruption moment of each synchronous signal;

[0011] Statistically calculate the absolute value of the time deviation of each channel of the synchronous signal interruption moment relative to the corresponding cycle start moment in each cycle, as well as the mean value of the absolute value of the time deviation of each channel of the synchronous signal in each cycle and the degree of dispersion of the absolute value of the time deviation. Select the synchronous signal with the smallest mean value or the lowest degree of dispersion as the reference synchronous signal;

[0012] The absolute value of the time deviation also includes the absolute value of the time deviation between the three-phase synchronous signals in the synchronous signal and the corresponding cycle start moment. For the interruption moments of different phases in the synchronous signal, add / subtract compensation is performed according to the phase time difference with respect to the cycle start moment;

[0013] Calculate the relative time deviation dT of each channel of the synchronous signal relative to the reference synchronous signal, and convert the relative time deviation into a relative phase angle difference;

[0014] Make the output of the intelligent rectifier bridge that generates the reference synchronous signal no-load, and measure the anode voltage value U in and the output voltage value U of this intelligent rectifier bridge out , calculate the actual control angle α of the reference synchronous signal, and its calculation formula is U out = 1.35cosαU in , add the relative phase angle difference of each synchronous signal to the actual control angle to obtain the synchronous signal compensation angle of each channel of the synchronous signal;

[0015] Share the reference synchronous signal and the synchronous signal compensation angle of each channel of the synchronous signal with all parallel intelligent rectifier bridges through the fiber optic network;

[0016] When using the synchronous signal of other intelligent rectifier bridges as the driving signal for the trigger pulse of this intelligent rectifier bridge, use the synchronous signal compensation angle of the intelligent rectifier bridge where the synchronous signal source is located as the synchronous signal compensation angle of the trigger pulse of this intelligent rectifier bridge;

[0017] Instantaneously interact the edge time point values of each thyristor trigger pulse through the communication network. If the edge time point values of each thyristor trigger pulse are the same, write them into the controller parameter holding area and feedback the flag information for manual confirmation. Otherwise, repeat the above steps for secondary calibration and verification of the synchronous signal compensation angle.

[0018] Preferably, the resolution of the absolute clock pulse is 10 ns.

[0019] Preferably, the degree of dispersion can be represented by the standard deviation or variance.

[0020] Preferably, the method for compensating the rising edge moment deviation of the synchronous signal based on the clock pulse is used during the commissioning process of the excitation equipment and is disabled during the operation of the excitation equipment.

[0021] A computer-readable storage medium, characterized in that the computer-readable storage medium stores program code, and when the program code is executed by a processor, the steps of the method for compensating the rising edge time deviation of the synchronization signal based on the clock pulse are implemented.

[0022] The beneficial effects of the present invention are as follows:

[0023] The solution of the present invention effectively avoids the random errors caused by manually selecting a certain synchronization signal, such as a large amount of experimental work, unstable anode voltage on site, insufficient accuracy of measuring instruments, etc., which result in inaccurate calculation of the synchronization deviation compensation coefficient. By using a high-resolution absolute clock pulse as a reference, the synchronization signal compensation angles of each synchronization signal are accurately calculated and then superimposed on the control angle, solving the problem of sudden change of the output current of the excitation system during redundant switching of multiple synchronization signals, and providing a highly reliable and low-redundancy switching disturbance solution for the multi-channel synchronization signal redundant excitation system. Description of the Drawings

[0024] Figure 1 It is a schematic diagram of shaping a sine wave into a synchronous square wave signal;

[0025] Figure 2 It is a schematic diagram of a thyristor three-phase rectifier bridge;

[0026] Figure 3 It is a diagram of a high-redundancy synchronization signal fault switching device;

[0027] Figure 4 It is a schematic diagram of communication between intelligent rectifier bridges;

[0028] Figure 5 It is a schematic diagram of the time deviation of each synchronization signal. Detailed Embodiments

[0029] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0030] The present invention uses the same hardware as the patent application 201910223958.X, as Figures 2 to 3 shown, the output ends of multiple intelligent rectifier bridges are connected in parallel. The intelligent rectifier bridge includes a three-phase rectifier bridge and a controller configured with an FPGA and a CPU. The FPGA controllers of each intelligent rectifier bridge are interconnected point-to-point through independent optical fibers to form an optical fiber network connecting each intelligent rectifier bridge.

[0031] Among multiple intelligent rectifier bridges interconnected point-to-point through independent optical fibers, a method for calculating the deviation compensation coefficient of the synchronization signal based on compensating the deviation of the rising edge moment of the synchronization signal with a clock pulse is adopted, including the following specific steps:

[0032] (1) Through the optical fiber network connecting all intelligent rectifier bridges, share the absolute clock pulse as a time stamp scale for all intelligent rectifier bridges. The resolution of the absolute clock pulse is 10 ns;

[0033] At this time, one pulse signal in the absolute clock pulse can be used as the 0 moment, and other pulse signals can be counted relative to the 0 moment pulse signal to obtain the accurate time difference between the pulse signals. Therefore, it can be used as a time stamp scale to measure the moment when the rising edge of the synchronization signal occurs.

[0034] (2) Respectively compare the rising edge of each path of synchronization signal with the time stamp scale to calculate the interruption moment of each path of synchronization signal, the phase time difference of different phases in each path of synchronization signal, and the occurrence period T of the interruption moment of each synchronization signal;

[0035] (3) Statistically calculate the absolute value of the time deviation of the interruption moment of each path of synchronization signal relative to the corresponding cycle start moment in each cycle, the average value of the absolute value of the time deviation of each path of synchronization signal in each cycle, and the degree of dispersion of the absolute value of the time deviation. Select the path of synchronization signal with the smallest average value or the lowest degree of dispersion as the reference synchronization signal.

[0036] The start moment of each cycle of each path of synchronization signal = T * (n - 1) + the first interruption moment, where n is the number of cycles experienced. The degree of dispersion can be represented by the standard deviation or variance, which is used to measure the deviation degree of the absolute value of the time deviation. The absolute value of the time deviation also includes the absolute value of the time deviation between the three-phase synchronization signals in the synchronization signal and the corresponding cycle start moment. The start moment of the interruption moment of different phases in the synchronization signal is compensated by addition / subtraction according to the phase time difference.

[0037] (4) Calculate the relative time deviation dT of each path of synchronization signal relative to the reference synchronization signal, and convert the relative time deviation into a relative phase angle difference α AB .

[0038] dT = 360°Tα AB .

[0039] (5) Make the intelligent rectifier bridge that generates the reference synchronization signal output no-load, measure the anode voltage value U in and the output voltage value U out of this intelligent rectifier bridge, calculate the actual control angle α of the reference synchronization signal, and add the relative phase angle difference of each synchronization signal to the actual control angle to obtain the synchronization signal compensation angle of each path of synchronization signal.

[0040] Uout = 1.35 cos α U in 。

[0041] (6) Share the reference synchronization signal and the synchronization signal compensation angle of each path of synchronization signal with all parallel intelligent rectifier bridges through the optical fiber network.

[0042] (7) When using the synchronization signal of other intelligent rectifier bridges as the driving signal of the trigger pulse, use the synchronization signal compensation angle of the intelligent rectifier bridge where the synchronization signal source is located as the synchronization signal compensation angle of the trigger pulse;

[0043] In the present invention, the synchronization signal compensation angles set for each intelligent rectifier bridge are slightly different to compensate for the differences caused by the hardware. Therefore, in addition to sharing the synchronization signal, the present invention also shares the synchronization signal compensation angles of each intelligent rectifier bridge, and uses the synchronization signal compensation angle of the intelligent rectifier bridge where the synchronization signal source is located when generating the trigger pulse. For example, if all intelligent rectifier bridges use the synchronization of A of intelligent rectifier bridge 1, then all intelligent rectifier bridges use the synchronization signal compensation angle of intelligent rectifier bridge 1.

[0044] (8) Each intelligent rectifier bridge generates a trigger pulse according to the synchronization signal compensation angle.

[0045] (9) Instantaneously interact the values of the edge time points of each thyristor trigger pulse through the optical fiber network for automatic comparison and verification. If the values of the edge time points of each thyristor trigger pulse are the same, they can be written into the controller parameter holding area and feedback the flag information for manual confirmation. Otherwise, repeat the above process for secondary calibration and verification of the synchronization signal compensation angle.

[0046] Considering that the synchronization signal compensation angle includes the compensation for the inherent deviation of the system hardware and does not require real-time calculation and adjustment, and at the same time to ensure absolute safety and reliability, the present invention sets a functional subroutine for automatic calculation and verification of the synchronization signal compensation angle, which can only be automatically called and executed during the commissioning process of the excitation equipment and is automatically disabled during operation.

Claims

1. A method for compensating the deviation of the rising edge moment of a synchronous signal based on a clock pulse, which uses a single-mode optical fiber to implement a point-to-point communication network between multiple intelligent rectifier bridges, is characterized in that It includes the following specific steps: Step 1. Share the absolute clock pulse as a timestamp scale to all intelligent rectifier bridges through the communication network that interconnects all intelligent rectifier bridges. The resolution of the absolute clock pulse is less than the time deviation of the same synchronization signal of different intelligent rectifier bridges; Step 2. Use the rising edges of each path of synchronization signals to compare with the timestamp scale respectively, and calculate the interruption moments of each path of synchronization signals, the phase time differences of different phases in each path of synchronization signals, and the occurrence period T of the interruption moments of each synchronization signal; Step 3. Statistically calculate the absolute value of the time deviation of the interruption moments of each path of synchronization signals relative to the corresponding cycle start moment in each cycle, the mean value of the absolute values of the time deviations of each path of synchronization signals in each cycle, and the degree of dispersion of the absolute values of the time deviations. Select the path of synchronization signal with the smallest mean value or the lowest degree of dispersion as the reference synchronization signal; The cycle start moment of each cycle of each path of synchronization signals = T*(n - 1)+the first interruption moment, where n is the number of cycles experienced; The absolute value of the time deviation also includes the absolute value of the time deviation between the three-phase synchronization signals in the synchronization signal and the corresponding cycle start moment. The cycle start moment of the interruption moments of different phases in the synchronization signal is compensated by addition / subtraction according to the phase time difference; Step 4. Calculate the relative time deviation dT of each path of synchronization signals relative to the reference synchronization signal, and convert the relative time deviation into a relative phase angle difference; Step 5. Make the output of the intelligent rectifier bridge that generates the reference synchronization signal no-load, and measure the anode voltage value U in and the output voltage value U of this intelligent rectifier bridge out , calculate the actual control angle α of the reference synchronization signal, add the relative phase angle difference of each synchronization signal to the actual control angle, and obtain the synchronization signal compensation angle of each path of synchronization signal; Step 6. Share the reference synchronization signal and the synchronization signal compensation angle of each path of synchronization signals with all parallel intelligent rectifier bridges through the optical fiber network; Step 7. When using the synchronization signal of other intelligent rectifier bridges as the driving signal of the trigger pulse, use the synchronization signal compensation angle of the synchronization signal source where the intelligent rectifier bridge is located as the synchronization signal compensation angle of the trigger pulse; Step 8. Each intelligent rectifier bridge generates a trigger pulse according to the synchronization signal compensation angle; Step 9. Instantaneously interact the point values of the edge moments of each thyristor trigger pulse through the communication network. If the point values of the edge moments of each thyristor trigger pulse are the same, write them into the controller parameter holding area and feedback the flag information for manual confirmation. Otherwise, repeat the above steps for secondary calibration and verification of the synchronization bias angle.

2. The method according to claim 1, characterized in that The resolution of the absolute clock pulse is 10 ns.

3. The method according to claim 1, characterized in that, The degree of dispersion can be expressed by the standard deviation or variance.

4. The method according to claim 1, wherein The method for compensating the rising edge moment deviation of the synchronization signal based on the clock pulse is used during the commissioning process of the excitation equipment and is disabled during the operation of the excitation equipment.

5. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores program code. When the program code is executed by a processor, it implements the steps of the method for compensating the rising edge moment deviation of the synchronization signal based on the clock pulse as claimed in claim 1.

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