Transverse PN junction diode based on N-surface GaN / AlGaN heterojunction and preparation method thereof
By introducing a PN junction terminal structure into the N-plane GaN/AlGaN heterojunction Schottky diode, the reverse leakage and voltage withstand voltage problems of Schottky diode are solved, and higher device reliability and voltage withstand performance are achieved.
Patent Information
- Application Number
- CN202510710750.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-29
- Publication Date
- 2025-07-18
AI Technical Summary
The existing N-plane GaN/AlGaN heterojunction Schottky diodes have a larger Schottky reverse leakage and a lower device withstand voltage due to their special structure, which affects the reliability and performance of the device.
A transverse PN junction diode based on N-plane GaN/AlGaN heterojunction is designed, and the space charge region and depletion region are formed by introducing a PN junction terminal structure into the anode region, changing the electric field distribution, blocking the leakage of reverse carriers, and enhancing the depletion capacity of the channel layer through electric field coupling.
Reduce reverse leakage, improve the device's voltage withstand performance and channel exhaustion ability in reverse state, and improve the device's reliability.
Smart Images
Figure CN120343930A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a lateral PN junction diode based on an N-face GaN / AlGaN heterojunction and a preparation method thereof. Background Art
[0002] With the rapid development of modern electronic technology, extreme application scenarios such as high frequency, high power and strong radiation have put forward increasingly stringent requirements on the performance of semiconductor devices. In this context, the third-generation semiconductor material gallium nitride (GaN) stands out with its unique material properties. GaN has a wider bandgap, a higher critical breakdown electric field, a larger electron saturation velocity, and also has excellent thermal conductivity, excellent high temperature resistance and corrosion resistance. These advantages make it an ideal material to meet the needs of high-frequency, high-power and strong radiation applications. In recent years, N-face GaN / AlGaN heterojunction devices have received widespread attention and rapid development in academia and industry due to their lower contact resistance, stronger two-dimensional electron gas (2DEG) confinement, excellent gate control capability and high-frequency characteristics. However, with the continuous improvement of electronic systems' requirements for power handling capabilities and the intensification of the trend of equipment miniaturization, the requirements for circuit system reliability in diversified application scenarios are becoming increasingly stringent. How to further improve the withstand voltage performance and reliability of N-face GaN / AlGaN heterojunction devices has become a key technical issue that needs to be solved urgently.
[0003] However, in the existing N-face GaN / AlGaN heterojunction Schottky diode, due to its special structural characteristics, the channel layer is located above the barrier layer (AlGaN layer), so that the metal is in direct contact with the channel layer, and the surface state of the nitrogen-polar GaN material causes the Schottky barrier to be lowered. This series of factors work together to cause the diode to have a large Schottky reverse leakage and a low device withstand voltage, which seriously affects the reliability and performance of the device. Summary of the invention
[0004] In order to solve the above problems existing in the prior art, the present invention provides a lateral PN junction diode based on an N-face GaN / AlGaN heterojunction and a preparation method thereof.
[0005] The technical problem to be solved by the present invention is achieved through the following technical solutions:
[0006] In a first aspect, the present invention provides a lateral PN junction diode based on an N-face GaN / AlGaN heterojunction, wherein the lateral PN junction diode is a bilaterally symmetrical structure, including: an N-face GaN / AlGaN heterojunction Schottky diode and a PN junction terminal structure;
[0007] The N-face GaN / AlGaN heterojunction Schottky diode includes: the N-face GaN / AlGaN heterojunction Schottky diode basic structure and the anode metal;
[0008] The PN junction terminal structure is arranged at the central position on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure; the anode metal is arranged on the upper surface of the PN junction terminal structure;
[0009] The PN junction terminal structure is used to separate the channel layer in the N-face GaN / AlGaN heterojunction Schottky diode basic structure from the anode metal.
[0010] Optionally, the PN junction terminal structure adopts the first PN junction terminal structure or the second PN junction terminal structure;
[0011] The first PN junction terminal structure includes: the first PN junction passivation layer, the first P-GaN layer and the first P++GaN layer; the first P-GaN layer and the first P++GaN layer together form the first P-type layer;
[0012] The second PN junction terminal structure includes: the second PN junction passivation layer, the second P-GaN layer and the second P++GaN layer; the second P-GaN layer and the second P++GaN layer together form the second P-type layer;
[0013] The anode metal includes: the first anode metal or the second anode metal;
[0014] When the first P-type layer or the second P-type layer adopts GaN material, the PN junction terminal structure adopts the first PN junction terminal structure;
[0015] When the first P-type layer or the second P-type layer adopts NiO or Cu2O or BN material, the PN junction terminal structure adopts the second PN junction terminal structure;
[0016] The first anode metal is correspondingly arranged with the first PN junction terminal structure; the second anode metal is correspondingly arranged with the second PN junction terminal structure.
[0017] Optionally, the Mg doping concentration of the first P-GaN layer or the second P-GaN layer is 3×10 17 ~1×10 19 ;
[0018] The Mg doping concentration of the first P++GaN layer or the second P++GaN layer is 8×10 18 ~5×10 19 .
[0019] Optionally, the first P-GaN layer is located at the central position on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure;
[0020] The first P++ GaN layer is disposed on the upper surface of the first P-GAN layer and has the same width as the first P-GAN layer;
[0021] The first PN junction passivation layer covers the upper surface regions near both sides of the first P++ GaN layer, the side regions of the first P-GAN layer, and the side regions of the first P++ GaN layer;
[0022] The first anode metal covers the upper surface of the first P++ GaN layer and contacts the first PN junction passivation layer covering the upper surface of the first P++ GaN layer;
[0023] Both ends of the first PN junction passivation layer far from the first anode metal are in contact with the passivation layer on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure.
[0024] Optionally, both the second P-GAN layer and the second P++ GaN layer are in a trench shape, and the second P++ GaN layer is nested inside the second P-GAN layer;
[0025] The trench bottom of the second P-GAN layer is disposed at the center of the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure;
[0026] The second anode metal is filled inside the trench of the second P++ GaN layer and part of the trench edge region;
[0027] The trench edge region of the second P-GAN layer covers the upper surface of the second PN junction passivation layer;
[0028] Both ends of the second PN junction passivation layer far from the second anode metal are in contact with the passivation layer on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure.
[0029] Optionally, in the P-type layer, the thickness of the first P-GAN layer or the second P-GAN layer is 30 nm to 500 nm;
[0030] The thickness of the first P++ GaN layer or the second P++ GaN layer is 10 nm to 30 nm.
[0031] Optionally, the N-face GaN / AlGaN heterojunction Schottky diode basic structure includes, from bottom to top in sequence: a substrate layer, a GaN buffer layer, a silicon-doped N-face AlGaN layer, an unintentionally doped AlGaN barrier layer, a GaN channel layer;
[0032] The implantation isolation region is vertically disposed on both side regions of the silicon-doped N-face AlGaN layer, the unintentionally doped AlGaN barrier layer, the GaN channel layer, and both side partial regions of the GaN buffer layer;
[0033] The cathode is disposed on both side regions of the anode metal and is in contact with the upper surface of the GaN channel layer;
[0034] The regions of the GaN channel layer not covered by the PN junction termination structure and the cathode are all covered with a passivation layer.
[0035] In a second aspect, the present invention provides a method for fabricating a lateral PN junction diode based on an N-face GaN / AlGaN heterojunction, including:
[0036] S101. Cleaning and acid-treating the substrate layer;
[0037] S102. Growing a GaN buffer layer, a silicon-doped N-face AlGaN layer, an unintentionally doped AlGaN barrier layer, and a GaN channel layer on the substrate layer in sequence upward to obtain a basic epitaxial structure;
[0038] S103. Performing a first-region growth or a second-region growth on the basic epitaxial structure to form a lateral PN junction diode of an N-face GaN / AlGaN heterojunction;
[0039] The first region is a distribution based on a first PN junction termination structure; the second region is a distribution based on a second PN junction termination structure.
[0040] Optionally, when performing a first-region growth on the basic epitaxial structure, S103 includes:
[0041] S201. Growing a first P-GAN layer and a first P++GaN layer on the basic epitaxial structure in sequence upward;
[0042] S202. Cleaning the current device;
[0043] S203. Etching the first P-GaN layer and the first P++GaN layer to form a PN junction region;
[0044] S204. Evaporating a cathode ohmic metal on the current device to form a cathode and annealing;
[0045] S205. Performing isolation implantation on both side regions of the silicon-doped N-face AlGaN layer, the unintentionally doped AlGaN barrier layer, the GaN channel layer, and both side partial regions of the GaN buffer layer of the current device;
[0046] S206. Depositing a passivation layer on the upper surface of the current device and performing cathode opening;
[0047] S207. Performing anode opening and evaporating a first anode metal;
[0048] Among them, both the first P-GAN layer and the first P++GaN layer in the lateral PN junction diode based on the first region are made of GaN material.
[0049] Optionally, when growing the second region on the base epitaxial structure, S103 includes:
[0050] S301, cleaning the base epitaxial structure;
[0051] S302, evaporating a cathode ohmic metal on the base epitaxial structure to form a cathode and annealing;
[0052] S303, performing isolation implantation on both sides of the silicon-doped N-side AlGaN layer, the unintentionally doped AlGaN barrier layer, the GaN channel layer of the current device, and both partial regions of the GaN buffer layer;
[0053] S304, depositing a passivation layer on the upper surface of the current device and performing cathode opening;
[0054] S305, performing anode opening treatment;
[0055] S306, sequentially growing a second P-GAN layer and a second P++GaN layer upward by sputtering at the anode opening position;
[0056] S307, evaporating a second anode metal on the upper surface of the second P++GaN layer;
[0057] Wherein, in the lateral PN junction diode of the second region, both the second P-GAN layer and the second P++GaN layer adopt NiO or Cu2O or BN materials.
[0058] The present invention provides a lateral PN junction diode based on an N-face GaN / AlGaN heterojunction and a preparation method thereof. Among them, the lateral PN junction diode of the N-face GaN / AlGaN heterojunction has a left-right symmetric structure, including: an N-face GaN / AlGaN heterojunction Schottky diode and a PN junction terminal structure; the N-face GaN / AlGaN heterojunction Schottky diode includes: an N-face GaN / AlGaN heterojunction Schottky diode basic structure and an anode metal; the PN junction terminal structure is disposed at the central position on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure; the anode metal is disposed on the upper surface of the PN junction terminal structure; the PN junction terminal structure is used to separate the channel layer in the N-face GaN / AlGaN heterojunction Schottky diode basic structure from the anode metal. In the present invention, by introducing a PN junction terminal structure in the anode region, when the lateral PN junction diode is in a reverse bias state, the PN junction terminal structure will form a space charge region, and this space charge region will change the original electric field distribution in the anode region. Since the high barrier of the PN junction terminal structure compared to the original N-face GaN / AlGaN heterojunction Schottky diode makes it difficult for electrons to cross, the reverse leakage is reduced; secondly, since the PN junction terminal structure itself has unidirectional conductivity, when in reverse bias, the depletion region of the PN junction terminal structure will expand to form a barrier, which can effectively block the passage of reverse carriers, further enhancing the ability to block the leakage of reverse carriers. In addition, due to the electric field coupling effect between the PN junction terminal structure and the channel layer, when the lateral PN junction diode is in a reverse bias state, the electric field generated by the PN junction terminal structure will be coupled into the channel layer, increasing the electric field strength in the channel layer. This increased electric field strength will prompt the carriers in the channel layer to be depleted faster, thereby enhancing the depletion ability of the channel in the reverse state of the lateral PN junction diode. Finally, in the reverse bias state, the depletion region of the PN junction will expand with the increase of the reverse voltage, and the introduction of the PN junction terminal structure enables the depletion region in the anode region to expand more fully, thereby withstanding a higher reverse voltage and improving the reverse breakdown voltage performance of the lateral PN junction diode. In summary, by setting the PN junction terminal structure, the reverse leakage of the N-face GaN / AlGaN heterojunction Schottky diode is reduced, the breakdown voltage performance of the N-face GaN / AlGaN heterojunction Schottky diode and the depletion ability of the channel in the reverse state are improved, and the reliability of the N-face GaN / AlGaN heterojunction Schottky diode is overall enhanced.
[0059] The following will further elaborate on the present invention in detail with reference to the accompanying drawings and embodiments. Description of the Drawings
[0060] Figure 1 It is a schematic structural diagram of a lateral PN junction diode based on an N-face GaN / AlGaN heterojunction provided by an embodiment of the present invention;
[0061] Figure 2 The structural schematic diagram of the basic epitaxial structure is shown exemplarily;
[0062] Figure 3 The corresponding device structure diagram after performing step S201 is shown exemplarily;
[0063] Figure 4 The corresponding device structure diagram after performing step S203 is shown exemplarily;
[0064] Figure 5 The corresponding device structure diagram after performing step S204 is shown exemplarily;
[0065] Figure 6 The corresponding device structure diagram after performing step S205 is shown exemplarily;
[0066] Figure 7 The corresponding device structure diagram after performing step S206 is shown exemplarily;
[0067] Figure 8 The corresponding device structure diagram after performing step S207 is shown exemplarily;
[0068] Figure 9 The corresponding device structure diagram after performing step S302 is shown exemplarily;
[0069] Figure 10 The corresponding device structure diagram after performing step S303 is shown exemplarily;
[0070] Figure 11 The corresponding device structure diagram after performing step S304 is shown exemplarily;
[0071] Figure 12 The corresponding device structure diagram after performing step S305 is shown exemplarily;
[0072] Figure 13 The corresponding device structure diagram after performing step S306 is shown exemplarily;
[0073] Figure 14 The corresponding device structure diagram after performing step S307 is shown exemplarily. Detailed implementation manners
[0074] The present invention will be further described in detail below with reference to specific embodiments, but the implementation manners of the present invention are not limited thereto.
[0075] In order to reduce the reverse leakage current of the N-face GaN / AlGaN heterojunction Schottky diode, improve the breakdown voltage performance of the N-face GaN / AlGaN heterojunction Schottky diode, and enhance the depletion ability of the channel in the reverse state, the embodiments of the present invention provide a lateral PN junction diode based on the N-face GaN / AlGaN heterojunction. Figure 1 The following is a schematic structural diagram of the lateral PN junction diode based on the N-face GaN / AlGaN heterojunction provided by the embodiments of the present invention, as Figure 1 shown, including: an N-face GaN / AlGaN heterojunction Schottky diode and a PN junction terminal structure;
[0076] The N-face GaN / AlGaN heterojunction Schottky diode includes: an N-face GaN / AlGaN heterojunction Schottky diode basic structure 200 and an anode metal;
[0077] The PN junction terminal structure is disposed at the central position on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure 200; the anode metal is disposed on the upper surface of the PN junction terminal structure;
[0078] The PN junction terminal structure is used to separate the channel layer in the N-face GaN / AlGaN heterojunction Schottky diode basic structure 200 from the anode metal.
[0079] It should be noted that the N-face GaN / AlGaN heterojunction Schottky diode provided by the present invention can be in layout forms such as circular, rectangular, and hexagonal.
[0080] As Figure 1 shown, the PN junction terminal structure can adopt Figure 1 the first PN junction terminal structure 101 in the (a) figure of Figure 1 or Figure 1 the second PN junction terminal structure 102 in the (b) figure of Figure 1 Correspondingly, when the first PN junction terminal structure 101 is adopted, the anode metal corresponds to
[0081] An embodiment of the present invention provides a lateral PN junction diode based on an N-face GaN / AlGaN heterojunction. The lateral PN junction diode introduces a PN junction terminal structure in the anode region. When the lateral PN junction diode is in a reverse bias state, the PN junction terminal structure forms a space charge region, which changes the original electric field distribution in the anode region. Since the high barrier of the PN junction terminal structure compared to the original N-face GaN / AlGaN heterojunction Schottky diode makes it difficult for electrons to cross, the reverse leakage is reduced. Secondly, due to the unidirectional conductivity of the PN junction terminal structure itself, the depletion region of the PN junction terminal structure expands during reverse bias, forming a barrier that can effectively block the passage of reverse carriers, further enhancing the ability to block reverse carrier leakage. In addition, due to the electric field coupling effect between the PN junction terminal structure and the channel layer, when the lateral PN junction diode is in a reverse bias state, the electric field generated by the PN junction terminal structure is coupled into the channel layer, increasing the electric field strength in the channel layer. This increased electric field strength promotes the faster depletion of carriers in the channel layer, thereby enhancing the depletion ability of the channel in the reverse state of the lateral PN junction diode. Finally, in the reverse bias state, the depletion region of the PN junction expands with the increase of the reverse voltage, and the introduction of the PN junction terminal structure enables the depletion region in the anode region to expand more fully, thus withstanding a higher reverse voltage and improving the reverse breakdown voltage performance of the lateral PN junction diode. In summary, the reverse leakage of the N-face GaN / AlGaN heterojunction Schottky diode is reduced by the setting of the PN junction terminal structure, the breakdown voltage performance and the depletion ability of the channel in the reverse state of the N-face GaN / AlGaN heterojunction Schottky diode are improved, and the reliability of the N-face GaN / AlGaN heterojunction Schottky diode is overall enhanced.
[0082] Optionally, the PN junction terminal structure adopts the first PN junction terminal structure 101 or the second PN junction terminal structure 102;
[0083] The first PN junction terminal structure 101 includes: a first PN junction passivation layer 10, a first P-GAN layer 6, and a first P++GaN layer 8; the first P-GAN layer 6 and the first P++GaN layer 8 together constitute the first P-type layer;
[0084] The second PN junction terminal structure 102 includes: a second PN junction passivation layer 11, a second P-GAN layer 7, and a second P++GaN layer; the second P-GAN layer 7 and the second P++GaN layer together constitute the second P-type layer;
[0085] The anode metal includes: a first anode metal 15 or a second anode metal 16;
[0086] When the first P-type layer or the second P-type layer adopts a GaN material, the PN junction terminal structure adopts the first PN junction terminal structure 101;
[0087] When the first P-type layer or the second P-type layer adopts NiO or Cu2O or BN material, the PN junction terminal structure adopts the second PN junction terminal structure 102;
[0088] The first anode metal 15 is correspondingly arranged with the first PN junction terminal structure 101; the second anode metal 16 is correspondingly arranged with the second PN junction terminal structure 102.
[0089] Such as Figure 1 shown, Figure 1 Figure (a) of shows an exemplary structural schematic diagram of a lateral PN junction diode based on the first PN junction terminal structure, Figure 1 Figure (b) of shows an exemplary structural schematic diagram of a lateral PN junction diode based on the second PN junction terminal structure.
[0090] Optionally, the Mg doping concentration of the first P-GAN layer 6 or the second P-GAN layer 7 is 3×10 17 ~1×10 19 ;
[0091] The Mg doping concentration of the first P++GaN layer or the second P++GaN layer 9 is 8×10 18 ~5×10 19 .
[0092] Optionally, the first P-GAN layer 6 is located at the central position on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure 200;
[0093] The first P++GaN layer 8 is disposed on the upper surface of the first P-GAN layer 6 and has the same width as the first P-GAN layer 6;
[0094] The first PN junction passivation layer 10 covers the upper surface regions near both sides of the first P++GaN layer 8, the side regions of the first P-GAN layer 6, and the side regions of the first P++GaN layer 8;
[0095] The first anode metal 15 covers the upper surface of the first P++GaN layer 8 and is in contact with the first PN junction passivation layer 10 covering the upper surface of the first P++GaN layer 8;
[0096] Both ends of the first PN junction passivation layer 10 away from the first anode metal 15 are in contact with the passivation layer 14 on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure 200.
[0097] Optionally, both the second P-GAN layer 7 and the second P++GaN layer 9 are in a trench shape, and the second P++GaN layer 9 is nested inside the second P-GAN layer 7;
[0098] The bottom of the trench of the second P-GAN layer 7 is disposed at the center of the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure 200;
[0099] The second anode metal 16 is filled inside the trench of the second P++GaN layer 9 and in part of the trench edge region;
[0100] The trench edge region of the second P-GAN layer 7 covers the upper surface of the second PN junction passivation layer 11;
[0101] Both ends of the second PN junction passivation layer 11 far from the second anode metal 16 are in contact with the passivation layer on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure 200.
[0102] Optionally, in the P-type layer, the thickness of the first P-GAN layer 6 or the second P-GAN layer 7 is 30 nm to 500 nm;
[0103] The thickness of the first P++GaN layer 8 or the second P++GaN layer 9 is 10 nm to 30 nm.
[0104] Optionally, the N-face GaN / AlGaN heterojunction Schottky diode basic structure 200 includes, sequentially arranged from bottom to top: a substrate layer 1, a GaN buffer layer 2, a silicon-doped N-face AlGaN layer 3, an unintentionally doped AlGaN barrier layer 4, and a GaN channel layer 5;
[0105] The implanted isolation region 13 is vertically disposed on both side regions of the silicon-doped N-face AlGaN layer 3, the unintentionally doped AlGaN barrier layer 4, and the GaN channel layer 5 and on both side partial regions of the GaN buffer layer 2;
[0106] The cathode 12 is disposed on both side regions of the anode metal and is in contact with the upper surface of the GaN channel layer 5;
[0107] Regions of the GaN channel layer 5 not covered by the PN junction terminal structure and the cathode 12 are all covered with a passivation layer 14.
[0108] Among them, the material of the substrate layer 1 may be Al2O3 or SiC, etc., the thickness of the GaN buffer layer 2 is 300 to 600 nm. The thickness of the silicon-doped N-face AlGaN layer 3 is 15 to 30 nm. In this silicon-doped N-face AlGaN layer, the Si doping concentration may be within the range of 3×10 17 ~8×10 18 and the Al component may vary between 0.1 and 0.3. The anode metal may adopt a high work function metal stack such as Ni / Au or Pt / Au, the cathode 12 may adopt an ohmic metal stack such as Ti / Al / Ni / Au, and the passivation layer 14 may adopt SiN x, or other passivation materials. Additionally, in this lateral PN junction diode, the distance between the cathode 12 and the anode can be determined according to the breakdown voltage design of the device, and is usually set in the range of 10um to 60um. The anode size can be designed according to the current-carrying requirements of the lateral PN junction diode, and no specific limitation is provided here.
[0109] Corresponding to a lateral PN junction diode based on an N-face GaN / AlGaN heterojunction, an embodiment of the present invention also provides a method for manufacturing a lateral PN junction diode based on an N-face GaN / AlGaN heterojunction, including:
[0110] S101. Clean and acid-treat the substrate layer 1.
[0111] It should be noted that in the embodiment of the present invention, the substrate layer 1 can be first cleaned with an organic solvent, and then acid-treated with HCI / HF after cleaning.
[0112] S102. Sequentially grow a GaN buffer layer 2, a silicon-doped N-face AlGaN layer 3, an unintentionally doped AlGaN barrier layer 4, and a GaN channel layer 5 on the substrate layer 1 to obtain a basic epitaxial structure.
[0113] Figure 2 Exemplarily shows a schematic structural diagram of the basic epitaxial structure.
[0114] S103. Perform first-region growth or second-region growth on the basic epitaxial structure to form a lateral PN junction diode of an N-face GaN / AlGaN heterojunction.
[0115] The first region is a distribution based on the first PN junction terminal structure 101; the second region is a distribution based on the second PN junction terminal structure 102.
[0116] Optionally, when performing first-region growth on the basic epitaxial structure, S103 includes:
[0117] S201. Sequentially grow a first P-GAN layer 6 and a first P++GaN layer 8 on the basic epitaxial structure.
[0118] Figure 3 Exemplarily shows the corresponding device structure diagram after performing step S201.
[0119] S202. Clean the current device.
[0120] S203. Etch the first P-GAN layer 6 and the first P++GaN layer 8 to form a PN junction region.
[0121] Figure 4 Exemplarily shows the corresponding device structure diagram after performing step S203.
[0122] S204. Evaporate the cathode ohmic metal on the current device to form the cathode 12, and then anneal.
[0123] Figure 5 An exemplary device structure diagram corresponding to the execution of step S204 is shown.
[0124] In S204, the annealing temperature is 780 °C, the time is 30 s, and the annealing process is carried out in an N2 atmosphere.
[0125] S205. Perform isolation implantation on both sides of the silicon-doped N-face AlGaN layer 3, the unintentionally doped AlGaN barrier layer 4, the GaN channel layer 5 of the current device, and both side partial regions of the GaN buffer layer 2.
[0126] Figure 6 An exemplary device structure diagram corresponding to the execution of step S205 is shown.
[0127] S206. Deposit the passivation layer 14 on the upper surface of the current device, and open a hole in the cathode 12.
[0128] Figure 7 An exemplary device structure diagram corresponding to the execution of step S206 is shown.
[0129] S207. Open a hole in the anode and evaporate the first anode metal 15.
[0130] Among them, in the lateral PN junction diode of the first region, both the first P-GAN layer 6 and the first P++GaN layer 8 are made of GaN material.
[0131] Figure 8 An exemplary device structure diagram corresponding to the execution of step S207 is shown.
[0132] Optionally, when growing the second region on the basic epitaxial structure, S103 includes:
[0133] S301. Clean the basic epitaxial structure.
[0134] S302. Evaporate the cathode ohmic metal on the basic epitaxial structure to form the cathode 12, and then anneal.
[0135] Figure 9 An exemplary device structure diagram corresponding to the execution of step S302 is shown.
[0136] S303. Perform isolation implantation on both sides of the silicon-doped N-face AlGaN layer 3, the unintentionally doped AlGaN barrier layer 4, the GaN channel layer 5 of the current device, and both side partial regions of the GaN buffer layer 2.
[0137] Figure 10 Exemplarily shown is the corresponding device structure diagram after performing step S303.
[0138] S304. Deposit a passivation layer 14 on the upper surface of the current device, and open a hole for the cathode 12.
[0139] Figure 11 Exemplarily shown is the corresponding device structure diagram after performing step S304.
[0140] S305. Perform an opening process for the anode.
[0141] Figure 12 Exemplarily shown is the corresponding device structure diagram after performing step S305.
[0142] S306. Sequentially grow a second P-GAN layer 7 and a second P++GaN layer 9 upward at the anode opening position by sputtering.
[0143] Figure 13 Exemplarily shown is the corresponding device structure diagram after performing step S306.
[0144] S307. Evaporate a second anode metal 16 on the upper surface of the second P++GaN layer.
[0145] Wherein, in the lateral PN junction diode based on the second region, both the second P-GAN layer 7 and the second P++GaN layer 9 are made of NiO or Cu2O or BN materials.
[0146] Figure 14 Exemplarily shown is the corresponding device structure diagram after performing step S307.
[0147] It should be noted that the terms "first", "second", etc. are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present invention.
[0148] In the description of this specification, the description referring to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification.
[0149] Although the present invention has been described herein in connection with various embodiments, however, in the process of implementing the claimed invention, those skilled in the art can understand and implement other variations of the above-described disclosed embodiments by viewing the drawings and the disclosure. In the description of the present invention, the term "comprising" does not exclude other components or steps, the word "a" or "an" does not exclude a plurality of cases, and the meaning of "plurality" is two or more, unless otherwise specifically defined. In addition, certain measures are described in different embodiments, but this does not mean that these measures cannot be combined to produce good results.
[0150] The above content is a further detailed description of the present invention in connection with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can be made, and all should be regarded as belonging to the protection scope of the present invention.
Claims
1. A lateral PN junction diode based on an N-face GaN / AlGaN heterojunction, characterized in that, The lateral PN junction diode has a left-right symmetric structure, including: an N-face GaN / AlGaN heterojunction Schottky diode and a PN junction terminal structure; The N-face GaN / AlGaN heterojunction Schottky diode includes: an N-face GaN / AlGaN heterojunction Schottky diode basic structure and an anode metal; The PN junction terminal structure is disposed at the center position of the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure; the anode metal is disposed on the upper surface of the PN junction terminal structure; The PN junction terminal structure is used to separate the channel layer in the N-face GaN / AlGaN heterojunction Schottky diode basic structure from the anode metal.
2. The lateral PN junction diode based on an N-face GaN / AlGaN heterojunction according to claim 1, wherein The PN junction terminal structure adopts a first PN junction terminal structure or a second PN junction terminal structure; The first PN junction terminal structure includes: a first PN junction passivation layer, a first P-GaN layer, and a first P++GaN layer; the first P-GaN layer and the first P++GaN layer together form a first P-type layer; The second PN junction terminal structure includes: a second PN junction passivation layer, a second P-GaN layer, and a second P++GaN layer; the second P-GaN layer and the second P++GaN layer together form a second P-type layer; The anode metal includes: a first anode metal or a second anode metal; When the first P-type layer or the second P-type layer adopts a GaN material, the PN junction terminal structure adopts the first PN junction terminal structure; When the first P-type layer or the second P-type layer adopts a NiO or Cu2O or BN material, the PN junction terminal structure adopts the second PN junction terminal structure; The first anode metal is correspondingly disposed with the first PN junction terminal structure; the second anode metal is correspondingly disposed with the second PN junction terminal structure.
3. The lateral PN junction diode based on an N-face GaN / AlGaN heterojunction according to claim 2, wherein The Mg doping concentration of the first P-GAN layer or the second P-GAN layer is 3×10 17 ~1×10 19 ; The Mg doping concentration of the first P++ GaN layer or the second P++ GaN layer is 8×10 18 ~5×10 19 .
4. The lateral PN junction diode based on an N-face GaN / AlGaN heterojunction according to claim 2, wherein The first P-GaN layer is located at the center position of the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure; The first P++GaN layer is disposed on the upper surface of the first P-GaN layer and has the same width as the first P-GaN layer; The first PN junction passivation layer covers the upper surface regions near both sides of the first P++GaN layer, the side surface region of the first P-GaN layer, and the side surface region of the first P++GaN layer; The first anode metal covers the upper surface of the first P++GaN layer and contacts the first PN junction passivation layer covering the upper surface of the first P++GaN layer; Both ends of the first PN junction passivation layer away from the first anode metal are in contact with the passivation layer on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure.
5. The lateral PN junction diode based on an N-face GaN / AlGaN heterojunction according to claim 2, characterized in that, Both the second P-GaN layer and the second P++GaN layer are in a groove shape, and the second P++GaN layer is nested inside the second P-GaN layer; The groove bottom of the second P-GaN layer is disposed at the center of the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure; The second anode metal is filled inside the trenches of the second P++GaN layer and in part of the trench edge regions; The trench edge regions of the second P-GAN layer cover the upper surface of the second PN junction passivation layer; Both ends of the second PN junction passivation layer far from the second anode metal are in contact with the passivation layer on the upper surface of the N-face GaN / AlGaN heterojunction Schottky diode basic structure.
6. The lateral PN junction diode based on an N-face GaN / AlGaN heterojunction according to claim 2, characterized in that In the P-type layer, the thickness of the first P-GAN layer or the second P-GAN layer is 30 nm to 500 nm; The thickness of the first P++GaN layer or the second P++GaN layer is 10 nm to 30 nm.
7. The lateral PN junction diode based on an N-face GaN / AlGaN heterojunction according to claim 1, wherein The N-face GaN / AlGaN heterojunction Schottky diode basic structure includes, from bottom to top in sequence: a substrate layer, a GaN buffer layer, a silicon-doped N-face AlGaN layer, an unintentionally doped AlGaN barrier layer, and a GaN channel layer; The implanted isolation regions are vertically disposed on both side regions of the silicon-doped N-face AlGaN layer, the unintentionally doped AlGaN barrier layer, the GaN channel layer, and on both side partial regions of the GaN buffer layer; The cathode is disposed on both side regions of the anode metal and is in contact with the upper surface of the GaN channel layer; Regions of the GaN channel layer not covered by the PN junction terminal structure and the cathode are all covered with a passivation layer.
8. A preparation method of a lateral PN junction diode based on an N-face GaN / AlGaN heterojunction, characterized in that, Including: S101, cleaning and acid-treating the substrate layer; S102, sequentially growing upward on the substrate layer a GaN buffer layer, a silicon-doped N-face AlGaN layer, an unintentionally doped AlGaN barrier layer, and a GaN channel layer to obtain a basic epitaxial structure; S103, performing first-region growth or second-region growth on the basic epitaxial structure to form a lateral PN junction diode of an N-face GaN / AlGaN heterojunction; The first region is based on the distribution of the first PN junction terminal structure; the second region is based on the distribution of the second PN junction terminal structure.
9. The preparation method of the lateral PN junction diode based on the N-face GaN / AlGaN heterojunction according to claim 8, wherein, When performing first-region growth on the basic epitaxial structure, S103 includes: S201, sequentially growing upward on the basic epitaxial structure a first P-GAN layer and a first P++GaN layer; S202, cleaning the current device; S203, etching the first P-GAN layer and the first P++GaN layer to form a PN junction region; S204, evaporating a cathode ohmic metal on the current device to form a cathode, and annealing; S205, performing isolation implantation on both side regions of the silicon-doped N-face AlGaN layer, the unintentionally doped AlGaN barrier layer, the GaN channel layer, and on both side partial regions of the GaN buffer layer of the current device; S206, depositing a passivation layer on the upper surface of the current device, and performing cathode opening; S207, performing anode opening, and evaporating a first anode metal; Wherein, in the lateral PN junction diode based on the first region, both the first P-GAN layer and the first P++GaN layer are made of GaN material.
10. The preparation method of the lateral PN junction diode based on the N-face GaN / AlGaN heterojunction according to claim 8, characterized in that, When performing second-region growth on the basic epitaxial structure, S103 includes: S301, cleaning the basic epitaxial structure; S302. Evaporate cathode ohmic metal on the basic epitaxial structure to form a cathode, and then anneal. S303. Perform isolation implantation on both sides of the silicon-doped N-face AlGaN layer, the unintentionally doped AlGaN barrier layer, both side regions of the GaN channel layer, and both partial regions of the GaN buffer layer of the current device. S304. Deposit a passivation layer on the upper surface of the current device, and perform cathode opening. S305. Perform anode opening treatment. S306. Sequentially grow a second P-GAN layer and a second P++GaN layer upward at the anode opening position by sputtering. S307. Evaporate a second anode metal on the upper surface of the second P++GaN layer. Among them, in the lateral PN junction diode based on the second region, both the second P-GAN layer and the second P++GaN layer adopt NiO or Cu2O or BN materials.