Light emitting diode for improving transfer tearing and preparation method thereof
By providing a raised structure on the side wall of the epitaxial layer, the barrier passivation layer adheres to the substrate during laser peeling, solving the problem of the passivation layer tearing into debris, ensuring the clean arrangement and welding of the light emitting diodes.
Patent Information
- Application Number
- CN202510410698.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-02
- Publication Date
- 2025-07-18
AI Technical Summary
During peeling, the passivation layer will tear into debris, contaminating the LED and affecting its arrangement and welding.
A convex structure is provided on the side walls of the epitaxial layer, so that the passivation layer extends to the side walls and the surfaces of the convex structure, and a convex structure is used to prevent the passivation layer from adhering to the substrate.
It effectively avoids the passivation layer tearing into debris during laser peeling, prevents debris contamination, and facilitates the arrangement and welding of light emitting diodes in subsequent processes.
Smart Images
Figure CN120344059A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of optoelectronic manufacturing technologies, and particularly to a light-emitting diode for improving transfer tearing and a preparation method thereof. Background Art
[0002] A micro light-emitting diode (Micro LED) refers to an ultra-small light-emitting diode with a side length ranging from 10 micrometers to 100 micrometers. The Micro LED has a small volume, can be arranged more densely to greatly improve the resolution, and has a self-luminous characteristic. It is superior to liquid crystal displays in terms of high brightness, high contrast, high reactivity, and power saving.
[0003] In related technologies, a light-emitting diode generally includes a substrate, a bonding layer, an epitaxial layer, and a passivation layer. The bonding layer and the epitaxial layer are sequentially stacked on the surface of the substrate, and the passivation layer is located on the substrate and covers the epitaxial layer to prevent the epitaxial layer from leaking electricity. After the light-emitting diode is prepared, the bonding layer between the substrate and the epitaxial layer is usually irradiated with a laser to reduce the adhesion force between the epitaxial layer and the bonding layer, so that the epitaxial layer can be detached from the substrate.
[0004] However, during the peeling process of the epitaxial layer, the passivation layer attached to both the side wall of the epitaxial layer and the substrate will be torn into debris, resulting in the problem of debris contamination, and the generated debris will affect the arrangement and welding of the light-emitting diodes in subsequent processes. Summary of the Invention
[0005] Embodiments of the present disclosure provide a light-emitting diode for improving transfer tearing and a preparation method thereof, which can improve the problem of tearing of the passivation layer during the process of peeling the epitaxial layer. The technical solution is as follows:
[0006] On the one hand, embodiments of the present disclosure provide a light-emitting diode, which includes: a substrate, a bonding layer, an epitaxial layer, and a passivation layer. The bonding layer is located on the substrate, and the epitaxial layer is located on the surface of the bonding layer away from the substrate; the side wall of the epitaxial layer has a convex structure, and the passivation layer is located on the surface of the epitaxial layer away from the substrate, the side wall of the epitaxial layer, and the surface of the convex structure away from the substrate.
[0007] In one implementation manner of the present disclosure, the convex structure circumferentially surrounds the epitaxial layer; alternatively, the convex structure includes a plurality of bumps, and the plurality of bumps are circumferentially arranged at intervals on the side wall of the epitaxial layer.
[0008] In another implementation manner of the present disclosure, the convex structure is located on the side wall of the epitaxial layer close to the substrate.
[0009] In another implementation manner of the present disclosure, the positive projection of the bonding layer on the surface of the substrate is located within the outer contour of the positive projection of the convex structure on the surface of the substrate.
[0010] In another implementation manner of the present disclosure, the epitaxial layer includes a first semiconductor layer, a multi-quantum well layer, and a second semiconductor layer that are sequentially stacked on the bonding layer. The first semiconductor layer includes a first film layer and a second film layer that are sequentially stacked. The first film layer is undoped, and the second film layer is n-type doped or p-type doped.
[0011] In another implementation manner of the present disclosure, the convex structure is located on the sidewall of the first film layer.
[0012] In another implementation manner of the present disclosure, the ratio of the thickness of the first film layer to the thickness of the second film layer is 1:3 to 3:5.
[0013] In another implementation manner of the present disclosure, the ratio of the thickness of the convex structure to the thickness of the first film layer is 1:3 to 1.
[0014] In another implementation manner of the present disclosure, the width of the convex structure in the direction parallel to the substrate is 1.5 μm to 2.5 μm.
[0015] On the other hand, an embodiment of the present disclosure further provides a method for manufacturing a light-emitting diode. The manufacturing method includes: preparing an epitaxial layer, the sidewall of the epitaxial layer having a convex structure; bonding the epitaxial layer to a substrate to form a bonding layer between the epitaxial layer and the substrate; forming a passivation layer on the surface of the epitaxial layer away from the substrate, so that the passivation layer extends to the sidewall of the epitaxial layer and the surface of the convex structure away from the substrate.
[0016] The beneficial effects brought by the technical solution provided by the embodiment of the present disclosure at least include:
[0017] In the light-emitting diode provided by the embodiment of the present disclosure, a convex structure is provided on the sidewall of the epitaxial layer. When a passivation layer is formed on the epitaxial layer, after the passivation layer extends to the sidewall of the epitaxial layer, it will overlap on the surface of the convex structure. In this way, the convex structure is used to block the passivation layer, which can effectively prevent the passivation layer attached to the sidewall of the epitaxial layer from continuing to extend to the substrate. Since the passivation layer is no longer attached to the substrate, when the substrate is laser-stripped, the substrate falls off from the epitaxial layer and does not tear the passivation layer to generate debris, avoiding the problem of debris contamination and facilitating the arrangement and welding of the light-emitting diode in subsequent processes. Description of the Drawings
[0018] To more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following will briefly introduce the accompanying drawings required for the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.
[0019] Figure 1 It is a schematic structural diagram of a light-emitting diode provided by an embodiment of the present disclosure;
[0020] Figure 2 is Figure 1 A partial enlarged schematic diagram provided at A;
[0021] Figure 3 It is a flowchart of a method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure.
[0022] The descriptions of the marks in the figure are as follows:
[0023] 10. Substrate;
[0024] 20. Bonding layer;
[0025] 30. Epitaxial layer; 300. Protrusion structure;
[0026] 31. First semiconductor layer; 311. First film layer; 312. Second film layer;
[0027] 32. Multiple quantum well layer; 33. Second semiconductor layer;
[0028] 40. Passivation layer;
[0029] 50. Electrode;
[0030] 60. Solder bump. Detailed implementation manners
[0031] To make the objectives, technical solutions, and advantages of the present disclosure clearer, the following will further describe the embodiments of the present disclosure in detail with reference to the accompanying drawings.
[0032] Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meanings as understood by those of ordinary skill in the art to which this disclosure pertains. The terms "first", "second", "third" and similar terms used in the specification and claims of this patent application of the present disclosure do not denote any order, quantity or importance, but are merely used to distinguish different components. Similarly, terms such as "a" or "an" do not denote a quantity limitation, but mean that there is at least one. Terms such as "comprising" or "including" mean that the elements or items appearing before "comprising" or "including" cover the elements or items listed after "comprising" or "including" and their equivalents, and do not exclude other elements or items. Terms such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Terms such as "upper", "lower", "left", "right", "top", "bottom" are only used to indicate relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationships may also change accordingly.
[0033] Figure 1 is a schematic structural diagram of a light-emitting diode provided by an embodiment of the present disclosure. As Figure 1 shown, the light-emitting diode includes: a substrate 10, a bonding layer 20, an epitaxial layer 30, and a passivation layer 40. The bonding layer 20 is located on the substrate 10, and the epitaxial layer 30 is located on the surface of the bonding layer 20 away from the substrate 10.
[0034] As Figure 1 shown, the side wall of the epitaxial layer 30 has a convex structure 300, and the passivation layer 40 is located on the surface of the epitaxial layer 30 away from the substrate, the side wall of the epitaxial layer 30, and the surface of the convex structure 300 away from the substrate.
[0035] In the light-emitting diode provided by the embodiment of the present disclosure, when the convex structure 300 is provided on the side wall of the epitaxial layer 30 and the passivation layer 40 is formed on the epitaxial layer 30, after the passivation layer 40 extends to the side wall of the epitaxial layer 30, it will overlap on the surface of the convex structure 300. In this way, the convex structure 300 is used to block the passivation layer 40, which can effectively prevent the passivation layer 40 attached to the side wall of the epitaxial layer 30 from continuing to extend to the substrate. Since the passivation layer 40 is no longer attached to the substrate, when the substrate is laser-stripped, the substrate falls off from the epitaxial layer 30 and will not tear the passivation layer 40 to generate debris, avoiding the problem of debris contamination and facilitating the arrangement and welding of the light-emitting diodes in subsequent processes.
[0036] In one implementation manner of the present disclosure, as Figure 1As shown, the protruding structure 300 circumferentially surrounds the epitaxial layer 30. This can ensure that the protruding structure 300 completely surrounds the epitaxial layer 30, so that the passivation layer 40 extending downward from the sidewall of the epitaxial layer 30 to the protruding structure 300 can be intercepted by the protruding structure 300, thereby preventing the passivation layer 40 from extending onto the substrate.
[0037] Exemplarily, as Figure 1 shown, the cross-section of the protruding structure 300 in the direction perpendicular to the substrate is rectangular. The protruding structure 300 with a rectangular cross-section can effectively block and intercept the passivation layer 40 on the sidewall of the epitaxial layer 30.
[0038] Optionally, a concave hole can be provided on the surface of the protruding structure 300 away from the substrate. In this way, the passivation layer 40 intercepted by the protruding structure 300 will also extend into the concave hole, so that the passivation layer 40 can be more closely lapped on the protruding structure 300 to effectively prevent the passivation layer 40 from further extending onto the substrate.
[0039] Exemplarily, the depth of the concave hole is less than or equal to 1 / 2 of the thickness of the protruding structure 300. This can avoid the excessive depth of the concave hole from weakening the strength of the protruding structure 300, and can also avoid the too small depth of the concave hole, which fails to accommodate the passivation layer 40, so as to improve the connection reliability between the passivation layer 40 and the protruding structure 300.
[0040] Exemplarily, the thickness of the protruding structure 300 can be 0.5 μm to 1 μm. By setting the thickness of the protruding structure 300 within the above range, the problem of easy fracture due to the too short thickness of the protruding structure 300 can be avoided.
[0041] Optionally, the width of the protruding structure 300 in the direction parallel to the substrate is 1.5 μm to 2.5 μm.
[0042] By setting the width of the protruding structure 300 within the above range, the situation that the width of the protruding structure 300 is too small and fails to intercept the passivation layer 40 can be avoided; it can also avoid the situation that the width of the protruding structure 300 is too large, resulting in an excessive protruding length of the protruding structure 300 and causing fracture.
[0043] Exemplarily, the width of the protruding structure 300 in the direction parallel to the substrate is 2 μm.
[0044] In another implementation manner of the present disclosure, the protruding structure 300 includes a plurality of bumps, and the plurality of bumps are circumferentially arranged at intervals on the sidewall of the epitaxial layer 30.
[0045] By setting the protruding structure 300 as a plurality of bumps circumferentially surrounding the epitaxial layer 30, most of the passivation layer 40 extending downward from the sidewall of the epitaxial layer 30 to the protruding structure 300 can be effectively intercepted.
[0046] Meanwhile, the multiple bumps are arranged at intervals, and the light emitted from the epitaxial layer 30 sideward can also be reflected between adjacent bumps, so as to weaken the intensity of sideward light emission, reduce the sideward light emission amount of the light-emitting diode, and avoid the problem of optical crosstalk between light-emitting diodes.
[0047] Optionally, as Figure 1 shown, the protruding structure 300 is located on the side wall of the epitaxial layer 30 close to the substrate. By arranging the protruding structure 300 on the side of the epitaxial layer 30 closest to the substrate, the passivation layer 40 extends down from the side wall of the epitaxial layer 30, and can cover most of the side walls of the epitaxial layer 30, avoiding a large number of side walls of the epitaxial layer 30 being exposed, and preventing the problem of leakage.
[0048] Optionally, as Figure 1 shown, the orthographic projection of the bonding layer 20 on the surface of the substrate is located within the outer contour of the orthographic projection of the protruding structure 300 on the surface of the substrate.
[0049] In this way, the outer contour of the bonding layer 20 does not exceed the outer contour of the protruding structure 300. Even if there is a part of the passivation layer 40 that is not intercepted by the protruding structure 300 and continues to extend downward, the passivation layer 40 will not adhere to the side wall of the bonding layer 20. During laser lift-off, the passivation layer 40 will not tear with the bonding layer 20, thereby effectively preventing the passivation layer 40 from generating debris during the laser lift-off process.
[0050] Figure 2 is Figure 1 a partial enlarged schematic diagram of part A provided. As Figure 1 、 2 shown, the epitaxial layer 30 includes a first semiconductor layer 31, a multi-quantum well layer 32, and a second semiconductor layer 33 that are sequentially stacked on the bonding layer 20.
[0051] In the embodiment of the present disclosure, one of the first semiconductor layer 31 and the second semiconductor layer 33 is a p-type layer, and the other of the first semiconductor layer 31 and the second semiconductor layer 33 is an n-type layer.
[0052] As Figure 2 shown, the first semiconductor layer 31 includes a first film layer 311 and a second film layer 312 that are sequentially stacked.
[0053] Among them, the first film layer 311 is undoped, and the second film layer 312 is n-type doped or p-type doped. By making part of the film layer of the first semiconductor layer 31 undoped, the problem of leakage caused by the exposure of this part of the film layer is avoided.
[0054] Exemplarily, when the first semiconductor layer 31 is an n-type layer, the second film layer 312 is n-type doped.
[0055] Exemplarily, when the first semiconductor layer 31 is a p-type layer, the second film layer 312 is p-type doped.
[0056] Optionally, the ratio of the thickness of the first film layer 311 to the thickness of the second film layer 312 is 1:3 to 3:5.
[0057] In the embodiment of the present disclosure, the thickness of the first film layer 311 is 1 μm to 1.5 μm, and the thickness of the second film layer 312 is 2.5 μm to 3 μm.
[0058] By setting the ratio of the thickness of the undoped first film layer 311 to the second film layer 312 within the above range, it is possible to avoid the problem that the thickness of the first film layer 311 is too small to prevent leakage, and it is also possible to avoid the problem that the thickness of the first film layer 311 is too thick, reducing the thickness of the second film layer 312, resulting in too few carriers provided by the first semiconductor layer 31 and affecting the light-emitting effect of the epitaxial layer 30.
[0059] As an example, the first semiconductor layer 31 is a p-type layer, and the second semiconductor layer 33 is an n-type layer.
[0060] Optionally, the first semiconductor layer 31 is an n-type AlGaInP layer. The thickness of the n-type AlGaInP layer can be 0.5 μm to 3 μm.
[0061] Optionally, the multiple quantum well layer 32 includes alternately grown AlGaInP quantum well layers and AlGaInP quantum barrier layers. The Al content in the AlGaInP quantum well layers and AlGaInP quantum barrier layers is different. Among them, the multiple quantum well layer 32 can include 3 to 8 periods of alternately stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.
[0062] As an example, in the embodiment of the present disclosure, the multiple quantum well layer 32 includes 5 periods of alternately stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.
[0063] Optionally, the thickness of the multiple quantum well layer 32 can be 150 nm to 200 nm.
[0064] Optionally, the second semiconductor layer 33 is an indium-doped p-type AlInP layer. The thickness of the p-type AlInP layer can be 0.5 μm to 3 μm.
[0065] Optionally, the raised structure 300 is located on the sidewall of the first film layer 311. In the embodiment of the present disclosure, the first film layer 311 is an undoped film layer. By arranging the raised structure 300 at the position where the first film layer 311 is located, even if the passivation layer 40 does not cover the first film layer 311 and the first film layer 311 is exposed to the external environment, there will be no leakage problem due to the exposure of the first film layer 311, improving the reliability of the light-emitting diode.
[0066] Optionally, the ratio of the thickness of the convex structure 300 to the thickness of the first film layer 311 is from 1:3 to 1.
[0067] In the embodiment of the present disclosure, defining that the thickness of the convex structure 300 is greater than 1 / 3 of the thickness of the first film layer 311 can prevent the convex structure 300 from being too thin to intercept the passivation layer 40.
[0068] Optionally, the substrate 10 is a sapphire substrate. The sapphire substrate has a relatively high light transmittance, that is, the substrate 10 is a transparent substrate. Moreover, the sapphire material is relatively hard and has relatively stable chemical properties, enabling the light-emitting diode to have good light-emitting effects and stability.
[0069] Optionally, as Figure 1 shown, the light-emitting diode includes two electrodes 50. Among them, the surface of the second semiconductor layer 33 has a groove exposing the first semiconductor layer 31, one of the two electrodes 50 is located in the groove, and the other of the two electrodes 50 is located on the surface of the second semiconductor layer 33 away from the substrate.
[0070] As Figure 1 shown, the passivation layer 40 is located on the surface of the second semiconductor layer 33, in the groove, and on the surface of the first semiconductor layer 31, and the passivation layer 40 covers the two electrodes 50, and the passivation layer 40 has through holes respectively exposing the two electrodes 50.
[0071] Optionally, the electrode 50 may include at least one of an AuBe layer, an Au layer, a Ti layer, a Ni layer, and a Pt layer.
[0072] Exemplarily, the electrode 50 includes an Au layer, an AuGe layer, and a Pt layer stacked in sequence on the surface of the epitaxial layer 30.
[0073] Setting the last metal layer of the electrode 50 as the Pt layer, and allowing the Pt layer to cover the AuGe layer. In this way, during annealing, the upward diffusion of Ge elements can be effectively prevented through the Pt layer, so that the total amount of elements diffused into the semiconductor can be ensured, and a better ohmic contact effect of the electrode 50 can be achieved.
[0074] Optionally, the thickness of the Au layer is from 80 Å to 150 Å. The Au layer has good electrical conductivity and can improve the ohmic contact effect between the electrode 5030 and the epitaxial layer 30.
[0075] Exemplarily, the thickness of the Au layer is 100 Å.
[0076] Optionally, the thickness of the AuGe layer is from 800 Å to 1500 Å. The AuGe layer also has good electrical conductivity and can reduce the usage amount of Au metal, thereby reducing the preparation cost of the electrode 5030.
[0077] Exemplarily, the thickness of the AuGe layer is 1000 angstroms.
[0078] Optionally, the thickness of the Pt layer is from 450 angstroms to 600 angstroms. By setting the last metal layer of the electrode 5030 as the Pt layer and allowing the Pt layer to cover the AuGe layer, the AuGe layer can be ensured.
[0079] Exemplarily, the thickness of the Pt layer is 500 angstroms.
[0080] Optionally, the passivation layer 40 may include a DBR layer or a silicon oxide layer.
[0081] Among them, the electrode 50 located in the groove is the n electrode 50, and the electrode 50 located on the second semiconductor layer 33 is the p electrode 50.
[0082] Optionally, as Figure 1 shown, the light-emitting diode further includes: two solder pad blocks 60, the two solder pad blocks 60 are located on the passivation layer 40, and the two solder pad blocks 60 are respectively connected to the two electrodes 50 through two through holes.
[0083] Optionally, a protective layer is further provided on the surface of the passivation layer 40 and the improvement layer, and the protective layer extends from the surface of the passivation layer 40 and the surface of the improvement layer to the substrate 10, and the protective layer has through holes exposing the solder pad blocks 60 for facilitating electrical connection.
[0084] Exemplarily, in the embodiments of the present disclosure, the protective layer may be a silicon oxide layer, and the thickness of the silicon oxide layer is 2000 angstroms.
[0085] Figure 3 is a flowchart of a method for manufacturing a light-emitting diode provided by the embodiments of the present disclosure. This method is used to manufacture Figure 1 the light-emitting diode shown. As Figure 3 shown, this manufacturing method includes:
[0086] S11: Prepare an epitaxial layer.
[0087] Among them, the epitaxial layer is prepared on a substrate, and the sidewall of the epitaxial layer has a convex structure.
[0088] Exemplarily, the epitaxial layer may include a first semiconductor layer, a multi-quantum well layer, and a second semiconductor layer that are sequentially stacked on the substrate. The first semiconductor layer has a first conductivity type, the second semiconductor layer has a second conductivity type different from the first conductivity type, and the multi-quantum well layer is used to generate light through electron-hole recombination.
[0089] Among them, one of the first semiconductor layer and the second semiconductor layer is a p-type layer, and the other of the first semiconductor layer and the second semiconductor layer is an n-type layer.
[0090] As an example, the first semiconductor layer is a p-type layer and the second semiconductor layer is an n-type layer.
[0091] Fabricating the epitaxial layer in step S11 may include the following steps:
[0092] First step, provide a GaAs wafer.
[0093] Second step, grow a first semiconductor layer, a multiple quantum well layer, and a second semiconductor layer that are sequentially stacked on the GaAs wafer.
[0094] Exemplarily, the first semiconductor layer is an indium-doped p-type AlInP layer. The thickness of the p-type AlInP layer may be from 0.5 μm to 3 μm.
[0095] Exemplarily, the second semiconductor layer may be an n-type AlGaInP layer. The thickness of the n-type AlGaInP layer may be from 0.5 μm to 3 μm.
[0096] Optionally, the multiple quantum well layer includes alternately grown AlGaInP quantum well layers and AlGaInP quantum barrier layers. The Al content in the AlGaInP quantum well layers and the AlGaInP quantum barrier layers is different. Among them, the multiple quantum well layer may include alternately stacked 3 to 8 periods of AlGaInP quantum well layers and AlGaInP quantum barrier layers.
[0097] As an example, in the embodiments of the present disclosure, the multiple quantum well layer includes alternately stacked 5 periods of AlGaInP quantum well layers and AlGaInP quantum barrier layers.
[0098] Optionally, the thickness of the multiple quantum well layer may be from 150 nm to 200 nm.
[0099] In the second step, an etch stop layer may also be grown before growing the second semiconductor layer, and an AlInP carrier confinement layer may be grown before growing the multiple quantum well layer.
[0100] After growing the second semiconductor layer, a GaP window layer may also be grown, wherein the thickness of the GaP window layer is from 10000 angstroms to 20000 angstroms.
[0101] Exemplarily, the thickness of the GaP window layer is 3 μm.
[0102] Third step, bond the second semiconductor layer to an intermediate substrate, and set the bonding temperature to 300 °C.
[0103] Step S12: Remove the GaAs wafer, bond the first semiconductor layer to a sapphire substrate, form a bonding layer between the epitaxial layer and the sapphire substrate, and remove the intermediate substrate.
[0104] Due to the relatively high light transmittance of the sapphire substrate, the relatively hard sapphire material, and the relatively stable chemical properties, using a sapphire substrate can enable the light-emitting diode to have good light-emitting effects and stability.
[0105] Specifically, it may include: coating a silicon oxide liquid on the surface of the first semiconductor layer, placing the sapphire substrate on the surface of the first semiconductor layer, and heating the epitaxial wafer to heat-cure the silicon oxide liquid to form a bonding layer between the first semiconductor layer and the sapphire substrate.
[0106] Optionally, the heating temperature of the epitaxial wafer is 250 °C to 350 °C. Exemplarily, the heating temperature may be 300 °C.
[0107] Before step S13, the following steps may also be included:
[0108] First, form a groove exposing the first semiconductor layer on the surface of the second semiconductor layer away from the first semiconductor layer.
[0109] Then, form electrodes in the groove and on the surface of the second semiconductor layer.
[0110] Optionally, the electrode may include at least one of an AuBe layer, an Au layer, a Ti layer, a Ni layer, and a Pt layer.
[0111] Exemplarily, the electrode includes an AuBe layer, an Au layer, a Ti layer, and a Ni layer stacked in sequence.
[0112] Exemplarily, the thickness of the AuBe layer is 800 Å to 1200 Å. As an example, the thickness of the AuBe layer is 1000 Å.
[0113] Exemplarily, the thickness of the Au layer is 800 Å to 1200 Å. As an example, the thickness of the Au layer is 900 Å.
[0114] Exemplarily, the thickness of the Ti layer is 300 Å to 700 Å. As an example, the thickness of the Ti layer is 500 Å.
[0115] Exemplarily, the thickness of the Ni layer is 2000 Å to 4000 Å. As an example, the thickness of the Ni layer is 3000 Å.
[0116] Step S13: Form a passivation layer on the surface of the epitaxial layer away from the substrate, so that the passivation layer extends to the side wall of the epitaxial layer and the surface of the protruding structure away from the substrate.
[0117] Among them, the passivation layer is located on the surface of the second semiconductor layer and in the groove.
[0118] Optionally, the passivation layer may be a DBR layer or a silicon oxide layer.
[0119] Specifically, it may include:
[0120] First, etch through holes on the surface of the passivation layer to expose the electrodes.
[0121] Second, form solder bump blocks on the surface of the passivation layer, and connect the solder bump blocks to the electrodes through the through holes.
[0122] Optionally, the solder bump blocks can each include at least one of an Au layer, a Ti layer, a Ni layer, and a Pt layer.
[0123] Exemplarily, the solder bump block includes an Au layer, a Ti layer, and a Ni layer stacked in sequence.
[0124] Exemplarily, the thickness of the Au layer is 800 Å to 1000 Å. As an example, the thickness of the Au layer is 900 Å.
[0125] Exemplarily, the thickness of the Ti layer is 300 Å to 600 Å. As an example, the thickness of the Ti layer is 300 Å.
[0126] Exemplarily, the thickness of the Ni layer is 2000 Å to 3000 Å. As an example, the thickness of the Ni layer is 2000 Å.
[0127] Third, fabricate a protective layer on the surface of the passivation layer and the surface of the solder bump blocks.
[0128] Optionally, the protective layer includes a silicon oxide layer.
[0129] Among them, when preparing the protective layer, control the deposition temperature of the protective layer to be 150 °C to 250 °C, and the deposition rate of the protective layer to be 15 Å / s to 25 Å / s. The protective layer fabricated according to this process can release stress and improve the fabrication quality of the light-emitting diode.
[0130] Exemplarily, the deposition temperature of the protective layer is 200 °C, and the deposition rate of the protective layer is 20 Å / s.
[0131] Finally, the sapphire can be invisibly cut and cleaved, and the invisible cutting and cleaving can preferably reduce the loss of brightness. Then, test to obtain the light-emitting diode.
[0132] The above are only optional embodiments of the present disclosure and are not intended to limit the present disclosure. The data therein only represent illustrative examples. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.
Claims
1. A light-emitting diode, characterized in that, The light-emitting diode includes: a substrate (10), a bonding layer (20), an epitaxial layer (30), and a passivation layer (40). The bonding layer (20) is located on the substrate (10), and the epitaxial layer (30) is located on a surface of the bonding layer (20) away from the substrate (10). A side wall of the epitaxial layer (30) has a convex structure (300), and the passivation layer (40) is located on a surface of the epitaxial layer (30) away from the substrate (10), on side walls of the epitaxial layer (30), and on a surface of the convex structure (300) away from the substrate (10).
2. The light-emitting diode according to claim 1, wherein The convex structure (300) circumferentially surrounds the epitaxial layer (30); or the convex structure (300) includes a plurality of bumps, and the plurality of bumps are circumferentially and spacedly arranged on the side wall of the epitaxial layer (30).
3. The light-emitting diode according to claim 1, wherein, The convex structure (300) is located on a side of the side wall of the epitaxial layer (30) close to the substrate (10).
4. The light-emitting diode according to claim 3, wherein, A positive projection of the bonding layer (20) on the surface of the substrate (10) is located within an outer contour of a positive projection of the convex structure (300) on the surface of the substrate (10).
5. The light-emitting diode according to any one of claims 1 to 4, characterized in that, The epitaxial layer (30) includes a first semiconductor layer (31), a multi-quantum well layer (32), and a second semiconductor layer (33) that are sequentially stacked on the bonding layer (20). The first semiconductor layer (31) includes a first film layer (311) and a second film layer (312) that are sequentially stacked. The first film layer (311) is undoped, and the second film layer (312) is n-type doped or p-type doped.
6. The light-emitting diode according to claim 5, characterized in that, The convex structure (300) is located on the side wall of the first film layer (311).
7. The light-emitting diode according to claim 5, wherein A ratio of a thickness of the first film layer (311) to a thickness of the second film layer (312) is from 1:3 to 3:
5.
8. The light emitting diode according to claim 5, wherein, A ratio of a thickness of the convex structure (300) to a thickness of the first film layer (311) is from 1:3 to 1.
9. The light emitting diode according to any one of claims 1 to 4, characterized in that, A width of the convex structure (300) in a direction parallel to the substrate (10) is from 1.5 μm to 2.5 μm.
10. A method for preparing a light-emitting diode, characterized in that, The preparation method includes: preparing an epitaxial layer, where a side wall of the epitaxial layer has a convex structure; bonding the epitaxial layer to a substrate to form a bonding layer between the epitaxial layer and the substrate; forming a passivation layer on a surface of the epitaxial layer away from the substrate, and enabling the passivation layer to extend to side walls of the epitaxial layer and a surface of the convex structure away from the substrate.