Energy storage power supply parallel operation coding system
By introducing control and switching switch units into the energy storage power grid system, the problem of determining the direction of the expansion interface signal is solved, and the random mixing and online grid grid of the power grid is realized, which improves the user experience.
Patent Information
- Application Number
- CN202510356165.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-25
- Publication Date
- 2025-07-22
AI Technical Summary
In traditional energy storage power supply system, the signal direction of the expansion interface is determined and cannot be mixed and inserted at will, resulting in the system not working normally.
The design of the control switch unit and the switching switch unit is adopted, so that the extended interface of the power-up package can be mixed and inserted at will, independent control of the power-up package is realized through the control switch unit, and the transmission of the encoded enable signal is realized through the switching switch unit.
It realizes random mixing and inserting of the power-up package extension interface, improves the user experience, and supports online automatic paralleling and encoding.
Smart Images
Figure CN120353323A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of energy storage power supplies, and particularly to a parallel connection coding system for energy storage power supplies. Background Art
[0002] In a traditional parallel connection system where a host 10 is connected to multiple power packs 20 (refer to Figure 1 shown), each power pack generally has two expansion interfaces, namely a first expansion interface 31 and a second expansion interface 32. The first expansion interface 31 is connected to the previous power pack or the host, and the second expansion interface 32 is connected to the next power pack. The first expansion interface 31 and the second expansion interface 32 need to distinguish the signal in and out directions, that is, their connections and functions are both determined and cannot be randomly inserted. When the first expansion interface 31 and the second expansion interface 32 are correctly connected and coded, the parallel connection system will work normally. When the signals are connected in reverse, the parallel connection system cannot work normally. Summary of the Invention
[0003] The purpose of this application is to provide a parallel connection coding system for energy storage power supplies, which can realize the random insertion of the expansion interfaces of the power packs without distinguishing the signal directions of the expansion interfaces, and is beneficial to improving the user experience.
[0004] To achieve the above purpose, this application provides a parallel connection coding system for energy storage power supplies, including a host and at least two power packs connected in sequence. The host includes a host interface, and each power pack includes a first expansion interface and a second expansion interface. The host interface, the first expansion interface, and the second expansion interface all include a first sub-interface and a second sub-interface; The sub-interfaces of the host interface are correspondingly connected to the sub-interfaces of the first expansion interface of the first power pack, and the sub-interfaces of the second expansion interface of the previous power pack are correspondingly connected to the sub-interfaces of the first expansion interface of the next power pack; Each first sub-interface of each power pack is respectively connected to the voltage source of the power pack through its corresponding control switch unit; the two second sub-interfaces of each power pack are connected through a switching switch unit, and the second sub-interface is used to transmit the coding enable signal from the host; after the power pack is activated, its control switch unit is in the default conduction state, and its switching switch unit is in the default off state; The parallel connection and coding of the parallel connection coding system for energy storage power supplies are carried out through the following steps: S1, after the first power pack detects the coding enable signal from the host through the second sub-interface of its first expansion interface, it performs coding; S2. After the first power-on packet encoding is completed, control the control switch unit connected to the first sub-interface of its second expansion interface to disconnect, and detect whether there is an external voltage signal input through the first sub-interface of its second expansion interface. If no external voltage signal is detected, the encoding ends. If an external voltage signal is detected, proceed to step S3; S3. The first power-on packet controls its switching switch unit to conduct, so that the encoding enable signal is transmitted to the second sub-interface of the first expansion interface of the second power-on packet through the second sub-interface of its second expansion interface; S4. After detecting the encoding enable signal through the second sub-interface of its first expansion interface, the second power-on packet performs encoding; Loop according to steps S2 to S4 until the encoding and parallel operation of each power-on packet are completed.
[0005] Optionally, the host is activated by detecting a high-level signal from the first sub-interface of the first expansion interface of the first power-on packet.
[0006] Optionally, the host interface of the host and the first and second expansion interfaces of each power-on packet include a ground interface. The ground interface of the host interface is connected to the ground interface of the first expansion interface of the first power-on packet. The ground interface of the second expansion interface of the previous power-on packet is connected to the ground interface of the first expansion interface of the next power-on packet. The ground interfaces of the first and second expansion interfaces of each power-on packet are connected to each other.
[0007] Optionally, the host interface of the host and the first and second expansion interfaces of each power-on packet include a CAN bus interface. The CAN bus interface of the host interface is connected to the CAN bus interface of the first expansion interface of the first power-on packet. The CAN bus interface of the second expansion interface of the previous power-on packet is connected to the CAN bus interface of the first expansion interface of the next power-on packet. The CAN bus interfaces of the first and second expansion interfaces of each power-on packet are connected to each other; the host sends a CAN instruction including an encoding command through its CAN bus interface.
[0008] Optionally, the CAN bus interface includes a CANH interface and a CANL interface.
[0009] Optionally, the power-on packet includes an MCU, two first control circuits and a second control circuit respectively connected to the MCU; The two first control circuits are respectively connected to the two first sub-interfaces of the power supply pack, the first sub-interfaces are connected to the first signal detection end of the MCU, the first control circuit includes a control switch unit, when the power supply pack is activated, the control switch unit is turned on based on the first enable signal sent by the MCU so that the voltage signal of the voltage source of the power supply pack is output to the corresponding first sub-interface; The second control circuit is connected between the two second sub-interfaces of the power supply pack, the two second sub-interfaces are respectively connected to the second signal detection end of the MCU, the second control circuit includes a switching switch unit, and the switching switch unit is turned on based on the second enable signal sent by the MCU.
[0010] Optionally, the control switch unit includes a first triode and a first MOS transistor, the first enable signal is sent to the base of the first triode, the emitter of the first triode is grounded, the collector of the first triode is connected to the control end of the first MOS transistor, the input end of the first MOS transistor is connected to the voltage source of the power supply pack, and the output end of the first MOS transistor is connected to the first sub-interface of the power supply pack.
[0011] Optionally, the switching switch unit includes a second triode, a second MOS transistor and a third MOS transistor, the second enable signal is sent to the base of the second triode, the emitter of the second triode is grounded, the collector of the second triode is connected to the control end of the second MOS transistor and the control end of the third MOS transistor, the output end of the second MOS transistor is connected to one of the second sub-interfaces, the output end of the third MOS transistor is connected to the other second sub-interface, and the input ends of the second MOS transistor and the third MOS transistor are connected.
[0012] In the embodiment of the present application, the host interface of the host and the first expansion interface and the second expansion interface of each power supply pack all include the same first sub-interface and second sub-interface. The sub-interfaces of the host interface are correspondingly connected to the sub-interfaces of the first expansion interface of the first power supply pack. The sub-interfaces of the second expansion interface of the previous power supply pack are correspondingly connected to the sub-interfaces of the first expansion interface of the next power supply pack. Moreover, the first sub-interface of each power supply pack is respectively connected to the voltage source of the power supply pack through its corresponding control switch unit, which can realize the independent control of the two first sub-interfaces of the power supply pack, and then facilitate the realization of the random mixed insertion of the expansion interfaces of the power supply pack without distinguishing the signal in and out directions, which is beneficial to improving the user experience. In addition, the embodiment of the present application can realize the online automatic parallel connection and coding of the power supply pack. Description of the Drawings
[0013] Figure 1 It is a schematic diagram of a parallel connection and coding system of an energy storage power supply in the prior art.
[0014] Figure 2 This is a schematic diagram of the parallel encoding system for energy storage power supplies in the embodiments of the present application, where the expansion interfaces can be randomly inserted and mixed with each other.
[0015] Figure 3 This is an internal signal connection diagram of the parallel encoding system for energy storage power supplies in the embodiments of the present application.
[0016] Figure 4 This is a schematic diagram of the first control circuit in the embodiments of the present application.
[0017] Figure 5 This is a schematic diagram of the second control circuit in the embodiments of the present application. Detailed implementation manners
[0018] In order to elaborate in detail the technical content, structural features, and achieved effects of the present application, the following will be described in detail in combination with the implementation manners and with reference to the accompanying drawings.
[0019] In order to make the above objects, features, and advantages of the present application more obvious and understandable, the following will give a detailed description of the specific implementation manners of the present application with reference to the accompanying drawings. Many specific details are set forth in the following description in order to fully understand the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.
[0020] Please refer to Figure 2 and Figure 3 In the embodiments of the present application, a parallel encoding system for energy storage power supplies is disclosed. The parallel encoding system for energy storage power supplies includes a host 10 and at least two power packs 20 connected in sequence. The connection in sequence here means that the host 10 is connected to a power pack 20 through an interface, and this power pack 20 is defined as the first power pack 20. The first power pack 20 is connected to a power pack 20 through an interface, and this power pack 20 is defined as the second power pack 20, and so on, to form at least two power packs 20 connected in sequence.
[0021] The host 10 includes a host interface 11. Each power pack 20 includes a first expansion interface 21 and a second expansion interface 22. The host interface 11, the first expansion interface 21, and the second expansion interface 22 all include a first sub-interface DO and a second sub-interface DI.
[0022] Each sub-interface of the host interface 11 is correspondingly connected to each sub-interface of the first expansion interface 21 of the first power-on package 20, and each sub-interface of the second expansion interface 22 of the previous power-on package 20 is correspondingly connected to each sub-interface of the first expansion interface 21 of the next power-on package 20. That is, the first sub-interface DO of the host interface 11 is connected to the first sub-interface DO of the first expansion interface 21 of the first power-on package 20, the second sub-interface DI of the host interface 11 is connected to the second sub-interface DI of the first expansion interface 21 of the first power-on package 20, the first sub-interface DO of the second expansion interface 22 of the previous power-on package 20 is connected to the first sub-interface DO of the first expansion interface 21 of the next power-on package 20, and the second sub-interface DI of the second expansion interface 22 of the previous power-on package 20 is connected to the second sub-interface DI of the first expansion interface 21 of the next power-on package 20.
[0023] The first sub-interface DO of each power-on package 20 is respectively connected to the voltage source of the power-on package 20 through its corresponding control switch unit SW1 / SW2. That is, the first sub-interface DO of the first expansion interface 21 of the power-on package 20 is connected to the voltage source of the power-on package 20 through its corresponding control switch unit SW2, and the first sub-interface DO of the second expansion interface 22 of the power-on package 20 is also connected to the voltage source of the power-on package 20 through its corresponding control switch unit SW1. The control switch units SW1 / SW2 of the two first sub-interfaces DO can be independently controlled.
[0024] The second sub-interface DI is used to transmit the encoding enable signal from the host 10. Specifically, the encoding enable signal is a 12V voltage signal and is output through the second sub-interface DI of the host 10.
[0025] The two second sub-interfaces DI of each power-on package 20 are connected through a switching switch unit SW3. That is, the second sub-interface DI of the first expansion interface 21 of the power-on package 20 and the second sub-interface DI of the second expansion interface 22 of the power-on package 20 are connected through the switching switch unit SW3 to achieve controllable on-off connection.
[0026] After the power supply pack 20 is activated, its control switch units SW1 / SW2 are in the default conduction state (that is, the control switch units SW1 / SW2 connected to the two first sub-interfaces DO are both in the default conduction state), and its switching switch unit SW3 is in the default off state. Since the control switch units SW1 / SW2 are both in the default conduction state, voltage signals are output from the two first sub-interfaces DO of the power supply pack 20 (the first sub-interface DO of the first expansion interface 21 and the first sub-interface DO of the second expansion interface 22), specifically 12V voltage signals. Since the switching switch unit SW3 is in the default off state, the connection between the two second sub-interfaces DI of the power supply pack 20 is in an off state, and the transmission of the coding enable signal cannot be carried out. In this way, after the first power supply pack 20 receives the coding enable signal from the host 10 through the second sub-interface DI of its first expansion interface 21, the first power supply pack 20 cannot transmit the coding enable signal to the subsequent power supply packs 20.
[0027] The energy storage power supply parallel coding system performs coding and parallel connection through the following steps: S1. After the first power supply pack 20 detects the coding enable signal from the host 10 through the second sub-interface DI of its first expansion interface 21, it performs coding.
[0028] Since, in the activated state of each power supply pack 20, the switching switch unit SW3 between the two second sub-interfaces DI is in the default off state, after the first power supply pack 20 detects the coding enable signal from the host 10 through the second sub-interface DI of its first expansion interface 21, the coding enable signal cannot be transmitted to the subsequent power supply packs 20. That is, only the first power supply pack 20 can detect the coding enable signal. The first power supply pack 20, as the first power supply pack 20 to detect the coding enable signal, can be normally coded as, for example, the 1# power supply pack 20. In addition, when the first power supply pack 20 detects the coding enable signal from the host 10 through the second sub-interface DI of its first expansion interface 21, it also means that the first power supply pack 20 recognizes that its first expansion interface 21 has established a communication connection with the host 10.
[0029] Specifically, the host 10 outputs a 12V voltage signal as the coding enable signal through the second sub-interface DI of the host interface 11.
[0030] S2. After the first power supply pack 20 completes coding, it controls the control switch unit SW1 connected to the first sub-interface DO of its second expansion interface 22 to disconnect, and detects whether there is an external voltage signal input through the first sub-interface DO of its second expansion interface 22. If no external voltage signal input is detected, the coding ends. If an external voltage signal input is detected, it enters step S3.
[0031] After the coding of the first power-on package 20 is completed, it is possible to detect whether there are other activated power-on packages 20 connected later to end the parallel operation and coding operations or continue with the parallel operation and coding operations of the subsequent power-on packages 20.
[0032] After the coding of the first power-on package 20 is completed, the control switch unit SW1 connected to the first sub-interface DO of its second expansion interface 22 is controlled to disconnect, so that the first sub-interface DO cannot receive the voltage signal inside the first power-on package 20. Then, it is possible to detect whether there is an external voltage signal (specifically a 12V voltage signal) input through the first sub-interface DO. Since when each power-on package 20 is activated, the control switch units SW1 / SW2 connected to the first sub-interface DO are default-conducted, and each first sub-interface DO defaults to output a voltage signal (specifically a 12V voltage signal) outward. If a second power-on package 20 is connected behind the first power-on package 20, at this time, the first power-on package 20 can detect the voltage signal (specifically a 12V voltage signal) output by the first sub-interface DO of the first expansion interface 21 of the second power-on package 20 through the first sub-interface DO of the second expansion interface 22 that is disconnected from the internal voltage source. If no external voltage signal is detected, it means that no other power-on packages 20 are connected behind the first power-on package 20, and the parallel operation and coding operations end.
[0033] S3, the first power-on package 20 controls the switching switch unit SW3 to conduct, so that the coding enable signal is transmitted to the second sub-interface DI of the first expansion interface 21 of the second power-on package 20 through the second sub-interface DI of its second expansion interface 22.
[0034] When the coding of the first power-on package 20 is completed and it is determined that there is another power-on package 20 (the second power-on package 20) connected behind the first power-on package 20, the coding enable signal can be transmitted backward to the second power-on package 20 for the parallel operation and coding of the second power-on package 20. To achieve the backward transmission of the coding enable signal, the first power-on package 20 controls the switching switch unit SW3 between its two second sub-interfaces DI to conduct. At this time, the coding enable signal from the host 10 is transmitted to the second sub-interface DI of the first expansion interface 21 of the second power-on package 20 through the second sub-interface DI of the first expansion interface 21 of the first power-on package 20, the switching switch unit SW3, and the second sub-interface DI of the second expansion interface 22.
[0035] S4, after the second power-on package 20 detects the coding enable signal through the second sub-interface DI of its first expansion interface 21, it performs coding.
[0036] When each power-on package 20 is in the active state, the switching switch unit SW3 between the two second sub-interfaces DI is in the default off state. After the second power-on package 20 detects the encoding enable signal from the host 10 through the second sub-interface DI of its first expansion interface 21, the encoding enable signal cannot be transmitted to the subsequent power-on packages 20. The second power-on package 20, as the second power-on package 20 that detects the encoding enable signal, can be normally encoded as, for example, the 2# power-on package 20. In addition, when the second power-on package 20 detects the encoding enable signal from the host 10 through the second sub-interface DI of its first expansion interface 21, it also means that the second power-on package 20 recognizes that its first expansion interface 21 has established a communication connection with the first power-on package 20.
[0037] Loop according to steps S2 to S4 until the parallel operation and encoding of each power-on package 20 are completed.
[0038] In the embodiment of the present application, the host interface 11 of the host 10, the first expansion interface 21 and the second expansion interface 22 of each power-on package 20 all include the same first sub-interface DO and second sub-interface DI. The sub-interfaces of the host interface 11 are correspondingly connected to the sub-interfaces of the first expansion interface 21 of the first power-on package 20. The sub-interfaces of the second expansion interface 22 of the previous power-on package 20 are correspondingly connected to the sub-interfaces of the first expansion interface 21 of the subsequent power-on package 20. And each first sub-interface DO of each power-on package 20 is respectively connected to the voltage source of the power-on package 20 through its corresponding control switch unit SW1 / SW2, which can realize the independent control of the two first sub-interfaces DO of the power-on package 20. Furthermore, it can realize the random mixed insertion of the expansion interfaces of the power-on package 20 without distinguishing the signal in and out directions (that is, realize the random definition of the first expansion interface 21 and the second expansion interface 22. Any expansion interface connected to the host 10 or the previous power-on package 20 is the first expansion interface 21, and the other expansion interface is the second expansion interface 22), which is beneficial to improving the user experience. In addition, the embodiment of the present application can realize the online automatic parallel operation and encoding of the power-on package 20.
[0039] In some embodiments, the host 10 is activated by detecting a high-level signal (specifically a 12V voltage signal) from the first sub-interface DO of the first expansion interface 21 of the first power-on package 20.
[0040] In the embodiment of the present application, before the power-on package 20 that needs to be paralleled and encoded is activated, the host 10 can be in the sleep state. After the first power-on package 20 is activated, the high-level signal output by the first sub-interface DO of its first expansion interface 21 will activate and wake up the host 10. After the host 10 is activated, it can normally output an encoding enable signal (specifically a 12V voltage signal) through its second sub-interface DI. After both the host 10 and the power-on package 20 are activated, the parallel operation and encoding process can be executed.
[0041] In some embodiments, the host interface 11 of the host 10 and the first expansion interface 21 and the second expansion interface 22 of each power-on package 20 include CAN bus interfaces. The CAN bus interface of the host interface 11 is connected to the CAN bus interface of the first expansion interface 21 of the first power-on package 20. The CAN bus interface of the second expansion interface 22 of the previous power-on package 20 is connected to the CAN bus interface of the first expansion interface 21 of the next power-on package 20. The CAN bus interfaces of the first expansion interface 21 and the second expansion interface 22 of each power-on package 20 are connected to each other. The host 10 sends CAN instructions including encoded commands through its CAN bus interface.
[0042] After the power-on package 20 and the host 10 are activated, the host 10 sends CAN instructions through its CAN bus interface, and the power-on package 20 enters the encoding process according to the received CAN instructions.
[0043] Specifically, the CAN bus interface includes a CANH interface and a CANL interface.
[0044] In some embodiments, the host interface 11 of the host 10 and the first expansion interface 21 and the second expansion interface 22 of each power-on package 20 include a ground interface GND. The ground interface GND of the host interface 11 is connected to the ground interface GND of the first expansion interface 21 of the first power-on package 20. The ground interface GND of the second expansion interface 22 of the previous power-on package 20 is connected to the ground interface GND of the first expansion interface 21 of the next power-on package 20. The ground interfaces GND of the first expansion interface 21 and the second expansion interface 22 of each power-on package 20 are connected to each other.
[0045] Please refer to Figure 4 and Figure 5 , in some embodiments, the power-on package 20 includes an MCU, and two first control circuits and a second control circuit respectively connected to the MCU.
[0046] Two first control circuits are respectively connected to two first sub-interfaces DO of the power supply pack 20. The first sub-interface DO is connected to the first signal detection end of the MCU. The first control circuit includes control switch units SW1 / SW2. When the power supply pack 20 is activated, the control switch units SW1 / SW2 are turned on based on the first enable signal sent by the MCU so that the voltage signal of the voltage source of the power supply pack 20 is output to the corresponding first sub-interface DO. When it is necessary to disconnect the control switch units SW1 / SW2, signal switching based on the MCU can be used to disconnect the control switch units SW1 / SW2. Specifically, when it is necessary to detect whether other power supply packs 20 are connected behind the current power supply pack 20, the control switch unit SW1 connected to the first sub-interface DO of the second expansion interface 22 can be disconnected by the MCU, so that the internal voltage signal of the current power supply pack 20 cannot be output through the first sub-interface DO of the second expansion interface 22. Then, the first signal detection end of the MCU can detect whether there is an external voltage signal input at the first sub-interface DO of the second expansion interface 22 of the current power supply pack 20.
[0047] Specifically, the two first sub-interfaces DO of the power supply pack 20 are connected to different first signal detection ends.
[0048] The second control circuit is connected between two second sub-interfaces DI of the power supply pack 20. The two second sub-interfaces DI are respectively connected to the second signal detection end of the MCU. The second control circuit includes a switching switch unit SW3. The switching switch unit SW3 is turned on based on the second enable signal sent by the MCU. When it is necessary to turn on the switching switch unit SW3, the MCU can be used to output the second enable signal to control the switching switch unit SW3 to turn on. Whether the second sub-interface DI inputs an encoding enable signal (12V voltage signal) can be detected through the second signal detection end of the MCU. Since both of the two second sub-interfaces DI are connected to the second signal detection end of the MCU, it is convenient to realize random mixed insertion of the expansion interfaces of the power supply pack 20.
[0049] It should be noted that the two second sub-interfaces DI of the power supply pack 20 can be connected to the same second signal detection end or different second signal detection ends.
[0050] Specifically, the control switch unit SW1 / SW2 includes a first triode Q1 and a first MOS transistor Q2. The first enable signal is delivered to the base of the first triode Q1. The emitter of the first triode Q1 is grounded. The collector of the first triode Q1 is connected to the control terminal of the first MOS transistor Q2. The input terminal of the first MOS transistor Q2 is connected to the voltage source of the power supply package 20. The output terminal of the first MOS transistor Q2 is connected to the first sub-interface DO of the power supply package 20. When the MCU outputs the first enable signal, the first triode Q1 conducts, and the conduction of the first triode Q1 controls the first MOS transistor Q2 to conduct, so that the voltage signal of the internal voltage source of the power supply package 20 can be output to the corresponding first sub-interface DO. On the contrary, the MCU can control the first MOS transistor Q2 to turn off through the first triode Q1, so that the voltage signal of the internal voltage source of the power supply package 20 cannot be output to the corresponding first sub-interface DO.
[0051] More specifically, a resistor R20 is connected between the base of the first triode Q1 and the corresponding enable output terminal of the MCU. The base of the first triode Q1 is connected to the first end of a capacitor C9 and the first end of a resistor R22. The second end of the capacitor C9 and the second end of the resistor R22 are grounded. A resistor R18 is connected between the collector of the first triode Q1 and the control terminal of the first MOS transistor Q2. A resistor R3 and a capacitor C1 are connected in parallel between the control terminal and the input terminal of the first MOS transistor Q2. The first sub-interface DO is connected to the first end of a resistor R5. The second end of the resistor R5 is connected to the first end of a resistor R15. The second end of the resistor R15 is grounded. The first end of a resistor R11 is connected to the first end of the resistor R15. The second end of the resistor R11 is connected to the first signal detection terminal of the MCU and grounded through a capacitor C7.
[0052] Specifically, the switching switch unit SW3 includes a second triode Q3, a second MOS transistor Q4, and a third MOS transistor Q5. The second enable signal is delivered to the base of the second triode Q3. The emitter of the second triode Q3 is grounded. The collector of the second triode Q3 is connected to the control terminal of the second MOS transistor Q4 and the control terminal of the third MOS transistor Q5. The output terminal of the second MOS transistor Q4 is connected to a second sub-interface DI. The output terminal of the third MOS transistor Q5 is connected to another second sub-interface DI. The input terminals of the second MOS transistor Q4 and the third MOS transistor Q5 are connected. When the MCU outputs the second enable signal to the base of the second triode Q3, the second triode Q3 conducts, and the conduction of the second triode Q3 causes the second MOS transistor Q4 and the third MOS transistor Q5 to conduct, so that the encoding enable signal can be transmitted from one second sub-interface DI of the power supply package 20 to another second sub-interface DI.
[0053] More specifically, a resistor R21 is connected between the base of the second triode Q3 and the corresponding enable output terminal of the MCU. The base of the second triode Q3 is connected to the first end of a capacitor C10 and the first end of a resistor R24. The second end of the capacitor C10 and the second end of the resistor R24 are grounded. A resistor R17 is connected between the collector of the second triode Q3 and the control terminals of the second MOS transistor Q4 and the third MOS transistor Q5. A resistor R7 and a capacitor C3 are connected in parallel between the control terminals of the second MOS transistor Q4 and the third MOS transistor Q5 and the input terminals of the second MOS transistor Q4 and the third MOS transistor Q5. A second sub-interface DI is connected to the first end of a resistor R1. The second end of the resistor R1 is connected to the first end of a resistor R12. The second end of the resistor R12 is grounded. The first end of a resistor R9 is connected to the first end of the resistor R12. The second end of the resistor R9 is connected to the second signal detection terminal of the MCU and is grounded through a capacitor C6. Another second sub-interface DI is connected to the first end of a resistor R2. The second end of the resistor R2 is connected to the first end of a resistor R13. The second end of the resistor R13 is grounded. The first end of a resistor R10 is connected to the first end of the resistor R13. The second end of the resistor R10 is connected to the second signal detection terminal of the MCU and is grounded through a capacitor C4.
[0054] The above-disclosed are only the preferred examples of the present application, which are used to facilitate the understanding of those skilled in the art and to implement accordingly. Of course, the scope of the rights of the present application cannot be limited thereby. Therefore, equivalent changes made according to the scope of the patent application of the present application still fall within the scope covered by the present application.
Claims
1. A parallel encoding system for an energy storage power supply, characterized in that, It includes a host and at least two power-on packages connected in sequence. The host includes a host interface, and each power-on package includes a first expansion interface and a second expansion interface. The host interface, the first expansion interface, and the second expansion interface all include a first sub-interface and a second sub-interface; The sub-interfaces of the host interface are correspondingly connected to the sub-interfaces of the first expansion interface of the first power-on package, and the sub-interfaces of the second expansion interface of the previous power-on package are correspondingly connected to the sub-interfaces of the first expansion interface of the next power-on package; The first sub-interface of each power-on package is respectively connected to the voltage source of the power-on package through its corresponding control switch unit; The two second sub-interfaces of each power-on package are connected through a switching switch unit, and the second sub-interface is used to transmit the coding enable signal from the host; After the power-on package is activated, its control switch unit is in the default conduction state, and its switching switch unit is in the default off state; The parallel connection and coding of the energy storage power supply parallel connection coding system are carried out through the following steps: S1, After the first power-on package detects the coding enable signal from the host through the second sub-interface of its first expansion interface, it performs coding; S2, After the first power-on package completes coding, it controls the control switch unit connected to the first sub-interface of its second expansion interface to disconnect, and detects whether there is an external voltage signal input through the first sub-interface of its second expansion interface. If no external voltage signal is detected, the coding ends. If an external voltage signal is detected, it enters step S3; S3, The first power-on package controls its switching switch unit to conduct, so that the coding enable signal is transmitted to the second sub-interface of the first expansion interface of the second power-on package through the second sub-interface of its second expansion interface; S4, After the second power-on package detects the coding enable signal through the second sub-interface of its first expansion interface, it performs coding; Loop according to steps S2 to S4 until the coding and parallel connection of each power-on package are completed.
2. The parallel coding system for energy storage power supplies according to claim 1, wherein, The host is activated by detecting a high-level signal from the first sub-interface of the first expansion interface of the first power-on package.
3. The parallel encoding system for energy storage power supplies according to claim 1, wherein The host interface of the host and the first expansion interface and the second expansion interface of each power-on package include a ground interface. The ground interface of the host interface is connected to the ground interface of the first expansion interface of the first power-on package, and the ground interface of the second expansion interface of the previous power-on package is connected to the ground interface of the first expansion interface of the next power-on package. The ground interfaces of the first expansion interface and the second expansion interface of each power-on package are connected to each other.
4. The parallel encoding system for energy storage power supplies according to claim 1, wherein The host interface of the host, and the first and second expansion interfaces of each of the power-on packages include CAN bus interfaces. The CAN bus interface of the host interface is connected to the CAN bus interface of the first expansion interface of the first power-on package. The CAN bus interface of the second expansion interface of the previous power-on package is connected to the CAN bus interface of the first expansion interface of the next power-on package. The CAN bus interfaces of the first and second expansion interfaces of each power-on package are connected to each other. The host sends CAN instructions including encoded commands through its CAN bus interface.
5. The parallel encoding system for energy storage power sources according to claim 1, wherein The CAN bus interface includes a CANH interface and a CANL interface.
6. The parallel connection encoding system for energy storage power supplies according to claim 1, wherein the power-on package includes an MCU, and two first control circuits and a second control circuit respectively connected to the MCU; the two first control circuits are respectively connected to the two first sub-interfaces of the power-on package. The first sub-interfaces are connected to the first signal detection ends of the MCU. The first control circuit includes a control switch unit. When the power-on package is activated, the control switch unit is turned on based on the first enable signal sent by the MCU so that the voltage signal of the voltage source of the power-on package is output to the corresponding first sub-interface; the second control circuit is connected between the two second sub-interfaces of the power-on package. The two second sub-interfaces are respectively connected to the second signal detection ends of the MCU. The second control circuit includes a switching switch unit. The switching switch unit is turned on based on the second enable signal sent by the MCU.
7. The parallel coding system for energy storage power supplies according to claim 6, wherein The control switch unit includes a first triode and a first MOS transistor. The first enable signal is sent to the base of the first triode. The emitter of the first triode is grounded. The collector of the first triode is connected to the control end of the first MOS transistor. The input end of the first MOS transistor is connected to the voltage source of the power-on package. The output end of the first MOS transistor is connected to the first sub-interface of the power-on package.
8. The parallel encoding system for energy storage power supplies according to claim 6, wherein The switching switch unit includes a second triode, a second MOS transistor, and a third MOS transistor. The second enable signal is sent to the base of the second triode. The emitter of the second triode is grounded. The collector of the second triode is connected to the control ends of the second MOS transistor and the third MOS transistor. The output end of the second MOS transistor is connected to one of the second sub-interfaces. The output end of the third MOS transistor is connected to the other second sub-interface. The input ends of the second MOS transistor and the third MOS transistor are connected.