Fault injection test system, method, equipment, medium and product
Through the fault injection test system, the test unit is used to perform fault injection between the server and external expansion equipment, solving the problems of high testing cost and low efficiency in the existing technology, and achieving efficient and comprehensive fault injection tests.
Patent Information
- Application Number
- CN202510858555.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-25
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2045-06-25
AI Technical Summary
In the prior art, server fault injection testing is costly, low efficiency and limited in testing, and the equipment is easily damaged by manual welding operations.
The fault injection test system is adopted, including a server, an external expansion device, a host computer and a test unit. The host computer selects the measured signal and fault type, and uses the first and second test modules in the test unit to inject faults between the server and the external expansion device to avoid artificial welding operations.
It reduces testing costs, improves testing efficiency, and realizes comprehensive testing of multiple signals and fault types, reduces equipment damage and reduces dependence on manual operations.
Smart Images

Figure CN120353718A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of fault testing, and particularly relates to a fault injection test system, method, device, medium, and product. Background Art
[0002] With the development of Internet technology and the information age, the demand and requirements for servers in all walks of life are getting higher and higher. Therefore, the testing of servers has become a crucial link, especially in the development stage of servers. According to different development requirements, it is necessary to conduct fault injection testing on signals. In related technologies, the on-off of the link is achieved by manually welding flying wires or disconnecting resistors to inject faults into the signals. After this testing method is operated multiple times, it will damage the device, even cause the device to be unusable, resulting in increased costs. At the same time, the manual welding operation efficiency is low and the testing is relatively limited.
[0003] Therefore, how to improve the above problems has become one of the technical problems to be solved urgently at the present stage. Summary of the Invention
[0004] This application provides a fault injection test system, method, device, medium, and product to at least solve the problems of high testing cost, low testing efficiency, and relatively limited testing in related technologies.
[0005] This application provides a fault injection test system, including: A server, an external expansion device, a host computer, and a test unit. The test unit is connected between the server and the external expansion device, and the host computer is connected to the test unit; The host computer is at least configured to select a signal under test and a fault type, generate a control signal according to the signal under test and the fault type, and send the control signal; The test unit includes a first test module and a second test module. The test unit is at least configured to receive the control signal, and perform fault injection between the server and the external expansion device through the first test module and the second test module according to the signal type of the signal under test.
[0006] This application provides a fault injection test method, which uses the above-mentioned fault injection test system for testing. The fault injection test method includes: The server and the external expansion device establish a connection through the test unit; Select the signal under test and set the fault type; Inject a fault signal between the server and the external expansion device. This application also provides an electronic device, including: a memory for storing a computer program; a processor for implementing the steps of any of the above-mentioned fault injection methods when executing the computer program.
[0007] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned fault injection methods are implemented.
[0008] The present application also provides a computer program product, including a computer program. When the computer program is executed by a processor, the steps of any of the above-mentioned fault injection methods are implemented.
[0009] In the present application, a host computer is used to select a signal under test and a fault type, and a test unit is set between a server and an external expansion device. Under the control of the host computer, the test unit adjusts the on / off state of the internal link through a first test module and a second test module, so as to implement fault injection between the server and the external expansion device. By setting the host computer and the test unit, the present application can implement fault injection testing between the server and the external expansion device. Therefore, it is beneficial to avoid manually welding signals to implement signal fault injection, and can solve the technical problems of high test cost, low efficiency and limited testing caused by using manual operations such as welding for fault injection testing, which is beneficial to reducing the test cost, improving the test efficiency, and enhancing the comprehensiveness of fault injection testing. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] In order to more clearly illustrate the embodiments of the present application, the drawings required for the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0011] Figure 1 FIG. shows a schematic diagram of a fault injection test system provided by an embodiment of the present application; Figure 2 FIG. shows another schematic diagram of a fault injection test system provided by an embodiment of the present application; Figure 3 FIG. shows still another schematic diagram of a fault injection test system provided by an embodiment of the present application; Figure 4 FIG. shows yet another schematic diagram of a fault injection test system provided by an embodiment of the present application; Figure 5 FIG. shows yet another schematic diagram of a fault injection test system provided by an embodiment of the present application; Figure 6 FIG. shows yet another schematic diagram of a fault injection test system provided by an embodiment of the present application; Figure 7 FIG. shows a schematic flowchart of a fault injection test method provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0012] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.
[0013] It should be noted that in the description of the present application, the terms "include", "comprise" or any other variation thereof are intended to cover a non-exclusive inclusion, such that a process, method, article or device including a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present application are used to distinguish similar objects and are not used to describe a specific order or sequence.
[0014] To enable those skilled in the art of the present technology to better understand the solution of the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0015] Figure 1 Shown is a schematic diagram of a fault injection test system provided by an embodiment of the present application. Please refer to Figure 1 The present application provides a fault injection test system 100, including: A server 10, an external expansion device 20, a host computer 30, and a test unit 40. The test unit 40 is connected between the server 10 and the external expansion device 20, and the host computer 30 is connected to the test unit 40; The host computer 30 is at least configured to select a signal under test and a fault type, generate a control signal according to the signal under test and the fault type, and send the control signal; The test unit 40 includes a first test module 41 and a second test module 42. The test unit 40 is at least configured to receive the control signal, and perform fault injection between the server 10 and the external expansion device 20 through the first test module 41 and the second test module 42 according to the signal type of the signal under test.
[0016] Specifically, the present application provides a fault injection test system 100, which is at least used for performing fault injection tests between the server 10 and the external expansion device 20. The fault injection test system 100 includes a server 10, an external expansion device 20, a host computer 30, and a test unit 40. The present application sets a test unit 40 between the server 10 and the external expansion device 20. The test unit 40 is connected to the host computer 30. The host computer 30 selects the signal to be tested and the fault type, and generates corresponding control signals. The test unit 40 forms corresponding faults between the server 10 and the external expansion device 20 according to the control signals sent by the host computer 30, so as to simulate the state where the signals between the server 10 and the external expansion device 20 fail. Optionally, the server 10 and the test unit 40 are connected through a connector, and the external expansion device 20 and the test unit 40 are also connected through a connector. The present application is only illustrated by this example and is not limited thereto.
[0017] It should be noted that in practical applications, there are various signals and various fault types between the server 10 and the external expansion device 20. Therefore, the present application sets a first test module 41 and a second test module 42 in the test unit 40. According to the different signal types and fault types, the host computer 30 generates corresponding control signals. The test unit 40 adjusts the internal link according to the control signals, selects the first test module 41 and / or the second test module 42, generates corresponding fault types, and simulates faults between the server 10 and the external expansion device 20, so as to realize the fault injection test of the server 10 and the external expansion device 20.
[0018] The present application selects the signal to be tested and the fault type through the host computer 30. By setting a test unit 40 between the server 10 and the external expansion device 20, the test unit 40 adjusts the on / off of the internal link under the control of the host computer 30 to realize the fault injection between the server 10 and the external expansion device 20. With such a setting, it is beneficial to avoid artificially welding signals to achieve signal fault injection. On the one hand, it is beneficial to avoid equipment damage caused by multiple weldings and reduce the test cost; on the other hand, it does not rely on manual operation, which is beneficial to improving the test efficiency; in addition, by adjusting the link structure of the test unit 40, it is possible to realize the test of a variety of different signals and a variety of different fault types, which is also beneficial to improving the comprehensiveness of the fault injection test.
[0019] The signal types transmitted between the server 10 and the external expansion device 20 are diverse. According to the different transmitted signals, different test modules can be selected for fault injection tests. Figure 2 Shown is another schematic diagram of the fault injection test system provided by the embodiment of the present application. Please refer to Figure 2, in an alternative embodiment of the present application, the test unit 40 is specifically configured to perform fault injection between the server 10 and the external expansion device 20 through the first test module 41 when the signal under test is a first type of signal. The first type of signal is a single-ended signal, and the transmission rate is less than or equal to a preset rate.
[0020] Specifically, the signals transmitted between the server 10 and the external expansion device 20 include the first type of signal. When the signal under test is the first type of signal, the test unit 40 performs fault injection between the server 10 and the external expansion device 20 through the first test module 41, that is, the first test module 41 performs fault injection for the case where the signal to be tested is the first type of signal. The first type of signal is a single-ended signal. Exemplarily, the first type of signal can be an IO signal (Input / Output signal), an I2C signal (I squared C signal), etc., and the present application does not make specific limitations. The transmission rate of the first type of signal is usually low. Optionally, the preset rate can be 1 Mbps, 100 Mbps, etc., and the present application does not make specific limitations. It can be determined according to the actual situation which signal uses the first test module 41 for testing.
[0021] For the first type of signal, at least two fault injection methods including short circuit and open circuit are included. The present application realizes simulating different fault types by setting the link of the first test module 41. Exemplarily, for the short circuit fault of the first type of signal by using the first test module 41, a fault injection test is performed between the server 10 and the external expansion device 20. By setting the on / off of the link in the first test module 41, a short circuit fault injection between the server 10 and the external expansion device 20 is realized. For another example, for the open circuit fault of the first type of signal by using the first test module 41, a fault injection test is performed between the server 10 and the external expansion device 20. By setting the on / off of the link in the first test module 41, an open circuit fault injection between the server 10 and the external expansion device 20 is realized.
[0022] By setting the first test module 41 in the test unit 40 of the present application to perform a fault injection test on the first type of signal, a fault injection test can be realized for at least part of the signals (single-ended signals with a low transmission rate) between the server 10 and the external expansion device 20, which is beneficial to reducing the artificial soldering of signals to achieve signal fault injection, thereby improving the device damage caused by multiple soldering, and is beneficial to reducing the test cost; on the other hand, it is beneficial to reducing the dependence on manual operation and improving the test efficiency.
[0023] Figure 3 Shown is another schematic diagram of the fault injection test system provided by the embodiment of the present application. Please refer to Figure 3, in an alternative embodiment of the present application, the first test module 41 includes a first controller 411 and a second controller 412. The first controller 411 is respectively connected to the server 10 and the second controller 412, and the second controller 412 is respectively connected to the first controller 411 and the external expansion device 20; the first controller 411 and the second controller 412 are at least configured to control the transmission of the signal to be measured.
[0024] Specifically, this embodiment provides a specific implementation of the first test module 41. The first test module 41 includes a first controller 411 and a second controller 412. Optionally, the first controller 411 and the second controller 412 can be CPLDs (Complex Programmable Logic Devices). This application only takes this as an example for illustration and is not limited thereto. The first controller 411 and the second controller 412 can implement the control of the transmission of the signal to be measured. Optionally, before the start of the fault injection test, the test unit 40 is respectively connected to the server 10 and the external expansion device 20. The server 10 sends the signal to be transmitted. The first controller 411 receives the signal transmitted by the server. Signal transparent transmission can be performed between the first controller 411 and the second controller 412, and then transmitted to the external expansion device 20 by the second controller 412. It should be noted that this application only takes the above embodiment as an example to illustrate the signal direction and is not limited thereto. It should also be noted that transparent transmission means that the signal is transmitted directly without being processed. By setting the first controller 411 and the second controller 412 in the test unit 40, the transmission and switching of the signal to be measured are realized inside, and various signals to be measured can be tested, which is beneficial to improving the test comprehensiveness of the fault injection test system.
[0025] It should be noted that since the pins of the first controller 411 connected to the server 10 are usually fixed, and the pins of the second controller 412 connected to the external expansion device 20 are usually fixed, therefore, this application sets different controllers to be respectively connected to the server 10 and the external expansion device 20. In this way, it can be ensured that when the connection pins between the first controller 411 and the second controller 412 change, the signal transmission between the server 10 and the first controller 411 is not affected, nor is the signal transmission between the second controller 412 and the external expansion device 20 affected.
[0026] Please continue to refer to Figure 3 , in an alternative embodiment of the present application, both the first controller 411 and the second controller 412 include a signal interface 401 to be measured, and the signal interface 401 to be measured is at least configured to receive the signal to be measured and transmit the signal to be measured.
[0027] Specifically, in this embodiment, the measured signal interfaces 401 are provided in the first controller 411 and the second controller 412. The first controller 411 and the second controller 412 select the corresponding measured signals to be accessed to the measured signal interfaces 401 according to the control signals transmitted by the host computer 30, and set the fault type through the first test module 41, that is, a link fault is formed between the first controller 411 and the second controller 412. Exemplarily, when performing an open-circuit fault injection test on the first type of signal between the server 10 and the external expansion device 20, the first controller 411 and the second controller 412 select the first type of signal to be accessed to the measured signal interface 401, and the first test module 41 forms an open-circuit fault between the first controller 411 and the second controller 412, so that the measured signal cannot be transmitted from the measured signal interface 401 of the first controller 411 to the measured signal interface 401 of the second controller 412, thereby realizing the open-circuit fault injection test on the first type of signal between the server 10 and the external expansion device 20. By providing the first controller 411 and the second controller 412, selecting the measured signal, and switching the connection of the measured signal to be tested between the first controller 411 and the second controller 412 to the measured signal interface 401, the corresponding measured signal can be selected. Such a setting is beneficial to realizing the selection of various measured signals, expanding the use range of the fault injection test system 100, and further beneficial to improving the comprehensiveness of the fault injection test.
[0028] Please continue to refer to Figure 3 , in an alternative embodiment of the present application, the first test module 41 further includes a first switch control component 4131 and a second switch control component 4132. The input end and the enable end of the first switch control component 4131 are connected to the first controller 411, and the output end is connected to the second controller 412. The input end and the enable end of the second switch control component 4132 are connected to the first controller 411, and the output end is grounded.
[0029] Specifically, the first test module 41 further includes at least two switch control components, namely a first switch control component 4131 and a second switch control component 4132, to implement tests for different fault types. The enable terminal of the first switch control component 4131 is connected to the first controller 411, and the first switch control component 4131 is turned on and off under the control of the first controller 411; the input terminal of the first switch control component 4131 is connected to the signal-under-test interface 401 of the first controller 411, and the output terminal is connected to the signal-under-test interface 401 of the second controller 412. The enable terminal of the second switch control component 4132 is also connected to the first controller 411, and the second switch control component 4132 is turned on and off under the control of the first controller 411; the input terminal of the second switch control component 4132 is connected to the signal-under-test interface 401 of the first controller 411, and the output terminal is grounded. The first switch control component 4131 and the second switch control component 4132 are used to implement different types of fault injection tests. In this application, different signals under test are injected by setting the first controller 411 and the second controller 412, and different fault types are injected by setting the first switch control component 4131 and the second switch control component 4132. The first controller 411 and the second controller 412 receive the control signals transmitted by the host computer 30, and select the signals under test and the fault types according to the control signals to implement the injection tests for different signals under test and different fault types. Such a setting helps to avoid the manual soldering test method, thereby improving the test efficiency, reducing the probability of equipment failure, reducing the test cost, and increasing the diversity of the fault types that can be tested by the fault injection test system 100, and further improving the comprehensiveness of the fault injection test.
[0030] An optional embodiment provided by this application is that the enable terminal of the first switch control component 4131 receives a non-enable signal, and the enable terminal of the second switch control component 4132 receives a non-enable signal, that is, both the first switch control component 4131 and the second switch control component 4132 are turned off, and the signal under test cannot be transmitted from the first controller 411 to the second controller 412. In this way, the open-circuit test of the signal under test is realized. Another optional embodiment provided by this application is that the enable terminal of the first switch control component 4131 receives a non-enable signal, and the enable terminal of the second switch control component 4132 receives an enable signal, that is, the first switch control component 4131 is turned off and the second switch control component 4132 is turned on. At this time, it is equivalent to grounding the signal under test. In this way, the short-circuit test of the signal under test is realized.
[0031] Figure 4 Shown is another schematic diagram of the fault injection test system provided by the embodiment of this application. Please refer to Figure 4, in an alternative embodiment of the present application, the test unit 40 is specifically configured to perform fault injection between the server 10 and the external expansion device 20 through the second test module 42 when the signal under test is a second type of signal. The second type of signal is a differential signal, and the second type of signal includes at least two single-ended signals.
[0032] Specifically, when the signal under test is a second type of signal, the test unit 40 performs fault injection between the server 10 and the external expansion device 20 through the second test module 42, that is, the second test module 42 performs fault injection for the case where the signal to be tested is a second type of signal. The second type of signal is a differential signal. It should be noted that a differential signal is a signal transmission method that transmits information through the voltage difference between two signal lines. Different from single-ended signals (referenced to ground), a differential signal consists of a pair of mutually inverted signal lines, and differential signals are more suitable for high-speed transmission.
[0033] For the second type of signal, there are at least four fault injection methods including short circuit, non-steady short circuit, open circuit, and non-steady open circuit. The present application realizes simulating different fault types by setting the link of the second test module 42. The present application sets the second test module 42 in the test unit 40 to perform fault injection testing on the second type of signal, and can perform fault injection testing on at least some signals (differential signals with a higher transmission rate) between the server 10 and the external expansion device 20, which is beneficial to reducing the artificial welding of signals to achieve signal fault injection testing, thereby improving the equipment damage caused by multiple weldings, and is beneficial to reducing the test cost; on the other hand, it does not rely on manual operation, which is beneficial to improving the test efficiency.
[0034] Figure 5 The following shows another schematic diagram of the fault injection test system provided by the embodiment of the present application. Please refer to Figure 5 , in an alternative embodiment of the present application, the second test module 42 includes a third controller 423 and a fourth controller 424. The third controller 423 is respectively connected to the server 10 and the fourth controller 424, and the fourth controller 424 is respectively connected to the third controller 423 and the external expansion device 20; the third controller 423 and the fourth controller 424 are at least configured to select at least one single-ended signal from the second type of signal for transmission and switch to the state to be tested according to the control signal.
[0035] Specifically, this embodiment provides a specific implementation of the second test module 42. The second test module 42 includes a third controller 423 and a fourth controller 424. Optionally, the third controller 423 and the fourth controller 424 can be multiplexers. Exemplarily, the MAX4618 chip can be used. This application is only illustrated by this example and is not limited thereto. The third controller 423 and the fourth controller 424 can control the transmission of the signal to be measured. Optionally, before the start of the fault injection test, the test unit 40 is respectively connected to the server 10 and the external expansion device 20. The signal transmitted by the server 10 can be transmitted to the third controller 423, then to the fourth controller 424 by the third controller 423, and then transmitted to the external expansion device 20 by the fourth controller 424. It should be noted that this application only illustrates the signal path with the above embodiment as an example and is not limited thereto. By setting the third controller 423 and the fourth controller 424 in the second test module 42, a complete and controllable signal transmission path is formed between the server 10 and the external expansion device 20. In this way, it is beneficial for the second test module 42 to efficiently and orderly configure the transmission link of the signal to be measured between the server 10 and the external expansion device 20 to form different types of faults, which is beneficial to reducing the manual soldering to implement signal fault injection, preventing equipment damage, reducing the test cost, and reducing the dependence on manual operation, which is beneficial to improving the test efficiency. When the signal to be measured is a second type of signal, a single-ended signal in the second type of signal can be selected separately for the fault injection test by the third controller 423 and the fourth controller 424, or multiple single-ended signals can be selected for the fault injection test simultaneously. The signal to be measured is transmitted and switched to the state to be measured by the third controller 423 and the fourth controller 424. With such a setting, various signals to be measured can be tested, and it is also beneficial to improve the test comprehensiveness of the fault injection test system.
[0036] It should be noted that since the pins of the third controller 423 connected to the server 10 are usually fixed, and the pins of the fourth controller 424 connected to the external expansion device 20 are usually fixed, this application sets different controllers to be respectively connected to the server 10 and the external expansion device 20. In this way, it can be ensured that when the connection pins between the third controller 423 and the fourth controller 424 change, the signal transmission between the server 10 and the third controller 423 is not affected, nor is the signal transmission between the fourth controller 424 and the external expansion device 20 affected.
[0037] Figure 5 Shown is another schematic diagram of the fault injection test system provided by the embodiment of this application. Please refer to Figure 5, in an alternative embodiment of the present application, both the third controller 423 and the fourth controller 424 include a signal-under-test interface 401, and the signal-under-test interface 401 is at least configured to receive and transmit the signal under test.
[0038] Specifically, in this embodiment, the signal-under-test interface 401 is provided in the third controller 423 and the fourth controller 424. The third controller 423 and the fourth controller 424 select the corresponding signal under test to access the signal-under-test interface 401 according to the control signal transmitted by the host computer 30, and set the fault type through the second test module 42, that is, a link fault is formed between the third controller 423 and the fourth controller 424 to perform a fault injection test on the signal between the server 10 and the external expansion device 20. Exemplarily, when performing a short-circuit fault injection test on the second type of signal between the server 10 and the external expansion device 20, the second test module 42 forms a short-circuit fault between the third controller 423 and the fourth controller 424, so that the signal under test is short-circuited between the third controller 423 and the fourth controller 424 and cannot be normally transmitted to the signal-under-test interface 401 of the fourth controller 424, thereby realizing the short-circuit fault injection test on the second type of signal between the server 10 and the external expansion device 20. Both the third controller 423 and the fourth controller 424 of the present application are provided with the signal-under-test interface 401. After the test unit 40 receives the control signal from the host computer 30, it selects the signal under test according to the control signal, and switches the connection of the signal under test to be tested between the third controller 423 and the fourth controller 424 to the signal-under-test interface 401 to select the corresponding signal under test. Such a setting is beneficial to realizing the selection of multiple signals under test, expanding the usage range of the fault injection test system 100, and further improving the comprehensiveness of the fault injection test.
[0039] Further, an alternative embodiment provided by the present application is that the third controller 423 and the fourth controller 424 respectively include two signal-under-test interfaces 401, the second type of signal is a differential signal, including a first single-ended signal and a second single-ended signal, and the first single-ended signal and the second single-ended signal are respectively connected to different signal-under-test interfaces 401. Such a setting is beneficial to realizing the fault injection test of different single-ended signals in the differential signal.
[0040] For the individual fault injection test and the combined fault injection test of the first single-ended signal and the second single-ended signal, the present application designs the second test module 42 to realize the comprehensive fault injection test of the differential signal. Please continue to refer to Figure 5, an alternative embodiment provided by the present application is that the second test module 42 further includes a third switch control component 4213, a fourth switch control component 4214, a fifth switch control component 4215, a sixth switch control component 4216, and a fifth controller 425; the enable terminals of the third switch control component 4213, the fourth switch control component 4214, the fifth switch control component 4215, and the sixth switch control component 4216 are all connected to the fifth controller 425, and the fifth controller 425 is at least configured to control the opening and closing of the third switch control component 4213, the fourth switch control component 4214, the fifth switch control component 4215, and the sixth switch control component 4216; the input terminals of the third switch control component 4213, the fourth switch control component 4214, the fifth switch control component 4215, and the sixth switch control component 4216 are all connected to the third controller 423; the output terminals of the third switch control component 4213 and the fifth switch control component 4215 are both connected to the fourth controller 424; the output terminals of the fourth switch control component 4214 and the sixth switch control component 4216 are both grounded.
[0041] Specifically, the second test module 42 is further provided with a plurality of switch control components and a fifth controller 425. The fifth controller 425 receives the control signal transmitted by the host computer 30 (the connection between the fifth controller 425 and the host computer 30 is not shown in the figure, but actually the fifth controller 425 needs to be connected to the host computer 30), and realizes relevant fault injection according to the control signal. The plurality of switch control components realize different fault types of the signal under test under the control of the fifth controller 425. The enable end of the third switch control component 4213 is connected to the fifth controller 425, and realizes the conduction and cut-off of the third switch control component 4213 under the control of the fifth controller 425. The input end of the third switch control component 4213 is connected to the signal under test interface 401 of the third controller 423, and the output end is connected to the signal under test interface 401 of the fourth controller 424. The enable end of the fourth switch control component 4214 is connected to the fifth controller 425, and realizes the conduction and cut-off of the fourth switch control component 4214 under the control of the fifth controller 425. The input end of the fourth switch control component 4214 is connected to the signal under test interface 401 of the third controller 423, and the output end is grounded. The enable end of the fifth switch control component 4215 is connected to the fifth controller 425, and realizes the conduction and cut-off of the fifth switch control component 4215 under the control of the fifth controller 425. The input end of the fifth switch control component 4215 is connected to the signal under test interface 401 of the third controller 423, and the output end is connected to the signal under test interface 401 of the fourth controller 424. The enable end of the sixth switch control component 4216 is connected to the fifth controller 425, and realizes the conduction and cut-off of the sixth switch control component 4216 under the control of the fifth controller 425. The input end of the sixth switch control component 4216 is connected to the signal under test interface 401 of the third controller 423, and the output end is grounded.
[0042] In the second test module 42 of the present application, the fifth controller 425 receives the control signal transmitted by the host computer 30, and controls the corresponding switch control components according to the control signal to realize the injection test of different fault types of the signal under test (the second type of signal). Such a setting is beneficial to avoiding the fault injection test in the way of manual soldering, thereby improving the test efficiency, reducing the probability of equipment failure, being beneficial to reducing the test cost, and being further beneficial to increasing the diversity of the fault types that can be tested by the fault injection test system 100, and further beneficial to improving the comprehensiveness of the fault injection test.
[0043] An alternative embodiment provided by the present application is that the second type of signal is a differential signal, which includes a first single-ended signal and a second single-ended signal. The input terminals of the third switch control chip and the fourth switch control chip receive the first single-ended signal, and the input terminals of the fifth switch control signal and the sixth switch control chip receive the second single-ended signal. The first single-ended signal and the second single-ended signal can be subjected to short-circuit fault testing and open-circuit fault testing. In some alternative embodiments, the enable terminal of the third switch control component 4213 receives a non-enable signal, and the enable terminal of the fourth switch control component 4214 receives a non-enable signal, that is, both the third switch control component 4213 and the fourth switch control component 4214 are turned off, and the first single-ended signal cannot be transmitted from the third controller 423 to the fourth controller 424. Thus, the open-circuit test of the first single-ended signal is achieved. In some other alternative embodiments, the enable terminal of the third switch control component 4213 receives a non-enable signal, and the enable terminal of the fourth switch control component 4214 receives an enable signal, that is, the third switch control component 4213 is turned off, and the fourth switch control component 4214 is turned on. At this time, the first single-ended signal is grounded, and the short-circuit test of the first single-ended signal is achieved. In some other alternative embodiments, the enable terminal of the fifth switch control component 4215 receives a non-enable signal, and the enable terminal of the sixth switch control component 4216 receives a non-enable signal, that is, both the fifth switch control component 4215 and the sixth switch control component 4216 are turned off, and the second single-ended signal cannot be transmitted from the third controller 423 to the fourth controller 424. Thus, the open-circuit test of the second single-ended signal is achieved. In some other alternative embodiments, the enable terminal of the fifth switch control component 4215 receives a non-enable signal, and the enable terminal of the sixth switch control component 4216 receives an enable signal, that is, the fifth switch control component 4215 is turned off, and the sixth switch control component 4216 is turned on. At this time, the second single-ended signal is grounded, and the short-circuit test of the second single-ended signal is achieved. In some other alternative embodiments, the enable terminals of the third switch control component 4213, the fourth switch control component 4214, the fifth switch control component 4215, and the sixth switch control component 4216 all receive non-enable signals, that is, the third switch control component 4213, the fourth switch control component 4214, the fifth switch control component 4215, and the sixth switch control component 4216 are all turned off. At this time, the second single-ended control signal cannot be transmitted from the third controller 423 to the fourth controller 424 to achieve the open-circuit test of the first single-ended signal and the second single-ended signal. In some other alternative embodiments, the enable terminals of the third switch control component 4213 and the fifth switch control component 4215 receive non-enable signals, and the enable terminals of the fourth switch control component 4214 and the sixth switch control component 4216 receive enable signals, and both the first single-ended signal and the second single-ended signal are grounded. Thus, the test of both the first single-ended signal and the second single-ended signal being short-circuited is achieved.
[0044] It should be noted that the above embodiments illustrate the methods for short - circuit and open - circuit tests on the first single - ended signal and the second single - ended signal in the second - type signal. For the second - type signal, unsteady - state tests can also be performed, such as unsteady - state open - circuit tests and unsteady - state short - circuit tests. An alternative embodiment provided by the present application is that when performing an unsteady - state open - circuit test on the first single - ended signal, the fourth switch control component 4214 is turned off, and the fifth controller 425 adjusts the enable signal of the third switch control component 4213. Under the control of the fifth controller 425, the third switch control component 4213 realizes the switching between conduction and cut - off. The switching frequency between conduction and cut - off can be set by the host computer 30, and then the fifth controller 425 controls the switching frequency of the third switch control component 4213 to achieve the unsteady - state open - circuit test on the first single - ended signal. Another alternative embodiment provided by the present application is that when performing an unsteady - state open - circuit test on the first single - ended signal, the third switch control component 4213 is turned off, and the fifth controller 425 controls the fourth switch control component 4214 to switch between conduction and cut - off according to the switching frequency set by the host computer 30, so as to achieve the unsteady - state short - circuit test on the first single - ended signal.
[0045] Another optional embodiment provided by the present application is that when performing an unsteady open - circuit test on the second single - ended signal, the sixth switch control component 4216 is turned off, and the fifth controller 425 adjusts the enable signal of the fifth switch control component 4215. Under the control of the fifth controller 425, the fifth switch control component 4215 realizes the switching between conduction and cutoff. The conduction and cutoff frequencies can be set by the host computer 30, and then the switching frequency of the fifth switch control component 4215 is controlled by the fifth controller 425 to realize the unsteady open - circuit test on the second single - ended signal. Another optional embodiment provided by the present application is that when performing an unsteady short - circuit test on the second single - ended signal, the fifth switch control component 4215 is turned off, and the fifth controller 425 controls the sixth switch control component 4216 to perform the switching between conduction and cutoff according to the switching frequency set by the host computer 30, so as to realize the unsteady short - circuit test on the second single - ended signal. Another optional embodiment provided by the present application is that when performing an unsteady open - circuit test on the first single - ended signal and the second single - ended signal simultaneously, the fourth switch control component 4214 and the sixth switch control component 4216 are both turned off, and the fifth controller 425 controls the third switch control component 4213 and the fifth switch control component 4215 to perform the switching between conduction and cutoff, so as to realize the unsteady open - circuit test on the first single - ended signal and the second single - ended signal. Another optional embodiment provided by the present application is that when performing an unsteady short - circuit test on the first single - ended signal and the second single - ended signal simultaneously, the third switch control component 4213 and the fifth switch control component 4215 are both turned off, and the fourth switch control component 4214 and the sixth switch control component 4216 perform the switching between conduction and cutoff under the control of the fifth controller 425, so as to realize the unsteady short - circuit test on the first single - ended signal and the second single - ended signal.
[0046] It should be noted that the switching frequency of the switch control component by the fifth controller 425 can be set by the host computer 30, so that the fifth controller 425 switches between transmitting the enable signal and the non - enable signal at a certain frequency. The present application does not make specific limitations on this.
[0047] Figure 6 Shown is another schematic diagram of the fault injection test system provided by the embodiment of the present application. Please refer to Figure 6 Moreover, it should be noted that the first test module 41 and the second test module 42 can exist in the test unit 40 simultaneously. The present application does not make specific limitations. When the first test module 41 and the second test module 42 exist in the test unit 40 simultaneously, the first controller 411 and the fifth controller 425 can adopt the same controller to save device costs and further help reduce the test cost.
[0048] Optionally, the first switch control component 4131, the second switch control component 4132, the third switch control component 4213, the fourth switch control component 4214, the fifth switch control component 4215, and the sixth switch control component 4216 can all adopt switch control chips, such as the switch control chip AIP74LVC1G125. This application is only illustrated by this example and is not limited thereto.
[0049] Please refer to Figures 1 to 6 , in an alternative embodiment of the present application, the test unit 40 includes a debugging interface, and the host computer 30 is connected to the test unit 40 through the debugging interface.
[0050] Specifically, in the fault injection test system 100 provided by the present application, the host computer 30 generates a control signal according to the signal under test and the fault type, and transmits it to the test unit 40. In this embodiment, a debugging interface is set to realize the connection between the host computer 30 and the test unit 40. Such a setting is beneficial to operations such as the host computer 30 writing configuration parameters and injecting test data into the test unit 40, thereby facilitating ensuring the reliability and efficiency of the test.
[0051] Based on the same inventive concept, the present application provides a fault injection test method. Figure 7 The following shows a schematic flowchart of a fault injection test method provided by an embodiment of the present application. Please refer to Figure 1 and Figure 7 , the fault injection test method uses any one of the fault injection test systems 100 provided by the embodiments of the present application for testing. The fault injection test method includes: Step S10, the server 10 and the external expansion device 20 establish a connection through the test unit 40. Specifically, the test unit 40 is set between the server 10 and the external expansion device 20, and the server 10 and the external expansion device 20 are respectively connected to the test unit 40. Exemplarily, the server 10 is connected to the test unit 40 through a connector, and the external expansion device 20 is connected through a connector. It should be noted that this application is only illustrated by this example and is not limited thereto.
[0052] Step S20, select the signal under test and set the fault type, and generate a control signal according to the signal under test and the fault type. The signals transmitted between the server 10 and the external expansion device 20 are diverse, and the possible faults are also different. When performing a fault injection test, select the signal under test and the fault type to be tested, and the fault injection test can be performed on different fault types of different signals under test to improve the comprehensiveness of the fault injection test. Exemplarily, the host computer 30 can be used to select the signal under test and the fault type and generate a control signal.
[0053] Step S30: Inject a fault signal between the server 10 and the external expansion device 20 according to the control signal. Specifically, after selecting the signal under test and the fault type in step S20, a control signal is transmitted to the test unit 40, and the test unit 40 performs a fault injection test between the server 10 and the external expansion device 20 according to the control signal.
[0054] It should be noted that for the fault injection test method provided in this application, the signal under test and the fault type can be selected, and the fault injection test between the server 10 and the external expansion device 20 is realized through the test unit 40 according to the signal under test and the fault type. Such a setting helps to avoid artificially soldering signals to achieve signal fault injection. On the one hand, it helps to avoid equipment damage caused by multiple soldering and reduces costs; on the other hand, it does not rely on manual operation, which helps to improve the test efficiency; in addition, various different fault types can be realized, which also helps to improve the comprehensiveness of the fault injection test.
[0055] Please refer to Figure 3 and Figure 7 In an alternative embodiment of the present application, step S20: Select the signal under test and set the fault type, and generate a control signal according to the signal under test and the fault type, including: determining that the signal under test is a first type of signal; wherein, the first type of signal is a single-ended signal and the transmission rate is less than or equal to a preset rate; setting the fault type of the signal under test; generating a control signal according to the signal under test and the fault type; step S30: Inject a fault signal between the server 10 and the external expansion device 20 according to the control signal, including: adjusting the conduction path of the first test module 41 according to the control signal.
[0056] Specifically, in step S20, it is determined whether the signal under test is a first type of signal. When the signal under test is a first type of signal, a corresponding control signal is generated according to the signal under test and the fault type. In step S30, the conduction path in the first test module 41 is adjusted according to the control signal generated in step S20 to form a corresponding fault type, so as to realize the fault injection test of different fault types for the first type of signal. Exemplarily, the signal under test is a first type of signal and the fault type is an open circuit. In step S20, a corresponding control signal for performing an open circuit test on the first type of signal is generated. In step S30, according to the control signal generated in step S20, the conduction path in the first test module 41 is adjusted. Specifically, both the first switch control component 4131 and the second switch control component 4132 are cut off to realize the open circuit test of the first type of signal. It should be noted that this application is only described by taking the above embodiments as examples. For the tests of other fault types, other corresponding control signals can be generated to control the conduction states of different devices in the first test module 41.
[0057] Please refer to Figure 5 andFigure 7 , in an alternative embodiment of the present application, step S20: Select the signal to be measured and set the fault type, and generate a control signal according to the signal to be measured and the fault type, including: determining that the signal to be measured is a second type of signal; wherein, the second type of signal is a differential signal; setting the fault type of the signal to be measured; generating a control signal according to the signal to be measured and the fault type; step S30: Inject a fault signal between the server 10 and the external expansion device 20 according to the control signal, including: adjusting the conduction path of the second test module 42 according to the control signal.
[0058] Specifically, in step S20, it is determined whether the signal to be measured is a second type of signal. When the signal to be measured is a second type of signal, a corresponding control signal is generated according to the signal to be measured and the fault type. In step S30, the conduction path in the second test module 42 is adjusted according to the control signal generated in step S20 to form a corresponding fault type, so as to implement the fault injection test for different fault types of the second type of signal. Exemplarily, the signal to be measured is a second type of signal and the fault type is an open circuit. In step S30, according to the control signal generated in step S20, the conduction path in the second test module 42 is adjusted. Specifically, the third switch control component 4213, the fourth switch control component 4214, the fifth switch control component 4215, and the sixth switch control component 4216 are all turned off to implement the open circuit test for the second type of signal. It should be noted that the present application is only described by taking the above embodiments as examples. For the tests of other fault types, other corresponding control signals can be generated to control the conduction states of different devices in the second test module 42.
[0059] Please refer to Figure 5 and Figure 7 , in an alternative embodiment of the present application, step S20: Select the signal to be measured and set the fault type, and generate a control signal according to the signal to be measured and the fault type, including: determining that the signal to be measured is a second type of signal; wherein, the second type of signal is a differential signal, and the second type of signal includes a first single-ended signal and a second single-ended signal; setting the fault type of the first single-ended signal and / or the second single-ended signal; generating a control signal according to the signal to be measured and the fault type; step S30: Inject a fault signal between the server 10 and the external expansion device 20 according to the control signal, including: adjusting the conduction path of the second test module 42 according to the control signal.
[0060] Specifically, in step S20, it is determined whether the signal under test is a second type of signal. When the signal under test is a second type of signal, the first single-ended signal and / or the second single-ended signal in the second type of signal and the fault type can be selected. That is, the first single-ended signal and the second single-ended signal can be tested separately or simultaneously. According to the selected signal under test and the fault type, corresponding control signals are generated. In step S30, according to the control signals generated in step S20, the conduction path in the second test module 42 is adjusted to form the corresponding fault type, so as to realize the fault injection test for different fault types of the second type of signal. Exemplarily, only the open-circuit fault of the first single-ended signal is tested. In step S20, corresponding control signals for testing the open circuit of the first single-ended signal are generated. In step S30, according to the control signals generated in step S20, the conduction path in the second test module 42 is adjusted. Specifically, the third switch control component 4213 and the fourth switch control component 4214 are both cut off to realize the open-circuit test of the first single-ended signal. It should be noted that this application is only described by taking the above embodiments as examples. For the tests of other fault types, other corresponding control signals can be generated to control the conduction states of different devices in the second test module 42.
[0061] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases the former is a better implementation method.
[0062] An embodiment of the present application also provides an electronic device, including a memory and a processor. A computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above embodiments of the fault injection test method.
[0063] An embodiment of the present application also provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps in any one of the above embodiments of the fault injection test method when running.
[0064] In an exemplary embodiment, the above computer-readable storage medium may include, but is not limited to: USB flash drives, read-only memories (ROM for short), random access memories (RAM for short), mobile hard disks, magnetic disks, or optical discs and other media that can store computer programs.
[0065] An embodiment of the present application also provides a computer program product. The above computer program product includes a computer program, and when the computer program is executed by a processor, it implements the steps in any one of the above embodiments of the fault injection test method.
[0066] Those skilled in the art may further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.
[0067] The above has introduced in detail a fault injection test system, method, device, medium, and product provided by this application. Specific examples are used herein to elaborate on the principle and implementation manner of this application. The description of the above embodiments is only used to help understand the method and its core idea of this application. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of this application, several improvements and modifications can be made to this application, and these improvements and modifications also fall within the protection scope of the claims of this application.
Claims
1. A fault injection test system, characterized in that, include: A server, an external expansion device, a host computer and a test unit, wherein the test unit is connected between the server and the external expansion device, and the host computer is connected to the test unit; The host computer is at least configured to select a measured signal and a fault type, generate a control signal according to the measured signal and the fault type, and send the control signal; The test unit includes a first test module and a second test module, and the test unit is at least configured to receive the control signal and perform fault injection between the server and the external expansion device through the first test module and the second test module according to the signal type of the tested signal.
2. The fault injection test system according to claim 1, wherein The test unit is specifically used to perform fault injection between the server and the external expansion device through the first test module when the tested signal is a first type of signal, the first type of signal is a single-ended signal, and the transmission rate is less than or equal to a preset rate.
3. The fault injection test system according to claim 2, wherein The first test module includes a first controller and a second controller, the first controller is connected to the server and the second controller respectively, and the second controller is connected to the first controller and the external expansion device respectively; The first controller and the second controller are at least configured to control the transmission of the measured signal.
4. The fault injection test system according to claim 3, wherein The first controller and the second controller both include a measured signal interface, and the measured signal interface is at least configured to receive the measured signal and transmit the measured signal.
5. The fault injection test system according to claim 3, characterized in that The first test module also includes a first switch control component and a second switch control component, wherein the input and enable terminals of the first switch control component are connected to the first controller, and the output terminal is connected to the second controller, and the input and enable terminals of the second switch control component are connected to the first controller, and the output terminal is grounded.
6. The fault injection test system according to claim 1, characterized in that The test unit is specifically used to perform fault injection between the server and the external expansion device through the second test module when the tested signal is a second type of signal, the second type of signal is a differential signal, and the second type of signal includes at least two single-ended signals.
7. The fault injection test system according to claim 6, wherein The second test module includes a third controller and a fourth controller, the third controller is connected to the server and the fourth controller respectively, and the fourth controller is connected to the third controller and the external expansion device respectively; The third controller and the fourth controller are at least configured to select at least one single-ended signal in the second type of signal for transmission and switch to a test state according to the control signal.
8. The fault injection test system according to claim 7, characterized in that, The third controller and the fourth controller both include a measured signal interface, and the measured signal interface is at least configured to receive the measured signal and transmit the measured signal.
9. The fault injection test system according to claim 7, wherein The second test module further includes a third switch control component, a fourth switch control component, a fifth switch control component, a sixth switch control component and a fifth controller; The enable terminals of the third switch control component, the fourth switch control component, the fifth switch control component, and the sixth switch control component are all connected to the fifth controller, and the fifth controller is at least configured to control the opening and closing of the third switch control component, the fourth switch control component, the fifth switch control component, and the sixth switch control component; The input terminals of the third switch control component, the fourth switch control component, the fifth switch control component, and the sixth switch control component are all connected to the third controller; the output terminals of the third switch control component and the fifth switch control component are both connected to the fourth controller; the output terminals of the fourth switch control component and the sixth switch control component are both grounded.
10. The fault injection test system according to any one of claims 1 to 9, characterized in that, The test unit includes a debugging interface, and the host computer is connected to the test unit through the debugging interface.
11. A fault injection test method, characterized in that, When testing using the fault injection test system according to any one of claims 1 to 10, the fault injection test method includes: The server and the external expansion device establish a connection through the test unit; Select the signal to be tested and set the fault type, and generate a control signal according to the signal to be tested and the fault type; Inject a fault signal between the server and the external expansion device according to the control signal.
12. The fault injection test method according to claim 11, wherein The step of selecting the signal to be tested and setting the fault type, and generating a control signal according to the signal to be tested and the fault type includes: Determine that the signal to be tested is a first type of signal; wherein, the first type of signal is a single-ended signal, and the transmission rate is less than or equal to a preset rate; set the fault type of the signal to be tested; generate a control signal according to the signal to be tested and the fault type; The step of injecting a fault signal between the server and the external expansion device according to the control signal includes: Adjust the conduction path of the first test module according to the control signal.
13. The fault injection test method according to claim 11, wherein The step of selecting the signal to be tested and setting the fault type, and generating a control signal according to the signal to be tested and the fault type includes: Determine that the signal to be tested is a second type of signal; wherein, the second type of signal is a differential signal; set the fault type of the signal to be tested; generate a control signal according to the signal to be tested and the fault type; The step of injecting a fault signal between the server and the external expansion device according to the control signal includes: Adjust the conduction path of the second test module according to the control signal.
14. The fault injection test method according to claim 11, wherein The step of selecting the signal to be tested and setting the fault type, and generating a control signal according to the signal to be tested and the fault type includes: Determine that the signal to be tested is a second type of signal; wherein, the second type of signal is a differential signal, and the second type of signal includes a first single-ended signal and a second single-ended signal; set the fault type of the first single-ended signal and / or the second single-ended signal; generate a control signal according to the signal to be tested and the fault type; The step of injecting a fault signal between the server and the external expansion device according to the control signal includes: Adjust the conduction path of the second test module according to the control signal.
15. An electronic device, characterized in that, It includes: A memory for storing a computer program; A processor, configured to implement the steps of the fault injection test method according to any one of claims 11 to 14 when executing the computer program.
16. A computer-readable storage medium, characterized in that, A computer program is stored in the computer-readable storage medium, wherein the computer program, when executed by a processor, implements the steps of the fault injection test method according to any one of claims 11 to 14.
17. A computer program product, comprising a computer program, characterized in that, The computer program, when executed by a processor, implements the steps of the fault injection test method according to any one of claims 11 to 14.
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