Method and system for system memory management, electronic device and storage medium

Abstract

The method and system for system memory management, the electronic device and the storage medium provided by the present disclosure extract virtual address information in access information, the virtual address information includes a target virtual address; in a case where it is determined according to the virtual address information that the target virtual address is in a first preset virtual address range, a starting physical address corresponding to a starting virtual address in the first preset virtual address range is determined according to a preset address mapping table; physical address calculation processing is performed according to the target virtual address, the starting virtual address and the starting physical address, to obtain a target physical address corresponding to the target virtual address; and the system memory is accessed based on the target physical address and memory management is performed on the system memory. Through the conversion relationship of quickly returning the virtual address in the specified range to the physical address, the conversion efficiency of the virtual address to the physical address can be improved, and there is no need to configure the conversion page table according to the MMU granularity, so that the waste of storage space can be reduced and the address conversion efficiency can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of data processing technology, and in particular to a method and system for system memory management, an electronic device, and a storage medium. Background Art

[0002] The Memory Management Unit (MMU) sits between a computer system's central processing unit (CPU) and memory. Its primary functions include virtual-to-physical address translation, memory protection, and CPU cache control. The MMU manages memory resources more efficiently, supporting multitasking and allowing multiple programs to run simultaneously, each with its own memory space and execution environment.

[0003] In MMU applications, in order to store the address translation page table that maps the virtual address (VA) to the physical address (PA), a certain amount of memory space will be occupied. At the same time, in order to speed up processing, an address translation page table will be pre-cached in the MMU. However, when the cache misses during access, it takes a long time to obtain the required address translation page table from the memory.

[0004] Furthermore, the address translation page table will have a long continuous address. The existing memory management method is to configure the page table according to the MMU granularity regardless of whether the address is continuous. There is a high cache miss rate, which will lead to waste of storage space and reduced address translation efficiency. Summary of the Invention

[0005] The present disclosure provides a system memory management method and system, electronic device, and storage medium. Its main purpose is to address the problem that existing memory management methods require configuring page tables at the MMU granularity regardless of whether addresses are continuous, resulting in a high cache miss rate, wasted storage space, and reduced address translation efficiency.

[0006] According to a first aspect of the present disclosure, a method for system memory management is provided, comprising:

[0007] Extracting virtual address information from the received access information, wherein the access information is used to access a system memory, and the virtual address information is used to indicate a target virtual address of the system memory;

[0008] In a case where it is determined according to the virtual address information that the target virtual address is within a first preset virtual address range, determining a starting physical address corresponding to a starting virtual address in the first preset virtual address range according to a preset address mapping table, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address, and the preset address mapping table includes at least the starting physical address corresponding to the starting virtual address;

[0009] Performing physical address calculation processing according to the target virtual address, the starting virtual address and the starting physical address to obtain a target physical address corresponding to the target virtual address;

[0010] The system memory is accessed based on the target physical address and memory management is performed on the system memory.

[0011] Optionally, after extracting the virtual address information from the received access information, the method further includes:

[0012] When it is determined according to the virtual address information that the target virtual address is not in the first preset virtual address range, physical address conversion processing is performed according to the target virtual address through a preset address conversion mode in a memory management unit to obtain the target physical address.

[0013] Optionally, after extracting the virtual address information from the received access information, the method further includes:

[0014] determining, according to the virtual address information, whether the target virtual address is within a second preset virtual address range;

[0015] In a case where it is determined that the target virtual address is within the second preset virtual address range, determining whether the target virtual address is within the first preset virtual address range according to the virtual address information;

[0016] When it is determined that the target virtual address is not in the second preset virtual address range, the target virtual address is determined to be wrong and error prompt information is generated, wherein the second preset virtual address range includes the first preset virtual address range.

[0017] Optionally, before extracting the virtual address information from the received access information, the method further includes:

[0018] Acquire continuous physical address information in the system memory, wherein the continuous physical address information includes multiple segments of continuous physical addresses in the system memory, and the multiple segments of continuous physical addresses do not overlap with each other;

[0019] The multiple continuous physical addresses are respectively subjected to virtual address range configuration processing to obtain a target virtual address range, wherein the first preset virtual address range includes the target virtual address ranges corresponding to the multiple continuous physically configured segments, and the multiple target virtual address ranges do not overlap with each other.

[0020] Optionally, performing virtual address range configuration processing on the multiple consecutive physical addresses to obtain a target virtual address range includes:

[0021] Performing virtual address correspondence processing on a first starting physical address of the target continuous physical address to obtain a first starting virtual address, wherein the target continuous physical address is any one of the multiple continuous physical addresses;

[0022] Performing virtual address correspondence processing on the first end physical address of the target continuous physical address to obtain a first end virtual address;

[0023] A virtual address range between the first starting virtual address and the first ending virtual address is determined as the target virtual address range, and the first starting physical address and the first starting virtual address corresponding to the first starting physical address are stored in the preset address mapping table.

[0024] Optionally, performing physical address calculation processing according to the target virtual address, the starting virtual address, and the starting physical address to obtain a target physical address corresponding to the target virtual address includes:

[0025] Performing address subtraction calculation based on the target virtual address and the starting virtual address to obtain an address deviation;

[0026] An address addition calculation is performed according to the address deviation and the starting physical address to obtain the target physical address.

[0027] Optionally, the method further includes:

[0028] In the case of obtaining an invalid configuration instruction, performing invalidation processing on the second preset virtual address range to obtain the second preset virtual address range after the invalidation processing;

[0029] In the case where it is determined that the target virtual address is within the second preset virtual address range after the invalidation process, it is determined that the target virtual address is wrong, and error prompt information is generated.

[0030] According to a second aspect of the present disclosure, a system memory management system is provided, comprising: an address translation module, a memory management unit, a processor, and a bus.

[0031] The address translation module is configured between the memory management unit, the processor and the bus, and is connected to the memory management unit, the processor and the bus respectively;

[0032] The address translation module is configured to receive access information from the processor and extract virtual address information from the received access information, wherein the access information is used to access a system memory and the virtual address information is used to indicate a target virtual address of the system memory;

[0033] The address translation module is further configured to, when it is determined according to the virtual address information that the target virtual address is within a first preset virtual address range, determine, from the memory management unit, according to a preset address mapping table, a starting physical address corresponding to a starting virtual address in the first preset virtual address range, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address, and the preset address mapping table includes at least the starting physical address corresponding to the starting virtual address;

[0034] The address conversion module is further configured to perform physical address calculation processing according to the target virtual address, the starting virtual address, and the starting physical address to obtain a target physical address corresponding to the target virtual address;

[0035] The address conversion module is further configured to transmit the target physical address to the bus;

[0036] The bus is used to access the system memory based on the target physical address and perform memory management on the system memory.

[0037] According to a third aspect of the present disclosure, a system memory management apparatus is provided, comprising:

[0038] an extraction unit, configured to extract virtual address information from received access information, wherein the access information is used to access a system memory, and the virtual address information is used to indicate a target virtual address of the system memory;

[0039] a determining unit, configured to, when it is determined according to the virtual address information that the target virtual address is within a first preset virtual address range, determine, according to a preset address mapping table, a starting physical address corresponding to a starting virtual address in the first preset virtual address range, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address, and the preset address mapping table includes at least the starting physical address corresponding to the starting virtual address;

[0040] a computing unit, configured to perform a physical address calculation process according to the target virtual address, the start virtual address and the start physical address, to obtain a target physical address corresponding to the target virtual address;

[0041] a processing unit, configured to access the system memory based on the target physical address and perform memory management on the system memory.

[0042] According to a fourth aspect of the present disclosure, an electronic device is provided, comprising:

[0043] at least one processor; and

[0044] a memory connected with the at least one processor; wherein,

[0045] the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method of the first aspect.

[0046] According to a fifth aspect of the present disclosure, a non-transitory computer readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable the computer to perform the method of the first aspect.

[0047] According to a sixth aspect of the present disclosure, a computer program product is provided, comprising a computer program which, when executed by a processor, implements the method of the first aspect.

[0048] The present disclosure provides a system memory management method and system, electronic device, and storage medium, which extract virtual address information from received access information, wherein the access information is used to access system memory, and the virtual address information is used to indicate a target virtual address of the system memory; when it is determined according to the virtual address information that the target virtual address is within a first preset virtual address range, the system determines a starting physical address corresponding to a starting virtual address in the first preset virtual address range according to a preset address mapping table, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address, and the preset address mapping table includes at least the starting physical address corresponding to the starting virtual address; performs physical address calculation processing based on the target virtual address, the starting virtual address, and the starting physical address to obtain a target physical address corresponding to the target virtual address; and accesses the system memory and performs memory management on the system memory based on the target physical address. Compared with related technologies, the embodiments of the present disclosure can improve the efficiency of virtual address to physical address conversion by quickly returning the conversion relationship between virtual addresses and physical addresses within a specified range, and do not need to configure translation page tables according to MMU granularity, which can reduce storage space waste and improve address conversion efficiency.

[0049] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The accompanying drawings are provided to facilitate a better understanding of the present invention and do not constitute a limitation of the present disclosure.

[0051] Figure 1 A flowchart of a system memory management method provided by an embodiment of the present disclosure;

[0052] Figure 2 A schematic diagram of the structure of a system memory management system provided by an embodiment of the present disclosure;

[0053] Figure 3 A schematic diagram of the structure of a system memory management device provided by an embodiment of the present disclosure;

[0054] Figure 4 A schematic diagram of the structure of another system memory management device provided by an embodiment of the present disclosure;

[0055] Figure 5 A schematic block diagram of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0056] The following description of exemplary embodiments of the present disclosure is made in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding. These details should be considered as merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0057] The following describes the system memory management method and system, electronic device, and storage medium according to embodiments of the present disclosure with reference to the accompanying drawings.

[0058] Figure 1 A flowchart of a system memory management method provided by an embodiment of the present disclosure.

[0059] like Figure 1 As shown, the method comprises the following steps:

[0060] Step 101: extract virtual address information from received access information, wherein the access information is used to access a system memory, and the virtual address information is used to indicate a target virtual address of the system memory.

[0061] In the embodiments of the present disclosure, when the central processing unit (CPU) needs to access system memory, it generates access information containing a virtual address. A virtual address is a target address dynamically allocated within the logical address space during program execution. System memory refers to the physical storage medium used to store data and instructions in a computer, including dynamic random access memory or other types of physical storage units.

[0062] Extracting virtual address information from the received access information specifically refers to parsing the target virtual address contained in the access request. The target virtual address is the virtual memory location that the program attempts to access, for example, a specific memory address that an application needs to read or write during execution.

[0063] Step 102, when it is determined according to the virtual address information that the target virtual address is in a first preset virtual address range, determine the starting physical address corresponding to the starting virtual address in the first preset virtual address range according to a preset address mapping table, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address, and the preset address mapping table includes at least the starting physical address corresponding to the starting virtual address.

[0064] In an embodiment of the present disclosure, the subsequent processing logic is determined by determining whether the target virtual address is within a preset first virtual address range. The first preset virtual address range is a predefined continuous virtual address interval, which is defined by a starting virtual address and an ending virtual address. The starting virtual address is the first address of the interval, for example: 0x1000_0000, and the ending virtual address is the last address of the interval, for example: 0x4200_0000. The preset address mapping table is a data structure that stores key mapping relationships, and at least contains the starting physical address corresponding to the starting virtual address. The starting physical address is the starting address of a continuous physical address space in the system memory, for example: 0x8000_0000. If the target virtual address falls within the first preset virtual address range, the system directly obtains the starting physical address by querying the mapping table, without traversing the traditional page table level by level.

[0065] Step 103 : performing physical address calculation processing according to the target virtual address, the starting virtual address, and the starting physical address to obtain a target physical address corresponding to the target virtual address.

[0066] In an embodiment of the present disclosure, based on the difference between the target virtual address and the starting virtual address, combined with the starting physical address, the final target physical address is generated through physical address calculation processing. Specifically, the target physical address is equal to the starting physical address plus the offset between the target virtual address and the starting virtual address. For example: if the target virtual address is 0x2089_8000, the starting virtual address is 0x1000_0000, and the starting physical address is 0x8000_0000, then the offset is 0x1089_8000, and the target physical address is 0x9089_8000. This calculation process can be implemented through hardware logic or a dedicated module, significantly reducing the processing cycles required for traditional page table level-by-level queries.

[0067] Step 104: Access the system memory based on the target physical address and perform memory management on the system memory.

[0068] In an embodiment of the present disclosure, the obtained target physical address is used to directly access the system memory to complete the data read or write operation. At the same time, the system performs memory management functions during this process, including but not limited to memory access permission verification, cache consistency maintenance, and address translation exception handling. The memory management unit (MMU) optimizes the cache strategy and reduces the redundant configuration of discontinuous physical address space by dynamically monitoring the access pattern of the physical address. For example: when the target virtual address exceeds the preset range, that is, the first preset virtual address range, the system switches to the traditional MMU processing flow to ensure compatibility and flexibility.

[0069] By presetting the address mapping table and offset calculation mechanism, the wasted storage space caused by the fixed granularity of traditional page tables is avoided, while the cache miss rate is significantly reduced. For application scenarios with long continuous physical addresses, this method covers the entire continuous interval with a single mapping entry, reducing the overhead of page table-level queries and thus improving address conversion efficiency. In addition, the system can flexibly adapt to the allocation requirements of continuous physical addresses of different lengths and can still operate efficiently in scenarios with physical memory fragmentation, without forcing the allocation of oversized pages or sacrificing memory utilization.

[0070] The present disclosure provides a system memory management method, which extracts virtual address information from received access information, wherein the access information is used to access system memory, and the virtual address information is used to indicate a target virtual address of the system memory; when it is determined according to the virtual address information that the target virtual address is within a first preset virtual address range, the starting physical address corresponding to the starting virtual address in the first preset virtual address range is determined according to a preset address mapping table, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address, and the preset address mapping table includes at least the starting physical address corresponding to the starting virtual address; a physical address calculation is performed based on the target virtual address, the starting virtual address, and the starting physical address to obtain a target physical address corresponding to the target virtual address; the system memory is accessed based on the target physical address and memory management is performed on the system memory. Compared with the related art, the embodiment of the present disclosure can improve the efficiency of virtual address to physical address conversion by quickly returning the conversion relationship between virtual addresses and physical addresses within a specified range, and does not require the configuration of translation page tables according to MMU granularity, which can reduce storage space waste and improve address conversion efficiency.

[0071] In one possible implementation of the embodiment of the present disclosure, after extracting the virtual address information from the received access information, it can also be implemented in but not limited to the following manner: when it is determined based on the virtual address information that the target virtual address is not within the first preset virtual address range, physical address conversion processing is performed based on the target virtual address through the preset address conversion mode in the memory management unit to obtain the target physical address.

[0072] In an embodiment of the present disclosure, when the target virtual address is not within the first preset virtual address range, the memory management unit (MMU)'s preset address translation mode is used for physical address translation. The preset address translation mode refers to a traditional multi-level page table lookup mechanism that relies on the MMU's built-in page table structure to map virtual addresses to physical addresses. The memory management unit is a hardware module in a computer system responsible for address translation, memory protection, and cache control. It stores the mapping relationship between virtual addresses and physical addresses through multi-level page tables (such as page directories and page table entries). In this mode, the patented module forwards virtual address requests sent from the bus directly to the MMU, which resolves the target virtual address level by level based on the currently active page table. For example, if the target virtual address is 0x5200_0000 and this address is not within the configured continuous virtual address range, that is, the first preset virtual address range, no offset calculation is performed, and the address request is transparently passed to the MMU. The MMU locates the corresponding physical page frame number layer by layer by consulting its cache (such as the Translation Lookaside Buffer (TLB)) or the page table in memory, ultimately assembling the complete physical address. After the MMU completes the translation, it returns the generated physical address to the bus to access system memory.

[0073] The hybrid processing mechanism ensures that the system can not only utilize efficient continuous address translation capabilities, but also be compatible with non-contiguous or scattered physical address spaces through the traditional page table mode, thereby maintaining overall conversion efficiency and resource utilization in complex memory allocation scenarios. By dynamically switching the conversion strategy, the excessive reliance of a single mapping mechanism on the continuity of physical addresses is avoided, allowing the system to flexibly respond to memory fragmentation problems while reducing the mandatory demand for over-large page allocation. For non-contiguous address areas, although the use of traditional page table translation may introduce a certain query delay, through the collaborative work of the patented module and the MMU, the system can still maintain the efficiency and stability of overall memory management, avoiding the waste of memory resources or increased configuration complexity caused by the forced expansion of the continuous mapping range.

[0074] In one possible implementation of the embodiment of the present disclosure, after extracting the virtual address information from the received access information, it can also be implemented in but not limited to the following manner: determining whether the target virtual address is in a second preset virtual address range based on the virtual address information; when it is determined that the target virtual address is in the second preset virtual address range, determining whether the target virtual address is in the first preset virtual address range based on the virtual address information; when it is determined that the target virtual address is not in the second preset virtual address range, determining that the target virtual address is wrong and generating an error prompt message, wherein the second preset virtual address range includes the first preset virtual address range.

[0075] In an embodiment of the present disclosure, after extracting the virtual address information, a hierarchical verification process of the address range is further performed to enhance the security and processing efficiency of memory access. The second preset virtual address range is a predefined global valid virtual address interval, which covers the first preset virtual address range and extends outward to a larger logical address boundary. For example: if the first preset virtual address range is 0x1000_0000 to 0x4200_0000 (corresponding to a continuous physical address mapping area), the second preset virtual address range may be set to 0x0000_0000 to 0x5000_0000 (including all virtual addresses allowed to be accessed by applications). Through a dual range verification mechanism, it is ensured that the target virtual address is within the legal range that the system globally allows access to, and it is further determined whether it falls in a continuous mapping area that requires special processing.

[0076] When it is determined that the target virtual address is within the second preset virtual address range, the original process will continue to be executed, that is, to further determine whether it belongs to the first preset virtual address range. If it does, the offset calculation logic will be triggered; if not, the traditional MMU page table translation mode will be switched to. For example: when the target virtual address is 0x3000_0000, if the address is within the second preset virtual address range but not within the first preset virtual address range, the translation will be completed directly by querying the page table through the MMU. If the target virtual address exceeds the second preset virtual address range (for example: 0x6000_0000), the address translation process will be terminated immediately, the access request will be determined to be illegal, and an error prompt message will be generated. The error prompt message is an abnormal signal fed back by the system, including but not limited to: error type code (such as: address out of bounds error) and the virtual address value that triggered the exception. This information can be notified to the operating system or upper-level application through the interrupt mechanism for error handling.

[0077] By introducing a hierarchical verification mechanism for the second preset virtual address range, illegal or out-of-bounds virtual address access requests can be filtered out at an early stage, avoiding resource waste caused by invalid addresses entering the subsequent conversion process. For example: when an application attempts to access an unallocated virtual address due to a programming error, it can be intercepted and an error can be reported in the first range verification phase without triggering the MMU's page table query or calculation logic. This not only reduces the load on the memory management unit caused by illegal access, but also shortens the error response time. In addition, the global definition of the second preset virtual address range enables the system to flexibly configure access rights at different levels. For example, the first preset virtual address range is set as a dedicated continuous memory area for high-priority tasks, while the second preset virtual address range covers the scattered memory areas of ordinary tasks, thereby achieving refined control of resource allocation. While ensuring efficient processing of continuous address mapping, the system's defense capabilities against abnormal access are strengthened, improving the robustness of overall memory management.

[0078] In one implementable manner of the embodiment of the present disclosure, before extracting the virtual address information in the received access information, it is necessary to configure a preset virtual address range and a preset address mapping table. Specifically, it can also be implemented in but not limited to the following manner: obtaining continuous physical address information in the system memory, wherein the continuous physical address information includes multiple segments of continuous physical addresses in the system memory, and the multiple segments of continuous physical addresses do not overlap with each other; performing virtual address range configuration processing on the multiple segments of continuous physical addresses respectively to obtain a target virtual address range, wherein the first preset virtual address range includes the multiple segments of continuous physical configurations corresponding to the target virtual address ranges, and the multiple target virtual address ranges do not overlap with each other.

[0079] In an embodiment of the present disclosure, during the initialization phase or the dynamic memory allocation process, the physical memory layout is actively scanned to identify available continuous physical address space. Continuous physical address information refers to multiple independent and non-overlapping physical address segments parsed from the system memory, each of which is defined by a starting physical address and a length. For example, the system may detect that the physical address 0x8000_0000 to 0xB200_0000 is a continuous space of 800 megabytes (MB), and there are three 50MB continuous spaces starting at 0xC000_0000, 0xD000_0000, and 0xE000_0000. These physical address segments are obtained through the interface provided by the memory controller or the operating system kernel, and their distribution may be affected by hardware architecture limitations or dynamic memory allocation strategies.

[0080] A virtual address range configuration process is performed on each segment of continuous physical addresses. This process refers to dynamically allocating a corresponding virtual address interval, namely a target virtual address range, to each segment of physical addresses, and ensuring that each virtual address interval does not overlap with each other in the logical address space. For example: an 800MB physical segment is mapped to virtual addresses 0x1000_0000 to 0x4200_0000, and three 50MB physical segments are mapped to 0x5000_0000 to 0x5320_0000, 0x5400_0000 to 0x5720_0000, and 0x5800_0000 to 0x5B20_0000, respectively. The target virtual address range is a set of virtual-physical mapping relationships formed after the configuration is completed, and each element thereof corresponds to a segment of continuous physical addresses and its bound virtual address interval. The first preset virtual address range is composed of multiple target virtual address ranges of this type, for example: the union of the above four intervals.

[0081] During configuration, a linear relationship between virtual and physical addresses is established using a pre-set strategy (e.g., linear mapping in physical address order or using a customized offset based on application requirements). Key mapping parameters (e.g., the start and end addresses of each target virtual address range and the corresponding starting physical address) are written to configuration registers or dedicated storage structures. This pre-processing mechanism enables subsequent virtual address accesses to quickly identify contiguous regions and perform efficient conversions based on the pre-configured mapping rules.

[0082] By actively analyzing physical memory continuity and dynamically configuring multi-segment virtual address mappings, the system can maximize the advantages of continuous address translation even when physical memory is fragmented, avoiding the problem of traditional solutions being forced to fall back to small-grained page table queries due to physical memory discontinuity. At the same time, non-overlapping virtual address configurations eliminate the risk of mapping conflicts and ensure the determinism of the address translation process. This preprocessing mechanism also reduces the overhead of dynamically adjusting mapping relationships at runtime, allowing the system to adapt to complex and changing physical memory allocation scenarios, such as quickly reconstructing efficient mapping relationships during virtual machine migration or real-time task scheduling without interrupting services or reloading complete page tables.

[0083] In an implementation of the embodiments of the present disclosure, the method for configuring the virtual address range of the plurality of continuous physical addresses can be implemented by, but is not limited to, the following: performing virtual address corresponding processing on a first start physical address of a target continuous physical address to obtain a first start virtual address, wherein the target continuous physical address is any one of the plurality of continuous physical addresses; performing virtual address corresponding processing on a first end physical address of the target continuous physical address to obtain a first end virtual address; determining a virtual address range between the first start virtual address and the first end virtual address as the target virtual address range, and storing the first start physical address and the first start virtual address corresponding to the first start physical address in the preset address mapping table.

[0084] In the embodiments of the present disclosure, the process of configuring the virtual address range of the plurality of continuous physical addresses is implemented by establishing a linear mapping relationship between the virtual address and the physical address, thereby ensuring the efficiency and predictability of the conversion process. The target continuous physical address refers to any continuous physical address space identified from the system memory, for example, a physical segment starting at 0x8000_0000 and having a length of 800 MB. The first start physical address is the start position of the physical segment, for example, 0x8000_0000, and the first end physical address is the end address of the segment, for example, 0xB200_0000 (calculated by adding the length to the start address). The virtual address corresponding processing refers to allocating a corresponding virtual address interval to the continuous physical address segment, and the mapping rule usually follows the linear offset principle, that is, the virtual address and the physical address maintain a fixed offset. For example, if the physical segment start address 0x8000_0000 is mapped to the virtual address 0x1000_0000, the first start virtual address is 0x1000_0000. Similarly, the first end virtual address is calculated by adding the length of the physical segment to the virtual start address, for example, 0x1000_0000 plus 800 MB to obtain 0x4200_0000. The target virtual address range is the virtual address interval (0x1000_0000 to 0x4200_0000) thus determined, which forms a one-to-one linear mapping relationship with the physical segment.

[0085] It should be further noted that the plurality of continuous physical addresses are discontinuous, that is, the plurality of continuous physical addresses do not overlap and are not adjacent, indicating that the target segment continuous physical address in the plurality of continuous physical addresses is separated from the other segment continuous physical addresses. The target segment continuous physical address is any one of the plurality of continuous physical addresses, and the other segment continuous physical address is each continuous physical address in the plurality of continuous physical addresses except the target segment continuous physical address.

[0086] In this process, the first starting physical address (0x8000_0000) and its corresponding first starting virtual address (0x1000_0000) are stored as a key mapping entry in the preset address mapping table. The preset address mapping table is an optimized data structure, usually implemented in the form of a register group or a dedicated cache, which only stores the mapping relationship of the first address of each continuous physical segment, rather than the detailed entries of all pages in the traditional page table. For example: for the above 800MB physical segment, only the entry of 0x1000_0000 (virtual) -> 0x8000_0000 (physical) needs to be recorded in the mapping table, and there is no need to configure each 4 kilobyte (KB) page separately. This configuration method can greatly reduce the storage overhead, and at the same time, during address translation, the target physical address can be quickly generated through simple offset calculation based on the mapping relationship of the first address. For other continuous physical segments (such as three 50MB physical segments), the same process is repeated, and non-overlapping virtual address intervals are allocated to each segment, and the starting address mapping relationship of each segment is added to the preset address mapping table. In this way, multiple continuous regions scattered in the physical memory can be flexibly adapted without being forced to be merged into a single super page.

[0087] Specifically, the content in the preset address mapping table can be represented as: the preset address mapping table includes the first starting physical address of each of the multiple continuous physical addresses, and the first starting virtual address corresponding to each of the multiple first starting physical addresses, and the multiple first starting physical addresses at least include the starting physical address, and the multiple first starting virtual addresses at least include the starting virtual address.

[0088] In obtaining the target physical address, the following methods can be used, but are not limited to: determining the starting virtual address from the multiple first starting virtual addresses in the preset address mapping table based on the first preset virtual address range in which the target virtual address is located; and performing address offset calculation processing according to the target virtual address, the starting virtual address, and the starting physical address corresponding to the starting virtual address in the preset address mapping table, to obtain the target physical address.

[0089] Through the linear mapping rule and the simplified mapping table design, the storage resource occupation of the traditional multi-level page table is significantly reduced, and the mapping efficiency decline caused by physical memory fragmentation is avoided. For example: in the scenario of four non-continuous physical segments, only four entries need to be maintained in the mapping table to cover all continuous regions, while the traditional page table may need thousands of entries. In addition, the non-overlapping of the virtual address interval ensures the uniqueness and certainty of the address translation process, eliminates the risk of mapping conflict, and improves the system stability.

[0090] In one possible implementation of the embodiment of the present disclosure, when performing physical address calculation processing based on the target virtual address, the starting virtual address and the starting physical address, it can also be implemented in but not limited to the following manner: performing address subtraction calculation based on the target virtual address and the starting virtual address to obtain an address deviation; performing address addition calculation based on the address deviation and the starting physical address to obtain the target physical address.

[0091] In an embodiment of the present disclosure, in the physical address calculation process, a linear operation mechanism is used to realize the rapid conversion of virtual address to physical address, and the virtual address offset is directly superimposed on the corresponding physical base address using a preset continuous mapping relationship. Address subtraction calculation refers to performing an arithmetic subtraction operation on the target virtual address and the starting virtual address to determine the logical offset between the two. For example: if the target virtual address is 0x2089_8000 and the starting virtual address is 0x1000_0000, the address deviation is 0x1089_8000 (i.e., 0x2089_8000 - 0x1000_0000). The address deviation represents the offset distance of the target virtual address relative to the starting position of the first preset continuous virtual address range, which is essentially the relative displacement within the virtual address space.

[0092] Address addition calculation is to perform an arithmetic addition operation on the calculated address offset and the starting physical address, thereby converting the offset in virtual space into the actual location in physical space. For example: if the starting physical address is 0x8000_0000, after adding the address offset 0x1089_8000, the target physical address is 0x9089_8000.

[0093] The linear computation mechanism significantly improves the conversion efficiency of continuous address ranges by eliminating the hierarchical traversal overhead of traditional page table queries. The address subtraction and addition operations can be completed in just a few clock cycles at the hardware level. Compared to the hundreds of cycles of latency required by traditional MMUs to load multi-level page tables from memory when a page table miss occurs, the performance improvement is particularly significant. In addition, the need to store redundant page table entries is avoided through direct mapping. For example, for a 1-gigabyte (GB) continuous address space, a traditional 4KB page table needs to store 262,144 entries, while the present disclosure only needs to maintain a single mapping relationship between the starting virtual address and the starting physical address, significantly reducing storage resource usage.

[0094] The dynamic calculation feature of the address deviation enables the system to flexibly adapt to the allocation of continuous physical addresses of different lengths. Even if the length of the physical segment changes randomly (such as 800MB or 50MB), only the starting address configuration needs to be updated without the need to reconstruct the entire page table. This mechanism is particularly important in scenarios with physical memory fragmentation. By configuring multiple independent continuous mapping intervals, scattered physical segments can be efficiently mapped to virtual space while maintaining the consistency of the conversion process. For example, in a scenario with four segments of non-contiguous physical memory, full range coverage can be achieved through four sets of independent start and end address configurations, while traditional solutions may result in reduced cache utilization due to page table granularity limitations. The calculation mode also enhances the real-time performance of the system through deterministic operation paths, ensuring that memory accesses for critical tasks can meet strict timing requirements. For example, when handling high-priority interrupts in a real-time operating system, response delays introduced by page table query uncertainty can be avoided.

[0095] In one possible implementation of the embodiment of the present disclosure, when the system receives an invalid configuration, it is necessary to shut down the current forwarding function, i.e., the address translation function. When an access request for the range is received subsequently, an error prompt will be given. Specifically, the following method may be used, but is not limited to: when an invalid configuration instruction is obtained, the second preset virtual address range is invalidated to obtain the second preset virtual address range after the invalidation processing; when it is determined that the target virtual address is within the second preset virtual address range after the invalidation processing, the target virtual address is determined to be wrong, and an error prompt message is generated.

[0096] In an embodiment of the present disclosure, during the operation of the system, if an invalid configuration instruction is received (for example, a memory area disable command triggered by an operating system or a security module), a dynamic adjustment process of the second preset virtual address range will be triggered. The invalid configuration instruction is an external input control signal, which contains a virtual address interval identifier or security policy parameters to be invalidated, for example, requiring immediate prohibition of access rights to a certain virtual address segment. Invalidation processing refers to modifying the validity status of the second preset virtual address range according to the content of the instruction, for example, marking part or all of the sub-intervals in the original second range (such as 0x0000_0000 to 0x5000_0000) as inaccessible.

[0097] If the target virtual address is detected to fall within the second preset virtual address range after invalidation (for example, address 0x3500_0000 is within the disabled range of 0x3000_0000 to 0x4000_0000), the address translation process is immediately terminated and the access request is deemed illegal. The error message is a system-generated exception feedback signal that includes information such as the error type (e.g., address access violation), the virtual address value that triggered the exception, and a timestamp.

[0098] By dynamically responding to invalid configuration instructions and updating the second preset virtual address range in real time, memory access policies can be flexibly adjusted at runtime. For example, this can quickly isolate the attacked area when a memory security threat is detected, or reclaim the address space of released tasks in multi-tasking scheduling. This effectively prevents illegal access caused by outdated or incorrect address mappings.

[0099] Furthermore, in order to facilitate understanding of the implementation process of the present disclosure, the present disclosure also provides an example for illustration:

[0100] Demand scenario:

[0101] 1. The address translation page table size is 4KB;

[0102] 2. VA address range (second default virtual address range) requires 1GB;

[0103] 3. The largest continuous physical address space is 800MB, and the rest of the address range is fragmented in 4KB blocks;

[0104] 4. The VA starting address is 0x1000 0000 (the starting virtual address of the first preset virtual address range);

[0105] 5.PA continuous addresses are 0x8000 0000 - 0xb200 0000;

[0106] 6. The fragmented address range is above 0xa000 0000 address.

[0107] Configuration process:

[0108] 1. The software configures the valid VA address range to be 0x1000_0000~0x4200_0000 (the first preset virtual address range);

[0109] 2. The software configures the corresponding PA of 0x1000_0000 (starting virtual address) to 0x8000_0000 (starting physical address). Multi-level page tables can be used, and only this one page table needs to be configured;

[0110] 3. The software then configures the PA address corresponding to 0x4200_0000 - 0x5000_0000 VA (PA acquisition in this space still uses the traditional MMU method).

[0111] Access process:

[0112] 1. The VA value from the bus, such as 0x2089_8000 (target virtual address), falls in the range of 0x1000_0000-0x4200_0000. Then the MMU is accessed through the 0x1000_0000 VA to obtain the corresponding PA 0x8000_0000. At the same time, by calculating:

[0113] 0x2089_8000-0x1000_0000+0x8000_0000 gets the PA value (target physical address) of 0x9089_8000.

[0114] 2. If VA is greater than 0x4200_0000, the request is forwarded to the MMU, and the MMU returns PA through the preset address translation mode.

[0115] Figure 2 A schematic diagram of the structure of a system memory management system provided by an embodiment of the present disclosure.

[0116] like Figure 2 As shown, it includes: an address translation module 21, a memory management unit 22, a processor 23, and a bus 24.

[0117] The address translation module 21 is configured between the memory management unit 22, the processor 23 and the bus 24, and is connected to the memory management unit 22, the processor 23 and the bus 24 respectively;

[0118] The address translation module 21 is configured to receive access information from the processor 23 and extract virtual address information from the received access information, wherein the access information is used to access a system memory and the virtual address information is used to indicate a target virtual address of the system memory;

[0119] The address translation module 21 is further configured to, when it is determined according to the virtual address information that the target virtual address is within a first preset virtual address range, determine, from the memory management unit 22, according to a preset address mapping table, a starting physical address corresponding to a starting virtual address in the first preset virtual address range, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address, and the preset address mapping table includes at least the starting physical address corresponding to the starting virtual address;

[0120] The address conversion module 21 is further configured to perform physical address calculation processing according to the target virtual address, the starting virtual address, and the starting physical address to obtain a target physical address corresponding to the target virtual address;

[0121] The address conversion module 21 is further configured to transmit the target physical address to the bus 24;

[0122] The bus 24 is used to access the system memory based on the target physical address and perform memory management on the system memory.

[0123] Among them, the system memory management system realizes efficient mapping and access optimization of continuous physical address space by introducing hardware architecture innovation of the address translation module. As a core component, the address translation module is physically deployed between the memory management unit (MMU), the central processing unit (CPU) and the system bus to form a three-way communication link. The memory management unit is a hardware unit responsible for traditional virtual address translation, memory protection and cache control. It contains a translation backup buffer and page table traversal logic. The processor refers to the CPU core that performs computing tasks. During operation, it generates access requests containing virtual addresses, such as reading instructions or writing data. The bus is a data transmission channel connecting the processor, memory and peripherals, and follows a specific communication protocol for signal transmission.

[0124] After receiving the access information sent by the processor, the address conversion module first parses the target virtual address. The access information is a complete request packet initiated by the processor that contains the operation type (read / write), data size and virtual address, for example: a command requesting to read 32 bits of data at address 0x2089_8000. The target virtual address is the logical memory location specified in the request, and its value is dynamically generated when the program is running. The address conversion module determines whether the target virtual address falls within the first preset virtual address range through the internal status register or configuration memory. The first preset virtual address range is one or more continuous virtual address intervals predefined by the system, for example: 0x1000_0000 to 0x4200_0000, which corresponds to the same continuous space segment in physical memory. The preset address mapping table is a simplified mapping relationship set stored inside the memory management unit, which only records the starting virtual address of each continuous virtual address range and its corresponding starting physical address. For example: the entry 0x1000_0000→0x8000_0000 indicates that the starting position of the virtual range is mapped to physical memory 0x8000_0000.

[0125] If the target virtual address falls within the first preset virtual address range, the address translation module sends a query request to the memory management unit for the starting virtual address. For example, for the target address 0x2089_8000, the module first confirms that it is within the range 0x1000_0000 to 0x4200_0000, then queries the MMU for the starting physical address 0x8000_0000 corresponding to 0x1000_0000. During this process, the memory management unit only needs to return the mapping of the starting address, without traversing the entire page table hierarchy. The address translation module then performs physical address calculation, adding the difference between the target virtual address and the starting virtual address (e.g., 0x1089_8000) to the starting physical address (0x8000_0000), generating the final target physical address 0x9089_8000.

[0126] The calculation process is implemented using dedicated hardware circuits (e.g., chains of subtractors and adders) to ensure completion within a single cycle. Finally, the target physical address is transmitted via the bus to the memory controller, which uses the address signal to access the corresponding physical memory location and perform data read and write operations. Memory management functions are performed simultaneously during this process, including checking access rights to the physical address, updating cache line status flags, and handling address alignment exceptions.

[0127] Hardware-level mapping optimizations in the address translation module significantly reduce the computational load of traditional MMUs in continuous address translation scenarios. For long continuous virtual address ranges, the address translation module only requires a single start address query to cover the entire range, avoiding the latency and storage overhead of traditional page table level-by-level queries.

[0128] Corresponding to the above-mentioned system memory management method, the present invention also provides a system memory management device. Since the device embodiment of the present invention corresponds to the above-mentioned method embodiment, details not disclosed in the device embodiment can be referred to the above-mentioned method embodiment and will not be repeated in this invention.

[0129] Figure 3 A schematic diagram of the structure of a system memory management device provided by an embodiment of the present disclosure is shown as follows: Figure 3 Shown, including:

[0130] an extracting unit 31, configured to extract virtual address information from received access information, wherein the access information is used to access a system memory, and the virtual address information is used to indicate a target virtual address of the system memory;

[0131] a determining unit 32 configured to, when it is determined according to the virtual address information that the target virtual address is within a first preset virtual address range, determine, according to a preset address mapping table, a starting physical address corresponding to a starting virtual address in the first preset virtual address range, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address, and the preset address mapping table includes at least the starting physical address corresponding to the starting virtual address;

[0132] A calculation unit 33 is configured to perform physical address calculation processing according to the target virtual address, the starting virtual address, and the starting physical address to obtain a target physical address corresponding to the target virtual address;

[0133] The processing unit 34 is configured to access the system memory based on the target physical address and perform memory management on the system memory.

[0134] The system memory management device provided by the present disclosure extracts virtual address information from received access information, wherein the access information is used to access system memory, and the virtual address information is used to indicate a target virtual address of the system memory; when it is determined according to the virtual address information that the target virtual address is within a first preset virtual address range, the device determines a starting physical address corresponding to a starting virtual address in the first preset virtual address range according to a preset address mapping table, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address, and the preset address mapping table includes at least the starting physical address corresponding to the starting virtual address; performs physical address calculation processing based on the target virtual address, the starting virtual address, and the starting physical address to obtain a target physical address corresponding to the target virtual address; and accesses the system memory and performs memory management on the system memory based on the target physical address. Compared with the related art, the embodiment of the present disclosure can improve the efficiency of virtual address to physical address conversion by quickly returning the conversion relationship between virtual addresses and physical addresses within a specified range, and does not require configuring translation page tables according to MMU granularity, which can reduce storage space waste and improve address conversion efficiency.

[0135] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 4 As shown, the device also includes:

[0136] The conversion unit 35 is used to perform physical address conversion processing according to the target virtual address through the preset address conversion mode in the memory management unit to obtain the target physical address when it is determined according to the virtual address information that the target virtual address is not within the first preset virtual address range.

[0137] Furthermore, in a possible implementation of the embodiment of the present disclosure, the determining unit 32 is further configured to determine, according to the virtual address information, whether the target virtual address is within a second preset virtual address range;

[0138] The determining unit 32 is further configured to, when determining that the target virtual address is within the second preset virtual address range, determine whether the target virtual address is within the first preset virtual address range according to the virtual address information;

[0139] The determining unit 32 is further configured to, when it is determined that the target virtual address is not within the second preset virtual address range, determine that the target virtual address is wrong and generate error prompt information, wherein the second preset virtual address range includes the first preset virtual address range.

[0140] Furthermore, in a possible implementation of the embodiment of the present disclosure, as Figure 4 As shown, the device also includes:

[0141] an acquiring unit 36, configured to acquire continuous physical address information in the system memory, wherein the continuous physical address information includes multiple segments of continuous physical addresses in the system memory, and the multiple segments of continuous physical addresses do not overlap with each other;

[0142] The configuration unit 37 is used to perform virtual address range configuration processing on the multiple continuous physical addresses respectively to obtain a target virtual address range, wherein the first preset virtual address range includes the target virtual address ranges corresponding to the multiple continuous physical addresses, and the multiple target virtual address ranges do not overlap with each other.

[0143] Furthermore, in a possible implementation of the embodiment of the present disclosure, the configuration unit 37 is further configured to:

[0144] Performing virtual address correspondence processing on a first starting physical address of the target continuous physical address to obtain a first starting virtual address, wherein the target continuous physical address is any one of the multiple continuous physical addresses;

[0145] Performing virtual address correspondence processing on the first end physical address of the target continuous physical address to obtain a first end virtual address;

[0146] A virtual address range between the first starting virtual address and the first ending virtual address is determined as the target virtual address range, and the first starting physical address and the first starting virtual address corresponding to the first starting physical address are stored in the preset address mapping table.

[0147] Furthermore, in a possible implementation of the embodiment of the present disclosure, the calculation unit 33 is further configured to:

[0148] Performing address subtraction calculation based on the target virtual address and the starting virtual address to obtain an address deviation;

[0149] An address addition calculation is performed according to the address deviation and the starting physical address to obtain the target physical address.

[0150] Furthermore, in a possible implementation of the embodiment of the present disclosure, the processing unit 34 is further configured to:

[0151] In the case of obtaining an invalid configuration instruction, performing invalidation processing on the second preset virtual address range to obtain the second preset virtual address range after the invalidation processing;

[0152] In the case where it is determined that the target virtual address is within the second preset virtual address range after the invalidation process, it is determined that the target virtual address is wrong, and error prompt information is generated.

[0153] It should be noted that the above explanation of the method embodiment is also applicable to the device of the embodiment of the present disclosure, and the principles are the same, which is no longer limited in the embodiment of the present disclosure.

[0154] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium, and a computer program product.

[0155] Figure 5 A schematic block diagram of an example electronic device 500 that can be used to implement embodiments of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0156] like Figure 5As shown, electronic device 500 includes a device computing unit 501, which can perform various appropriate actions and processes based on computer programs stored in ROM (Read-Only Memory) 502 or loaded from storage unit 508 into RAM (Random Access Memory) 503. RAM 503 may also store various programs and data required for the operation of electronic device 500. Device computing unit 501, ROM 502, and RAM 503 are interconnected via a device bus 504. An I / O (Input / Output) interface 505 is also connected to device bus 504.

[0157] Multiple components in the electronic device 500 are connected to the I / O interface 505, including: an input unit 506, such as a keyboard, a mouse, etc.; an output unit 507, such as various types of displays, speakers, etc.; a storage unit 508, such as a magnetic disk, an optical disk, etc.; and a communication unit 509, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 509 allows the electronic device 500 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0158] The device computing unit 501 can be any general-purpose and / or specialized processing component with processing and computing capabilities. Some examples of the device computing unit 501 include, but are not limited to, a CPU (Central Processing Unit), a GPU (Graphic Processing Unit), various specialized AI (Artificial Intelligence) computing chips, various device computing units that run machine learning model algorithms, a DSP (Digital Signal Processor), and any suitable processor, controller, microcontroller, etc. The device computing unit 501 performs the various methods and processes described above, such as the system memory management method. For example, in some embodiments, the system memory management method may be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 508. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 500 via the ROM 502 and / or the communication unit 509. When the computer program is loaded into the RAM 503 and executed by the device computing unit 501, one or more steps of the method described above may be performed. Alternatively, in other embodiments, the device computing unit 501 may be configured to execute the aforementioned system memory management method in any other appropriate manner (for example, by means of firmware).

[0159] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, FPGAs (Field Programmable Gate Arrays), ASICs (Application-Specific Integrated Circuits), ASSPs (Application-Specific Standard Products), SOCs (System on Chips), CPLDs (Complex Programmable Logic Devices), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special-purpose or general-purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0160] The program code for implementing the method of the present disclosure can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device so that when the program code is executed by the processor or controller, the functions / operations specified in the flow chart and / or block diagram are implemented. The program code can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0161] In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of machine-readable storage media may include an electrical connection based on one or more wires, a portable computer disk, a hard disk, RAM, ROM, EPROM (Electrically Programmable Read-Only-Memory) or flash memory, optical fiber, CD-ROM (Compact Disc Read-Only Memory), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0162] To provide for user interaction, the systems and techniques described herein can be implemented on a computer having a display device (e.g., a CRT (Cathode-Ray Tube) or LCD (Liquid Crystal Display) monitor) for displaying information to the user, and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide for user interaction; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback), and input from the user can be received in any form, including acoustic input, voice input, or tactile input.

[0163] The systems and techniques described herein can be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: LAN (Local Area Network), WAN (Wide Area Network), the Internet, and blockchain networks.

[0164] A computer system may include a client and a server. The client and server are generally remote from each other and typically interact via a communication network. This client-server relationship arises through computer programs running on the respective computers, establishing a client-server relationship. The server may be a cloud server, also known as a cloud computing server or cloud host. This server is a host product within the cloud computing service ecosystem that addresses the management difficulties and limited scalability of traditional physical servers and VPS services ("Virtual Private Servers" or "VPS"). The server may also be a server in a distributed system or a server integrated with blockchain.

[0165] It's important to note that artificial intelligence (AI) is the study of how computers can simulate certain human thought processes and intelligent behaviors (such as learning, reasoning, thinking, and planning). This encompasses both hardware and software technologies. AI hardware technologies generally include sensors, specialized AI chips, cloud computing, distributed storage, and big data processing. AI software technologies primarily encompass computer vision, speech recognition, natural language processing, machine learning / deep learning, big data processing, and knowledge graphs.

[0166] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this disclosure can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved. This is not limited herein.

[0167] The above specific embodiments do not constitute a limitation on the scope of protection of this disclosure. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure shall be included within the scope of protection of this disclosure.

Claims

1. A method for system memory management, characterized in that: include: Extracting virtual address information from the received access information, wherein the access information is used to access a system memory, and the virtual address information is used to indicate a target virtual address of the system memory; In a case where it is determined according to the virtual address information that the target virtual address is within a first preset virtual address range, determining a starting physical address corresponding to a starting virtual address in the first preset virtual address range according to a preset address mapping table, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address; the preset address mapping table is a data structure storing a key mapping relationship, and includes at least a starting physical address corresponding to the starting virtual address; the starting physical address is a first address of a continuous physical address space in the system memory; Performing physical address calculation processing according to the target virtual address, the starting virtual address, and the starting physical address to obtain a target physical address corresponding to the target virtual address; wherein the target physical address is equal to the starting physical address plus an offset between the target virtual address and the starting virtual address; accessing the system memory based on the target physical address and performing memory management on the system memory; After extracting the virtual address information from the received access information, the method further includes: When it is determined according to the virtual address information that the target virtual address is not within the first preset virtual address range, physical address conversion processing is performed according to the target virtual address through the preset address conversion mode in the memory management unit to obtain the target physical address; wherein, the preset address conversion mode is a multi-level page table query mechanism, which relies on the page table structure built into the memory management unit to realize the mapping of virtual address to physical address.

2. The system memory management method according to claim 1, characterized in that: After extracting the virtual address information from the received access information, the method further includes: determining, according to the virtual address information, whether the target virtual address is within a second preset virtual address range; In a case where it is determined that the target virtual address is within the second preset virtual address range, determining whether the target virtual address is within the first preset virtual address range according to the virtual address information; When it is determined that the target virtual address is not in the second preset virtual address range, the target virtual address is determined to be wrong and error prompt information is generated, wherein the second preset virtual address range includes the first preset virtual address range.

3. The system memory management method according to claim 1, wherein: Before extracting the virtual address information from the received access information, the method further includes: Acquire continuous physical address information in the system memory, wherein the continuous physical address information includes multiple segments of continuous physical addresses in the system memory, and the multiple segments of continuous physical addresses do not overlap with each other; The multiple continuous physical addresses are respectively subjected to virtual address range configuration processing to obtain a target virtual address range, wherein the first preset virtual address range includes the target virtual address ranges corresponding to the multiple continuous physically configured segments, and the multiple target virtual address ranges do not overlap with each other.

4. The system memory management method according to claim 3, characterized in that: The performing virtual address range configuration processing on the multiple consecutive physical addresses to obtain a target virtual address range includes: Performing virtual address correspondence processing on a first starting physical address of the target continuous physical address to obtain a first starting virtual address, wherein the target continuous physical address is any one of the multiple continuous physical addresses; Performing virtual address correspondence processing on the first end physical address of the target continuous physical address to obtain a first end virtual address; A virtual address range between the first starting virtual address and the first ending virtual address is determined as the target virtual address range, and the first starting physical address and the first starting virtual address corresponding to the first starting physical address are stored in the preset address mapping table.

5. The system memory management method according to claim 1, wherein: The performing physical address calculation processing according to the target virtual address, the starting virtual address, and the starting physical address to obtain the target physical address corresponding to the target virtual address includes: Performing address subtraction calculation based on the target virtual address and the starting virtual address to obtain an address deviation; An address addition calculation is performed according to the address deviation and the starting physical address to obtain the target physical address.

6. The system memory management method according to claim 2, wherein: The method further comprises: In the case of obtaining an invalid configuration instruction, performing invalidation processing on the second preset virtual address range to obtain the second preset virtual address range after the invalidation processing; In the case where it is determined that the target virtual address is within the second preset virtual address range after the invalidation process, it is determined that the target virtual address is wrong, and error prompt information is generated.

7. A system for system memory management, characterized in that: The system includes: an address translation module, a memory management unit, a processor, and a bus. The address translation module is configured between the memory management unit, the processor and the bus, and is connected to the memory management unit, the processor and the bus respectively; The address translation module is configured to receive access information from the processor and extract virtual address information from the received access information, wherein the access information is used to access a system memory and the virtual address information is used to indicate a target virtual address of the system memory; The address translation module is further configured to, when it is determined according to the virtual address information that the target virtual address is within a first preset virtual address range, determine, from the memory management unit, according to a preset address mapping table, a starting physical address corresponding to a starting virtual address in the first preset virtual address range, wherein the first preset virtual address range includes a starting virtual address and an ending virtual address; the preset address mapping table is a data structure storing a key mapping relationship, and includes at least a starting physical address corresponding to the starting virtual address; and the starting physical address is a first address of a continuous physical address space in the system memory; The address conversion module is further configured to perform physical address calculation processing based on the target virtual address, the starting virtual address, and the starting physical address to obtain a target physical address corresponding to the target virtual address; wherein the target physical address is equal to the starting physical address plus an offset between the target virtual address and the starting virtual address; The address conversion module is further configured to transmit the target physical address to the bus; The bus is used to access the system memory based on the target physical address and perform memory management on the system memory; The address conversion module is also used to, when it is determined according to the virtual address information that the target virtual address is not within the first preset virtual address range, perform physical address conversion processing according to the target virtual address through a preset address conversion mode in the memory management unit to obtain the target physical address; wherein the preset address conversion mode is a multi-level page table query mechanism.

8. An electronic device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 6.

9. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: The computer instructions are used to cause the computer to execute the method according to any one of claims 1 to 6.

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