Multi-link automatic matching device, control method and electronic equipment

Abstract

The present application discloses a multi-link automatic matching device, a control method and an electronic device, which relate to the technical field of electronic devices and include a high-speed signal processing module, a capacitor, a plurality of signal operation management linkers and an adaptive matcher. The capacitor can identify the voltage type of the output signal of the high-speed signal processing module, so that the adaptive matcher can distribute the output signal of the high-speed signal processing module to the signal operation management linker whose rated voltage matches its voltage type, thereby solving the technical problem that the same PCB cannot be compatible with two or more link topologies, and achieving the technical effect of automatically matching the corresponding signal operation management linker according to the voltage of the output signal of the high-speed signal processing module.

Description

Technical Field

[0001] The present application relates to the technical field of electronic equipment, and in particular to a multi-link automatic matching device, a control method and an electronic device. Background Art

[0002] With the rapid development of artificial intelligence fields such as robotics, speech recognition, image recognition, natural language processing, expert systems, machine learning, and computer vision, users have increasingly higher requirements for data transmission and data processing. As data transmission rates increase, users have increasingly higher requirements for signal quality.

[0003] However, different manufacturers produce different link topologies for their interconnects. Limited by the number of pins on the retimer chip outputting signals—a set of x16 PCIE (Peripheral Component Interconnect Express) signals—it's impossible to combine different link topologies on the same printed circuit board (PCB). If users need compatibility with both link topologies, they need to design two boards, which is a significant expense. Summary of the Invention

[0004] This application provides a multi-link automatic matching device, comprising: a high-speed signal processing module, multiple signal operation and management linkers, and an adaptive matcher, wherein the multiple signal operation and management linkers have different rated voltages. The adaptive matcher is configured to receive the output signal of the high-speed signal processing module and distribute the output signal to the corresponding signal operation and management linker based on the voltage of the output signal of the high-speed signal processing module. This device at least solves the problem of compatible linkers with different link topologies on the same PCB board in the related art.

[0005] The present application also provides an automatic control method for an adaptive matcher, which is applied in the above-mentioned multi-link automatic matching device, including: identifying the voltage of the output signal of the high-speed signal processing module; and distributing the output signal to the corresponding signal operation management linker according to the identified voltage.

[0006] The present application provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of the above-mentioned automatic control method of the adaptive matcher when executing the computer program.

[0007] Through the present application, since an adaptive matcher is set at the output end of the high-speed signal processing module, the adaptive matcher can distribute the output signal of the high-speed signal processing module to a signal operation management link whose rated voltage matches its voltage type according to the voltage type of the output signal of the high-speed signal processing module. Therefore, the technical problem that the same PCB cannot be compatible with two or more link topologies can be solved, and the technical effect of automatically matching the corresponding signal operation management link according to the voltage of the output signal of the high-speed signal processing module can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0009] Figure 1 A schematic diagram of the internal connections of a multi-link automatic matching device provided in an embodiment of the present application;

[0010] Figure 2 A diagram showing the relative position relationship between a preset point of an adaptive matching needle and an output end of an adaptive matching device provided in an embodiment of the present application;

[0011] Figure 3 A schematic diagram of the packaging structure of an adaptive matcher provided in an embodiment of the present application;

[0012] Figure 4 A schematic diagram of the arrangement of input and output terminals in a packaging structure of an adaptive matcher provided in an embodiment of the present application;

[0013] Figure 5 A step diagram of an automatic control method for an adaptive matcher provided in an embodiment of the present application. DETAILED DESCRIPTION

[0014] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0015] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0016] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0017] Figure 1 For a schematic diagram of the internal connection of a multi-link automatic matching device provided in the embodiment of the present application, please refer to Figure 1 The present application provides a multi-link automatic matching device 100, comprising: a high-speed signal processing module 10, a plurality of signal operation management linkers 30, and an adaptive matcher 20, wherein the rated voltages of the plurality of signal operation management linkers 30 are different; the adaptive matcher 20 is used to receive the output signal of the high-speed signal processing module 10, and distribute the output signal to the corresponding signal operation management linker 30 according to the voltage of the output signal of the high-speed signal processing module 10. It should be noted that Figure 1 The example only illustrates a case where the multi-link automatic matching device 100 includes three signal operation management linkers 30 . It is understandable that the number of signal operation management linkers 30 may be greater than three, and this application does not limit this.

[0018] In an optional embodiment provided in this application, please refer to Figure 1The multi-link automatic matching device 100 includes a high-speed signal processing module 10. Exemplarily, the high-speed signal processing module 10 includes a retimer chip or other processor with high-speed signal processing capabilities, though this disclosure is not limited thereto. A retimer chip is an integrated circuit chip used for high-speed signal transmission. It uses an internal clock data recovery (CDR) circuit to extract clock information from the input signal and resample and reshape the signal to eliminate jitter, attenuation, and distortion introduced during transmission. The retimer retimes the signal based on the recovered clock signal, ensuring accurate signal timing, thereby extending the signal's transmission distance and improving transmission quality. Its core function is to regenerate, reshape and retime the signal to ensure the integrity and stability of the signal in long-distance or complex transmission environments, and can solve the problem of signal attenuation after long-distance transmission or complex circuit board wiring; secondly, the Retimer chip can extend the signal transmission distance, so that devices can reliably interact with each other over a longer distance. For example, in the USB or PCIE interface, the Retimer chip can overcome the limitations of signal transmission distance to extend the transmission distance; the Retimer chip can repair signal distortion caused by impedance mismatch, reflection, crosstalk and other problems, ensure accurate data transmission, and improve signal integrity; the Retimer chip supports high-speed data transmission by optimizing the timing and quality of the signal, meeting application scenarios with high requirements for bandwidth and rate such as 4K video transmission and high-speed data storage; the Retimer chip can act as an intermediate bridge to adapt and convert signals between devices of different specifications, and realize data interaction between devices with different transmission standards.

[0019] The multi-link automatic matching device 100 also includes multiple signal operations management (OAM) linkers 30. Exemplarily, these include OAM (Operations, Administration, and Maintenance) linkers and other linkers with OAM and maintenance capabilities. At the link level, OAM primarily refers to Ethernet OAM, a set of tools and protocols for operating, managing, and maintaining Ethernet links. Ethernet OAM detects network connectivity by sending test messages periodically or manually, providing functionality similar to Ping and Traceroute in IP networks for Ethernet fault identification and location. When a connectivity failure is detected, OAM can also work with the protection switching protocol to trigger protection switching, achieving operational-grade reliability targets of less than 50 milliseconds of network service interruption. The core function of the OAM linker is to ensure stable link operation, enable rapid fault location, and monitor performance.

[0020] The multi-link automatic matching device 100 also includes an adaptive matcher 20. The input end of the adaptive matcher 20 is connected to the output end of the high-speed signal processing module 10 for receiving the output signal of the high-speed signal processing module 10. The output end of the adaptive matcher 20 is connected to the signal operation and management linker 30. Since the rated voltages of different OAM linkers are different, the adaptive matcher 20 is used to distribute the output signal to the corresponding signal operation and management linker 30 according to the voltage of the output signal of the high-speed signal processing module 10.

[0021] Through this application, since an adaptive matcher 20 is provided at the output end of the high-speed signal processing module 10, the adaptive matcher 20 can distribute the output signal of the high-speed signal processing module 10 to the corresponding signal operation management link 30 based on the voltage of the output signal of the high-speed signal processing module 10. The rated voltage of the signal operation management link 30 matches the voltage of the output signal of the high-speed signal processing module 10. Therefore, the technical problem of linkers being unable to be compatible with two or more link topologies on the same PCB board can be solved, and the technical effect of automatically matching the corresponding signal operation management link 30 based on the voltage of the output signal of the high-speed signal processing module 10 can be achieved.

[0022] Please continue to refer to Figure 1The present application provides a multi-link automatic matching device 100, comprising: a capacitor 40 disposed on the connection line between a high-speed signal processing module 10 and an adaptive matcher 20; a first electrode 41 of the capacitor 40 is electrically connected to the output of the high-speed signal processing module 10, and a second electrode 42 of the capacitor 40 is electrically connected to the input of the adaptive matcher 20. The high-speed signal (e.g., differential signal, single-ended signal) output by the high-speed signal processing module 10 is essentially an electromagnetic wave whose voltage or current varies with time. The transmission quality of the high-speed signal is highly dependent on resistance. For example, when the high-speed signal processing module 10 is a retimer chip, the retimer chip is used in a high-speed serial communication link to receive input signals, recover their clock and data, and then retransmit the data with a new, clean clock to retime the signal. This can eliminate jitter and noise accumulated in long-distance transmission or multi-level interconnections, thereby improving signal integrity. The capacitor 40 is an electronic component capable of storing charge, consisting of two adjacent conductors (called plates) and an insulating medium (called a dielectric) between them. When voltage is applied to the two plates of capacitor 40, positive charge accumulates on one plate and negative charge accumulates on the other, forming an electric field within capacitor 40, which stores electrical energy. Capacitor 40 can store electrical energy and release it when needed. Capacitor 40 has the characteristic of DC blocking, meaning it allows AC signals to pass but blocks DC signals. This is because the voltage of an AC signal varies over time, causing the capacitor to continuously charge and discharge, generating current. However, the voltage of a DC signal is constant, and once capacitor 40 is fully charged, no current flows. Capacitor 40 is connected to the output of the retimer chip. Since high-speed differential signals (such as PCIe and Ethernet) are typically AC signals and do not contain a DC component, capacitors are connected in series with the retimer's differential output pair to block the DC voltage difference. This prevents the DC bias voltages between the transmitter and receiver from interfering with each other, while allowing high-speed AC data signals to pass. This simplifies the interconnect design between different power domains, eliminates common-mode noise, and protects the chip from damage caused by DC voltage mismatch. The adaptive matcher 20 works closely with the retimer chip to optimize the integrity of the retimer chip's output signal across different transmission channels. The characteristic impedance of the transmission line (e.g., 50 ohms or 100 ohms differential) must match the impedance of the transmitter and receiver to avoid signal reflections that can cause signal distortion. The adaptive matcher 20 is designed to dynamically adjust this matching.

[0023] Please refer to Figure 1In an optional embodiment provided in the present application, a multi-link automatic matching device 100 includes a high-speed signal processing module 10, a capacitor 40, an adaptive matcher 20, and multiple signal operation management linkers 30, wherein the output end of the high-speed signal processing module 10 is electrically connected to the first electrode 41 of the capacitor 40, the adaptive matcher 20 includes an input end and an output end, the second electrode 42 of the capacitor 40 is electrically connected to the input end of the adaptive matcher 20, and the output end of the adaptive matcher 20 is electrically connected to the input end of the signal operation management linker 30. The adaptive matcher 20 is used to distribute the output signal of the high-speed signal processing module 10 to the corresponding signal operation management linker 30 according to the voltage of the output signal of the capacitor 40.

[0024] The output signal of the high-speed signal processing module 10 is a high-speed, high-quality digital signal. When the capacitor 40 is connected to the output end of the high-speed signal processing module 10, for example, if the output signal of the high-speed signal processing module 10 received by the capacitor 40 is 20Ω, the capacitor 40 will recognize that the output signal of the high-speed signal processing module 10 is a low-voltage signal, and the capacitor 40 transmits the low-voltage signal to the adaptive matcher 20; if the output signal of the high-speed signal processing module 10 received by the capacitor 40 is 20-50Ω, the capacitor 40 will recognize that the output signal of the high-speed signal processing module 10 is a medium-voltage signal, and the capacitor 40 transmits the medium-voltage signal to the adaptive matcher 20. Of course, the capacitor 40 can also recognize that the output signal of the high-speed signal processing module 10 is a high-voltage signal based on the resistance carried by the output signal of the high-speed signal processing module 10... and so on. The above is only an example. This application does not limit the scope and classification of the low-voltage signals, medium-voltage signals, and high-voltage signals recognized by the capacitor 40.

[0025] The circuitry within the adaptive matcher 20 analyzes the characteristics of the signal output through the capacitor 40 (e.g., signal attenuation, reflections, eye diagram quality, etc.) to assess the output signal's voltage range and link status. In this process, the characteristics of the capacitor 40, as part of the signal path, are considered. Based on the assessment results, the adaptive matcher 20 adjusts its output drive swing, pre-emphasis, de-emphasis, and other parameters to match the input requirements and channel loss of different signal operation management links 30. For example, if it detects high link loss (i.e., corresponding to a low effective voltage range), the adaptive matcher 20 may increase the drive swing or pre-emphasis. If there are multiple different signal operation management links 30, they may support different data rates or communication protocols. The adaptive matcher 20 participates in link training and negotiation, adjusting the output signal to a rate and protocol compatible with the target signal operation management link 30. This enables the high-speed signal processing module 10 to seamlessly connect to multiple signal operation management links 30 of different types, electrical characteristics, or protocols. It can greatly improve the compatibility and flexibility of the system, without the need for manual configuration or replacement of hardware to match different signal operation management linkers 30. By dynamically adjusting the characteristics of the output signal, the adaptive matcher 20 can compensate for channel loss, minimize reflections and crosstalk, and ensure that the signal remains high quality when it reaches the signal operation management linker 30, thereby reducing the bit error rate and improving the reliability of data transmission. This adaptive capability is particularly important in scenarios with long distances, high attenuation or complex connections. The multi-link automatic matching device 100 provided in this application can automatically identify the characteristics of the connected signal operation management linker 30 and automatically adjust the matching parameters, thereby achieving a certain degree of plug-and-play functionality and simplifying the deployment and maintenance of the system.

[0026] The adaptive matcher 20 dynamically adjusts its output parameters by analyzing the quality of the output signal (e.g., amplitude, waveform integrity, etc.) passing through the capacitor 40 and evaluating the characteristics of the connected OAM link. This adjustment enables optimal signal "distribution" (adaptation and transmission) to different signal operation and management linkers 30, thereby achieving superior interoperability, signal integrity, reliability, and system performance flexibility. By placing a capacitor 40 in the connection between the high-speed signal processing module 10 and the adaptive matcher 20, the capacitor 40 can identify the voltage type of the high-speed signal processing module 10's output signal and transmit this identification result to the adaptive matcher 20. Based on the voltage type output by the capacitor 40, the adaptive matcher 20 selects a signal operation and management linker 30 with a rated voltage that matches this voltage type. The presence of the capacitor 40 simplifies the adaptive matcher 20's voltage identification process for the high-speed signal processing module 10's output signal, reducing component count and simplifying circuit design. The capacitor 40's small size and low cost make it suitable for compact devices or high-density integration scenarios.

[0027] It should be noted that the specific capacitance value of the capacitor 40 can be set according to customer needs and actual process requirements, and this application does not limit this.

[0028] Figure 2 For the relative position relationship diagram of the preset point of the adaptive matching needle and the output end of the adaptive matching device provided in the embodiment of the present application, please refer to Figure 1 and Figure 2 The present application provides a multi-link automatic matching device 100, including: an adaptive matcher 20 including at least one set of adaptive matching pins 22, the adaptive matching pins 22 being configured to automatically move to the output end of the adaptive matcher 20 according to the voltage of the output signal of the high-speed signal processing module 10, so as to establish an electrical connection with the signal operation management linker 30 through the adaptive matching pins 22.

[0029] In an optional embodiment provided by the present disclosure, as described above, when the output signal of the high-speed signal processing module 10, which is identified as a low-voltage signal by the capacitor 40 received at the input end of the adaptive matcher 20, is received by the adaptive matcher 20, and based on the low-voltage signal, controls the adaptive matcher 22 to move to a first position 241 corresponding to the output end of the adaptive matcher 20 and electrically connect to the corresponding signal operation management link 30, the rated voltage of which matches the low voltage of the output signal of the high-speed signal processing module 10. Similarly, when the output signal of the high-speed signal processing module 10, which is identified as a medium-voltage signal by the capacitor 40, the adaptive matcher 20 controls the adaptive matcher 22 to move to a second position 251 corresponding to the output end of the adaptive matcher 20 and electrically connect to the signal operation management link 30, the rated voltage of which matches the medium voltage of the output signal of the high-speed signal processing module 10. Similarly, when the output signal of the high-speed signal processing module 10 identified by the capacitor 40 is a high-voltage signal, the adaptive matcher 20 controls the adaptive matching needle 22 to move to the third point 261 corresponding to the output end of the adaptive matcher 20, and is electrically connected to the signal operation management link 30. The rated voltage of the corresponding signal operation management link 30 matches the high voltage of the output signal of the high-speed signal processing module 10.

[0030] The provision of adaptive matching pins 22 allows the multi-link automatic matching device 100 to adapt to a variety of interface types at the physical level. While traditional electronic matching primarily adjusts the electrical parameters of signals, the technical solution in this application allows for direct physical selection of different signal paths or connection points. This means that a single adaptive matcher 20 can serve multiple signal operation management linkers 30 with varying physical sizes or pin layouts, without the need for additional adapter boards or complex wiring. By selecting the most compatible physical path, signal loss and reflection along the transmission path can be minimized, reducing bit error rates and improving data transmission reliability and performance. When different signal operation management linkers 30 are inserted, the system can automatically detect and adjust the physical connection without manual intervention. This significantly simplifies the internal component deployment, maintenance, and upgrade process of the multi-link automatic matching device 100, particularly in scenarios where frequent replacement or testing of different modules is required. While the provision of adaptive matching pins 22 increases structural complexity, it eliminates the need for complex electronic switching matrices, multiplexers, or expensive custom connectors, thereby reducing overall system cost or simplifying board design in specific applications. This provides greater flexibility for highly integrated optical communication systems or test platforms. The adaptive matching pin 22 provided in the embodiment of the present application provides powerful scalability for the signal operation management linker 30 that supports more types and updated standards in the future. It only requires updating the firmware and movement algorithm of the adaptive matcher 20 without redesigning the entire hardware connection part.

[0031] The adaptive matching pin 22 physically moves and establishes an electrical connection based on the output signal voltage, extending traditional electronic signal adaptation to the physical connection level, improving link flexibility and interoperability. This enables the adaptive matching device 20 to automatically select and establish the optimal physical signal path, significantly optimizing signal integrity and enhancing reliability. This is particularly applicable to complex high-speed communication systems that require compatibility with multiple interface types or require automated testing. In this way, the adaptive matching device 20 controls the movement of the adaptive matching pin 22 and connects it to the corresponding signal operation management link 30 based on the voltage type of the output signal received by the high-speed signal processing module 10. The rated voltage of the signal operation management link 30 electrically connected to the adaptive matching pin 22 can be matched to the voltage type received by the adaptive matching device 20. This allows for compatibility with signal operation management links 30 of different rated voltages on the same multi-link automatic matching device 100, meeting diverse user needs, improving compatibility, and reducing the labor and time costs of repetitive R&D.

[0032] Please continue to refer to Figure 1 and Figure 2 The present application provides a multi-link automatic matching device 100, wherein a set of adaptive matching pins 22 includes at least 8 pairs of differential signal electrical connection points. A differential signal is a signal that is transmitted through two complementary signal lines (usually marked as V + and V - ) is a signal transmission method for transmitting information. Its core principle is to detect the voltage difference between the two lines (V diff =V + -V - ) to determine the logical state of the signal, rather than relying on the absolute voltage of a single line to ground. This design gives it significant advantages in anti-interference, high-speed transmission and signal integrity. Differential signals have strong anti-interference capabilities. External noise (such as electromagnetic interference) will act on both signal lines at the same time, causing V + and V - The voltage changes of the same magnitude occur. The differential signal electrical connection points can transmit differential signal pairs with the same amplitude and opposite phases, forming a differential signal transmission channel. This embodiment, by designing the adaptive matching pins 22 as a set of eight pairs of differential signal electrical connection points, can meet the transmission requirements of most Ethernet protocols without adding additional pairs, thus avoiding resource waste.

[0033] Please continue to refer to Figure 1 and Figure 2 The present application provides a multi-link automatic matching device 100 , wherein the number of output terminals of the adaptive matcher 20 is n, where n is an integer greater than or equal to 3.

[0034] In an optional embodiment provided by the present application, the adaptive matcher 20 may include one input terminal and three output terminals, or the adaptive matcher 20 may include one input terminal and four output terminals, or the adaptive matcher 20 may include one input terminal and five output terminals, etc., and the examples are not listed here. It is only necessary that the number of output terminals of the adaptive matcher 20 is greater than or equal to three. In this way, by setting multiple output terminals, each output terminal matches a signal operation management linker 30 with a different rated voltage, thereby improving the compatibility and adaptability of the multi-link automatic matching device 100. When the multi-link automatic matching device 100 needs to connect multiple high-speed channels, a multi-output adaptive matcher can replace multiple single-output or dual-output matching device chips, which can directly reduce the number of chips on the PCB board, thereby reducing the size and complexity of the board. Fewer chips means less wiring and smaller PCB area requirements, making the entire design more compact and simple, and can be effectively applied to confined spaces. In addition, multiple output terminals can be configured to adapt to different types of downstream signal operation management linkers 30, which may have different electrical characteristics, transmission rates or protocol standards. The adaptive matcher 20 can independently adapt and balance each output channel, improving versatility. With more than three outputs, the adaptive matcher 20 enables higher integration, greater bandwidth, greater flexibility, and greater reliability. It can more effectively manage and optimize multiple high-speed communication links, thus meeting the stringent performance, density, and scalability requirements of modern high-speed data transmission systems.

[0035] Please continue to refer to Figure 1 and Figure 2 The present application provides a multi-link automatic matching device 100, wherein the output end of an adaptive matcher 20 includes differential signal channels, and the number of differential signal channels in the output end of an adaptive matcher 20 is equal to the number of a group of adaptive matching pins 22. Exemplarily, when a group of adaptive matching pins 22 includes 8 pairs of differential signal electrical connection points, the output end of an adaptive matcher 20 correspondingly includes 8 pairs of differential signal channels, that is, the number of differential signal electrical connection points is equal to the number of differential signal channels. Specifically, a group of adaptive matching pins 22 moves to the output end of the corresponding adaptive matcher 20, and the 8 pairs of differential signal electrical connection points in the adaptive matching pins 22 are electrically connected one by one to the differential signal channels in the output end of an adaptive matcher 20 to achieve signal transmission. In this way, when the adaptive matching pin 22 moves to the output end of the corresponding adaptive matcher 20, since the number of differential signal electrical connection points in the adaptive matching pin 22 is equal to the number of differential signal channels in any output end of the adaptive matcher 20, the integrity and transmission quality of the signal transmission can be ensured. In applications that require flexible configuration or expansion of differential signal channels, it can also support flexible configuration and expansion, and can adapt to different application requirements.

[0036] Figure 3 A schematic diagram of the packaging structure of an adaptive matcher provided in an embodiment of the present application is shown. Figure 4 For a schematic diagram of the arrangement of the input and output terminals in the package structure of an adaptive matcher provided in an embodiment of the present application, please refer to Figures 2 to 4 The present application provides a multi-link automatic matching device 100, wherein the output end of the adaptive matcher 20 includes a first output end 24, a second output end 25, and a third output end 26; please refer to Figure 2 The preset positions of the adaptive matching needle 22 in the adaptive matcher 20 are a first position 241, a second position 251, and a third position 261, wherein the first position 241 corresponds to the first output end 24 of the adaptive matcher 20, the second position 251 corresponds to the second output end 25 of the adaptive matcher 20, and the third position 261 corresponds to the third output end 26 of the adaptive matcher 20; the adaptive matcher 20 also includes a driving component 21, which is used to receive the output signal of the capacitor 40 and control the adaptive matching needle 22 to move to the first point 241, the second point 251, or the third point 261 according to the output signal of the capacitor 40.

[0037] In an optional embodiment provided herein, the first output terminal 24 is illustratively positioned to correspond to a signal operation management linker 30 that matches a low-voltage signal. When the capacitor 40 determines that the output signal of the high-speed signal processing module 10 is a low-voltage signal, the driver component 21 in the adaptive matcher 20 receives the low-voltage signal and drives the adaptive matcher pin 22 to move to a first position 241 corresponding to the first output terminal 24 of the adaptive matcher 20. The second output terminal 25 is positioned to correspond to a signal operation management linker 30 that matches a medium-voltage signal. When the capacitor 40 determines that the output signal of the high-speed signal processing module 10 is a medium-voltage signal, the driver component 21 in the adaptive matcher 20 receives the medium-voltage signal and drives the adaptive matcher pin 22 to move to a second position 251 corresponding to the second output terminal 25 of the adaptive matcher 20. The location of the third output terminal 26 corresponds to the signal operation management link 30 that matches the high-voltage signal. When the capacitor 40 determines that the output signal of the high-speed signal processing module 10 is a high-voltage signal, the driver component 21 in the adaptive matcher 20 receives the high-voltage signal and drives the adaptive matching pin 22 to move to the third point 261 corresponding to the third output terminal 26 of the adaptive matcher 20. In this way, the driver component can control the adaptive matching pin 22 to move to a preset point corresponding to a different type of voltage based on the received voltage type. At this preset point, the adaptive matching pin 22 is electrically connected to the signal operation management link 30 that matches the voltage type through the output terminal of the adaptive matcher 20 to achieve signal transmission.

[0038] Please refer to Figure 3 and Figure 4 , the present application provides a multi-link automatic matching device 100, the input end and the output end are located on the same plane.

[0039] In an optional embodiment provided in the present application, the adaptive matcher 20 further includes a packaging structure 50. The packaging structure 50 may be a structure having a flat surface, such as a cube or a cuboid. Of course, it may also be other types of packaging structures 50. Figure 3 The packaging structure 50 is only shown as a rectangular parallelepiped for illustration, and this application is not limited to this. The specific design can be adjusted according to the actual process. It can be understood that the packaging structure 50 is used to package the components inside the adaptive matcher 20. The input and output ends of the adaptive matcher 20 are only set on a certain plane on the surface of the packaging structure 50. For example, the packaging structure 50 includes a first surface 51, which is one of the six surfaces of the packaging structure. Figure 3 Only the first surface 51 is used as a side surface of the package structure 50 for illustration.

[0040] Please refer to Figure 4 The input end 23 and output end 27 of the adaptive matcher 20 include at least one row of differential signal channels, each row of differential signal channels includes at least one set of X8 PCIE signal channels. PCIE is used to connect to external devices on the computer motherboard, such as graphics cards, sound cards, network cards, solid-state drive controllers, etc., providing faster and more stable connections for various external devices. Optionally, the input end 23 and output end 27 of the adaptive matcher 20 are arranged in parallel in the same plane of the package structure 50. For example, the input end 23 and output end 27 are both located on the first surface 51 of the package structure 50. Optionally, when there are multiple output ends 27, the distance between the input end 23 and the adjacent output end 27 and the distance between each output end 27 can be equal or unequal, and this application is not limited to this. In this way, by packaging the adaptive matcher 20, the packaging structure 50 can physically protect the internal components of the adaptive matcher 20 from damage by external forces; only the input terminal 23 and the output terminal 27 of the adaptive matcher 20 are left on the surface of the packaging structure 50 to facilitate the connection and output of external components. The input terminal 23 and the output terminal 27 are set on the same plane. The coplanar design can reduce the volume of the adaptive matcher 20, which is suitable for portable or high-density integration scenarios, and shorten the signal path, reducing the risk of electromagnetic interference and crosstalk; reducing costs, simplifying the manufacturing process, and meeting high-frequency, high-density integration and user experience requirements.

[0041] Please continue to refer to Figure 1 and Figure 4 The present application provides a multi-link automatic matching device 100, the number of output terminals 27 of the adaptive matcher 20 is a first number, the number of signal operation management linkers 30 is a second number, and the first number is equal to the second number.

[0042] It can be understood that the number of output terminals 27 of the adaptive matcher 20 is greater than or equal to 3. When the adaptive matcher includes three output terminals 27, the multi-link automatic matching device 100 includes three signal operation management linkers 30 with different rated voltages; when the adaptive matcher includes four output terminals 27, the multi-link automatic matching device 100 includes four signal operation management linkers 30 with different rated voltages; when the adaptive matcher includes five output terminals 27, the multi-link automatic matching device 100 includes five signal operation management linkers 30 with different rated voltages... and so on. The examples are not listed here one by one. Figure 1 The example of a multi-link automatic matching device 100 including three output terminals 27 and three signal operation and management linkers 30 is used for illustration only, and this application does not limit this. In this way, the number of output terminals 27 of the adaptive matching device 20 is equal to the number of signal operation and management linkers 30. Therefore, any output terminal 27 of the adaptive matching device 20 has a signal operation and management linker 30 that can be connected to it. In other words, the number of output terminals 27 of the adaptive matching device 20 can be flexibly set according to user needs and the number of signal operation and management linkers 30 that need to be compatible, thereby reducing the waste of interfaces caused by setting too many output terminals 27 of the adaptive matching device 20 and reducing the insufficient number of interfaces caused by setting too few output terminals 27 of the adaptive matching device 20.

[0043] Figure 5 For a step diagram of an automatic control method of an adaptive matcher provided in an embodiment of the present application, please refer to Figure 1 and Figure 5 The present application provides an automatic control method for an adaptive matcher 20, which is applied to the multi-link automatic matching device 100 provided in the present application, including: step S1: identifying the voltage of the output signal of the high-speed signal processing module 10; step S2: distributing the output signal of the high-speed signal processing module 10 to the corresponding signal operation management linker 30 according to the identified voltage.

[0044] In step S1, the voltage of the output signal of the high-speed signal processing module 10 is different, and the corresponding signal operation management link 30 to be connected is different. The automatic control method provided in the embodiment of the present application identifies the voltage type of the output signal of the high-speed signal processing module 10. In step S2, the signal operation management link 30 with matching voltage can be selected for connection according to the voltage type of the output signal of the identified high-speed signal processing module 10. On this basis, the adaptive matcher 20 provided in the present application can achieve compatibility with multiple signal operation management linkers 30 in the same PCB board by setting multiple different output terminals, thereby improving the intensiveness and adaptability of the equipment.

[0045] Please refer to Figure 1In step S1, identifying the voltage of the output signal of the high-speed signal processing module 10 includes: identifying the voltage of the output signal of the high-speed signal processing module 10 by identifying the voltage signal of the output end of the capacitor 40. The multi-link automatic matching device 100 provided in the present application sets the capacitor 40 in the connection line between the high-speed signal processing module 10 and the adaptive matcher 20, and identifies the resistance value carried by the output signal of the high-speed signal processing module 10 by the capacitor 40, and determines whether the output signal of the high-speed signal processing module 10 is a low-voltage signal, a medium-voltage signal or a high-voltage signal. In this way, by adding a capacitor, efficient identification of the voltage type of the output signal of the high-speed signal processing module 10 is achieved, which facilitates the adaptive matcher 20 to select a suitable output end to connect with the signal operation management linker 30.

[0046] In an optional embodiment provided in this application, please refer to Figure 1 and Figure 5 The adaptive matcher 20 includes multiple output terminals, each of which corresponds to a plurality of signal operation management linkers 30. In step S2, the output signal of the high-speed signal processing module 10 is distributed to the corresponding signal operation management linker 30 according to the identified voltage, including: the adaptive matcher 20 distributes the output signal of the high-speed signal processing module 10 to the output terminal of one of the adaptive matchers 20 according to the identified voltage, and the signal operation management linker 30 receives the output signal of the output terminal of the adaptive matcher corresponding to its position.

[0047] In an optional embodiment provided in this application, please refer to Figure 1 and Figure 5 The adaptive matcher 20 further includes an adaptive matching needle 22. In step S2, the output signal of the identified high-speed signal processing module 10 is distributed to the corresponding signal operation management linker 30, including: the adaptive matcher 20 controls the adaptive matching needle 22 to move to a preset point corresponding to the output end of one of the adaptive matchers 20 according to the voltage type of the output signal of the identified high-speed signal processing module 10, and engages with the signal operation management linker 30 corresponding to the output end position of the adaptive matcher 20 to establish an electrical connection, and the rated voltage of the signal operation management linker 30 engaged with the adaptive matching needle 22 matches the voltage signal received by the driving component 21.

[0048] The present application provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of the automatic control method of the adaptive matcher 20 provided in the present application when executing the computer program.

[0049] The above describes in detail a multi-link automatic matching device, control method, and electronic device provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is intended only to facilitate understanding of the method and core concept of the present application. It should be noted that those skilled in the art may make various improvements and modifications to the present application without departing from the principles of the present application, and such improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A multi-link automatic matching device, characterized in that: include: A high-speed signal processing module, a plurality of signal operation management linkers, and an adaptive matcher, wherein the plurality of signal operation management linkers have different rated voltages; The adaptive matcher is used to receive the output signal of the high-speed signal processing module and distribute the output signal of the high-speed signal processing module to the corresponding signal operation management linker according to the voltage of the output signal of the high-speed signal processing module; The adaptive matcher further includes a packaging structure, the adaptive matcher includes an input end and at least one output end, the input end and the output end are located on a first surface of the packaging structure, the input end is located in a first area of ​​the first surface, and the first area is close to a side edge of the first surface; The output end is located in a second area of ​​the first surface, the second area is adjacent to the first area, and the second area is located on a side of the first area away from the edge, the extension direction of the input end and the output end is parallel to the extension direction of the edge, and the arrangement direction of the input end and multiple output ends intersects with the extension direction of the edge.

2. The multi-link automatic matching device according to claim 1, characterized in that: include: A capacitor is further provided on the connection line between the high-speed signal processing module and the adaptive matcher, wherein the first electrode of the capacitor is electrically connected to the output end of the high-speed signal processing module, and the second electrode of the capacitor is electrically connected to the input end of the adaptive matcher.

3. The multi-link automatic matching device according to claim 2, characterized in that: The input end of the adaptive matcher is electrically connected to the capacitor, and the output end of the adaptive matcher is connected to the signal operation management linker.

4. The multi-link automatic matching device according to claim 3, characterized in that: include: The adaptive matcher includes at least one set of adaptive matching pins, which are configured to automatically move to the output end of the adaptive matcher according to the voltage of the output signal of the high-speed signal processing module to establish an electrical connection with the signal operation management linker through the adaptive matching pins.

5. The multi-link automatic matching device according to claim 4, characterized in that: A group of the adaptive matching pins includes at least 8 pairs of differential signal electrical connection points.

6. The multi-link automatic matching device according to claim 5, characterized in that: The number of output terminals of the adaptive matcher is n, where n is an integer greater than or equal to 3.

7. The multi-link automatic matching device according to claim 4, characterized in that: The output end of the adaptive matcher includes differential signal channels, and the number of the differential signal channels in one output end of the adaptive matcher is equal to the number of a group of adaptive matching pins.

8. The multi-link automatic matching device according to claim 5, characterized in that: The output end of the adaptive matcher includes a first output end, a second output end, and a third output end. The preset positions of the adaptive matching needle in the adaptive matcher are the first point position, the second point position, and the third point position, wherein the first point position corresponds to the position of the first output end, the second point position corresponds to the position of the second output end, and the third point position corresponds to the position of the third output end; The adaptive matcher further includes a driving component, which is configured to receive an output signal from the capacitor and control the adaptive matching needle to move to the first point position, the second point position, or the third point position according to the output signal from the capacitor.

9. The multi-link automatic matching device according to claim 3, characterized in that: The input end and the output end are located on the same plane.

10. The multi-link automatic matching device according to claim 3, characterized in that: The number of the output terminals of the adaptive matcher is a first number, the number of the signal operation management linkers is a second number, and the first number is equal to the second number.

11. An automatic control method for an adaptive matcher, characterized in that: The multi-link automatic matching device according to any one of claims 1 to 10 comprises: Identifying the voltage of the output signal of the high-speed signal processing module; The output signal is distributed to the corresponding signal operation management linker according to the identified voltage.

12. The automatic control method of the adaptive matcher according to claim 11, characterized in that: A capacitor is included between the high-speed signal processing module and the adaptive matcher. The identifying the voltage of the output signal of the high-speed signal processing module includes: identifying the voltage of the output signal of the high-speed signal processing module by identifying the voltage signal of the output terminal of the capacitor.

13. The automatic control method of the adaptive matcher according to claim 11, characterized in that: The adaptive matcher includes a plurality of output terminals, and the positions of the plurality of output terminals correspond one-to-one to the plurality of signal operation management linkers respectively; The step of distributing the output signal to a corresponding signal operation management linker according to the identified voltage includes: The adaptive matcher distributes the output signal to one of the output terminals of the adaptive matcher according to the identified voltage, and the signal operation management linker receives the output signal of the output terminal of the adaptive matcher corresponding to its position.

14. The automatic control method of the adaptive matcher according to claim 11, characterized in that: The adaptive matcher also includes an adaptive matching needle, The step of distributing the output signal of the high-speed signal processing module to a corresponding signal operation management linker according to the identified voltage signal includes: The adaptive matcher controls the adaptive matching needle to move to one of the output terminals of the adaptive matcher according to the recognized voltage, and engages with the signal operation management linker corresponding to the output terminal position of the adaptive matcher to establish an electrical connection.

15. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the automatic control method according to any one of claims 11 to 14 when executing the computer program.

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