Bandwidth distribution system and electronic equipment
Through mechanical switching and dynamic bandwidth allocation systems, the high heat dissipation, high cost and resource rigidity caused by switching chips are solved, and flexible bandwidth allocation and efficient resource management are achieved.
Patent Information
- Application Number
- CN202510846034.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-23
- Publication Date
- 2025-09-02
- Estimated Expiration
- 2045-06-23
AI Technical Summary
In the existing bandwidth allocation technology, switching chips lead to high heat dissipation requirements and costs, and the resource allocation is rigid and cannot be dynamically adapted.
The bandwidth allocation system is adopted to realize connector switching at the hardware level through mechanical switching, and dynamic bandwidth allocation is used to utilize bandwidth allocation indicator units and processing units to perform dynamic bandwidth allocation at the software level, including bandwidth allocation indicator units, connectors and processing units deployed on the motherboard, and switching units and expansion interface groups deployed on the expansion card.
It reduces the heat dissipation and cost requirements, realizes dynamic bandwidth allocation, solves the problem of rigid resource allocation, and improves operation and maintenance efficiency and flexibility.
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Figure CN120358144B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of bandwidth allocation, and in particular to a bandwidth allocation system and electronic equipment. Background Art
[0002] With the evolution of interfaces such as the Peripheral Component Interconnect Express (PCIe) interface, bandwidth is growing exponentially, forcing expansion cards to adapt to the bandwidth while ensuring high-speed signal integrity.
[0003] The current mainstream bandwidth allocation technology is based on switch chips. As the core unit for bus connection and forwarding, switch chips can intelligently expand a single high-bandwidth interface into multiple interfaces. However, switch chips are large and expensive, resulting in additional cooling requirements and cost. Furthermore, bandwidth allocation is usually fixed, leading to rigid resource allocation. Summary of the Invention
[0004] The present application provides a bandwidth allocation system and electronic equipment to at least solve the problems of high heat dissipation and cost requirements and rigid resource allocation in related technologies.
[0005] A first aspect of the present application provides a bandwidth allocation system, comprising a bandwidth allocation indication unit, a first connector and a processing unit deployed on a mainboard, and a switching unit and at least two expansion interface groups deployed on an expansion card;
[0006] The first connector and the expansion interface group are both connected to a switching unit, and the switching unit is used to switch the first connector from being connected to a current interface group to being connected to a target interface group through mechanical switching under a switching operation of a user, wherein the current interface group is the expansion interface group connected to the first connector before the switching, and the target interface group is the expansion interface group connected to the first connector after the switching;
[0007] The bandwidth allocation indicating unit is connected to the switching unit, and the bandwidth allocation indicating unit is used to output a bandwidth allocation signal based on the connection status between the first connector and the two extension interface groups;
[0008] The processing unit is connected to the first connector, and is configured to perform bandwidth allocation based on the bandwidth allocation signal.
[0009] The second aspect of the present application further provides an electronic device, comprising the bandwidth allocation system described in the first aspect.
[0010] According to the present application, a bandwidth allocation system includes: a bandwidth allocation indication unit, a first connector and a processing unit deployed on a mainboard, and a switching unit and at least two expansion interface groups deployed on an expansion card; the first connector and the expansion interface group are both connected to the switching unit, and the switching unit is used to switch the first connector from being connected to a current interface group to being connected to a target interface group by mechanical switching under a user's switching operation, wherein the current interface group is the expansion interface group connected to the first connector before the switching, and the target interface group is the expansion interface group connected to the first connector after the switching; the bandwidth allocation indication unit is connected to the switching unit, and the bandwidth allocation indication unit is used to output a bandwidth allocation signal based on the connection status of the first connector and the two expansion interface groups; and the processing unit is used to perform bandwidth allocation based on the bandwidth allocation signal. It can be seen that by adopting the above technical solution, the switching unit can realize the switching of the first connector from being connected to the current interface group to being connected to the target interface group at the hardware level, and the bandwidth allocation indication unit and the processing unit can realize bandwidth allocation for the target interface group at the software level. Compared to the switch chip solutions in related technologies, the switching unit is a physical mechanical structure, so the heat dissipation requirements and cost requirements are lower. Moreover, because the expansion interface group connected to the first connector can be dynamically switched, dynamic bandwidth allocation can be achieved, that is, the bandwidth allocation is not fixed. Therefore, this application can solve the problems of high heat dissipation and cost requirements and rigid resource allocation. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0012] Figure 1 A schematic diagram of the structure of a bandwidth allocation system provided in an embodiment of the present application;
[0013] Figure 2 A schematic structural diagram of a switching unit provided in an embodiment of the present application;
[0014] Figure 3 A schematic diagram of the structure of another bandwidth allocation system provided in an embodiment of the present application;
[0015] Figure 4 A schematic diagram of the structure of another bandwidth allocation system provided in an embodiment of the present application;
[0016] Figure 5 A flowchart of bandwidth allocation change provided in an embodiment of the present application. DETAILED DESCRIPTION
[0017] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0018] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.
[0019] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.
[0020] With the evolution of interfaces, bandwidth is growing exponentially. For example, as the PCIe interface evolved from 1.0 to 6.0, the speed jumped from 2.5 GT / s to 64 GT / s. This forced expansion cards to adapt to the bandwidth while ensuring high-speed signal integrity and addressing the space constraints of high-density electronic devices. Regarding the internal spatial layout of electronic devices, in modular designs such as blade servers and hyper-converged architectures, the physical space of the motherboard is extremely compressed. Expansion cards, through innovative layouts such as 90-degree turns and multi-layer stacking, reshape the three-dimensional topology of expansion interfaces. To address bandwidth adaptation, expansion cards currently utilize PCIe lane splitting technology to overcome the limitations of the motherboard's native interface number when connecting multiple devices, such as graphics processing unit (GPU) computing clusters, field programmable gate array (FPGA) accelerator cards, and non-volatile memory express (NVMe) storage arrays, becoming a core expansion solution for heterogeneous hardware interconnection. Current mainstream bandwidth allocation technology is based on switching chips, such as PCIe switches. As the core unit for bus connectivity and forwarding, switching chips can intelligently expand a single high-bandwidth interface, such as PCIe 5.0 x16, into multiple interfaces, enabling multiple devices to share physical channel resources. This bandwidth allocation mechanism, for example, by allocating x8 lanes to a GPU or FPGA and x4 lanes to an NVMe storage array, meets the performance requirements of high-throughput devices like GPUs and FPGAs while also providing compatibility with lower-speed devices. While switching chips can achieve bandwidth allocation, they have the following drawbacks: Multi-level expansion significantly increases configuration complexity, requiring dedicated management tools for link optimization, raising the barrier to system operation and maintenance. Switching chips are large and expensive, resulting in additional cooling and cost requirements. Furthermore, bandwidth allocation is fixed, leading to rigid resource allocation. In light of these issues, the present application provides a bandwidth allocation system and electronic device. The bandwidth allocation system is first described in detail below.
[0021] Figure 1 This is a schematic diagram of the structure of a bandwidth allocation system provided in an embodiment of the present application. Figure 1As shown, the bandwidth allocation system includes: a bandwidth allocation indication unit, a first connector 110 and a processing unit 120 deployed on a mainboard, and a switching unit 210 and at least two extension interface groups 220 deployed on an expansion card; the first connector 110 and the extension interface groups 220 are both connected to the switching unit 210. The switching unit 210 is used to switch the first connector 110 from being connected to a current interface group to being connected to a target interface group through mechanical switching under a user's switching operation, wherein the current interface group is the extension interface group 220 connected to the first connector 110 before the switching, and the target interface group is the extension interface group 220 connected to the first connector 110 after the switching; the bandwidth allocation indication unit is connected to the switching unit 210 and is used to output a bandwidth allocation signal based on the connection status of the first connector 110 and the two extension interface groups 220; and the processing unit 120 is connected to the first connector 110 and is used to perform bandwidth allocation based on the bandwidth allocation signal.
[0022] In this application, the first connector 110 and the processing unit 120 are disposed on the mainboard, and the first connector 110 and the processing unit 120 can be connected via a cable ( Figure 1 (not shown) to transmit data. The switching unit 210 and at least two extended interface groups 220 are deployed on the expansion card. The first connector 110 and the switching unit 210 can be connected via a cable. The extended interface group 220 includes at least one extended interface, and a peripheral device can be connected to the extended interface. The switching unit 210 can switch the extended interface group 220 connected to the first connector 110. The bandwidth allocation indication unit can output a bandwidth allocation signal according to the connection status of the first connector 110 and the "at least two extended interface groups 220" (that is, which extended interface group 220 the first connector 110 is connected to), so that the processing unit 120 can perform bandwidth allocation based on the bandwidth allocation signal. In this way, when the first connector 110 is connected to the target interface group in the "at least two extended interface groups 220", the processing unit 120 can transmit data with the peripheral device connected to the target interface group according to the bandwidth allocation.
[0023] Specifically, the specific type of the first connector 110 can be set by those skilled in the art according to actual conditions and is not limited here. The first connector 110 includes, for example, a multi-channel input / output (MCIO) connector, etc., but is not limited thereto.
[0024] Specifically, the specific type of the processing unit 120 can be set by those skilled in the art according to actual conditions and is not limited here. The processing unit 120 may include, for example, a central processing unit (CPU), etc., but is not limited thereto.
[0025] Specifically, the extension interface group 220 includes at least one extension interface. The specific type of the extension interface can be set by those skilled in the art according to actual conditions and is not limited here. The extension interface may, for example, include a slot, etc. Optionally, each slot is configured with a 12V power supply module and a 3.3V auxiliary power supply module to meet the instantaneous power fluctuations of the peripherals. In addition to high-speed signals, it also receives some sideband signals (such as reset signals, frequency reduction signals, and internal integrated circuit buses (InterIntegrated Circuit, I2C)). The sideband signals are deployed on the inner layer of a dedicated printed circuit board (Printed Circuit Board, PCB), and physical isolation of the high-speed signal channel and the low-speed control channel is achieved through ground plane shielding to avoid bandwidth allocation interference, but is not limited to this.
[0026] Optionally, in the "at least two extended interface groups 220", there are at least two extended interface groups 220 with different numbers of extended interfaces. Further, optionally, the numbers of extended interfaces included in each extended interface group 220 are different. For example, Figure 1 As shown, one expansion interface group 220 includes one expansion interface, and another expansion interface group includes two expansion interfaces, but the present invention is not limited thereto. In this way, by switching the first connector 110 to connect to different expansion interface groups 220, different interface expansion topologies can be implemented, thereby improving the richness and flexibility of bandwidth allocation.
[0027] Optionally, in the "at least two expansion interface groups 220," there is at least one first-class expansion interface group, and the first-class expansion interface group includes at least two expansion interfaces with different channel numbers. Exemplarily, one expansion interface group includes two expansion interfaces, one with 8 channels and the other with 4 channels, but the present invention is not limited thereto. In this way, when the first connector 110 is connected to the first-class expansion interface group, the connection requirements of peripherals with different bandwidth requirements can be met. For example, peripherals with higher bandwidth requirements can be connected to expansion interfaces with higher channel numbers, while peripherals with lower bandwidth requirements can be connected to expansion interfaces with fewer channels.
[0028] Specifically, the specific structure of the switching unit 210 can be configured by those skilled in the art according to actual conditions and is not limited here. The following is an explanation based on a typical example, which does not constitute a limitation of the present application.
[0029] Figure 2 This is a schematic diagram of the structure of a switching unit provided in an embodiment of the present application. Figure 1 and Figure 2As shown, optionally, the switching unit 210 includes a guide structure 211, at least two second connectors 212 arranged on the guide structure 211, a transmission structure 213 and a locking structure 214, the transmission structure 213 includes a plug 2131, the first connector 110 is connected to the plug 2131, the plug 2131 includes a plug-in portion, different extension interface groups 220 are connected to different second connectors 212 through different cable groups, and the switching operation includes an unlocking operation, a moving operation and a locking operation; the locking structure 214 is used to release the mechanical interlocking between the plug-in portion and the current connector under the unlocking operation, wherein the current connector is the second connector 212 connected to the current interface group through the cable group; the transmission structure 213 is used to move along the guide structure 211 under the moving operation to move the plug 2131 to the target connector, wherein the target connector is the second connector 212 connected to the target interface group through the cable group; the locking structure 214 is used to mechanically interlock the plug-in portion with the target connector under the locking operation to establish a connection between the first connector 110 and the target interface group.
[0030] Specifically, the specific structure of the guide structure 211 can be set by those skilled in the art according to actual conditions and is not limited here. Optionally, the guide structure 211 includes a guide rail, but is not limited thereto.
[0031] Specifically, the specific type of the second connector 212 can be set by those skilled in the art according to actual conditions and is not limited here. The second connector 212 includes, for example, a multi-channel input / output (MCIO) connector, etc., but is not limited thereto.
[0032] Specifically, the cable group includes at least one cable, and a second connection portion is connected to an extension interface group 220 via the cable group, which means that each extension interface in the extension interface group 220 is connected to the second connection portion via a cable. Figure 2 As shown, one expansion interface group 220 includes one expansion interface, which is connected to the second connector 212 via a cable; another expansion interface group 220 includes two expansion interfaces, which are each connected to the second connector 212 via a cable, but is not limited thereto.
[0033] Specifically, the transmission structure 213 is provided with a plug 2131, and the first connector 110 can be connected to the plug 2131 via a cable. The plug 2131 is also provided with a plug-in portion. When the plug-in portion enters a groove portion in a second connector 212, the plug 2131 establishes a connection with the second connection portion, thereby establishing a connection between the first connector 110 and the second connector 212, and further establishing a connection between the first connector 110 and the expansion interface group 220 connected to the second connection portion; when the plug-in portion leaves the groove portion in a second connector 212, the plug 2131 is disconnected from the second connection portion, thereby disconnecting the first connector 110 from the second connector 212, and further disconnecting the first connector 110 from the expansion interface group 220 connected to the second connection portion. The specific structure of the transmission structure 213 can be set by those skilled in the art according to actual circumstances and is not limited here. Optionally, the transmission structure 213 includes a switching connecting rod, but is not limited to this.
[0034] Specifically, when a user uses the locking structure 214 to perform an unlocking operation, the locking structure 214 can release the mechanical interlock between the plug 2131 and the second connector 212, so that the plug portion on the plug 2131 can leave the groove portion of the second connector 212; when the plug portion on the plug 2131 enters the groove portion of a second connector 212, the user can use the locking structure 214 to perform a locking operation, mechanically interlocking the plug 2131 with the second connector 212. The specific structure of the locking structure 214 can be configured by those skilled in the art according to actual circumstances and is not limited here. Optionally, the locking structure 214 includes a safety lock tongue, but is not limited to this.
[0035] Specifically, the switching principle of the switching unit 210 is as follows: Because the plug 2131 is mounted on the transmission structure 213, when the transmission structure 213 moves along the guide structure 211, the plug 2131 also moves along the guide structure 211. Thus, when the locking structure 214 releases the mechanical interlock between the plug portion of the plug 2131 and a second connector 212 (i.e., the current connector) and the plug 2131 moves along the guide structure 211, the plug 2131 is disconnected from the current connector, and the first connector 110 (connected to the plug 2131) is disconnected from the current interface group (connected to the current connector). When the plug 2131 moves to another second connector 212 (i.e., the target connector) and the plug portion mechanically interlocks with the target connector, the plug 2131 is connected to the target connector, and the first connector 110 (connected to the plug 2131) is connected to the target interface group (connected to the target connector). This allows the first connector 110 to switch between different expansion interface groups 220.
[0036] It is understood that the structural design of the switching unit 210 can simplify the structure of the switching unit 210, thereby reducing the size and cost of the switching unit 210. In addition, the switching action can be decomposed into three steps of "unlock-move-lock", which simplifies the operation and improves the user experience.
[0037] Optionally, the switching unit 210 further includes a limiting structure ( Figure 2 Not shown), and / or foolproof structure ( Figure 2 The limiting structure is used to limit the movement range of the plug 2131; the foolproof structure is used to prevent the plug portion from being mistakenly inserted into the groove portion in the second connector 212; the rolling structure 215 is used to make the relative movement between the plug 2131 and the guide structure 211 rolling.
[0038] Specifically, the limiting structure can be any design that mechanically limits the range of movement of the plug portion, ensuring precise alignment between the plug portion and the recessed portion of the second connector 212. The specific structure of the limiting structure can be configured by those skilled in the art based on practical circumstances and is not limited here. Optionally, the limiting structure includes, but is not limited to, a baffle, a boss, a limit switch, and the like.
[0039] Specifically, the foolproof structure can be any design feature that prevents users from incorrectly assembling the "insertion portion and the groove portion in the second connector 212." Its purpose is to prevent errors before they occur, rather than to detect or repair them afterward. The specific structure of the foolproof structure can be determined by those skilled in the art based on practical circumstances and is not limited here. Optionally, the foolproof structure includes, but is not limited to, a pre-set lock.
[0040] Specifically, rolling structure 215 can be any design structure that can achieve low-friction, high-efficiency motion. The specific structure of rolling structure 215 can be configured by those skilled in the art based on actual conditions and is not limited here. Optionally, rolling structure 215 includes balls, etc., but is not limited thereto.
[0041] Exemplarily, the limiting structure may be a baffle that limits the plug 2131 from moving further when the plug-in portion enters the groove in the second connection portion. The foolproof device may be a spring-preloaded wedge-shaped lock that remains released only when the grip (applied to the safety lock tongue) is maintained. The guide rail may be an anodized aluminum square guide rail, and the guide rail may have built-in 0.8mm diameter ceramic balls to form a low friction coefficient (μ≤0.08) sliding assembly, so that the dynamic friction coefficient of a 50g thrust is stabilized in the range of 0.05-0.07. In this way, on the one hand, a precision guide rail with a travel of ±1.2mm can be provided for the plug-in portion, ensuring that the plug-in portion maintains an angular deviation of less than 0.05° when switching between different second connection portions. On the other hand, rolling friction replaces traditional sliding contact, reducing the plug-in wear rate to 1 / 5 of traditional sliding contact, thereby improving the switching life. At this time, the switching unit 210 adopts a layered mechanical architecture: the main transmission layer includes a switching connecting rod, ceramic balls and guide rails, which are responsible for the displacement control of the plug-in part; the safety interlocking layer includes a safety lock tongue, a spring-preloaded wedge lock and a baffle, which integrates an anti-misinsertion protection mechanism. In the switching scenario, the safety lock tongue releases the mechanical interlock between the plug-in part and the second connector 212 under the action of the grip force, and then pushes the connecting rod to drive the plug-in part to move horizontally along the ceramic ball guide rail. When the plug-in part reaches the preset mechanical limit point (the tactile feedback cannot be pushed), the handle is released to trigger the ratchet locking mechanism, achieving precise alignment of the plug-in part and the groove part of the second connector 212, ensuring the continuity of the channel impedance. In addition, in the final locking stage, the self-calibration function of the plug-in part and the groove part can be achieved through the V-shaped guide groove, so that the contact pressure of the plug-in part and the groove part is controlled within the plug-in force specification requirements.
[0042] It is understandable that manually unpacking and switching the expansion interface group 220 connected to the first connector 110 would not only cause a single maintenance session to take more than 30 minutes, but also lead to risks such as wear and electrostatic damage to the first connector 110 or the expansion interface group 220 due to frequent operations. This, in particular, increases the operational and maintenance costs exponentially for whole-cabinet servers deployed in ultra-large-scale artificial intelligence (AI) computing clusters. The present application replaces manual switching with a sliding transmission structure 213, thus avoiding the various problems associated with manual unpacking and switching, and improving safety and convenience.
[0043] Specifically, the bandwidth allocation indication unit may output a corresponding bandwidth allocation signal based on which extension interface group 220 the first connector 110 is connected to. That is, the bandwidth allocation indication unit outputted when the first connector 110 is connected to different extension interface groups 220 is different.
[0044] Optionally, when the first connector 110 is connected to different expansion interface groups 220, the level values of the bandwidth allocation signal are different. In this way, the processing unit 120 can simply and quickly determine the bandwidth allocation solution.
[0045] In one example, the bandwidth allocation indication unit includes at least two voltage-dividing resistors, which are connected in series between a power supply and a ground. The voltage-dividing resistors correspond one-to-one to the second connector 212, and the second connector 212 is connected to one end (referred to as a voltage-dividing end) of the corresponding voltage-dividing resistor. One end of a signal line (bandwidth allocation signal line) used to transmit the bandwidth allocation indication unit is connected to the plug 2131 and the other end is connected to the processing unit 120. In this way, when the plug 2131 enters the groove of a second connector 212, the voltage obtained by the voltage-dividing end connected to the second connector 212 is transmitted to the processing unit 120 in sequence through the second connector 212, the plug 2131, and the bandwidth allocation signal line. Because the voltages divided by the voltage divider terminals connected to different second connectors 212 are different, when the plug 2131 is inserted into the grooves of different second connectors 212 (i.e., the first connector 110 is connected to different expansion interface groups 220), the voltages transmitted on the bandwidth allocation signal line are different. This enables the bandwidth allocation signal to have different level values when the first connector 110 is connected to different expansion interface groups 220, but the present invention is not limited to this.
[0046] In another example, the bandwidth allocation indication unit includes at least two voltage-dividing branches, each voltage-dividing branch includes two voltage-dividing resistors, the voltage-dividing branches correspond to the second connectors 212 one-to-one, and the second connector 212 is connected between the two voltage-dividing resistors of its corresponding voltage-dividing branch (referred to as a voltage-dividing end). One end of the signal line (bandwidth allocation signal line) used to transmit the bandwidth allocation indication unit is connected to the plug 2131 and the other end is connected to the processing unit 120. In this way, when the plug 2131 enters the groove of a second connector 212, the voltage obtained by the voltage-dividing end connected to the second connector 212 is transmitted to the processing unit 120 in sequence through the second connector 212, the plug 2131, and the bandwidth allocation signal line. Because the voltages divided by the voltage divider terminals connected to different second connectors 212 are different, when the plug 2131 is inserted into the grooves of different second connectors 212 (i.e., the first connector 110 is connected to different expansion interface groups 220), the voltages transmitted on the bandwidth allocation signal line are different. This enables the bandwidth allocation signal to have different level values when the first connector 110 is connected to different expansion interface groups 220, but the present invention is not limited to this.
[0047] In another example, Figure 1 and Figure 2As shown, at least two expansion interface groups 220 include a first expansion interface group and a second expansion interface group, and the bandwidth allocation indication unit includes a first voltage divider unit deployed on the mainboard and a second voltage divider unit deployed on the expansion card; a first end of the first voltage divider unit is connected to the power supply VCC, a second end of the first voltage divider unit is connected to the plug 2131, and the second end of the first voltage divider unit is used to output a bandwidth allocation signal; a first end of the second voltage divider unit is connected to the second connector 212 connected to the second expansion interface group, and a second end of the second voltage divider unit is grounded GND.
[0048] Specifically, the specific circuit structure of the first voltage divider unit and the second voltage divider unit can be set by those skilled in the art according to actual conditions, and is not limited here. Optionally, the first voltage divider unit includes a pull-up resistor R1, and the second voltage divider unit includes a pull-down resistor R2, but is not limited to this. It should be noted that the specific resistance values of the pull-up resistor R1 and the pull-down resistor R2 can be set by those skilled in the art according to actual conditions, and are not limited here. Optionally, the resistance ratio of the pull-up resistor R1 and the pull-down resistor R2 is greater than or equal to 10:1, that is, the resistance of the pull-up resistor R1 is greater than or equal to 10 times the resistance of the pull-down resistor R2, but is not limited to this.
[0049] Specifically, when the first connector 110 is connected to the first extension interface group, the bandwidth allocation signal is at a high level due to being left floating. When the first connector 110 is connected to the second extension interface group, the second end of the first voltage divider unit is connected to the plug 2131 via a signal line, and the plug 2131 is inserted into the second connector connected to the second extension interface group. Therefore, the power supply VCC is connected to the first end of the first voltage divider unit, and the second end of the first voltage divider unit is connected to the second connector 212 connected to the second extension interface group (that is, the second end of the first voltage divider unit is connected to the first end of the second voltage divider unit). The second end of the second voltage divider unit is grounded to GND. In this way, the first voltage divider unit and the second voltage divider unit are connected in series, and the voltage value of the bandwidth allocation signal is the voltage divided by the second voltage divider unit and is at a low level.
[0050] Of course, in another example, at least two expansion interface groups 220 include a first expansion interface group and a second expansion interface group, and the bandwidth allocation indication unit includes a first voltage divider unit deployed on the mainboard and a second voltage divider unit deployed on the expansion card; the first end of the first voltage divider unit is connected to the power supply VCC, the second end of the first voltage divider unit is connected to the plug 2131, and the second end of the first voltage divider unit is used to output the bandwidth allocation signal; the first end of the second voltage divider unit is connected to the second connector 212 connected to the first expansion interface group, and the second end of the second voltage divider unit is grounded GND. In this case, when the first connector 110 is connected to the second expansion interface group, the bandwidth allocation signal is at a high level due to being left floating; when the first connector 110 is connected to the first expansion interface group, the first voltage divider unit and the second voltage divider unit are connected in series, and the voltage value of the bandwidth allocation signal is the voltage divided by the second voltage divider unit and is at a low level.
[0051] It will be appreciated that by configuring the bandwidth allocation indication unit to include a first voltage divider unit and a second voltage divider unit, the bandwidth allocation indication unit has a simple structure, thereby reducing its size and cost. Furthermore, when the first connector 110 is connected to different expansion interface groups 220, the difference in the level of the bandwidth allocation signal is large, facilitating accurate bandwidth allocation by the processing unit 120.
[0052] In an embodiment of the present application, the switching unit 210 can be used at the hardware level to switch the first connector 110 from being connected to the current interface group to being connected to the target interface group, and the bandwidth allocation indication unit and the processing unit 120 can be used at the software level to implement bandwidth allocation for the target interface group. Compared to the switching chip solution in the related art, since the switching unit 210 is a physical mechanical structure, the heat dissipation and cost requirements are lower. Moreover, since the extended interface group 220 with the first connector 110 can be dynamically switched, dynamic bandwidth allocation can be achieved, that is, the bandwidth allocation is not fixed. It can be seen that the present application can solve the problems of high heat dissipation and cost requirements and rigid resource allocation.
[0053] Figure 3 This is a schematic diagram of another bandwidth allocation system provided in an embodiment of the present application. In another embodiment of the present disclosure, Figure 3 As shown, the bandwidth allocation system further includes a third connector 130 deployed on the mainboard and a fourth connector 230 deployed on the expansion card. The expansion interface group 220 includes at least one expansion interface. The third connector 130 is connected to the processing unit 120 ( Figure 3 ), and is connected to an expansion interface via a fourth connector 230.
[0054] Specifically, the third connector 130 is connected to the fourth connector 230, and the fourth connector 230 is connected to an expansion interface, thereby enabling the third connector 130 to be connected to the expansion interface via the fourth connector 230. The specific type of the third connector 130 can be configured by those skilled in the art based on actual circumstances and is not limited here. Optionally, the third connector 130 includes, for example, a gold finger slot, but is not limited thereto.
[0055] Specifically, the specific type of the fourth connector 230 can be set by those skilled in the art according to actual conditions and is not limited here. Optionally, the fourth connector 230 includes, for example, a gold finger, etc., but is not limited thereto.
[0056] Specifically, for an expansion interface connected to the third connector 130, if the first connector 110 is connected to the expansion interface group 220 to which the expansion interface belongs, the transmission data on the expansion interface is a combination of "transmission data through the third connector 130" and "transmission data transmitted between the first connector 110 and the expansion interface"; if the first connector 110 is not connected to the expansion interface group 220 to which the expansion interface belongs, the transmission data on the expansion interface is "transmission data through the third connector 130".
[0057] To explain the bandwidth allocation system provided by the embodiment of the present disclosure in detail, a specific example is given below for detailed description. Figure 4 This is a structural diagram of another bandwidth allocation system provided in an embodiment of the present application. Figure 5 This is a flow chart of bandwidth allocation change provided in an embodiment of the present application. Figure 3 and Figure 4 As shown, a gold finger slot (i.e., the third connector 130) and an MCIO x8 connector (i.e., the first connector 110) are deployed on the mainboard to split the PCIex16 signal of the processing unit 120 into dual x8 channels. A gold finger (i.e., the fourth connector 230), two expansion interface groups 220 and a switching unit 210 are deployed on the expansion card, wherein one expansion interface group 220 includes a x16 expansion interface, i.e., Slot0, and the other expansion interface group 220 includes two x8 expansion interfaces, i.e., Slot1 and Slot2. The gold finger of the expansion card is directly inserted into the gold finger slot on the mainboard in a Pin-to-Pin connection manner, and the connection between the switching unit 210 and the two expansion interface groups 220 is completed through two sets of cables. The sideband signals (such as PCIe reset, I2C management bus, and frequency reduction signal) between the mainboard and the expansion card are directly transmitted through the gold finger without the need to add additional connectors, thereby optimizing hardware costs. As shown Figure 5As shown, when the server is operating normally, if the peripheral device changes, for example, a GPU needs to be connected to perform AI computing or image processing and it is determined that the GPU requires the bandwidth of a x16 channel, the server is shut down and the GPU is inserted into Slot0, and then the switching unit 210 is operated to connect the MCIO x8 connector to Slot0, and then the server is turned on. At this time, the bandwidth allocation signal is high, and the internal logic circuit of the processing unit 120 configures the PCIe channel to the x16 full bandwidth mode. In this way, the MCIO x8 connector and the gold finger slot x8 channel are merged through the line to form a complete PCIe x16 link. If the peripheral device changes again, for example, if a host bus adapter (HBA) (to achieve PCIe-SAS / SATA conversion) and two x4 network cards need to be connected and it is determined that the HBA requires x8 channel bandwidth and the two x4 network cards each require x4 channel bandwidth, then the computer is shut down and the HBA is inserted into Slot0, and the two x4 network cards are connected to Slot1 and Slot2 respectively. Then, the switching unit 210 is operated to connect the MCIO x8 connector to Slot0 and Slot1, and then the computer is turned on. At this time, the bandwidth allocation signal is low, and the processing unit 120 sends two PCIe x8 signals. It can be seen that the embodiment of the present application, through the dynamic disassembly and reassembly of the channel, a single x16 uplink interface can be flexibly reconstructed into heterogeneous bandwidth combinations such as x8+x8, thereby realizing the elastic topology of the physical layer signal link and the real-time on-demand scheduling of bandwidth resources.
[0058] It should be noted that Figure 1 Only one set of bandwidth allocation components is shown in the figure, which includes: a first connector 110, a switching unit 210 supporting the first connector 110, a bandwidth signal allocation indication unit supporting the first connector 110, and multiple expansion interface groups 220 supporting the first connector 110, but the present invention is not limited thereto. The bandwidth allocation device may also include multiple sets of bandwidth allocation components. Of course, as Figure 3 As shown, a set of bandwidth allocation components may further include at least one third connector 130 and at least one fourth connector 230 .
[0059] In summary, the bandwidth allocation system provided by the present application has the following advantages: 1) Improved operation and maintenance efficiency, the physical switching unit 210 replaces manual cable plugging and unplugging, and no unpacking operation is required throughout the process. In addition, the purely mechanical structure realizes signal routing, which saves a lot of standby power consumption compared to the electronic switch solution; 2) The architecture is flexibly expandable, supporting multiple topology structures through the setting of multiple expansion interface groups 220, and realizing dynamic disassembly and reorganization of channels through the setting of the third connector 130 and the fourth connector 230; 3) The ball guide rail design reduces the sliding friction of the second connector 212, thereby increasing the convenience of operation and service life.
[0060] An embodiment of the present application further provides an electronic device, comprising any of the above-mentioned bandwidth allocation systems.
[0061] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0062] The above describes in detail the bandwidth allocation system and electronic device provided by this application. This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above examples is intended only to facilitate understanding of the method and core concepts of this application. It should be noted that those skilled in the art may make various improvements and modifications to this application without departing from the principles of this application, and such improvements and modifications fall within the scope of protection of the claims of this application.
Claims
1. A bandwidth allocation system, characterized in that: include: A bandwidth allocation indicating unit, a first connector and a processing unit disposed on the mainboard, and a switching unit and at least two expansion interface groups disposed on the expansion card; The first connector and the expansion interface group are both connected to the switching unit, and the switching unit is configured to switch the first connector from being connected to a current interface group to being connected to a target interface group by mechanical switching via a sliding transmission structure under a user's switching operation, wherein the current interface group is the expansion interface group connected to the first connector before the switching, and the target interface group is the expansion interface group connected to the first connector after the switching; The bandwidth allocation indicating unit is connected to the switching unit, and the bandwidth allocation indicating unit is used to output a bandwidth allocation signal based on the connection status between the first connector and the two extension interface groups; The processing unit is connected to the first connector, and is configured to perform bandwidth allocation based on the bandwidth allocation signal.
2. The bandwidth allocation system according to claim 1, wherein: The switching unit includes a guide structure, at least two second connectors provided on the guide structure, a transmission structure, and a locking structure. The transmission structure includes a plug. The first connector is connected to the plug. The plug includes a plug portion. Different expansion interface groups are connected to different second connectors via different cable groups. The switching operation includes an unlocking operation, a moving operation, and a locking operation. The locking structure is used to release the mechanical interlock between the plug portion and the current connector during the unlocking operation, wherein the current connector is the second connector connected to the current interface group through the cable group; The transmission structure is used to move along the guide structure during the moving operation to move the plug to the target connector, wherein the target connector is the second connector connected to the target interface group through the cable group; The locking structure is used to mechanically interlock the plug portion and the target connector during the locking operation to establish a connection between the first connector and the target interface group.
3. The bandwidth allocation system according to claim 2, wherein: The switching unit further includes a limiting structure, and / or an anti-fouling structure, and / or a rolling structure; The limiting structure is used to limit the movement range of the plug; The foolproof structure is used to prevent the plug-in portion from being mistakenly inserted into the groove portion of the second connector; The rolling structure is used to enable the relative movement between the plug and the guide structure to be rolling.
4. The bandwidth allocation system according to claim 3, wherein: The guide structure includes a guide rail, the transmission structure includes a switching connecting rod, the locking structure includes a safety lock tongue, the limiting structure includes a baffle, the fool-proof structure includes a preset lock buckle, and the rolling structure includes a ball.
5. The bandwidth allocation system according to claim 2, characterized in that: When the first connector is connected to different expansion interface groups, the level value of the bandwidth allocation signal is different.
6. The bandwidth allocation system according to claim 5, characterized in that: The at least two extension interface groups include a first extension interface group and a second extension interface group, and the bandwidth allocation indication unit includes a first voltage dividing unit disposed on the mainboard and a second voltage dividing unit disposed on the expansion card; A first end of the first voltage divider unit is connected to a power source, a second end of the first voltage divider unit is connected to the plug, and the second end of the first voltage divider unit is used to output the bandwidth allocation signal; A first end of the second voltage dividing unit is connected to the second connector connected to the second extension interface group, and a second end of the second voltage dividing unit is grounded.
7. The bandwidth allocation system according to claim 1, wherein: There are at least two expansion interface groups with different numbers of expansion interfaces.
8. The bandwidth allocation system according to claim 1, wherein: Also included is a third connector disposed on the mainboard, and a fourth connector disposed on the expansion card, wherein the expansion interface group includes at least one expansion interface; The third connector is connected to the processing unit and is connected to one of the expansion interfaces through the fourth connector.
9. The bandwidth allocation system according to claim 8, characterized in that: The first connector is a multi-channel input and output connector, the third connector is a gold finger slot, and the fourth connector is a gold finger.
10. An electronic device, characterized in that: include: The bandwidth allocation system according to any one of claims 1 to 9.
Citation Information
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