Rapid estimation method for thermal neutron single event upset cross section of integrated circuit chip
Through microstructure analysis and Monte Carlo simulation, combined with the geometric size and material distribution of the FinFET chip, a quantitative relationship between effective LET and critical charge was established, and the problem of large error in estimation of single-particle flip cross section of FinFET chip was solved, and a fast and accurate single-particle flip cross section calculation was achieved.
Patent Information
- Application Number
- CN202510557957.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-29
- Publication Date
- 2025-07-25
AI Technical Summary
The prior art is difficult to correlate the dynamic relationship between the boron-10 isotope distribution and critical charge in FinFET chips in real time, resulting in a large error in the estimation of the flip cross-section of thermal neutron single particles.
The geometric size and material composition distribution of FinFET chip were determined through microstructure analysis, combined with Monte Carlo simulation, the effective linear energy transfer distribution of thermal neutrons in the sensitive area of the chip was calculated, and the quantitative relationship between critical charge and effective LET was established to determine the single-particle flip cross section.
The LET calculation error in sensitive areas is reduced, and the rapid and accurate estimation of the flip cross-section of thermal neutron single particles of integrated circuit chips is achieved.
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Figure CN120373225A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of semiconductor devices, and specifically to a method for quickly estimating the thermal neutron single event upset cross-section of an integrated circuit chip. Background Art
[0002] As a core device of advanced integrated circuits, the three-dimensional structure of FinFET (Fin Field-Effect Transistor) (such as fin height and gate width) significantly improves device performance, but also brings higher radiation sensitivity. Under the irradiation of high-energy particles (such as thermal neutrons), the boron-10 isotope in the FinFET chip undergoes a nuclear reaction with neutrons, and the secondary particles generated will deposit energy in the sensitive area, resulting in single event upset. In traditional technologies, when determining the single event upset cross-section, since the charge sharing factor of FinFET is affected by the three-dimensional structure and process parameters, and the existing methods are difficult to real-time correlate the distribution of boron-10 isotope (B-10) with the dynamic relationship of critical charge, this leads to a large error in the estimation of the SEU cross-section. Summary of the Invention
[0003] The purpose of this application is to provide a method for quickly estimating the thermal neutron single event upset cross-section of an integrated circuit chip to solve the technical problems proposed in the above background art.
[0004] To achieve the above purpose, this application discloses the following technical solutions: A method for quickly estimating the thermal neutron single event upset cross-section of an integrated circuit chip, the method comprising the following steps:
[0005] S1 - Determine the geometric dimensions and material composition distribution of the FinFET chip through microstructure analysis, and the material composition distribution includes the distribution and content of boron-10 isotope;
[0006] S2 - Based on the geometric dimensions and material composition distribution, calculate the effective linear energy transfer distribution of thermal neutrons in the sensitive area of the chip through Monte Carlo simulation;
[0007] S3 - Establish a quantitative relationship between the critical charge and the effective LET, and determine the single event upset cross-section in combination with the effective linear energy transfer distribution.
[0008] Preferably, the microstructure analysis specifically includes:
[0009] S11 - Use the grinding method, scanning electron microscope and transmission electron microscope to determine the three-dimensional geometric structure of the chip;
[0010] S12 - Analyze the distribution of boron-10 isotope and its local concentration in the sensitive area through electron energy spectrum and secondary ion mass spectrometry.
[0011] Preferably, the calculation of the effective linear energy transfer distribution specifically includes:
[0012] S21 - Establish a Monte Carlo simulation model and input the distribution data of boron - 10 isotope, neutron flux density, and geometric parameters of the sensitive region;
[0013] S22 - Calculate the energy loss rate of secondary particles generated by the reaction of boron - 10 isotope with neutrons in the sensitive region;
[0014] S23 - Perform a spatial integration on the energy loss rate in the sensitive region to obtain the effective linear energy transfer distribution.
[0015] Preferably, the effective linear energy transfer distribution is calculated by the following formula:
[0016]
[0017] where ρ secondary is the energy loss rate of secondary particles generated by the reaction of boron - 10 isotope with neutrons in the sensitive region, φ n is the neutron flux density, σ B_10 is the reaction cross - section of boron - 10 isotope with neutrons, and V sensitive is the volume of the sensitive region.
[0018] Preferably, the neutron flux density is determined by the following method:
[0019] Calibrate according to the atmospheric neutron radiation environment or accelerator neutron source, and correct it in combination with the scattering and absorption coefficients of neutrons by the chip material.
[0020] Preferably, the quantitative relationship between the critical charge and the effective LET is determined by the following method:
[0021] Based on the integral value of the ionization charge in the sensitive region, combined with the carrier mobility, charge sharing factor, and structural parameters of the FinFET device, calculate the critical charge threshold required for single - event upset.
[0022] Preferably, the charge sharing factor is determined by the following method:
[0023] Based on the three - dimensional structural parameters and process characteristics of the FinFET, calculate the charge diffusion efficiency through TCAD simulation to obtain the distribution of the charge sharing factor; where the three - dimensional structural parameters include the gate width and fin height, and the process characteristics include the buried oxide layer thickness of the SOI substrate.
[0024] Preferably, the calculation formula for the single - event upset cross - section is:
[0025]
[0026] where φn is the neutron flux density, σ B_10is the reaction cross-section of boron-10 isotope with neutrons, Θ is the Heaviside function, which takes 1 when and 0 otherwise, η is the charge sharing factor, and Q induced is the ionization charge generated by a single neutron reaction.
[0027] Preferably, the ionization charge generated by the single neutron reaction is calculated by the following formula:
[0028]
[0029] where ρ secondary is the energy loss rate of the secondary particles generated by the reaction of boron-10 isotope with neutrons in the sensitive region, e is the electron charge, μ is the carrier mobility, and λ secondary is the average energy deposition rate of the secondary particles in the sensitive region, and V sensitive is the volume of the sensitive region.
[0030] Preferably, the average energy deposition rate of the secondary particles in the sensitive region is determined by the following steps:
[0031] S31 - Establish an adaptive path integral grid for Monte Carlo simulation, where the step size ΔS of the path integral is dynamically adjusted according to the electric field gradient of the sensitive region to satisfy:
[0032]
[0033] where γ B_10 is the mean free path of boron-10 isotope, τ is the material density, and W Fin is the FinFET fin width;
[0034] S32 - Perform piecewise integration on each secondary particle path, where the energy loss rate ρ i of each segment is calculated by the formula:
[0035]
[0036] where ρ0 is the initial energy loss rate without considering the electric field gradient;
[0037] S33 - Calculate the average energy deposition rate, and the formula for the average energy deposition rate is:
[0038]
[0039] Beneficial effects: The rapid estimation method for the thermal neutron single-event upset cross-section of the integrated circuit chip in this application determines the geometric dimensions, distribution, and content of boron-10 isotopes of the FinFET chip based on microstructure analysis, calculates the effective linear energy transfer distribution of thermal neutrons in the sensitive area of the chip, and then determines the single-event upset cross-section by establishing a quantitative relationship between the critical charge and the effective LET, reducing the LET calculation error in the sensitive area. Through the coupling of boron-10 isotopes, electric field gradient, and critical charge, the rapid and accurate estimation of the SEU cross-section is achieved. Description of the Drawings
[0040] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of this application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0041] Figure 1 It is a flowchart of the rapid estimation method for the thermal neutron single-event upset cross-section of the integrated circuit chip provided in the embodiment of this application. Detailed Embodiments
[0042] The following will clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the described embodiments are only some embodiments of this application, rather than all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of this application.
[0043] In this article, the term "including" is intended to cover non-exclusive inclusion, so that a process, method, article, or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such a process, method, article, or device. Without further limitations, the elements defined by the statement "including..." do not exclude the existence of other identical elements in the process, method, article, or device including the said elements.
[0044] This embodiment provides a rapid estimation method for the thermal neutron single-event upset cross-section of an integrated circuit chip as Figure 1 shown, and this method includes the following steps S1 - S3.
[0045] Specifically
[0046] S1 - Determine the geometric dimensions and material composition distribution of the FinFET chip through microstructure analysis. The material composition distribution includes the distribution and content of boron - 10 isotope (B - 10). The distribution of B - 10 directly affects the reaction probability between neutrons and the chip. Regions with high B - 10 concentration (such as doped regions) will generate more secondary particles, resulting in higher LET values; regions with low concentration (such as insulating layers) have a reduced reaction cross - section.
[0047] Among them, the microstructure analysis specifically includes:
[0048] S11 - Use the wafer grinding method, scanning electron microscopy, and transmission electron microscopy to determine the three - dimensional geometric structure of the chip;
[0049] S12 - Analyze the distribution of boron - 10 isotope and its local concentration in sensitive regions (such as the center of the drain region) through electron energy spectroscopy and secondary ion mass spectrometry. For example, through secondary ion mass spectrometry, directly measure the local concentration distribution of B - 10 in the chip, especially the depth distribution in sensitive regions (such as the center of the drain region). Through electron energy spectroscopy, analyze the proportion of B - 10 atoms on the material surface, and combine three - dimensional structure parameters (such as fin height, gate width) to construct a spatial distribution model.
[0050] S2 - Based on the geometric dimensions and material composition distribution, calculate the effective linear energy transfer distribution of thermal neutrons in the sensitive region of the chip through Monte Carlo simulation.
[0051] Among them, the calculation of the effective linear energy transfer distribution specifically includes:
[0052] S21 - Establish a Monte Carlo simulation model and input the distribution data of boron - 10 isotope, neutron flux density, and geometric parameters of the sensitive region;
[0053] S22 - Calculate the energy loss rate of secondary particles (α particles, lithium - 7 nuclei) generated by the reaction of boron - 10 isotope with neutrons in the sensitive region;
[0054] S23 - Perform a spatial integration of the energy loss rate in the sensitive region to obtain the effective linear energy transfer distribution. Specifically, the effective linear energy transfer distribution is calculated through the following formula:
[0055]
[0056] Among them, ρ secondary is the energy loss rate of secondary particles generated by the reaction of boron - 10 isotope with neutrons in the sensitive region, φ n is the neutron flux density, which reflects the density of neutrons in the sensitive region and directly affects the generation probability of secondary particles, σ B_10 is the reaction cross - section of boron - 10 isotope with neutrons, V sensitiveis the sensitive region volume. Here, the numerator is the integral of the product of the energy loss rate of secondary particles and the neutron reaction probability, reflecting the total energy deposition; the denominator is the normalization term, representing the sum of neutron reaction probabilities per unit volume. Through the spatial integration dV, the effective LET distribution can accurately reflect the local energy deposition characteristics within the sensitive region; coupling the B-10 distribution, neutron flux, and energy loss rate avoids the errors of isolated analysis of each parameter in the traditional method.
[0057] In this embodiment, the neutron flux density is determined by the following method:
[0058] Calibrated according to the atmospheric neutron radiation environment or accelerator neutron source, and corrected in combination with the scattering and absorption coefficients of neutrons by the chip material.
[0059] S3 - Establish the quantitative relationship between the critical charge and the effective LET, and determine the single - event upset cross - section in combination with the effective linear energy transfer distribution.
[0060] Among them, the quantitative relationship between the critical charge and the effective LET is determined by the following method:
[0061] Based on the integral value of the ionization charge within the sensitive region, combined with the carrier mobility, charge sharing factor, and the structural parameters of the FinFET device, calculate the critical charge threshold required for single - event upset.
[0062] Furthermore, the charge sharing factor is determined by the following method:
[0063] Based on the three - dimensional structural parameters and process characteristics of the FinFET, calculate the charge diffusion efficiency through TCAD simulation to obtain the distribution of the charge sharing factor; among them, the three - dimensional structural parameters include the gate width and fin height, and the process characteristics include the buried oxide layer thickness of the SOI substrate.
[0064] By the above, the calculation formula for the single - event upset cross - section is:
[0065]
[0066] Among them, φn is the neutron flux density, σ B_10 is the reaction cross - section of boron - 10 isotope with neutrons, Θ is the Heaviside function, which takes 1 when and takes 0 otherwise, η is the charge sharing factor, Q induced is the ionization charge generated by a single neutron reaction.
[0067] Furthermore, the ionization charge generated by a single neutron reaction is calculated by the following formula:
[0068]
[0069] Among them, ρ secondary is the energy loss rate of secondary particles generated by the reaction of boron-10 isotope with neutrons in the sensitive region. e is the electron charge, μ is the carrier mobility, and λ secondary is the average energy deposition rate of secondary particles in the sensitive region, and V sensitive is the volume of the sensitive region.
[0070] Feasibly, the average energy deposition rate of the secondary particles in the sensitive region is determined by the following steps:
[0071] S31 - Establish an adaptive path integral grid for Monte Carlo simulation, where the step size ΔS of the path integral is dynamically adjusted according to the electric field gradient in the sensitive region to satisfy:
[0072]
[0073] Among them, γ B_10 is the mean free path of boron-10 isotope, τ is the material density, and W Fin is the FinFET fin width, and the fin width affects the lateral diffusion range of secondary particles. In the formula, the inverse relationship between the electric field gradient and the step size means that in the region where the electric field changes violently (such as near the source-drain junction of FinFET, where the electric field gradient is large), the step size ΔS decreases to ensure high-resolution calculation of energy deposition. In the region where the electric field is gentle (where the electric field gradient is small), the step size ΔS increases to reduce the calculation amount.
[0074] S32 - Perform piecewise integration on each secondary particle path. Among them, the calculation formula for the energy loss rate ρ i of each segment is:
[0075]
[0076] Among them, ρ0 is the initial energy loss rate without considering the electric field gradient. In the formula, the initial energy loss rate is corrected by the product of the electric field gradient and the step size, which reflects the influence of the electric field change on the energy deposition of secondary particles, and thus ensures the reliability of the calculation result.
[0077] S33 - Calculate the average energy deposition rate. The calculation formula for the average energy deposition rate is:
[0078]
[0079] By the above, in this embodiment, the step size is dynamically adjusted by the electric field gradient and structure parameters, directly correlating the physical mechanism with the calculation accuracy. A small step size is used in the region where the electric field changes violently (such as the sensitive region), and a large step size is used in other regions, which not only ensures the accuracy of the key region but also reduces the global calculation amount.
[0080] In the embodiments provided in the present application, it should be understood that the embodiments described herein can be implemented in hardware, software, firmware, middleware, code, or any suitable combination thereof. For hardware implementation, the processor can be implemented in one or more of the following units: application specific integrated circuit (ASIC), digital signal processor (DSP), digital signal processing device (DSPD), programmable logic device (PLD), field programmable gate array (FPGA), processor, controller, microcontroller, microprocessor, or other electronic units designed to implement the functions described herein, or a combination thereof. For software implementation, part or all of the processes of the embodiments can be completed by instructing the relevant hardware through a computer program. When implemented, the above program can be stored in a computer-readable storage medium or transmitted as one or more instructions or codes on a computer-readable storage medium. The computer-readable storage medium includes computer storage media and communication media, where the communication media includes any medium that facilitates the transfer of a computer program from one place to another. The storage media can be any available medium that can be accessed by a computer. The computer-readable storage medium can include, but is not limited to, RAM, ROM, EEPROM, CD-ROM, or other optical disk storage, magnetic disk storage media, or other magnetic storage devices, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer.
[0081] Finally, it should be noted that the above are only the preferred embodiments of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A fast estimation method for the thermal neutron single event upset cross section of an integrated circuit chip, characterized in that, The method includes the following steps: S1 - Determine the geometric dimensions and material composition distribution of the FinFET chip through microstructure analysis, where the material composition distribution includes the distribution and content of boron-10 isotope; S2 - Based on the geometric dimensions and material composition distribution, calculate the effective linear energy transfer distribution of thermal neutrons in the sensitive area of the chip through Monte Carlo simulation; S3 - Establish a quantitative relationship between the critical charge and the effective LET, and determine the single event upset cross-section in combination with the effective linear energy transfer distribution.
2. The rapid estimation method for the thermal neutron single event upset cross section of an integrated circuit chip according to claim 1, characterized in that The microstructure analysis specifically includes: S11 - Use the wafer grinding method, scanning electron microscope and transmission electron microscope to determine the three-dimensional geometric structure of the chip; S12 - Analyze the distribution of boron-10 isotope and its local concentration in the sensitive area through electron energy spectrum and secondary ion mass spectrometry.
3. The rapid estimation method for the thermal neutron single event upset cross section of an integrated circuit chip according to claim 1, characterized in that, The calculation of the effective linear energy transfer distribution specifically includes: S21 - Establish a Monte Carlo simulation model and input the distribution data of boron-10 isotope, neutron flux density and geometric parameters of the sensitive area; S22 - Calculate the energy loss rate of secondary particles generated by the reaction of boron-10 isotope and neutrons in the sensitive area; S23 - Perform a spatial integration on the energy loss rate in the sensitive area to obtain the effective linear energy transfer distribution.
4. The rapid estimation method for the thermal neutron single event upset cross section of an integrated circuit chip according to claim 3, characterized in that, The effective linear energy transfer distribution is calculated through the following formula: Among them, ρ secondary is the energy loss rate of secondary particles generated by the reaction of boron-10 isotope with neutrons in the sensitive region, φ n is the neutron flux density, σ B_10 is the reaction cross section of boron-10 isotope with neutrons, and V sensitive is the volume of the sensitive region.
5. The method for rapidly estimating the thermal neutron single-event upset cross section of an integrated circuit chip according to claim 3, characterized in that, The neutron flux density is determined through the following method: Calibrate according to the atmospheric neutron radiation environment or accelerator neutron source, and correct it in combination with the scattering and absorption coefficients of neutrons by the chip material.
6. The rapid estimation method for the thermal neutron single event upset cross section of an integrated circuit chip according to claim 1, characterized in that, The quantitative relationship between the critical charge and the effective LET is determined through the following method: Based on the integral value of the ionization charge in the sensitive area, combine the carrier mobility, charge sharing factor and the structural parameters of the FinFET device to calculate the critical charge threshold required for single event upset.
7. The rapid estimation method for the thermal neutron single-event upset cross-section of an integrated circuit chip according to claim 6, characterized in that, The charge sharing factor is determined through the following method: Based on the three-dimensional structural parameters and process characteristics of the FinFET, calculate the charge diffusion efficiency through TCAD simulation to obtain the distribution of the charge sharing factor; where the three-dimensional structural parameters include the gate width and fin height, and the process characteristics include the buried oxide layer thickness of the SOI substrate.
8. The rapid estimation method for the thermal neutron single-event upset cross-section of an integrated circuit chip according to claim 1, characterized in that, The calculation formula for the single event upset cross-section is: where φ n is the neutron flux density, σ B_10 is the reaction cross-section of boron-10 isotope with neutrons, Θ is the Heaviside function which takes 1 when and 0 otherwise, η is the charge sharing factor, and Q induced is the ionization charge generated by a single neutron reaction.
9. The rapid estimation method for the thermal neutron single event upset cross section of an integrated circuit chip according to claim 8, characterized in that The ionization charge generated by a single neutron reaction is calculated through the following formula: Among them, ρ secondary is the energy loss rate of secondary particles generated by the reaction of boron-10 isotope with neutrons in the sensitive region, e is the electron charge, μ is the carrier mobility, λ secondary is the average energy deposition rate of secondary particles in the sensitive region, V sensitive is the volume of the sensitive region.
10. The rapid estimation method for the thermal neutron single-event upset cross-section of an integrated circuit chip according to claim 9, wherein The average energy deposition rate of secondary particles in the sensitive area is determined through the following steps: S31 - Establish an adaptive path integral grid for Monte Carlo simulation, where the step size ΔS of the path integral is dynamically adjusted according to the electric field gradient ▽E of the sensitive region, satisfying: local Dynamically adjusted to satisfy: Among them, γ B_10 is the mean free path of boron-10 isotope, τ is the material density, and W Fin is the FinFET fin width; S32 - Perform piecewise integration on each secondary particle path, where the energy loss rate ρ i of each segment is calculated by the formula: Where ρ0 is the initial energy loss rate without considering the electric field gradient; S33 - Calculate the average energy deposition rate, and the calculation formula for the average energy deposition rate is: