High-efficiency single-board integrated multi-frequency-point radio frequency energy collection system

Through the combined design of cylindrical dielectric resonator antenna, barron and RBR chips, the problems of low efficiency and large losses in the RF energy harvesting system are solved, and efficient RF energy harvesting and transmission are achieved, which is suitable for self-powering of micro-equipment.

CN120377524APending Publication Date: 2025-07-25RES INST OF XIAN JIAOTONG UNIV & SUZHOU
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Patent Information

Application Number
CN202510523313.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-24
Publication Date
2025-07-25

AI Technical Summary

Technical Problem

The existing RF energy harvesting systems have problems such as low power density of RF signals, large frequency and power changes, limited energy conversion efficiency and high design complexity, making it difficult to achieve efficient energy collection and transmission.

Method used

The combined design of cylindrical dielectric resonator antenna, barron, matching network and RBR chip is adopted. Through gap-microstrip line coupling and cross-coupling connection, efficient RF energy collection and rectification are achieved and energy loss is reduced.

Benefits of technology

It improves the efficiency of the RF energy collector, reduces the loss during the energy transfer process, and realizes high gain and efficient energy conversion, which is suitable for self-powered applications of micro-equipment.

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Abstract

The invention discloses a high-efficiency single-board integrated multi-frequency-point radio frequency energy collection system, which comprises a transmitting antenna, a cylindrical dielectric resonator antenna, a Balun, a matching network, an RBR chip and a sensor load, and is characterized in that the output end of the cylindrical dielectric resonator antenna is connected with the input end of the Balun, the output end of the Balun is connected with the input end of the matching network, and the output end of the matching network is connected with the output end of the transmitting antenna; the output end of the matching network is connected with the input end of the RBR chip, the sensor load is connected with the output end of the RBR chip, and the system can improve the radio frequency energy receiving efficiency of the radio frequency energy collector and reduce the loss of energy in the system transmission process.
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Description

Technical Field

[0001] The present invention belongs to the technical field of power management for radio frequency energy harvesting, and relates to a high-efficiency single-board integrated multi-frequency radio frequency energy harvesting system. Background Art

[0002] A radio frequency energy harvesting system is a technology that converts radio frequency electromagnetic energy in the environment into electrical energy. In the current development of technology, the widespread application of microelectronic systems has led to an increasing demand for continuous power supply for systems such as wireless sensor networks (WSNs). As a potential power supply solution for wireless sensor nodes, radio frequency energy harvesting has attracted much attention because it does not rely on traditional batteries.

[0003] In the context of radio frequency energy harvesting technology, there is a large amount of radio frequency electromagnetic energy in the environment, such as radio frequency signals from communication devices, radio and television, etc. These radio frequency signals can be collected and converted into electrical energy to provide continuous power supply for micro-devices. The development of radio frequency energy harvesting systems not only solves the limitations of traditional battery power supply methods, but also enables self-power supply of the system, improving the reliability and stability of micro-devices in practical applications.

[0004] When a differential input pair is required in the rectifier circuit of a radio frequency energy harvesting system, its design usually includes components such as an antenna, a balun, a matching network, and a radio frequency rectifier circuit. The antenna, as the receiver of radio frequency signals, captures and guides the radio frequency electromagnetic energy in the environment into the system. The balun is responsible for converting the output single-ended signal of the antenna into a differential signal with a 180-degree phase difference. The matching network plays a role in adjusting the impedance matching between the antenna and the rectifier circuit to ensure the effective transmission and rectification of radio frequency signals. The radio frequency rectifier circuit is the key component that converts the received radio frequency signal into direct current electrical energy.

[0005] In a radio frequency energy harvesting system, common antenna structures include spiral antennas, patch antennas, or microstrip antennas, etc. These antenna structures have small sizes and good frequency characteristics, and are suitable for integration with micro-devices. Common structures for realizing a differential balun include lumped element baluns, 180-degree hybrid ring couplers, magic T common-differential mode ports, etc. The matching network can adopt a traditional passive network or an intelligent matching network integrated with an adjustment function to achieve efficient matching with the antenna and the rectifier circuit. The radio frequency rectifier circuit often adopts structures such as frequency doubling rectification, ring rectification, or cascade rectification to improve the efficiency and stability of radio frequency energy conversion.

[0006] The advantages of a radio frequency energy harvesting system are that it does not require external battery power supply, can achieve self-power supply of the system, and can utilize the abundant radio frequency signal resources in the environment. In addition, the radio frequency energy harvesting system has a small size and weight, and is suitable for integrated applications of micro-devices. However, there are also some challenges in the radio frequency energy harvesting system, such as low radio frequency signal power density, large variations in frequency and power, and limited energy conversion efficiency, etc., which need to be solved through optimized design and technological improvement. In addition, the design complexity of the radio frequency energy harvesting system is relatively high, and the matching and coordination between the antenna, matching network, rectifying circuit, etc. need to be considered to achieve the efficient operation of the system. Summary of the Invention

[0007] The object of the present invention is to overcome the above-mentioned disadvantages of the prior art, and provide a high-efficiency single-board integrated multi-frequency radio frequency energy harvesting system, which can improve the efficiency of the radio frequency energy harvester to receive radio frequency energy and reduce the loss of energy during the transmission process in the system.

[0008] To achieve the above object, the present invention discloses a single-board integrated multi-frequency radio frequency energy harvesting system, including a transmitting antenna, a cylindrical dielectric resonator antenna, a balun, a matching network, an RBR chip and a sensor load. Among them, the output end of the cylindrical dielectric resonator antenna is connected to the input end of the balun, the output end of the balun is connected to the input end of the matching network, the output end of the matching network is connected to the input end of the RBR chip, and the sensor load is connected to the output end of the RBR chip.

[0009] Further, the cylindrical dielectric resonator antenna includes a cylindrical dielectric resonator and a square dielectric substrate, and the cylindrical dielectric resonator is arranged on the dielectric substrate.

[0010] Further, the diameter D of the cylindrical dielectric resonator is 72 mm, the height h of the cylindrical dielectric resonator d = 35 mm, and the relative dielectric constant of the cylindrical dielectric resonator is 19;

[0011] The dielectric substrate is made of F4B material, the relative dielectric constant ε of the dielectric substrate r = 2.65, the thickness h of the dielectric substrate is 1 mm, and the side length A of the dielectric substrate is 100 mm.

[0012] Further, a 50 Ω microstrip feeder is arranged along the x-axis direction at the center of the dielectric substrate, and the width W of the 50 Ω microstrip feeder f = 2.7 mm, the length L of the 50 Ω microstrip feeder f = 69 mm, and the 50 Ω microstrip feeder is printed on the lower surface of the dielectric substrate.

[0013] Furthermore, a metal ground is printed on the upper surface of the dielectric substrate, and a slot with two stubs is etched at the center of the metal ground.

[0014] Furthermore, the cylindrical dielectric resonator is located at the center of the dielectric substrate;

[0015] Furthermore, the resonant frequency of the cylindrical dielectric resonator antenna is affected by the size of the slot, and by adjusting the size of the slot, the cylindrical dielectric resonator antenna can operate effectively in the frequency band of 0.9 GHz to 1.8 GHz.

[0016] Furthermore, the balun utilizes the gap coupling between the single-layer dielectric slab microstrip line and the ground plane. The gap coupler consists of the gap between the microstrip line and the ground plane and the metal plates on both sides of the gap.

[0017] Furthermore, the matching network includes a first external discrete RF inductor and a second external discrete RF inductor with the same inductance value. One end of the first external discrete RF inductor is connected to an output terminal of the balun, and one end of the second external discrete RF inductor is connected to the other output terminal of the balun. The other end of the first external discrete RF inductor and the other end of the second external discrete RF inductor are connected to the input terminal of the RBR chip.

[0018] Furthermore, the RBR chip includes a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, a seventh diode, an eighth diode, a first flying capacitor, a second flying capacitor, a third flying capacitor, a fourth flying capacitor, a fifth flying capacitor, a sixth flying capacitor, a seventh flying capacitor, an eighth flying capacitor, a first gate connection capacitor, a second gate connection capacitor, a third gate connection capacitor, a fourth gate connection capacitor, a fifth gate connection capacitor, a sixth gate connection capacitor, a seventh gate connection capacitor, an eighth gate connection capacitor, a first gate connection resistor, a second gate connection resistor, a third gate connection resistor, a fourth gate connection resistor, a fifth gate connection resistor, a sixth gate connection resistor, a seventh gate connection resistor, an eighth gate connection resistor, a first output filter capacitor, a second output filter capacitor, and a load resistor;

[0019] The first external discrete RF inductor is connected to the first signal input terminal; the second external discrete RF inductor is connected to the second signal input terminal;

[0020] The first signal input terminal is connected to one end of the first flying capacitor, one end of the second gate connection capacitor, one end of the fourth gate connection capacitor, one end of the sixth gate connection capacitor, and one end of the eighth gate connection capacitor. The second signal input terminal is connected to one end of the second flying capacitor, one end of the first gate connection capacitor, one end of the third gate connection capacitor, one end of the fifth gate connection capacitor, and one end of the seventh gate connection capacitor. The gate of the first NMOS transistor is connected to the other end of the first gate connection capacitor and one end of the first gate connection resistor. The gate of the first PMOS transistor is connected to the other end of the second gate connection capacitor and one end of the second gate connection resistor. The gate of the second PMOS transistor is connected to the other end of the third gate connection capacitor and one end of the third gate connection resistor. The gate of the second NMOS transistor is connected to the other end of the fourth gate connection capacitor and one end of the fourth gate connection resistor. The drain of the first NMOS transistor is connected to the drain of the second PMOS transistor, the negative electrode of the first diode, the positive electrode of the third diode, the other end of the first flying capacitor, and one end of the fifth flying capacitor. The drain of the first PMOS transistor is connected to the drain of the second NMOS transistor, the positive electrode of the second diode, the negative electrode of the fourth diode, the other end of the second flying capacitor, and one end of the sixth flying capacitor. The source of the first NMOS transistor and the source of the first PMOS transistor, the positive electrode of the first diode, the negative electrode of the second diode, one end of the third flying capacitor, one end of the fourth flying capacitor, the other end of the first gate connection resistor, the other end of the second gate connection resistor, one end of the first output filter capacitor, and one end of the second output filter capacitor are connected to ground. The source of the second PMOS transistor is connected to the source of the third NMOS transistor, the negative electrode of the third diode, the positive electrode of the fifth diode, the other end of the third flying capacitor, one end of the seventh flying capacitor, the other end of the third gate connection resistor, and one end of the fifth gate connection resistor. The source of the second NMOS transistor is connected to the source of the third PMOS transistor, the positive electrode of the fourth diode, the negative electrode of the sixth diode, the other end of the fourth flying capacitor, one end of the eighth flying capacitor, the other end of the fourth gate connection resistor, and one end of the sixth gate connection resistor. The gate of the third NMOS transistor is connected to the other end of the fifth gate connection capacitor and the other end of the fifth gate connection resistor. The gate of the third PMOS transistor is connected to the other end of the sixth gate connection capacitor and the other end of the sixth gate connection resistor. The gate of the fourth PMOS transistor is connected to the other end of the seventh gate connection capacitor and one end of the seventh gate connection resistor. The gate of the fourth NMOS transistor is connected to the other end of the eighth gate connection capacitor and one end of the eighth gate connection resistor. The drain of the third NMOS transistor is connected to the drain of the fourth PMOS transistor, the negative electrode of the fifth diode, the positive electrode of the seventh diode, and the other end of the fifth flying capacitor. The drain of the third PMOS transistor is connected to the drain of the fourth NMOS transistor, the positive electrode of the sixth diode, the negative electrode of the eighth diode, and the other end of the sixth flying capacitor.The source of the fourth PMOS transistor is connected to the negative electrode of the seventh diode, the other end of the seventh flying capacitor, the other end of the seventh gate connection resistor, the other end of the first output filter capacitor, one end of the load resistor, and the first signal output terminal. The source of the fourth NMOS transistor is connected to the positive electrode of the eighth diode, the other end of the eighth flying capacitor, the other end of the eighth gate connection resistor, the other end of the second output filter capacitor, the other end of the load resistor, and the other end of the second signal output terminal.,

[0021] The present invention has the following beneficial effects:

[0022] When the high-efficiency single-board integrated multi-frequency RF energy harvesting system of the present invention is in specific operation, a cylindrical dielectric resonator antenna is used as the receiving antenna, which has the characteristics of high gain and high efficiency at the target frequency, and can effectively receive and convert RF energy. The feeding method adopts slot-microstrip line coupling, which can be co-designed with the balun to meet the differential input requirements of the subsequent RF rectifier circuit while establishing a complete single-PCB integrated RF energy harvesting system. The present invention uses a 2-stage RBR chip as the RF rectifier circuit to achieve the active integration of the RBR. The RBR chips are connected in cross-coupling, eliminating the need for an additional drive circuit and reducing the chip area. Among them, the MOSFET gate is connected to a resistor and a capacitor to form a high-pass filter, whose cut-off frequency is significantly lower than the operating frequency, allowing the transmission of DC voltage from the source to the gate to supply the required bias voltage. In addition, the high-frequency input signal minimizes the phase difference during the MOSFET switching cycle, ensuring the feasibility of synchronous operation. The active integration of the RBR chip improves the rectification efficiency, thereby improving the efficiency of the RF energy harvesting system. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The specification drawings forming a part of the present invention are used to provide a further understanding of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation to the present invention. In the drawings:

[0024] Figure 1 is a schematic structural diagram of the single-board integrated RF energy harvesting system of the present invention;

[0025] FIG. 2(a) is a front view of the cylindrical dielectric resonator antenna 1;

[0026] FIG. 2(b) is a back view of the cylindrical dielectric resonator antenna 1;

[0027] FIG. 2(b) is a side view of the cylindrical dielectric resonator antenna 1;

[0028] Figure 3 is a structural diagram of the balun 2;

[0029] Figure 4 is a structural diagram of the RBR chip 4. Detailed implementation mode

[0030] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0031] In the description of the present invention, it should be understood that the terms "include" and "comprise" indicate the presence of the described features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their combinations.

[0032] It should also be understood that the terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms.

[0033] It should be further understood that the term " / and" as used in the specification of the present invention and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in the present invention generally represents an "or" relationship between the preceding and following related objects.

[0034] It should be understood that although terms such as first, second, and third may be used in the embodiments of the present invention to describe preset ranges, etc., these preset ranges should not be limited to these terms. These terms are only used to distinguish the preset ranges from each other. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0035] Depending on the context, the word "if" as used herein can be interpreted as "when" or "while" or "in response to determining" or "in response to detecting". Similarly, depending on the context, the phrase "if determined" or "if detecting (stated condition or event)" can be interpreted as "when determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)".

[0036] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are some, but not all, of the embodiments of the present invention. Usually, the components described and shown in the accompanying drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed present invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0037] Various schematic structural diagrams according to the disclosed embodiments of the present invention are shown in the drawings. These figures are not drawn to scale, where for the purpose of clear expression, some details are enlarged and some details may be omitted. The shapes of various regions and layers shown in the figures and their relative sizes and positional relationships are merely exemplary. In practice, there may be deviations due to manufacturing tolerances or technical limitations, and those skilled in the art can design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0038] Referring to Figures 1 to 4 , the single-board integrated multi-frequency point radio frequency energy harvesting system of the present invention includes a transmitting antenna, a cylindrical dielectric resonator antenna 1, a balun 2, a matching network 3, an RBR chip 4, and a sensor load 5. Among them, the output end of the cylindrical dielectric resonator antenna 1 is connected to the input end of the balun 2, the output end of the balun 2 is connected to the input end of the matching network 3, the output end of the matching network 3 is connected to the input end of the RBR chip 4, and the sensor load 5 is connected to the output end of the RBR chip 4.

[0039] In this embodiment, the cylindrical dielectric resonator antenna 1 includes a cylindrical dielectric resonator and a square dielectric substrate. The cylindrical dielectric resonator is disposed on the dielectric substrate. The diameter D of the cylindrical dielectric resonator is 72 mm, and the height h of the cylindrical dielectric resonator d = 35 mm. The relative dielectric constant of the cylindrical dielectric resonator is 19. The dielectric substrate is made of F4B material. The relative dielectric constant ε of the dielectric substrate r = 2.65. The thickness h of the dielectric substrate is 1 mm, the side length A of the dielectric substrate is 100 mm. A 50 Ω microstrip feeder is disposed along the x-axis direction at the center of the dielectric substrate. The width W of the 50 Ω microstrip feeder f = 2.7 mm. The length L of the 50 Ω microstrip feeder f= 69 mm, the 50 Ω microstrip feeder is printed on the lower surface of the dielectric substrate; a metal ground is printed on the upper surface of the dielectric substrate, and a slot with two stubs is etched at the center of the metal ground. The width W of the slot s = 4 mm, and the length of the slot is L s = 57 mm, and the diagonal length of the slot is L s2 = 4 mm, the width W of the stub s1 = 5 mm, the length L of the stub s1 = 9 mm, the diagonal length L of the stub s3 = 4 mm, the distance D between the two stubs s = 26 mm; the cylindrical dielectric resonator is located at the center of the dielectric substrate; the resonant frequency of the cylindrical dielectric resonator antenna 1 is affected by the size of the slot in the dielectric resonator. By adjusting the size of the slot, it is ensured that the cylindrical dielectric resonator antenna 1 operates effectively in the frequency bands of 0.9 GHz and 1.8 GHz to maintain excellent impedance matching. The upper top surface of the cylindrical dielectric resonator receives signals near the two frequencies of 0.9 GHz and 1.8 GHz in the environment. The microstrip line is used as a single-ended output and is connected to the input of the balun 2.

[0040] In this embodiment, the balun 2 utilizes the gap coupling between the single-layer dielectric board microstrip line and the ground plane. The gap coupler consists of the gap between the microstrip line and the ground plane and the metal plates on both sides of the gap. The microstrip terminal and the slot line terminal are of a circular non-uniform loading structure.

[0041] The dielectric substrate uses F4B material, and the relative dielectric constant ε of the dielectric substrate r = 2.65, and the thickness h of the dielectric substrate is 1 mm. The diameter D1 of the circular terminal microstrip on the upper surface of the dielectric substrate is 12 mm, the diameters D2 = 14 mm and D3 = 14 mm of the two circular terminal slots on the lower surface of the dielectric substrate, the width W of the input stub f = 2.74 mm, the length L1 of the input stub is 21 mm, the width W1 of the microstrip line at the output stub connection is 4.4 mm, the widths W2 = 3 mm and W3 = 3 mm of the two output stubs, the distance d between the two branches of the output microstrip line is 12.5 mm, the length L2 of the output stub is 63.4 mm, the width W4 of the slot line is 1.2 mm, and the total length L3 of the slot is 55.9 mm. The input end of the balun 2 is connected to the output end of the cylindrical dielectric resonator antenna 1, and the output end of the balun 2 is connected to the matching network 3.

[0042] In this embodiment, the matching network 3 includes the first external discrete RF inductor L with the same inductance value m1 and the second external discrete RF inductor L m2 , where one end of the first external discrete RF inductor L m1 is connected to one output end of the balun 22, and the second external discrete RF inductor Lm2 One end is connected to the other output terminal of the balun 22, and the first external discrete radio frequency inductor L m1 The other end and the other end of the second external discrete radio frequency inductor L m2 Are connected to the input terminal of the RBR chip 4.

[0043] In this embodiment, the RBR chip 4 includes a first NMOS transistor M N1 , a second NMOS transistor M N2 , a third NMOS transistor M N3 , a fourth NMOS transistor M N4 , a first PMOS transistor M P1 , a second PMOS transistor M P2 , a third PMOS transistor M P3 , a fourth PMOS transistor M P4 , a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a seventh diode D7, an eighth diode D8, a first fly capacitor C1, a second fly capacitor C2, a third fly capacitor C3, a fourth fly capacitor C4, a fifth fly capacitor C5, a sixth fly capacitor C6, a seventh fly capacitor C7, an eighth fly capacitor C8, a first gate connection capacitor C G1 , a second gate connection capacitor C G2 , a third gate connection capacitor C G3 , a fourth gate connection capacitor C G4 , a fifth gate connection capacitor C G5 , a sixth gate connection capacitor C G6 , a seventh gate connection capacitor C G7 , an eighth gate connection capacitor C G8 , a first gate connection resistor R G1 , a second gate connection resistor R G2 , a third gate connection resistor R G3 , a fourth gate connection resistor R G4 , a fifth gate connection resistor R G5 , a sixth gate connection resistor R G6 , a seventh gate connection resistor R G7 , an eighth gate connection resistor R G8 , a first output filter capacitor C L1 , a second output filter capacitor C L2 And the load resistor R L ; The first external discrete radio frequency inductor L m1 Is connected to the first signal input terminal V in+ ; The second external discrete radio frequency inductor L m2 Is connected to the second signal input V in- ; The first signal input terminal V in+is connected to one end of the first flying capacitor C1, one end of the second gate connection capacitor C G2 one end of the fourth gate connection capacitor C G4 one end of the sixth gate connection capacitor C G6 one end of the eighth gate connection capacitor C G8 one end, and the second signal input terminal V in- is connected to one end of the second flying capacitor C2, one end of the first gate connection capacitor C G1 one end of the third gate connection capacitor C G3 one end of the fifth gate connection capacitor C G5 one end of the seventh gate connection capacitor C G7 one end, the gate of the first NMOS transistor M N1 is connected to the other end of the first gate connection capacitor C G1 and one end of the first gate connection resistor R G1 one end, the gate of the first PMOS transistor M P1 is connected to the other end of the second gate connection capacitor C G2 and one end of the second gate connection resistor R G2 one end, the gate of the second PMOS transistor M P2 is connected to the other end of the third gate connection capacitor C G3 and one end of the third gate connection resistor R G3 one end, the gate of the second NMOS transistor M N1 is connected to the other end of the fourth gate connection capacitor C G4 and one end of the fourth gate connection resistor R G4 one end, the drain of the first NMOS transistor M N is connected to the drain of the second PMOS transistor M P2 the negative electrode of the first diode D1, the positive electrode of the third diode D3, the other end of the first flying capacitor C1 and one end of the fifth flying capacitor C5, the drain of the first PMOS transistor M P1 the drain is connected to the drain of the second NMOS transistor M N the positive electrode of the second diode D2, the negative electrode of the fourth diode D4, the other end of the second flying capacitor C2 and one end of the sixth flying capacitor C6, the drain of the first NMOS transistor M N1 the source is connected to the source of the first PMOS transistor M P1 the positive electrode of the first diode D1, the negative electrode of the second diode D2, one end of the third flying capacitor C3, one end of the fourth flying capacitor C4, the other end of the first gate connection resistor R G1 the other end of the second gate connection resistor R G2 the other end, one end of the first output filter capacitor C L1 and one end of the second output filter capacitor C L2 one end is connected to the ground, the second PMOS transistor M P2The source of is connected to the third NMOS transistor M N3 The source of, the negative electrode of the third diode D3, the positive electrode of the fifth diode D5, the other end of the third flying capacitor C3, one end of the seventh flying capacitor C7, and the other end of the third gate connection resistor R G3 And the other end of the fifth gate connection resistor R G5 One end is connected, and the source of the second NMOS transistor M N2 Is connected to the source of the third PMOS transistor M P3 The source of, the positive electrode of the fourth diode D4, the negative electrode of the sixth diode D6, the other end of the fourth flying capacitor C4, one end of the eighth flying capacitor C8, and the other end of the fourth gate connection resistor R G4 And the other end of the sixth gate connection resistor R G6 One end is connected, and the gate of the third NMOS transistor M N3 Is connected to the other end of the fifth gate connection capacitor C G5 And the other end of the fifth gate connection resistor R G5 One end is connected, and the gate of the third PMOS transistor M P3 Is connected to the other end of the sixth gate connection capacitor C G6 And the other end of the sixth gate connection resistor R G6 One end is connected, and the gate of the fourth PMOS transistor M P4 Is connected to the other end of the seventh gate connection capacitor C G7 And the other end of the seventh gate connection resistor R G7 One end is connected, and the gate of the fourth NMOS transistor M N4 Is connected to the other end of the eighth gate connection capacitor C G8 And the other end of the eighth gate connection resistor R G8 One end is connected, and the drain of the third NMOS transistor M N3 Is connected to the drain of the fourth PMOS transistor M P4 The drain of, the negative electrode of the fifth diode D5, the positive electrode of the seventh diode D7, and the other end of the fifth flying capacitor C5 are connected. The drain of the third PMOS (M P3 The drain is connected to the drain of the fourth NMOS transistor M N4 The drain of, the positive electrode of the sixth diode D6, the negative electrode of the eighth diode D8, and the other end of the sixth flying capacitor C6 are connected. The source of the fourth PMOS transistor M P4 Is connected to the negative electrode of the seventh diode D7, the other end of the seventh flying capacitor C7, the other end of the seventh gate connection resistor R G7 The other end of, the other end of the first output filter capacitor C L1 The other end of, the load resistor R L One end of, and the first signal output terminal V o2+ Are connected. The source of the fourth NMOS transistor M N4 Is connected to the positive electrode of the eighth diode D8, the other end of the eighth flying capacitor C8, and the other end of the eighth gate connection resistor R G8The other end of, the second output filter capacitor C L2 The other end of, the load resistor R L The other end of and the second signal output terminal V o2- Are connected at the other end.

[0044] The cylindrical dielectric resonator antenna 1 can capture the radio frequency energy radiated by the transmitting antenna. The collected radio frequency energy is connected to the balun 2 through a single-ended output, and then converted into a differential signal. The two output terminals are connected to the two input terminals of the RBR chip 4, and finally power is supplied to the load to complete the energy collection process.

[0045] The cylindrical dielectric resonator antenna 1 is used as the receiving antenna. This antenna has the characteristics of high radiation efficiency, high gain, low loss, and high design flexibility. There are various design methods for the feeding structure of the DRA. The microstrip-line slot coupling of the present invention is easy to be integrated with the backend circuit for design. Referring to FIG. 2, the cylindrical dielectric resonator antenna 1 includes a cylindrical dielectric resonator and a square dielectric substrate.

[0046] The dielectric resonator itself serves as the radiation structure and also acts as the feeding structure of the floor parasitic slot. By optimizing the parameters of the antenna, the cylindrical dielectric resonator antenna 1 can operate in two frequency bands. Using the HEM 111 excitation mode can meet the boundary conditions of the metal plane and effectively focus the beam energy. The HEM mode has the characteristics of simultaneously including both electric and magnetic field components in the cross-section and the propagation direction. For the HEM 111 mode, its electric and magnetic fields are distributed in the radial, circumferential, and axial directions. This distribution enables it to adapt to the boundary conditions of the metal plane, especially in meeting the requirement that the electric field needs to be perpendicular to the metal surface. And through the unique configuration of its electromagnetic field, the energy can be more effectively focused into the upper half space. The distribution characteristics of its field contribute to generating a more concentrated radiation pattern, thereby improving the directivity of the beam. And the electromagnetic field distribution of the HEM 111 mode can effectively cooperate with the "image" on the metal plane to enhance the radiation efficiency and gain.

[0047] The RBR chip 4 requires a set of strictly differential input pairs, and the balun 2 converts the single-ended signal output by the cylindrical dielectric resonator antenna 1 into a differential signal with a 180-degree phase difference to meet this requirement. Refer to Figure 3, the balun 2 is based on the slot coupling principle and phase difference adjustment, and uses the slot coupling between the single-layer dielectric microstrip line and the ground plane. The slot coupler consists of the gap between the microstrip line and the ground plane and the metal plates on both sides of the gap. When a signal is transmitted through the microstrip line, an electromagnetic field will be generated between the microstrip line and the ground plane. This electromagnetic field will pass through the slot and couple to the ground plane. The slot line on the ground plane is a conductive structure that interacts with the electric and magnetic fields of the microstrip line to achieve electromagnetic coupling with the microstrip line. By adjusting the distance between the microstrip line and the ground plane, the width of the slot, and the size of the metal plates, the intensity and phase difference of the coupling effect can be adjusted. When there is a signal transmission on the microstrip line, the generated electric and magnetic fields will affect the slot line on the ground plane, and vice versa. By appropriately designing the geometric shapes and positions of the microstrip line and the slot line, the desired electromagnetic coupling effect can be achieved, providing a 180-degree phase difference to complete the unbalanced-to-balanced conversion.

[0048] The RBR chip 4 is implemented based on a discrete RBR structure, referring to Figure 4 . The structure of the RBR chip 4 is evolved from the Greinacher rectifier and the Cockcroft-Walton charge pump, which can convert the radio frequency alternating current signal from the antenna into direct current and at the same time boost the output voltage. The RBR combines the advantages of the Greinacher rectifier and the Cockcroft-Walton charge pump. This differential symmetric structure can achieve high-stability full-wave rectification and can drive heavier loads. Among them, the Cockcroft-Walton charge pump is regularly connected after the Greinacher rectifier. The Greinacher rectifier not only acts as a rectifier but also constitutes the first stage of the Cockcroft-Walton charge pump. In order to introduce synchronous rectification, power MOSFETs are used as switches, and the body diodes of CMOS are used instead of the diodes in the rectifier, thus generating an active RBR. Compared with the discrete structure, this RBR improves the power conversion efficiency within a certain input power range. The finally determined RBR chip 4 uses cross-coupled connection, eliminating the need for an additional drive circuit. The MOSFET gate is connected to a resistor and a capacitor to form a high-pass filter, whose cut-off frequency is significantly lower than the operating frequency. This layout allows the transmission of the DC voltage from the source to the gate to supply the required bias voltage. In addition, the high-frequency input signal minimizes the phase difference during the MOSFET switching cycle, ensuring the feasibility of synchronous operation.

[0049] The specific working process of the present invention is as follows:

[0050] Radio frequency energy reception stage: When the system is placed in an environment with distributed frequencies of 0.9 GHz and 1.8 GHz, the cylindrical dielectric resonator antenna 1 receives the radio frequency energy of the two frequencies, induces a voltage signal, and outputs a single-ended signal through slot coupling to the microstrip line on the backplane.

[0051] Signal transmission and conversion stage: The single-ended signal output by the cylindrical dielectric resonator antenna 1 is input to the balun 2, coupled to the U-shaped microstrip line to output a differential signal with a phase difference of 180 degrees, and through the matching network 3, the impedance matching between the cylindrical dielectric resonator antenna 1 and the RF rectifying circuit is achieved, and as much energy as possible is transmitted into the rectifying circuit.

[0052] Rectifying stage: The RBR chip 4 rectifies the input RF differential signal into a DC voltage, and boosts the voltage to obtain a considerable differential DC output voltage, which is provided to the load.

[0053] In the present invention, the receiving antenna uses the cylindrical dielectric resonator antenna 1 to achieve multi-frequency point reception. By reasonably designing and selecting the dielectric parameters, the characteristics of high efficiency and high gain are realized. In the flexible feeding method, microstrip line-slot coupling is adopted, and the slot-coupled differential balun 2 is reasonably docked. The RBR with full-wave rectification characteristics is selected as the RF rectifying circuit, which can efficiently utilize the input signal and drive a heavier load, and further realizes the active RBR, improving the power conversion efficiency. The RBR chip 4 is connected by cross-coupling, eliminating the need for an additional driving circuit, saving the chip area, and realizing the high efficiency and high integration of the rectifying circuit.

[0054] Those skilled in the art will readily conceive of other embodiments of the present invention after considering the specification and the disclosure of the invention. This application is intended to cover any variations, uses, or adaptations of the present invention, which follow the general principles of the present invention and include the common general knowledge or conventional technical means in the technical field not disclosed in the present invention. The specification and the embodiments are only regarded as exemplary, and the true scope and spirit of the present invention are pointed out by the following claims.

[0055] It should be understood that the present invention is not limited to the exact structure described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present invention is only limited by the appended claims.

[0056] The above are only the preferred embodiments of the present invention, and do not impose any limitations on the present invention. Any simple modifications, changes, and equivalent structural changes made to the above embodiments according to the technical essence of the present invention still fall within the protection scope of the technical solution of the present invention.

Claims

1. A single-board integrated multi-frequency radio frequency energy harvesting system, characterized in that, It includes a transmitting antenna, a cylindrical dielectric resonator antenna (1), a balun (2), a matching network (3), an RBR chip (4) and a sensor load (5). Among them, the output end of the cylindrical dielectric resonator antenna (1) is connected to the input end of the balun (2), the output end of the balun (2) is connected to the input end of the matching network (3), the output end of the matching network (3) is connected to the input end of the RBR chip (4), and the sensor load (5) is connected to the output end of the RBR chip (4).

2. The single-board integrated multi-frequency RF energy harvesting system according to claim 1, wherein The cylindrical dielectric resonator antenna (1) includes a cylindrical dielectric resonator and a square dielectric substrate, and the cylindrical dielectric resonator is disposed on the dielectric substrate.

3. The single-board integrated multi-frequency point radio frequency energy harvesting system according to claim 2, wherein The diameter D of the cylindrical dielectric resonator is 72 mm, and the height h of the cylindrical dielectric resonator d is 35 mm, and the relative dielectric constant of the cylindrical dielectric resonator is 19; The dielectric substrate uses F4B material, and the relative dielectric constant ε of the dielectric substrate r = 2.65, the thickness h of the dielectric substrate is 1 mm, and the side length A of the dielectric substrate is 100 mm.

4. The single-board integrated multi-frequency RF energy harvesting system according to claim 3, wherein A 50Ω microstrip feeder is arranged along the x-axis direction at the center of the dielectric substrate, and the width W of the 50Ω microstrip feeder f = 2.7 mm, and the length L of the 50Ω microstrip feeder f = 69 mm. The 50Ω microstrip feeder is printed on the lower surface of the dielectric substrate.

5. The single-board integrated multi-frequency point radio frequency energy harvesting system according to claim 4, wherein A metal ground is printed on the upper surface of the dielectric substrate, and a slit with two stubs is etched at the center of the metal ground.

6. The single-board integrated multi-frequency RF energy harvesting system according to claim 5, wherein The cylindrical dielectric resonator is located at the center of the dielectric substrate.

7. The single-board integrated multi-frequency RF energy harvesting system according to claim 5, wherein The resonant frequency of the cylindrical dielectric resonator antenna (1) is affected by the size of the slit. By adjusting the size of the slit, the cylindrical dielectric resonator antenna (1) can operate effectively in the frequency band of 0.9 GHz to 1.8 GHz.

8. The single-board integrated multi-frequency RF energy harvesting system according to claim 1, wherein The balun (2) utilizes the gap coupling between the single-layer dielectric plate microstrip line and the floor. The gap coupler is composed of the gap between the microstrip line and the floor and the metal plates on both sides of the gap.

9. The single-board integrated multi-frequency RF energy harvesting system according to claim 1, wherein The matching network (3) includes a first off-chip discrete RF inductor (L m1 ) and a second off-chip discrete RF inductor (L m2 ) with the same inductance value. One end of the first off-chip discrete RF inductor (L m1 ) is connected to an output terminal of the balun (2), and one end of the second off-chip discrete RF inductor (L m2 ) is connected to the other output terminal of the balun (2). The other end of the first off-chip discrete RF inductor (L m1 ) and the other end of the second off-chip discrete RF inductor (L m2 ) are connected to the input terminal of the RBR chip (4).

10. The single-board integrated multi-frequency RF energy harvesting system according to claim 9, wherein The RBR chip (4) includes a first NMOS transistor (M N1 ), a second NMOS transistor (M N2 ), a third NMOS transistor (M N3 ), a fourth NMOS transistor (M N4 ), a first PMOS transistor (M P1 ), a second PMOS transistor (M P2 ), a third PMOS transistor (M P3 ), a fourth PMOS transistor (M P4 ), a first diode (D1), a second diode (D2), a third diode (D3), a fourth diode (D4), a fifth diode (D5), a sixth diode (D6), a seventh diode (D7), an eighth diode (D8), a first flying capacitor (C1), a second flying capacitor (C2), a third flying capacitor (C3), a fourth flying capacitor (C4), a fifth flying capacitor (C5), a sixth flying capacitor (C6), a seventh flying capacitor (C7), an eighth flying capacitor (C8), a first gate-connected capacitor (C G1 ), a second gate-connected capacitor (C G2 ), a third gate-connected capacitor (C G3 ), a fourth gate-connected capacitor (C G4 ), a fifth gate-connected capacitor (C G5 ), a sixth gate-connected capacitor (C G6 ), a seventh gate-connected capacitor (C G7 ), an eighth gate-connected capacitor (C G8 ), a first gate-connected resistor (R G1 ), a second gate-connected resistor (R G2 ), a third gate-connected resistor (R G3 ), a fourth gate-connected resistor (R G4 ), a fifth gate-connected resistor (R G5 ), a sixth gate-connected resistor (R G6 ), a seventh gate-connected resistor (R G7 ), an eighth gate-connected resistor (R G8 ), a first output filter capacitor (C L1 ), a second output filter capacitor (C L2 ) and a load resistor (R L ); The first external discrete radio frequency inductor (L m1 ) is connected to the first signal input terminal (V in+ ); the second external discrete radio frequency inductor (L m2 ) is connected to the second signal input terminal (V in- ). The first signal input terminal (V in+ ) is connected to one end of the first flying capacitor (C1), one end of the second gate connection capacitor (C G2 ), one end of the fourth gate connection capacitor (C G4 ), one end of the sixth gate connection capacitor (C G6 ), and one end of the eighth gate connection capacitor (C G8 ). The second signal input terminal (V in- ) is connected to one end of the second flying capacitor (C2), one end of the first gate connection capacitor (C G1 ), one end of the third gate connection capacitor (C G3 ), one end of the fifth gate connection capacitor (C G5 ), and one end of the seventh gate connection capacitor (C G7 ). The gate of the first NMOS transistor (M N1 ) is connected to the other end of the first gate connection capacitor (C G1 ) and one end of the first gate connection resistor (R G1 ). The gate of the first PMOS transistor (M P1 ) is connected to the other end of the second gate connection capacitor (C G2 ) and one end of the second gate connection resistor (R G2 ). The gate of the second PMOS transistor (M P2 ) is connected to the other end of the third gate connection capacitor (C G3 ) and one end of the third gate connection resistor (R G3 ). The gate of the second NMOS transistor (M N1 ) is connected to the other end of the fourth gate connection capacitor (C G4 ) and one end of the fourth gate connection resistor (R G4 ). The drain of the first NMOS transistor (M N1 ) is connected to the drain of the second PMOS transistor (M P2 ), the negative electrode of the first diode (D1), the positive electrode of the third diode (D3), the other end of the first flying capacitor (C1), and one end of the fifth flying capacitor (C5). The drain of the first PMOS transistor (M P1 ) is connected to the drain of the second NMOS transistor (M N2 ), the positive electrode of the second diode (D2), the negative electrode of the fourth diode (D4), the other end of the second flying capacitor (C2), and one end of the sixth flying capacitor (C6). The source of the first NMOS transistor (M N1 ) is connected to the source of the first PMOS transistor (M P1 ), the positive electrode of the first diode (D1), the negative electrode of the second diode (D2), one end of the third flying capacitor (C3), one end of the fourth flying capacitor (C4), and one end of the first gate connection resistor (R G1 )'s other end, the second gate connection resistor (R G2 )'s other end, the first output filter capacitor (C L1 )'s one end and the second output filter capacitor (C L2 )'s one end are connected to ground. The source of the second PMOS transistor (M P2 ) is connected to the source of the third NMOS transistor (M N3 ), the negative electrode of the third diode (D3), the positive electrode of the fifth diode (D5), the other end of the third flying capacitor (C3), the one end of the seventh flying capacitor (C7), the other end of the third gate connection resistor (R G3 ) and the one end of the fifth gate connection resistor (R G5 ). The source of the second NMOS transistor (M N2 ) is connected to the source of the third PMOS transistor (M P3 ), the positive electrode of the fourth diode (D4), the negative electrode of the sixth diode (D6), the other end of the fourth flying capacitor (C4), the one end of the eighth flying capacitor (C8), the other end of the fourth gate connection resistor (R G4 ) and the one end of the sixth gate connection resistor (R G6 ). The gate of the third NMOS transistor (M N3 ) is connected to the other end of the fifth gate connection capacitor (C G5 ) and the other end of the fifth gate connection resistor (R G5 ). The gate of the third PMOS transistor (M P3 ) is connected to the other end of the sixth gate connection capacitor (C G6 ) and the other end of the sixth gate connection resistor (R G6 ). The gate of the fourth PMOS transistor (M P4 ) is connected to the other end of the seventh gate connection capacitor (C G7 ) and the one end of the seventh gate connection resistor (R G7 ). The gate of the fourth NMOS transistor (M N4 ) is connected to the other end of the eighth gate connection capacitor (C G8 ) and the one end of the eighth gate connection resistor (R G8 ). The drain of the third NMOS transistor (M N3 ) is connected to the drain of the fourth PMOS transistor (M P4 ), the negative electrode of the fifth diode (D5), the positive electrode of the seventh diode (D7) and the other end of the fifth flying capacitor (C5). The drain of the third PMOS transistor (M P3 ) is connected to the drain of the fourth NMOS transistor (M N4 ), the positive electrode of the sixth diode (D6), the negative electrode of the eighth diode (D8) and the other end of the sixth flying capacitor (C6). The fourth PMOS transistor (M P4 ) The source of is connected to the negative electrode of the seventh diode (D7), the other end of the seventh flying capacitor (C7), and the seventh gate connection resistor (R G7 ) The other end of, the first output filter capacitor (C L1 ) The other end of, the load resistor (R L ) One end of and the first signal output terminal (V o2+ ) are connected, and the source of the fourth NMOS transistor (M N4 ) is connected to the positive electrode of the eighth diode (D8), the other end of the eighth flying capacitor (C8), and the eighth gate connection resistor (R G8 ) The other end of, the second output filter capacitor (C L2 ) The other end of, the load resistor (R L ) The other end of and the other end of the second signal output terminal (V o2- ) are connected.