A main circuit topology structure of a medium frequency coreless induction furnace power supply

Abstract

This application discloses a main circuit topology for a medium-frequency coreless induction furnace power supply, comprising a three-phase rectifier-chopper buck circuit, a full-bridge inverter circuit, a voltage-equalizing capacitor, and a load parallel resonant circuit. The three-phase rectifier-chopper buck circuit comprises a first rectifier-chopper buck module and a second rectifier-chopper buck module. The rectifier-chopper buck module comprises two three-phase six-pulse rectifier bridges with a 30° phase difference, a forward chopper buck module, a reverse chopper buck module, and a filter inductor. The full-bridge inverter circuit comprises a first full-bridge inverter module and a second full-bridge inverter module, with the output ends of the first full-bridge inverter module and the second full-bridge inverter module connected in series. This application uses a filter inductor connected between the three-phase rectifier bridge and the forward and reverse chopper buck modules to cost-effectively weaken the six-pulse component of the three-phase rectifier bridge output. The series connection of the full-bridge inverter modules solves the problems of uneven current distribution and voltage withstand in parallel connection of semiconductor devices, thereby reducing energy loss in the transmission line.

Description

Technical Field

[0001] The present application relates to the technical field of medium frequency induction melting, and in particular to a main circuit topology structure of a medium frequency coreless induction furnace power supply. Background Art

[0002] At present, large-scale medium-frequency coreless induction furnace power supplies basically do not use full-bridge inverter series circuits, but full-bridge inverter parallel circuits. In addition to avoiding the risk of device overvoltage caused by uneven voltage in the series circuit, a single module can be controlled independently, optimizing dynamic response by adjusting phase and amplitude to adapt to load fluctuations.

[0003] However, in a full-bridge inverter parallel circuit, the output current of multiple inverters needs to be evenly distributed to avoid overloading certain branches. However, due to parameter differences between inverters, load imbalance, or inconsistent control strategies, current sharing issues in the parallel branches and power loss in the transmission line are prone to occur. Summary of the Invention

[0004] The purpose of this application is to provide a main circuit topology for a medium-frequency coreless induction furnace power supply. By connecting the output ends of each full-bridge inverter module in series and then connecting them to a load parallel resonant circuit, this achieves better results than a conventional boost parallel resonant circuit. The filter inductor is used to weaken the 5th, 7th, 17th, and 19th harmonic currents generated by two sets of three-phase 6-pulse rectifier bridges with a phase difference of 30°, while significantly reducing energy losses in the transmission line.

[0005] In the first aspect, the invention objectives of this application are achieved by adopting the following technical solutions:

[0006] The present application provides a main circuit topology structure for a medium-frequency coreless induction furnace power supply, comprising: a three-phase rectifier-chopper buck circuit, a full-bridge inverter circuit, a voltage-sharing capacitor, and a load parallel resonant circuit; the three-phase rectifier-chopper buck circuit comprises a first rectifier-chopper buck module and a second rectifier-chopper buck module; the rectifier-chopper buck module comprises two sets of three-phase six-pulse rectifier bridges with a phase difference of 30°, a forward chopper buck module, a reverse chopper buck module, and a filter inductor; the full-bridge inverter circuit comprises a first full-bridge inverter module and a second full-bridge inverter module, wherein the output ends of the first full-bridge inverter module and the second full-bridge inverter module are connected in series to supply power to the load parallel resonant circuit.

[0007] Through the above technical solution, each full-bridge inverter circuit is powered by an independent rectifier-chopper module, and the output of the full-bridge inverter circuit is connected in series. In the series structure, the current path is the same, and the current imbalance problem of the parallel circuit will naturally not occur. Therefore, by connecting the output of the full-bridge inverter circuit in series, the uneven current problem in the parallel structure can be avoided, achieving a better effect than the conventional boost parallel resonant circuit. In addition, because the series structure reduces the current path and reduces charge accumulation, the line resistance loss can be reduced by nearly half; this application reduces harmonic interference through 24-pulse rectification, and the forward and reverse chopping circuits reduce transmission losses, weakening the 6-pulse component of the 30-degree phase-shifted rectifier output of the two groups of three-phase 6-pulse rectifier bridges. The series inverter structure avoids the parallel current equalization problem, and the voltage-equalizing capacitor network solves the voltage balancing problem of multiple inverter bridges in series, significantly improving the system efficiency and stability, thereby effectively avoiding the occurrence of parallel uneven current in the medium-frequency coreless induction furnace power supply circuit and reducing the energy loss of the transmission line.

[0008] Optionally, the forward chopping buck module and the reverse chopping buck module are connected back to back, and the input ends are connected to the series output ends of two groups of three-phase six-pulse rectifier bridges with a phase difference of 30°.

[0009] Through this technical solution, 24-pulse rectification suppresses input harmonics to above 24 times the fundamental frequency, reducing interference with the power grid. Furthermore, the symmetrical phase-shift distribution helps balance the three-phase current and reduce harmonics caused by imbalance. Furthermore, the forward and reverse chopper buck modules are controlled collaboratively, and the inverter outputs are connected in series to form a high-voltage intermediate-frequency output, which avoids excessive voltage stress in a single chopper buck module.

[0010] Optionally, the forward chopping buck module is composed of a first IGBT half-bridge module and a first filter capacitor, and the reverse chopping buck module is composed of a second IGBT half-bridge module and a second filter capacitor. The common connection point of the two groups of filter capacitors is connected to the series connection common point of the two groups of three-phase 6-pulse rectifier bridges through the filter inductor.

[0011] Through this technical solution, the common point of the filter capacitors is connected to the common point of the series connection of the three-phase six-pulse rectifier bridge via a filter inductor. Compared with conventional cascade chopper circuits, this reduces the number of transmission lines in the IGBT chopper circuit, while also weakening the six-pulse component of the two 30-degree phase-shifted rectifier outputs. It also provides a clamping voltage for the filter capacitors, alleviating the low-frequency filtering pressure on the filter capacitors and solving the voltage balancing problem of the series connection of IGBT half-bridge modules.

[0012] Optionally, the load parallel resonant circuit includes an induction coil of a medium-frequency coreless induction furnace and a parallel resonant capacitor group, and the parallel resonant capacitor group is composed of two resonant capacitors connected in series; the equalizing capacitor is connected across the series connection point of the output end of the full-bridge inverter module and the series connection point of the parallel resonant capacitor group.

[0013] Through the above technical solution, the series connection point of the series capacitor is connected to the series connection point of the inverter full bridge in the full-bridge inverter series circuit through the voltage-equalizing capacitor, which is equivalent to connecting a large-capacity capacitor in parallel to each inverter bridge, forcing the output voltage of each full-bridge inverter module to be balanced.

[0014] Optionally, the first rectifier-chopper buck module and the first full-bridge inverter module form a cascade unit, the second rectifier-chopper buck module and the second full-bridge inverter module form a second cascade unit, the number of the cascade units can be expanded to N, the parallel resonant capacitor group is composed of N resonant capacitors connected in series, and a voltage-equalizing capacitor is respectively connected between the series connection point of the output end of each full-bridge inverter circuit and the connection point of the corresponding resonant capacitor group to form N-1 voltage-equalizing branches, where N is an integer greater than or equal to 2.

[0015] Through the above technical solution, by increasing the number of cascade modules, different power levels can be flexibly adapted. At the same time, N-1 voltage-equalizing capacitors can ensure that the voltage of each inverter bridge is balanced after expansion.

[0016] Optionally, the two groups of three-phase 6-pulse rectifier bridges with a phase difference of 30° may be replaced by two groups of three-phase 12-pulse rectifier bridges with a phase difference of 15°.

[0017] Through the above technical solution, the filter inductor can effectively weaken the 12-pulse components output by two groups of three-phase 12-pulse rectifier bridges with a phase difference of 15°.

[0018] In the second aspect, the invention objective of this application is achieved by adopting the following technical solutions:

[0019] A power supply detection method for a medium frequency coreless induction furnace power supply based on the above-mentioned method comprises:

[0020] Establish the forward conversion relationship between the input voltage and output voltage of the rectifier-chopper buck module, and the reverse conversion relationship between the output voltage and the input voltage of the full-bridge inverter module;

[0021] Constructing a joint optimization model based on the forward conversion relationship and the reverse conversion relationship, wherein the joint optimization model includes a loss function for quantifying rectification loss and a constraint function for constraining inversion performance, thereby achieving coordinated optimization of rectification and inversion processes;

[0022] Construct a cascade detection network including a bottom-level detection network, a middle-level detection network, and a top-level detection network;

[0023] The bottom detection network extracts the 12-pulse phase shift angle error of the rectifier-chopper buck module based on Fourier transform to obtain a phase deviation value for monitoring the rectifier-chopper buck module;

[0024] The middle-layer detection network uses Kalman filtering to predict the first inverter voltage distribution coefficient and the second inverter voltage distribution coefficient of the full-bridge inverter module to evaluate the voltage balance of the full-bridge inverter module;

[0025] The top-level detection network uses wavelet transform to analyze the frequency deviation value of the load parallel resonant module to detect the stability of the resonant frequency;

[0026] Synchronously collect the three-phase input voltage, DC bus voltage, inverter output current, and resonant capacitor voltage of the medium-frequency coreless induction furnace power supply, and perform time-domain and frequency-domain feature extraction to generate a multi-dimensional detection vector;

[0027] A circuit closed-loop adjustment strategy is executed based on the multi-dimensional detection vector.

[0028] By adopting the above technical solution, a forward / reverse conversion model of the rectification-chopper and inverter modules is constructed, and the cascade detection network integrating the rectification loss function and the inverter constraint function includes a three-layer structure: the bottom layer (Fourier phase error), the middle layer (Kalman filter voltage distribution coefficient), and the top layer (wavelet transform frequency deviation); multi-dimensional signals (three-phase voltage, DC bus voltage, inverter current, resonant capacitor voltage) are synchronously collected to generate a detection vector; this is conducive to improving detection accuracy and dynamic response capability, while reducing rectification-inversion coupling interference and enhancing the stability of a medium-frequency coreless induction furnace power supply.

[0029] In a preferred embodiment of the present application, the circuit closed-loop adjustment strategy includes:

[0030] When the phase deviation value is greater than a preset phase deviation threshold, a rectification phase shift angle correction instruction is triggered to compensate for the phase deviation by adjusting the PWM duty cycle;

[0031] When the distribution coefficient difference between the first inverter voltage distribution coefficient and the second inverter voltage distribution coefficient is greater than a preset distribution difference threshold, dynamically adjusting the voltage distribution weight coefficient of the forward chopping buck module or the reverse chopping buck module to reduce the distribution coefficient difference between the first inverter voltage distribution coefficient and the second inverter voltage distribution coefficient;

[0032] When the frequency deviation value is greater than the preset resonant frequency difference, the inverter trigger angle is adjusted based on the fuzzy controller.

[0033] By adopting the above technical solution, phase deviation correction, voltage distribution adjustment and resonant frequency compensation functions are provided. Through precise phase correction and control capabilities, the fuzzy controller suppresses grid fluctuations and harmonic interference, improves the anti-interference performance of a medium-frequency coreless induction furnace power supply, and reduces device switching losses through dynamic adjustment strategies.

[0034] In summary, by replacing the traditional parallel structure with a cascaded three-phase rectifier-chopper buck circuit and a full-bridge inverter circuit, the current sharing problem is fundamentally eliminated and line losses are reduced. The filter inductor has low cost and significantly suppresses harmonics. The equalizing capacitor and extended architecture support high voltage output and are compatible with low-voltage devices. This solution has significant industrial application value in large medium-frequency induction furnaces. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 This is a circuit diagram of the main circuit topology structure of a medium-frequency coreless induction furnace power supply in Example 1 of the present application;

[0036] Figure 2 It is a rectifier-chopper step-down module in the prior art;

[0037] Figure 3 This is a circuit diagram of a topological structure expansion of a main circuit topology structure of a medium-frequency coreless induction furnace power supply in Example 1 of the present application;

[0038] Figure 4 It is the preferred rectifier-chopper step-down module in the circuit diagram of the main circuit topology structure of a medium-frequency coreless induction furnace power supply in Example 2 of the present application;

[0039] Figure 5 This is a circuit diagram of the main circuit topology structure of a medium-frequency coreless induction furnace power supply in Example 2 of the present application. DETAILED DESCRIPTION

[0040] The following is combined with Figure 1 To the attached Figure 5 , further details of this application are given.

[0041] Example 1

[0042] This application provides a medium frequency coreless induction furnace power supply main circuit topology structure, see Figure 1 ,

[0043] The main circuit topology of the medium-frequency coreless induction furnace power supply includes a three-phase rectifier-chopper buck circuit, a full-bridge inverter circuit, a voltage-sharing capacitor, and a load parallel resonant circuit. The three-phase rectifier-chopper buck circuit includes a first rectifier-chopper buck module and a second rectifier-chopper buck module. The rectifier-chopper buck module includes two three-phase six-pulse rectifier bridges with a phase difference of 30°, a forward chopper buck module, a reverse chopper buck module, and a filter inductor. The full-bridge inverter circuit includes a first full-bridge inverter module and a second full-bridge inverter module. The load parallel resonant circuit includes the medium-frequency coreless induction furnace's induction coil and a parallel resonant capacitor bank composed of two series-connected resonant capacitors. A voltage-sharing capacitor is connected between the series connection point between the output terminals of the first and second full-bridge inverter modules and the series connection point of the parallel resonant capacitor bank.

[0044] Medium-frequency coreless induction furnaces, as a key piece of industrial equipment, hold an irreplaceable position in the metalworking industry. Especially for large-scale applications, efficient current sharing in parallel branches and significant reduction of transmission line energy losses are key technical challenges. This invention aims to fundamentally overcome these technical bottlenecks by optimizing the main circuit topology design.

[0045] An embodiment of the present application provides a main circuit topology structure of a medium-frequency coreless induction furnace power supply, which mainly includes two cascade units. The first rectifier-chopper buck module and the first full-bridge inverter module constitute one cascade unit, and the second rectifier-chopper buck module and the second full-bridge inverter module constitute the second cascade unit, that is, each cascade unit is collaboratively composed of a rectifier-chopper buck part and a full-bridge inverter part; wherein the rectifier-chopper buck part is responsible for performing preliminary processing on the received power resources from the power grid and then transmitting it to the adjacent full-bridge inverter part to complete the medium-frequency conversion; the outputs of each full-bridge inverter are connected in series to power the load parallel resonant circuit.

[0046] Specifically, each three-phase rectifier-chopper buck circuit independently processes part of the input power. After the first full-bridge inverter module and the second full-bridge inverter module are connected in series, the output voltages are superimposed to form a higher intermediate frequency voltage. For example, if the two rectifier-chopper buck modules output 2000V DC bus voltage respectively, then after the full-bridge inverter modules are connected in series, they can output an intermediate frequency AC voltage of about 5200V. Since under the same power conditions, the exponential increase in voltage will cause the current to be halved, and the reduction in transmission line current means that the loss of the transmission line will also be reduced, the cascade topology design proposed in this application can not only solve the uneven current problem of the parallel circuit, but also reduce the loss of the transmission line.

[0047] In an embodiment of the present application, a three-phase 24-pulse rectifier module includes a phase-shifting rectifier transformer and four independent three-phase 6-pulse rectifier bridges. The three-phase 6-pulse rectifier bridge is also called a three-phase uncontrolled rectifier bridge. The phase-shifting rectifier transformer includes four phase-shifting windings with phase differences of ±7.5° and ±22.5°. Each phase-shifting winding is connected to an independent three-phase 6-pulse rectifier bridge. The DC outputs of each three-phase 6-pulse rectifier bridge are connected in series after passing through a forward chopping buck module and a reverse chopping buck module. The forward chopping buck module and the reverse chopping buck module are connected back-to-back, with their inputs connected to the series outputs of two three-phase 6-pulse rectifier bridges with a phase difference of 30°. The outputs of the forward chopping buck module and the reverse chopping buck module are connected in series to form a DC bus.

[0048] In this embodiment, the primary winding of the phase-shifting rectifier transformer is connected in a delta or star configuration. The secondary winding comprises four sets of extended delta phase-shifting windings with phase differences of ±7.5° and ±22.5°, generating four AC circuits with a phase difference of 15°. After three-phase uncontrolled rectification, these are superimposed to form a 24-pulse DC circuit, which can filter out low-order harmonics.

[0049] In addition, the forward chopping buck module and the reverse chopping buck module respectively process two sets of rectifier outputs with a phase difference of 30°. That is, the forward chopping buck module processes the rectifier output with a phase shift of +7.5°, and the reverse chopping buck module processes the rectifier output with a phase shift of -22.5°. The two DC lines are connected in series to form a DC bus.

[0050] In Example 1 of the present application, the forward chopping buck module is composed of a first IGBT half-bridge module and a first filter capacitor, and the reverse chopping buck module is composed of a second IGBT half-bridge module and a second filter capacitor. The common connection point of the two sets of filter capacitors is connected to the series connection common point of each three-phase six-pulse rectifier bridge through a filter inductor.

[0051] Compared with the conventional cascade chopper circuit, see Figure 2 , reducing the number of IGBT chopper cascade circuit transmission lines, the filter inductor weakens the 6-pulse component of the two 30-degree phase-shifted rectifier outputs, and provides a clamping voltage for the filter capacitor, that is, the common connection point of the filter capacitor is connected to the midpoint of the rectifier bridge through the filter inductor, and the potential is clamped at the midpoint potential of the DC bus voltage. If the voltage of the series DC bus is V dc , the voltage of the first filter capacitor and the second filter capacitor is clamped at The IGBT modules of the forward chopping buck circuit and the reverse chopping buck circuit are forced to bear equal DC voltages, thus solving the voltage balancing problem of the IGBT half-bridge modules connected in series.

[0052] In an embodiment of the present application, the first full-bridge inverter module and the second full-bridge inverter module adopt thyristor inverter full-bridge, and the first full-bridge inverter module and the second full-bridge inverter module are connected through a series resonant capacitor. When the output voltage of one of the full-bridge inverter modules is too high, the capacitor impedance voltage divider forces the output voltage of the other full-bridge inverter module to rise synchronously, ensuring that the voltage of the two full-bridge inverter modules is balanced.

[0053] In an embodiment of the present application, the load parallel resonant circuit includes an induction coil of a medium-frequency coreless induction furnace and a parallel resonant capacitor group, and the parallel resonant capacitor group is composed of two resonant capacitors connected in series; an equalizing capacitor is connected between the series connection point of the output end of the full-bridge inverter module and the series connection point of the parallel resonant capacitor group.

[0054] The equalizing capacitor is connected across the series midpoint of the first full-bridge inverter module and the second full-bridge inverter module and the series midpoint of the parallel resonant capacitor group, forming a high-frequency current path, forcing the potentials of the two nodes to change synchronously, and dynamically balancing the voltage difference between the inverter bridge and the resonant capacitor. When the load change causes the midpoint potential to shift, the equalizing capacitor can quickly balance the voltage through high-frequency charging and discharging, preventing voltage mutations caused by triggering asymmetry or differences in semiconductor device performance parameters from having adverse effects on the circuit.

[0055] In another embodiment, in order to adapt to the operation of induction furnaces with different powers, the number of cascade units can be expanded to N. Correspondingly, the parallel resonant capacitor group will also be composed of N resonant capacitors connected in series. Similarly, a voltage-equalizing capacitor is connected between the series connection point of the output end of each full-bridge inverter circuit and the connection point of the corresponding resonant capacitor group to form N-1 voltage-equalizing branches, where N is an integer greater than or equal to 2.

[0056] After the cascade units are expanded, the total output voltage is the sum of the voltages of each full-bridge inverter circuit, which can adapt to higher power loads. By adjusting the number of cascade units, it can flexibly adapt to loads of different power levels. For example, see Figure 3 The number of cascade units is 3, and the resonant capacitor group consists of three resonant capacitors connected in series. A voltage-equalizing capacitor is connected between the series connection point of each full-bridge inverter circuit output end and the connection point of the corresponding resonant capacitor group to form two voltage-equalizing branches, covering all series nodes to ensure voltage balance of each full-bridge inverter module after expansion.

[0057] Example 2

[0058] See also Figure 4 and Figure 5 The difference between this embodiment and the first embodiment is that, in the three-phase rectification-chopper step-down circuit, the two sets of three-phase 6-pulse rectifier bridges with a phase difference of 30° in the first embodiment are replaced by two sets of three-phase 12-pulse rectifier bridges with a phase difference of 15° in the second embodiment; the 15° phase difference allows the harmonics of the two sets of 12-pulse currents to be reduced by the filter inductor.

[0059] The embodiments of this specific implementation method are all preferred embodiments of the present application and are not intended to limit the scope of protection of the present application. Therefore, all equivalent changes made based on the principles of the present application should be included in the scope of protection of the present application.

[0060] In one embodiment, a power supply detection method for a medium frequency coreless induction furnace power supply is provided. The power supply detection method for a medium frequency coreless induction furnace power supply is applied to a medium frequency coreless induction furnace power supply. The power supply detection method for a medium frequency coreless induction furnace power supply specifically includes the following steps:

[0061] S1: Establish a forward conversion relationship between the input voltage and the output voltage of the rectifier-chopper buck module, and a reverse conversion relationship between the output voltage and the input voltage of the full-bridge inverter module.

[0062] In this embodiment, the forward conversion relationship refers to the relationship between the input voltage (three-phase AC) of the rectifier-chopper buck module and the output DC voltage (U dc+ 、U dc- ) of the mathematical mapping model (such as a linear equation or a neural network model); the reverse transformation relationship refers to the full-bridge inverter module input DC voltage (U dc+ 、Udc- ) and the output AC voltage (induction coil voltage).

[0063] S2: A joint optimization model is constructed based on the forward conversion relationship and the reverse conversion relationship. The joint optimization model includes a loss function for quantifying the rectification loss and a constraint function for constraining the inversion performance, thereby achieving coordinated optimization of the rectification and inversion processes.

[0064] In this embodiment, the loss function is used to quantify the efficiency loss of the rectifier module (such as THD, switching loss P sw and conduction loss P cond ); THD reflects the quality of the input current waveform, switching loss is the energy loss of the IGBT device during the chopping process, and conduction loss is the conduction voltage drop loss when the rectifier bridge arm is turned on; the constraint function refers to the performance indicator that limits the voltage distribution error, resonant frequency deviation, and output voltage amplitude constraint of the inverter module; the joint optimization model achieves the global optimization of the rectifier-inverter by simultaneously minimizing the loss function and satisfying the constraints through an optimization algorithm.

[0065] Specifically, the loss function L used to quantify the rectification loss is rect =α1×THD+β×P sw +γ×P cond , where α1, β, and γ are weight coefficients, which are calibrated according to actual working conditions.

[0066] The calculation of THD is based on the harmonic components of the Fourier transform Where V n is the amplitude of the nth harmonic; V1 is the amplitude of the fundamental wave; N is the total number of harmonics.

[0067] Switching loss P sw By the device switching frequency f sw And voltage and current stress calculation:

[0068] Among them, V i , I i is the voltage and current stress of the ith IGBT, t on is the conduction time; the number of switching operations M changes with the load (for example, M decreases when the load is light). cond The calculation formula is Among them, I dc is the DC bus current; R eq is the equivalent on-resistance, which is related to the corresponding rectifier bridge voltage drop.

[0069] Specifically, the constraint function C of the inverter module for constraining the inverter performance is invIt includes voltage distribution error constraint (used to limit the difference in voltage distribution coefficients between the two inverter modules), resonant frequency deviation constraint (to ensure that the resonant frequency is stable near the target value) and output voltage amplitude constraint (to prevent overvoltage or undervoltage); C inv The manifestation is Wherein, k1 is the first voltage distribution coefficient; k2 is the second voltage distribution coefficient; ΔK max is the maximum value of the voltage distribution difference threshold; Δf is the resonant frequency deviation, that is, the frequency deviation value; U inv-min is the minimum constraint value of the full-bridge inverter module output voltage, which can be set to 0.9 times the nominal output voltage; U inv is the output voltage of the full-bridge inverter module; U inv-max The maximum constraint value of the full-bridge inverter module output voltage can be set to 1.1 times the nominal output voltage.

[0070] Furthermore, the mathematical form of the joint optimization model is: Optimize the objective function - minimize L rect , where the optimization variable is U dc (rectifier module output DC voltage), inverter module voltage distribution coefficients k1 and k2, resonant capacitor voltage resonant frequency value f res ; Using weighted constraint optimization strategy, the constraints are converted into penalty terms and added to the objective function L total =L rect +μ1×max(0,|k1-k2|-ΔK max )+μ2×max(0,|Δf|-f tol ); where μ1 and μ2 are penalty factors, such as μ1 = 100, μ2 = 50, and the solution method is set as the gradient descent method: by dc and f res Perform continuous adjustable parameter optimization and use the Adam optimizer to accelerate convergence, such as performing a discretized search on the voltage distribution coefficients k1 and k2 (such as taking a step size of 0.1); when performing data synchronization operations, use the GPS timing module to achieve μs-level synchronous sampling of the three-phase voltage, DC bus voltage, current, and resonant capacitor voltage, and when performing data calibration, update the weight coefficient of the loss function based on the LSTM neural network every time a data synchronization cycle (such as 100 hours) is run. This application combines multi-objective collaboration, real-time guarantee and adaptability, and can not only cover the full-link state of rectification, inversion, and resonance through time-frequency domain feature fusion: it can also balance efficiency and stability through a weighted constraint strategy, combining gradient descent with integer programming to meet the ms-level control cycle; dynamic adjustment of parameters based on online learning to adapt to load mutation scenarios (such as the moment of charging an induction furnace); practice has proved that the joint optimization model improves rectification efficiency by 2% and the inverter voltage balancing error by ≤1%.

[0071] S3: Construct a cascade detection network including a bottom-level detection network, a middle-level detection network, and a top-level detection network; the bottom-level detection network extracts the 12-pulse phase shift angle error of the rectifier-chopper buck module based on Fourier transform to obtain the phase deviation value used to monitor the rectifier-chopper buck module; the middle-level detection network uses Kalman filtering to predict the first inverter voltage distribution coefficient and the second inverter voltage distribution coefficient of the full-bridge inverter module to evaluate the voltage balance of the full-bridge inverter module; the top-level detection network uses wavelet transform to analyze the frequency deviation value of the load parallel resonant module to detect the stability of the resonant frequency.

[0072] In this embodiment, the bottom-level detection network extracts the 12-pulse phase-shift angle error of the rectifier bridge of the rectifier-chopper step-down module based on Fourier transform to monitor the phase synchronization accuracy of the rectifier bridge. The middle-level detection network predicts the voltage distribution coefficient of the full-bridge inverter module through Kalman filtering to evaluate the voltage balance of the full-bridge inverter module. The top-level detection network uses wavelet transform to analyze the frequency deviation value of the resonant capacitor voltage used in the load parallel resonant module to detect the stability of the load resonant frequency.

[0073] Specifically, a Hall voltage sensor is used to collect the three-phase input voltage, DC bus voltage, and resonant capacitor voltage; a Rogowski coil is used to collect the inverter output current; the bottom-level detection network performs a fast Fourier transform (FFT) on the rectifier output voltage to calculate the fundamental phases θ1 and θ2; the phase deviation value Δθ = |θ1-θ2-30°| (assuming the theoretical phase difference is 30°). The middle-level detection network uses Kalman filtering to predict the inverter input voltage U in1 、U in2 With output voltage U out The first voltage distribution coefficient is equal to U in1 With output voltage U out The second voltage distribution coefficient is equal to U in2 With output voltage U out The top detection network wavelet transform (db4 wavelet, 3-layer decomposition) extracts the frequency domain component of the resonant capacitor voltage, and the frequency deviation value Δf=|f res -500Hz|, where f res The resonant frequency value of the resonant capacitor voltage currently detected is set to 500 Hz as the target resonant frequency (the specific target resonant frequency value can be adaptively modified according to the actual circuit structure).

[0074] S4: Synchronously collect the three-phase input voltage, DC bus voltage, inverter output current, and resonant capacitor voltage of the medium-frequency coreless induction furnace power supply, and perform time domain and frequency domain feature extraction to generate a multi-dimensional detection vector.

[0075] In this embodiment, the time domain features include mean and variance; the frequency domain features include harmonic components and frequency deviation; and the multi-dimensional detection vector is a comprehensive feature vector used to reflect the system status.

[0076] S5: Execute circuit closed-loop adjustment strategy based on the multi-dimensional detection vector.

[0077] In this embodiment, the circuit closed-loop adjustment strategy refers to triggering corresponding correction measures based on abnormal indicators (phase deviation, voltage distribution error, frequency deviation) in the detection vector.

[0078] For example, the model initialization steps of the joint optimization model include: the nominal voltage of the rectifier module (U nom =1000V), full-bridge inverter module nominal voltage (U inv-nom =500V); the threshold is set to: phase deviation threshold θ th =2°, voltage distribution difference threshold ΔK th =5%, frequency deviation threshold f th =1%.

[0079] Model loading includes: a pre-trained Kalman filter (covariance matrix Q = 0.01I, R = 0.1) and a wavelet threshold; real-time data is collected based on a preset sampling frequency, and data preprocessing is performed, including digital filtering and de-meaning preprocessing to eliminate DC bias.

[0080] The circuit closed-loop adjustment strategy includes:

[0081] When the phase deviation value is greater than the preset phase deviation threshold, the rectifier phase shift angle correction instruction is triggered, and the phase deviation is compensated by adjusting the PWM duty cycle; when the distribution coefficient difference between the first inverter voltage distribution coefficient and the second inverter voltage distribution coefficient is greater than the preset distribution difference threshold, the voltage distribution weight coefficient of the forward chopping buck module or the reverse chopping buck module is dynamically adjusted to reduce the distribution coefficient difference between the first inverter voltage distribution coefficient and the second inverter voltage distribution coefficient; when the frequency deviation value is greater than the preset resonant frequency difference, the inverter trigger angle is adjusted based on the fuzzy controller.

[0082] Specifically, if the phase deviation value Δθ is greater than the preset phase deviation threshold θ th , trigger PWM duty cycle adjustment: that is, calculate the correction amount ΔD = k p ×Δθ, (where k p =0.5% / °), update the duty cycle of the IGBT drive signal, and the new duty cycle is equal to the sum of the original duty cycle and the correction amount.

[0083] The voltage balancing adjustment method is used to reduce the distribution coefficient difference between the first inverter voltage distribution coefficient and the second inverter voltage distribution coefficient: if the absolute value of the difference between the first voltage distribution coefficient k1 and the second voltage distribution coefficient k2 is greater than the voltage distribution difference threshold, the voltage weight coefficient λ of the chopping module is dynamically adjusted: λ new =λ old ×(1+η×(k1-k2))(η=0.1), where λ new is the adjusted voltage weight coefficient, λ old To adjust the voltage weight coefficient before, we force k1≈k2 by adjusting the output voltage of the chopper module.

[0084] The resonance compensation strategy includes: if the frequency deviation value Δf>f th , based on the fuzzy controller conditional inverter trigger angle α, the control rule library example of the fuzzy controller is: IFΔf>1%THENα=α_old-5°; IFΔf<-1%THENα=α_old+5°; adjust the inverter output frequency by changing the trigger angle and re-lock the resonance point.

[0085] It should be understood that the serial numbers of the steps in the above embodiments do not imply the order of execution. The order of execution of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

Claims

1. A power supply detection method for the main circuit topology structure of a medium frequency coreless induction furnace power supply, characterized in that: The method comprises: Establish the forward conversion relationship between the input voltage and output voltage of the rectifier-chopper buck module, and the reverse conversion relationship between the output voltage and the input voltage of the full-bridge inverter module; A joint optimization model is constructed based on the forward conversion relationship and the reverse conversion relationship, wherein the joint optimization model includes a loss function for quantifying rectification loss and a constraint function for constraining inversion performance, thereby achieving coordinated optimization of rectification and inversion processes; the optimization objective function of the joint optimization model is to minimize the loss function for quantifying rectification loss; Construct a cascade detection network including a bottom-level detection network, a middle-level detection network, and a top-level detection network; The bottom detection network extracts the 12-pulse phase shift angle error of the rectifier-chopper buck module based on Fourier transform to obtain a phase deviation value for monitoring the rectifier-chopper buck module; The middle-layer detection network uses Kalman filtering to predict the first inverter voltage distribution coefficient and the second inverter voltage distribution coefficient of the full-bridge inverter module to evaluate the voltage balance of the full-bridge inverter module; The top-level detection network uses wavelet transform to analyze the frequency deviation value of the load parallel resonant module to detect the stability of the resonant frequency; Synchronously collect the three-phase input voltage, DC bus voltage, inverter output current, and resonant capacitor voltage of the medium-frequency coreless induction furnace power supply, and perform time-domain and frequency-domain feature extraction to generate a multi-dimensional detection vector; Executing a circuit closed-loop adjustment strategy based on the multi-dimensional detection vector; The main circuit topology of a medium-frequency coreless induction furnace power supply includes: a three-phase rectification-chopping buck circuit, a full-bridge inverter circuit, a voltage-sharing capacitor, and a load parallel resonant circuit; the three-phase rectification-chopping buck circuit includes a first rectification-chopping buck module and a second rectification-chopping buck module; the rectification-chopping buck module includes two sets of three-phase six-pulse rectification bridges with a phase difference of 30 degrees, a forward chopping buck module, a reverse chopping buck module, and a filter inductor; the full-bridge inverter circuit includes a first full-bridge inverter module and a second full-bridge inverter module, and the output ends of the first full-bridge inverter module and the second full-bridge inverter module are connected in series to supply power to the load parallel resonant circuit.

2. The power supply detection method for the main circuit topology structure of a medium frequency coreless induction furnace power supply according to claim 1 is characterized in that: The circuit closed-loop adjustment strategy includes: When the phase deviation value is greater than a preset phase deviation threshold, a rectification phase shift angle correction instruction is triggered to compensate for the phase deviation by adjusting the PWM duty cycle; When the distribution coefficient difference between the first inverter voltage distribution coefficient and the second inverter voltage distribution coefficient is greater than a preset distribution difference threshold, dynamically adjusting the voltage distribution weight coefficient of the forward chopping buck module or the reverse chopping buck module to reduce the distribution coefficient difference between the first inverter voltage distribution coefficient and the second inverter voltage distribution coefficient; When the frequency deviation value is greater than the preset resonant frequency difference, the inverter trigger angle is adjusted based on the fuzzy controller.

3. The power supply detection method for the main circuit topology structure of a medium frequency coreless induction furnace power supply according to claim 1 is characterized in that: The forward chopping buck module and the reverse chopping buck module are connected back to back, and the input ends are connected to the series output ends of two groups of three-phase six-pulse rectifier bridges with a phase difference of 30 degrees.

4. The power supply detection method for the main circuit topology structure of a medium frequency coreless induction furnace power supply according to claim 3 is characterized in that: The forward chopping buck module is composed of a first IGBT half-bridge module and a first filter capacitor, and the reverse chopping buck module is composed of a second IGBT half-bridge module and a second filter capacitor. The common connection point of the two groups of filter capacitors is connected to the common point of the series connection of two groups of three-phase six-pulse rectifier bridges through the filter inductor.

5. The power supply detection method for the main circuit topology structure of a medium frequency coreless induction furnace power supply according to claim 1 is characterized in that: The first full-bridge inverter module and the second full-bridge inverter module adopt thyristor inverter full-bridge.

6. The power supply detection method for the main circuit topology structure of a medium frequency coreless induction furnace power supply according to claim 1, characterized in that: The load parallel resonant circuit includes an induction coil of a medium-frequency coreless induction furnace and a parallel resonant capacitor group, wherein the parallel resonant capacitor group is composed of two resonant capacitors connected in series; the voltage-equalizing capacitor is connected across the series connection point of the output end of the full-bridge inverter module and the series connection point of the parallel resonant capacitor group.

7. The power supply detection method for the main circuit topology structure of a medium frequency coreless induction furnace power supply according to claim 6, characterized in that: The first rectifier-chopper buck module and the first full-bridge inverter module form a cascade unit, the second rectifier-chopper buck module and the second full-bridge inverter module form a second cascade unit, the number of the cascade units can be expanded to N, the parallel resonant capacitor group is composed of N resonant capacitors connected in series, and a voltage-equalizing capacitor is respectively connected between the series connection point of the output end of each full-bridge inverter circuit and the connection point of the corresponding resonant capacitor group to form N-1 voltage-equalizing branches, where N is an integer greater than or equal to 2.

8. The power supply detection method for the main circuit topology structure of a medium frequency coreless induction furnace power supply according to claim 1, characterized in that: The two sets of three-phase 6-pulse rectifier bridges with a phase difference of 30° can also be replaced by two sets of three-phase 12-pulse rectifier bridges with a phase difference of 15°.

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