Active-disturbance-rejection control method suitable for three-active-bridge DC-DC converter

Abstract

The invention relates to an active-disturbance-rejection control method suitable for a three-active-bridge DC-DC converter, and the method comprises the steps: setting a reference voltage of an output side of the three-active-bridge DC-DC converter, obtaining an actual voltage, and calculating a voltage difference value; constructing a switch state space equation; on the basis of the voltage difference value and the switch state space equation, an active-disturbance-rejection controller is adopted for control, the phase shift ratio of the output side is obtained, a switch signal is obtained through SPS modulation, all the steps are repeated, and the control process is completed; the active disturbance rejection controller control step comprises the steps of setting delay time, performing transient state and steady state judgment by combining a difference value, switching to a phase-locked loop observer if the delay time is in a transient state, performing error compensation by combining a switch state space equation to obtain a phase shift ratio of an output side, and switching to a traditional linear expansion observer if the delay time is in a steady state to obtain a phase shift ratio of an output side. And performing error compensation by combining a switch state space equation to obtain a shift-phase ratio of an output side. Compared with the prior art, the method has the advantages of reducing disturbance and the like.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and particularly to an active disturbance rejection control method applicable to a triple active bridge DC-DC converter. Background Art

[0002] The new energy system and the new power system are being gradually improved. As an important component for new energy transmission and conversion, power electronic devices have become an indispensable part of the entire power grid. A DC-DC converter is a power electronic device that converts a DC voltage from one level to another level. It can achieve DC conversion and is widely used in photovoltaic power generation, battery energy storage, and DC power transmission. DC-DC converters are divided into isolated and non-isolated types, and now many topologies have been developed. The triple active bridge DC-DC converter (TAB) is a multi-port isolated bidirectional power conversion topology that can achieve efficient energy interaction between three independent DC ports and is widely used in scenarios such as DC microgrids, multi-source energy storage systems, and interconnection of multi-voltage platforms for electric vehicles. The TAB achieves electrical isolation through a high-frequency transformer and uses a phase-shift modulation strategy to regulate the power flow between ports, having advantages such as high power density, flexible multi-port expansion, and wide voltage adaptation range.

[0003] The TAB includes three full-bridge circuits and a high-frequency transformer, and there is a strong coupling and non-linear relationship between the port voltages, phase-shift angles, and power flows. In practical applications, the TAB needs to cope with disturbances such as input voltage fluctuations, load mutations, temperature drifts, and component aging. However, traditional proportional-integral (PI) control or model-based feed-forward compensation methods rely on accurate system parameters and have poor robustness. Especially in the wide voltage range or light load conditions, the control performance significantly deteriorates. In addition, with the popularization of wide bandgap semiconductors (SiC / GaN), the switching frequency of the TAB has been increased to the hundreds of kHz level, and the influence of high-frequency switching noise, electromagnetic interference (EMI), and parasitic parameters has been aggravated. The existing control methods have limited ability to suppress high-frequency disturbances, resulting in waveform distortion and efficiency reduction.

[0004] Active disturbance rejection control (ADRC) is an advanced control method that does not rely on an accurate model and can estimate and compensate for internal and external disturbances of the system in real time through an extended state observer (ESO), and has shown strong robustness in fields such as motor drive and power electronic conversion. However, its application in the multi-port TAB has not been fully explored. Summary of the Invention

[0005] The purpose of the present invention is to provide an active disturbance rejection control method applicable to a triple active bridge DC-DC converter that can improve the anti-disturbance ability.

[0006] The object of the present invention can be achieved by the following technical solutions:

[0007] An active disturbance rejection control method applicable to a three-active-bridge DC-DC converter, comprising the following steps:

[0008] Set the reference voltage on the output side of the three-active-bridge DC-DC converter, obtain the corresponding actual voltage, and calculate the voltage difference;

[0009] Construct the switching state space equation of the three-active-bridge DC-DC converter;

[0010] Based on the voltage difference and the switching state space equation, use an active disturbance rejection controller for control, obtain the phase shift ratio on the output side, and obtain the switching signal through SPS modulation for switching control. Repeat all the above steps until the control process is completed;

[0011] Where the step of using the active disturbance rejection controller for control includes:

[0012] Set the delay time, combine the difference for transient and steady-state judgment. If it is transient, switch to the phase-locked loop observer, combine the switching state space equation for error compensation, and obtain the phase shift ratio on the output side. If it is steady state, switch to the traditional linear extended observer, combine the switching state space equation for error compensation, and obtain the phase shift ratio on the output side.

[0013] Further, the three-active-bridge DC-DC converter is provided with a primary side and a secondary side. The primary side serves as the input side of the three-active-bridge DC-DC converter, and the secondary side serves as the output side of the three-active-bridge DC-DC converter. There are two output ports on the output side.

[0014] Further, the steps for constructing the switching state space equation include:

[0015] Construct the switching state equation of the three-active-bridge DC-DC converter, expressed as:

[0016]

[0017] In the formula, V o is the output voltage, R L is the load resistance, C2 is the output side capacitor, N is the turns ratio of the high-frequency transformer, V i is the output voltage, D is the phase shift ratio, f s is the switching frequency, and L is the inductor of the left full bridge;

[0018] Select the state variables x1 = V o , x2 = f, and obtain the state space equation, expressed as:

[0019]

[0020] f = av0 + (b - b0)d

[0021]

[0022] In the formula, b0 is the ADRC controller parameter, d is the phase shift ratio, f is the total modeling interference, v0 is the output voltage, and b and a are both parameters.

[0023] Further, the expression of the ADRC controller parameter b0 is:

[0024]

[0025] In the formula, V i0 is the nominal value of the input voltage, D0 is the standard phase shift ratio, L0 is the per-unit value of the input-side inductance, and C 20 is the per-unit value of the output capacitance.

[0026] Further, the expression of the parameter b is:

[0027]

[0028] In the formula, V i is the input voltage.

[0029] Further, the expression of the phase shift ratio d is:

[0030]

[0031] In the formula, K p is the coefficient of the active disturbance rejection controller, V ref is the reference voltage, v0 is the output voltage, z2 is the total disturbance estimation value, and b0 is the ADRC controller parameter.

[0032] Further, the condition for determining a transient state is:

[0033] The difference e ≥ μ, and t2 ≥ t 2d , where e = |v o - V ref |, v o is the output voltage, V ref is the reference voltage, μ is the set error threshold, ΔV is the voltage ripple, t2 is the duration of the difference exceeding the limit, and t 2d is the transient trigger delay, taking 2 to 3 switching cycles.

[0034] Further, the condition for determining a steady state is:

[0035] The difference e < μ, and t1 ≥ t 1d, where \(e = |v o -V ref |\), \(v o is the output voltage, \(V ref is the reference voltage, \(\mu\) is the set error threshold, \(\Delta V\) is the voltage ripple, \(t_1\) is the delay time, \(t 1d is the steady-state confirmation delay, taking 1.5 switching cycles.

[0036] Furthermore, the expression of the phase-locked loop observer is:

[0037]

[0038] In the formula, \(z_1\) is the estimated value of the output voltage, \(z_2\) is the estimated value of the total disturbance, \(\beta_1\), \(\beta_2\) are the observer parameters, \(b_0\) is the ADRC controller parameter, \(d\) is the phase shift ratio, and \(v_0\) is the output voltage.

[0039] Furthermore, the expression of the traditional linear extended observer is:

[0040]

[0041] Where:

[0042] \(e_1 = v_0 - z_1

[0043] \(e_2 = f - z_2

[0044]

[0045] In the formula, \(z_1\) is the estimated value of the output voltage, \(z_2\) is the estimated value of the total disturbance, \(\beta_1\), \(\beta_2\) are the observer parameters, \(b_0\) is the ADRC controller parameter, \(d\) is the phase shift ratio, \(v_0\) is the output voltage, \(\omega_1\), \(\omega_2\) are the poles of the observer transfer function, \(f\) is the modeled total disturbance, \(e_1\), \(e_2\) are the estimated error quantities, \(e_1\) is used to track the output voltage \(v_0\), and \(e_2\) is used to track the total output voltage disturbance \(f\).

[0046] Compared with the prior art, the present invention has the following beneficial effects:

[0047] (1) The active disturbance rejection controller of the present invention adopts an adaptive switching mechanism. According to the determined transient state, it switches to the phase-locked loop observer for error compensation. According to the determined steady-state state, it switches to the traditional linear extended observer for error compensation. The phase-locked loop observer can effectively achieve fast transient response, and the traditional linear extended observer can effectively achieve steady-state noise suppression, effectively balancing the contradictions of traditional observers.

[0048] (2) According to the transient and steady states, the present invention performs adaptive switching of the observer, effectively improving the disturbance rejection ability and noise immunity of the three-active-bridge DC-DC converter, thereby ensuring the stability of the system when the DC bus fluctuates. The present invention is particularly applicable to systems with new energy inputs. Photovoltaic and battery energy storage systems have more output instabilities. At the same time, adopting the method of the present invention can greatly improve the dynamic response ability of the system, overcome the problem of slow dynamic response of traditional control methods, and the problem that traditional observers cannot take into account both noise and disturbances. Description of the Drawings

[0049] Figure 1 It is a schematic diagram of the method flow of the present invention;

[0050] Figure 2 It is the topology structure of the three-active-bridge DC-DC converter of the present invention;

[0051] Figure 3 It is the overall control diagram of the present invention;

[0052] Figure 4 It is the ADRC control diagram of the present invention;

[0053] Figure 5 It is the principle diagram of the ALESO used in the ADRC of the present invention;

[0054] Figure 6 It is a comparison diagram of the ADRC control voltage waveform and PI control in the embodiment of the present invention. Detailed Embodiment

[0055] The present invention will be described in detail below with reference to the drawings and specific embodiments. This embodiment is implemented on the premise of the technical solution of the present invention, and gives detailed implementation manners and specific operation processes, but the protection scope of the present invention is not limited to the following embodiments.

[0056] This embodiment provides an active disturbance rejection control method applicable to a three-active-bridge DC-DC converter, as Figure 3As shown, to improve the unstable fluctuations of the grid input (such as photovoltaic and energy storage units) in a hybrid energy system, a method of using an active disturbance rejection control with an adaptive observer to enhance the system's anti-disturbance and anti-noise capabilities is proposed. For a three-active-bridge DC-DC converter, the active disturbance rejection control method is adopted. The active disturbance rejection controller (ADRC) consists of a proportional link and an adaptive observer. The adaptive observer observes the total disturbance and compensates for it. The adaptive observer switches between two modes according to the system state. When the system is disturbed, the adaptive observer in the active disturbance rejection controller is selected as a phase-locked loop observer to improve the system's anti-stability. After the system stabilizes, it switches to a traditional linear extended observer to enhance the system's anti-noise ability. This method can effectively reduce the impact of disturbances when the input of the three-active-bridge DC-DC converter changes or there are load disturbances, and improve the system's anti-disturbance ability. Specifically, as Figure 1 shown, the method includes the following steps:

[0057] S1. Set the reference voltage on the output side of the three-active-bridge DC-DC converter, obtain the corresponding actual voltage, and calculate the voltage difference.

[0058] In this embodiment, Figure 2 the three-active-bridge DC-DC converter shown is taken as an example. The three-active-bridge DC-DC converter consists of a three-winding transformer and three full bridges. There are two output ports on the secondary side and one input port on the primary side. Each full bridge contains 4 switches. The primary-side switches are g1~g4, and the secondary-side switches are g5~g12. The switching signals in this embodiment are given by the active disturbance rejection controller after being observed and compensated by the adaptive controller, and respectively control the conduction and cutoff of 12 switching tubes to control the output voltage.

[0059] In this solution, after selecting the output voltage reference value of the three-active-bridge DC-DC converter , obtain the two actual voltage outputs U dc1 、U dc2 of the three-active-bridge DC-DC converter. Then calculate the difference between the voltage reference value and the actual voltage value, and feedback it to the input end of the ADRC.

[0060] S2. Construct the switching state space equation of the three-active-bridge DC-DC converter.

[0061] Analyze the switching state of the three-active-bridge DC-DC converter to obtain its state equation as:

[0062]

[0063] Select the state variable x1 = V o, when \(x2 = f\), the switched state - space equation can be obtained:

[0064]

[0065] \(f = av0+(b - b0)d\)

[0066] In the formula, \(f\) represents the total disturbance including external disturbance and modeling inaccuracy. Among them:

[0067]

[0068] In the formula, \(R\) L is the load resistance, \(C2\) is the output - side capacitor, \(f\) s is the switching frequency, \(b0\) is the ADRC controller parameter, \(d\) is the phase - shift ratio, and \(v0\) is the output voltage.

[0069] The above - mentioned switched state - space equation is used to calculate the ADRC controller parameter \(b0\) for further calculation of the phase - shift ratio

[0070] S3. Based on the voltage difference and the switched state - space equation, an active disturbance rejection controller (ADRC) is used for control to obtain the phase - shift ratio on the output side, and a switching signal is obtained through the SPS modulation method for switching control. Repeat all the above steps until the control process is completed.

[0071] The ADRC in this embodiment consists of a proportional link and an adaptive observer ALESO. The adaptive observer ALESO is composed of a phase - locked - loop observer PLLO and a traditional linear extended observer TLESO. The voltage generated on the secondary side passes through the ADRC controller to obtain the phase - shift ratio, and the switching signals \(g5\sim g12\) are generated through the SPS modulation method. The switching signals \(g1\sim g4\) are directly given to control the output voltage. Combining Figure 4 As shown, this step specifically includes the following: After determining the voltage reference value, the difference between the output voltage and the reference voltage passes through the proportional link \(K\) p (\(K\) p =\(\omega\) c , \(\omega\) c is the closed - loop transfer - function bandwidth), and after the disturbance compensation of the observer, the final control quantity, that is, the phase - shift ratio, is generated. This process is also called linear state - error feedback. The calculation formula for the controller parameter \(b0\) is as follows:

[0072]

[0073] In the formula, \(V\) j0 is the nominal value of the input voltage, \(D0\) is the phase - shift ratio standard, \(L0\) is the per - unit value of the input - side inductor, and \(C\) 20 is the per - unit value of the output capacitor. The calculation formula for the final phase - shift ratio is

[0074]

[0075] The process of adaptive switching for the observer to observe disturbances will be introduced in detail as follows:

[0076] After the system starts, it defaults to the traditional linear extended observer to implement detection and obtain the voltage difference e. The ADRC controller selects the corresponding observer form according to the system state. These two forms of observers are collectively called adaptive observers. The bandwidth of the adaptive observer is ω0, which can be obtained from experience. At the same time, for the convenience of experiments, take ω0 = ω1 = ω2 = 6000rad, where ω1 and ω2 are the observer bandwidths of TLESO and PLLO respectively. After determining the bandwidth, the observer parameters β1 and β2 can be determined. Set the error e = |v o -V ref | and the error threshold μ, defined as where ΔV is the voltage ripple. Set the delay times t 1d 、t 2d ,t 1d = 1.5T S ,t 2d = 2 - 3T s ,where T s is the switching period. As Figure 5 shown, after judging the magnitude of the error and the set error threshold, transient and steady-state judgments are made, and then a suitable observer is selected to compensate for the error, making the system a simple integrator series type. The proportional coefficient K p = ω c takes a value of 3dB here. When the load suddenly increases / decreases resulting in e ≥ μ, after the counter t2 accumulates to t 2d , it is determined as transient and switched to PLLO. PLLO accelerates the disturbance estimation through fast integral-proportion regulation, and the output converges rapidly, and e drops below δ. When the error is stable at e < μ, after the counter t1 accumulates to t 1d , it switches back to TLESO. TLESO suppresses high-frequency noise through a low-gain observer until the next disturbance triggers a switch.

[0077] Among them, in the steady state, the traditional linear extended observer TLSEO part used is designed as

[0078]

[0079] And define the estimated error quantities e1 = v0 - z1, e2 = f - z2, where β1 and β2 are obtained according to the bandwidth method respectively

[0080]

[0081] where ω1 and ω2 are the poles of the observer transfer function. At this time, the system is simplified to a simple integral series type, and the proportional coefficient can be taken as K p = ω c .

[0082] The phase-locked loop observer PLLO used in the transient state is designed as

[0083]

[0084] According to the control of the ADRC controller, the phase shift ratio can be obtained. Then, through the SPS single-phase shift modulation method (there is a phase shift angle between the full-bridge switch signals on both sides. The phase shift angle is the product of the phase shift ratio and half a cycle, so as to obtain the required output square wave voltage. In the three-active-bridge used in this embodiment, they are the left full-bridge and the upper-right full-bridge, and the phase shift ratios of the left full-bridge and the lower-right full-bridge respectively), modulation is performed to obtain the switching signal, and on-off control of the switch is carried out to control the output voltage.

[0085] In this embodiment, the ADRC control voltage waveform is compared with the PI control voltage waveform. From the appendix Figure 6 It can be seen that at 0.4 seconds, the load suddenly changes from 10 ohms to 20 ohms. It can be seen that the dynamic response ability and anti-disturbance ability of ADRC when the load changes are better than those of PI control.

[0086] If the above functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that makes contributions to the prior art, or this part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. And the aforementioned storage medium includes: USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs, etc., which can store program codes.

[0087] Those skilled in the art should understand that the embodiments of the present invention can be provided as a method, a system, or a computer program product. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memory, CD-ROM, optical memory, etc.) that contain computer-usable program code. The solutions in the embodiments of the present invention can be implemented in various computer languages. For example, object-oriented programming languages such as Java and interpreted scripting languages such as JavaScript, etc.

[0088] The present invention is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to the embodiments of the present invention. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, as well as the combination of flows and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to the processors of general-purpose computers, special-purpose computers, embedded processors, or other programmable data processing devices to generate a machine, such that the instructions executed by the processors of the computer or other programmable data processing devices generate means for implementing the functions specified in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0089] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the computer-readable memory generate a manufactured article including instruction means that implement the functions specified in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0090] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process. Thus, the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0091] Although the preferred embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concepts. Therefore, the appended claims are intended to be construed as including the preferred embodiments as well as all changes and modifications falling within the scope of the present invention.

[0092] Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.

Claims

1. A self-disturbance rejection control method applicable to a three-active-bridge DC-DC converter, characterized in that, It includes the following steps: Set the reference voltage on the output side of the three-active-bridge DC-DC converter, obtain the corresponding actual voltage, and calculate the voltage difference; Construct the switching state space equation of the three-active-bridge DC-DC converter; Based on the voltage difference and the switching state space equation, use an active disturbance rejection controller (ADRC) for control to obtain the phase shift ratio on the output side, and obtain the switching signal through SPS modulation for switching control. Repeat all the above steps until the control process is completed; Among them, the step of using the active disturbance rejection controller for control includes: Set the delay time, combine the difference to judge the transient state and the steady state. If it is a transient state, switch to the phase-locked loop observer, combine the switching state space equation for error compensation to obtain the phase shift ratio on the output side. If it is a steady state, switch to the traditional linear extended observer, combine the switching state space equation for error compensation to obtain the phase shift ratio on the output side.

2. The auto-disturbance rejection control method for a three-active-bridge DC-DC converter according to claim 1, wherein The three-active-bridge DC-DC converter has a primary side and a secondary side. The primary side serves as the input side of the three-active-bridge DC-DC converter, and the secondary side serves as the output side of the three-active-bridge DC-DC converter. There are two output ports on the output side.

3. A self-disturbance rejection control method applicable to a three-active-bridge DC-DC converter according to claim 1, characterized in that, The steps for constructing the switching state space equation include: Construct the switching state equation of the three-active-bridge DC-DC converter, expressed as: Wherein, V o is the output voltage, R L is the load resistance, C2 is the output side capacitor, N is the turns ratio of the high-frequency transformer, f s is the switching frequency, and L is the inductor of the left full bridge Select the state variables \(x_1 = V\) o , \(x_2 = f\), and obtain the state - space equation, expressed as: f = av0+(b - b0)d In the formula, b0 is the parameter of the ADRC controller, d is the phase shift ratio, f is the total modeling disturbance, v0 is the output voltage, and b and a are both parameters.

4. The active disturbance rejection control method for a three-active-bridge DC-DC converter according to claim 3, characterized in that The expression of the ADRC controller parameter b0 is: Where, V i0 is the nominal value of the input voltage, D0 is the nominal value of the phase shift ratio, L0 is the nominal value of the inductor, and C 20 is the nominal value of the output side capacitor.

5. The auto-disturbance rejection control method for a three-active-bridge DC-DC converter according to claim 3, characterized in that The expression of the parameter b is: Where V i is the input voltage.

6. The active disturbance rejection control method for a three-active-bridge DC-DC converter according to claim 3, characterized in that The expression of the phase shift ratio d is: where K p is the coefficient of the active disturbance rejection controller, V ref is the reference voltage, v0 is the output voltage, z2 is the total disturbance estimation value, and b0 is the ADRC controller parameter.

7. The active disturbance rejection control method applicable to a three-active-bridge DC-DC converter according to claim 1, wherein The condition for judging as a transient state is: The difference e≥μ, and t2≥t 2d , where e = |v o -V ref |, v o is the output voltage, V ref is the reference voltage, μ is the set error threshold, ΔV is the voltage ripple, t2 is the duration of the difference exceeding the limit, t 2d is the transient trigger delay, taking 2 to 3 switching cycles.

8. The auto-disturbance rejection control method for a three-active-bridge DC-DC converter according to claim 1, characterized in that, The condition for judging as a steady state is: The difference e < μ, and t1 ≥ t 1d , where e = |v o -V ref |, v o is the output voltage, V ref is the reference voltage, μ is the set error threshold, ΔV is the voltage ripple, t1 is the delay time, t 1d is the steady-state confirmation delay, taking 1.5 switching cycles.

9. The auto-disturbance rejection control method for a three-active-bridge DC-DC converter according to claim 1, wherein The expression of the phase-locked loop observer is: In the formula, z1 is the estimated value of the output voltage, z2 is the estimated value of the total disturbance, β1 and β2 are the observer parameters, b0 is the ADRC controller parameter, d is the phase shift ratio, and v0 is the output voltage.

10. The auto-disturbance rejection control method for a three-active-bridge DC-DC converter according to claim 1, wherein The expression of the traditional linear extended observer is: Where: e1 = v0 - z1 e2 = f - z2 In the formula, z1 is the estimated value of the output voltage, z2 is the estimated value of the total disturbance, β1 and β2 are the observer parameters, b0 is the ADRC controller parameter, d is the phase shift ratio, v0 is the output voltage, ω1 and ω2 are the poles of the observer transfer function, f is the total modeling disturbance, e1 and e2 are the estimated quantities of the error. e1 is used to track the output voltage v0, and e2 is used to track the total output voltage disturbance f.

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