Circuit for improving input common-mode range of high-voltage operational amplifier

Abstract

The invention provides a circuit for improving the input common mode range of a high-voltage operational amplifier. An input tube substrate voltage biasing circuit and an input cascode switching circuit are additionally arranged on the basis of a traditional high-voltage operational amplifier input stage circuit with a self-adaptive biasing circuit. Wherein the input tube substrate voltage biasing circuit greatly increases the threshold voltage of the input pair tube of the high-voltage operational amplifier within a certain input common mode range, and only when the input common mode voltage is close to the input common mode upper limit, the threshold voltage of the input pair tube is hardly influenced by the substrate bias effect, so that the input common mode range upper limit is not influenced, and meanwhile, the high-voltage operational amplifier can be applied to the high-voltage operational amplifier. And the lower limit of the input common-mode range is properly reduced. When the input common-mode voltage is close to the input common-mode lower limit, the input cascode switching circuit switches an input cascode tube from an LDMOS tube to a common MOS tube, so that the source-gate voltage required by the input cascode tube is greatly reduced, and the input common-mode range lower limit is effectively reduced. Therefore, the input common-mode range of the high-voltage operational amplifier can be expanded by using the structure.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and particularly to a circuit for improving the input common-mode range of a high-voltage operational amplifier. Background Art

[0002] A high-voltage operational amplifier, abbreviated as a high-voltage op-amp, generally has a power supply voltage range much higher than that of an ordinary op-amp, which enables it to play a great role in high-power supply voltage fields such as medical equipment and aerospace. In these fields, the high-voltage op-amp processes the signals output by the previous stage. If the common-mode range of the input signal exceeds the input common-mode range of the op-amp, the output of the op-amp will exhibit obvious distortion, thus seriously affecting the signal processing result.

[0003] As Figure 1 shown, it is the input stage circuit of a traditional high-voltage op-amp. A low-voltage metal-oxide-semiconductor field-effect transistor (MOS) is connected in series with a laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOS), that is, the LDMOS transistor serves as an input cascode transistor. Utilizing the high-voltage tolerance characteristic of the LDMOS to protect the ordinary MOS transistor from being broken down by high voltage. However, the lower limit of the input common-mode range of this structure is limited by the gate-source voltage of the LDMOS, thereby reducing the input common-mode range of the high-voltage op-amp. Summary of the Invention

[0004] In view of the above problems and deficiencies, the present invention provides a circuit for improving the input common-mode range of a high-voltage op-amp to solve the problem that the input common-mode range of a traditional high-voltage op-amp is limited by the LDMOS.

[0005] The technical solution adopted by the present invention is as follows: A circuit for improving the input common-mode range of a high-voltage op-amp (as Figure 2 shown) includes: current sources I1 and I2, and MOS transistors M1 to M28; where:

[0006] The gate of MOS transistor M1 is connected to the non-inverting input terminal VP, and the gate of MOS transistor M2 is connected to the inverting input terminal VN; the sources of MOS transistors M1, M2, and M7, and the gate of LDMOS transistor M8 are connected together, and current source I1 is connected between the source of MOS transistor M1 and the positive power supply rail VCC; the drain of MOS transistor M1, the source of MOS transistor M3, and the source of LDMOS transistor M7 are connected together; the substrates of MOS transistors M1, M2, and the source of MOS transistor M10 are connected together;

[0007] The drain of MOS transistor M2, the source of MOS transistor M4, and the source of LDMOS transistor M8 are connected; the gates of MOS transistor M3, MOS transistor M4, MOS transistor M13, and the drain of LDMOS transistor M16 are connected, and the gate and drain of MOS transistor M3 are connected; the source of MOS transistor M3 and the drain of LDMOS transistor M5 are connected; the source of MOS transistor M4 and the drain of LDMOS transistor M6 are connected;

[0008] The gates of LDMOS transistor M5, LDMOS transistor M6, the drain of LDMOS transistor M22, the drain of LDMOS transistor M23, and the drain of MOS transistor M25 are connected, and the drain and gate of MOS transistor M25 are connected; the source of LDMOS transistor M5 and the drain of LDMOS transistor M7 are connected; the source of LDMOS transistor M6 and the drain of LDMOS transistor M8 are connected; the gates of LDMOS transistor M7, LDMOS transistor M8, the gate of MOS transistor M12, and the gate of LDMOS transistor M14 are connected, and the gate and drain of MOS transistor M12 are connected;

[0009] The gates of MOS transistor M9, the source of MOS transistor M11, and the source of MOS transistor M13 are connected, and the gate and drain of MOS transistor M9 are connected; current source I2 is connected between the source of MOS transistor M10 and the positive power supply rail VCC; the gates of MOS transistor M11 and the source of MOS transistor M12 are connected, and the gate and drain of MOS transistor M11 are connected;

[0010] The gates of LDMOS transistor M14, LDMOS transistor M16, and LDMOS transistor M26 are connected; the source of LDMOS transistor M14, the drain of MOS transistor M15, and the source of MOS transistor M18 are connected; the gates of MOS transistor M15, MOS transistor M17, and MOS transistor M27 are connected; the source of LDMOS transistor M16 and the drain of MOS transistor M17 are connected;

[0011] The drain of MOS transistor M18 and the source of LDMOS transistor M28 are connected; the gates of LDMOS transistor M19 and LDMOS transistor M22 are connected; the drain of LDMOS transistor M19, the gates of MOS transistor M20, MOS transistor M21, and the drain of LDMOS transistor M28 are connected; the source of LDMOS transistor M19 and the drain of MOS transistor M20 are connected;

[0012] The drain of MOS transistor M21 and the source of LDMOS transistor M22 are connected; the source of LDMOS transistor M23 and the drain of MOS transistor M24 are connected; the source of MOS transistor M25 and the gate of MOS transistor M26 are connected, and the gate and drain of MOS transistor M26 are connected; the source of MOS transistor M26 and the gate of MOS transistor M27 are connected, and the gate and drain of MOS transistor M27 are connected;

[0013] The sources of MOS transistor M15, MOS transistor M17, MOS transistor M24, and MOS transistor M27 are all connected to the negative power supply rail VSS; the sources of MOS transistor M20 and MOS transistor M21 are both connected to the positive power supply rail VCC;

[0014] The drains of LDMOS transistor M7 and LDMOS transistor M8 serve as the output terminals of the entire high-voltage op-amp input stage;

[0015] Furthermore, a circuit for improving the input common-mode range of a high-voltage op-amp includes a traditional input stage circuit, an input transistor substrate voltage biasing circuit, and an input cascode switching circuit.

[0016] Furthermore, the traditional input stage circuit includes MOS transistors M1 to M8 and current source I1.

[0017] Furthermore, the input transistor substrate voltage biasing circuit includes MOS transistor M10 and current source I2.

[0018] Furthermore, the input cascode switching circuit includes MOS transistors M9, M11 to M28.

[0019] Based on the above technical solutions, the beneficial effects of the present invention are as follows:

[0020] The present invention adopts an input transistor substrate voltage biasing circuit, effectively improving the threshold voltage of the input transistor, effectively reducing the lower limit of the input common-mode range, thereby improving the input common-mode range. At the same time, an input cascode switching circuit is adopted. When the input common-mode voltage is low, the input cascode transistor is switched from an LDMOS transistor to a MOS transistor with a larger aspect ratio, further reducing the lower limit of the input common-mode range, thereby effectively improving the input common-mode range. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 Schematic diagram of the traditional high-voltage op-amp input stage circuit structure.

[0022] Figure 2 Schematic diagram of the high-voltage op-amp input stage circuit structure in the present invention.

[0023] Figure 3 Schematic diagram of the traditional high-voltage op-amp input stage circuit structure with an adaptive biasing circuit.

[0024] Figure 4 Schematic diagram of the circuit structure for measuring the input common-mode range of an op-amp.

[0025] Figure 5 Comparison diagram of the input common-mode ranges of the traditional high-voltage op-amp input stage circuit with an adaptive biasing circuit in the embodiments and comparative examples of the present invention. DETAILED IMPLEMENTATION MANNER

[0026] To make the objectives, technical solutions and beneficial effects of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0027] Figure 1 It is a schematic diagram of the input stage circuit structure of a traditional high-voltage operational amplifier. The input common-mode range of the input stage of the traditional high-voltage operational amplifier is , where is the bias voltage of LDMOS transistors M3 and M4 in the input stage of the traditional high-voltage operational amplifier, is the source-gate voltage of LDMOS transistors M3 and M4, is the absolute value of the threshold voltage of input pair transistors M1 and M2, is the minimum voltage margin across current mirror I1.

[0028] For the input stage of the traditional high-voltage operational amplifier, when LDMOS transistors M3 and M4 have fixed biasing, to ensure that the drain-source voltage of the input pair transistors does not exceed the maximum value limited by the process, the minimum value of

[0029] is restricted, thus limiting the input common-mode range. When the biasing of LDMOS transistors M3 and M4 can vary with the input common-mode voltage, even if can drop to the negative power supply rail

[0030] Figure 2 is a schematic diagram of the input stage circuit structure of the high-voltage operational amplifier in the present invention. Referring to the input common-mode range expression of the input stage of the traditional high-voltage operational amplifier, an input transistor substrate voltage biasing circuit is added, effectively increasing the absolute value of the threshold voltage of the lower limit of the input common-mode range, while having little impact on the absolute value of the threshold voltage of the upper limit of the input common-mode range. An input cascode switching circuit is added, effectively reducing in the input lower limit, thereby expanding the lower limit of the input common-mode range.

[0031] For the input stage circuit of the high-voltage operational amplifier in the present invention, in almost the entire input common-mode range, the normally operating input cascode transistors are LDMOS transistors M7 and M8. Only when the input common-mode voltage is low enough and greater than the lower limit of the input common-mode range, under the action of the input cascode switching circuit, switching LDMOS transistors M5 and M6 are turned on. As the input common-mode voltage drops, the current in LDMOS transistors M7 and M8 gradually decreases to zero, and gradually switches to MOS transistors M3 and M4 to play the role of input cascode.

[0032] When the input common-mode voltage approaches the input upper limit, MOS transistor M10 gradually enters the subthreshold region and turns off, resulting in the substrate voltage of input differential pair transistors M1 and M2 gradually increasing to and remaining unchanged. At this time, as the input common-mode voltage increases, the body effect of input differential pair transistors M1 and M2 gradually weakens, and the threshold voltage gradually decreases. It can be approximately considered that at the input common-mode upper limit, input differential pair transistors M1 and M2 are hardly affected by the body effect, so the input common-mode upper limit is hardly affected.

[0033] The bias voltages of input cascode transistors M3, M4, M7, and M8 are dynamic biases. When the input common-mode voltage decreases, the source voltages of input differential pair transistors M1 and M2 decrease accordingly. Therefore, the gate bias voltages of LDMOS transistors M3, M4, M7, and M8 also decrease accordingly. Thus, while ensuring that the drain-source voltage of the input differential pair does not exceed the maximum value limited by the process, it greatly reduces the limitation on the lower limit of the input common-mode range.

[0034] For the input cascode switching circuit, under normal biasing conditions, LDMOS transistor M14 is in the saturation region, and MOS transistor M18 is in the critical cut-off region. Therefore, all the current of current mirror M15 comes from LDMOS transistor M14. At the same time, since there is no current passing through the branch of MOS transistor M18 and there is also no current passing through the branch of MOS transistor M27, but as a current mirror, the gate voltage of MOS transistor M27 is greater than the threshold voltage, giving it a strong pulling-down ability, resulting in being at a low potential, that is .

[0035] When the input common-mode voltage approaches the input lower limit, the gate bias voltages of LDMOS transistors M7 and M8 gradually approach the negative power supply rail , resulting in LDMOS transistor M14 entering the deep linear region and the source voltage of MOS transistor M18 decreasing. Therefore, the gate-source voltage of MOS transistor M18 can be greater than the threshold voltage and thus enter the saturation region. At this time, there is current passing through the branch of MOS transistor M18, and the current is copied to the branches of MOS transistors M24 and M25 through the current mirror composed of M19, M20, M21, and M22. This causes the voltage to rise rapidly, and finally the voltage is determined by MOS transistors M25, M26, and M27 in the diode-connected structure. At this time, since the voltage is large enough, LDMOS transistors M5 and M6 enter the deep linear region from the cut-off region, that is, the switch transistors turn on, and input cascode transistors M3 and M4 can work normally.

[0036] As the input common-mode voltage continues to decrease, while the gate bias voltages of LDMOS transistors M7 and M8 have approached , it is unable to continue to decrease, while there is still a margin for the gate voltages of MOS transistors M3 and M4 from . Therefore, the current originally flowing into LDMOS transistors M7 and M8 gradually all flows into MOS transistors M3 and M4. At the same time, the threshold voltages of MOS transistors M3 and M4 are less than those of LDMOS transistors M7 and M8, and the sizes of MOS transistors M3 and M4 are larger than those of LDMOS transistors M7 and M8. Therefore, the lower limit of the input common-mode range finally decreases significantly, thereby effectively expanding the lower limit of the input common-mode range.

[0037] In summary, taking the input stage circuit of the traditional high-voltage operational amplifier with an adaptive bias circuit as shown in Figure 3 as the comparative example, the input common-mode ranges of the high-voltage operational amplifiers in this embodiment and the comparative example are compared according to the measurement method shown in Figure 4 , and the results are as shown in Figure 5 . At a power supply voltage of 20V, the input common-mode range of the traditional high-voltage operational amplifier is 1.10V to 18.74V, and the input common-mode range of the circuit proposed by the present invention is 0.26V to 18.74V.

[0038] It can be seen that the present invention provides a circuit for improving the input common-mode range of a high-voltage operational amplifier, which effectively reduces the lower limit of the input common-mode range while hardly affecting the upper limit of the input common-mode range, thereby improving the input common-mode range of the high-voltage operational amplifier.

[0039] The above is only the specific implementation manner of the present invention. Any feature disclosed in this specification, unless specifically stated, can be replaced by other equivalent or features with similar purposes; all the features disclosed, or all the steps in any method or process, except for mutually exclusive features and / or steps, can be combined in any way.

Claims

1. A circuit for improving the input common-mode range of a high-voltage operational amplifier, characterized in that, It includes an input transistor substrate voltage biasing circuit and an input cascode switching circuit. Among them, the input transistor substrate voltage biasing circuit includes an LDMOS transistor M10 and a current source I2; among them, the input cascode switching circuit includes MOS transistors M3, M4, M9 to M13, M15, M17, M18, M20, M21, M24 to M27, LDMOS transistors M5 to M8, M14, M16, M19, M22, M23, M28, and a current source I2.

2. A circuit for improving the input common-mode range of a high-voltage operational amplifier according to claim 1, wherein, The substrate of the LDMOS transistor M10 in the aforementioned input transistor substrate voltage biasing circuit is connected to the source, serving as the substrate voltage biasing of the input pair transistors of the high-voltage operational amplifier. The substrate bias effect is utilized to increase the threshold voltage of the input pair transistors within a certain range, thereby increasing the input common-mode range of the high-voltage operational amplifier.

3. A circuit for improving the input common-mode range of a high-voltage operational amplifier according to claim 1, wherein, The sizes of the MOS transistors M3 and M4 in the aforementioned input cascode switching circuit are larger than those of the LDMOS transistors M7 and M8.

4. A circuit for enhancing the input common-mode range of a high-voltage operational amplifier according to claim 1, wherein, When the input common-mode voltage is significantly higher than the lower limit of the input common-mode range, the MOS transistor M18 is in the subthreshold region or even the cut-off region under the action of a specific gate bias voltage, and the LDMOS transistor M14 is in the saturation region. At this time, there is no current passing through the branches of the MOS transistors M20 and M21, and the current in the MOS transistor M15 all comes from the LDMOS transistor M14. The LDMOS transistors M5 and M6 are cut off, and the input cascode transistors are the LDMOS transistors M7 and M8. When the input common-mode voltage is significantly close to the lower limit of the input common-mode range, the current in the MOS transistor M15 all comes from the MOS transistor M18, the LDMOS transistors M5 and M6 are turned on, and the input cascode transistors are the MOS transistors M3 and M4. By using the source-gate voltage of the MOS transistors M3 and M4 being less than the source-gate voltage of the LDMOS transistors M7 and M8, the input common-mode range of the high-voltage operational amplifier is effectively increased.

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