Fault injection fault-tolerant testing device based on network time synchronization protocol
By injecting the fault tolerant test device based on the network time synchronization protocol, the reliability problem of time synchronization function testing in the simulation environment is solved, and the reliability tolerant evaluation of the time synchronization function in the real environment is realized, which improves the accuracy and reliability of the test.
Patent Information
- Application Number
- CN202510583879.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-07
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2045-05-07
AI Technical Summary
When the prior art performs fault tolerance tests of time synchronization function devices, there is a difference between the simulation environment and the real environment, and ignores the impact of internal state changes on fault tolerance, resulting in the inability to test results.
A fault injection fault tolerance testing device based on the network time synchronization protocol is designed, including a first data interface, a shunt module, a test configuration module, a fault injection module, a time synchronization module, a synchronization status monitoring module and a second data interface. Through hardware logic, the fault injection is simulated, the status of the time synchronization module is monitored in real time and its fault tolerance is evaluated.
It realizes reliable fault tolerance testing of time synchronization function in a real environment, makes up for the limitations of simulation testing, and provides a more reliable design reference basis.
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Figure CN120378334A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of communication technologies, and particularly relates to a fault injection fault tolerance testing device based on the network time synchronization protocol. Background Art
[0002] With the wide application of Ethernet data transmission technology, the continuous improvement of data transmission rate, and the proposal and development of time-critical networks, higher requirements are put forward for the synchronization accuracy, fault tolerance, and synchronization overhead of network time synchronization technology. In practice, in order to avoid the uncertain delay and jitter caused by software processing operations, the time synchronization algorithm is usually implemented in the data link layer of the network.
[0003] When designing a device with time synchronization function, it is necessary to conduct fault tolerance testing on the time synchronization module that implements the network time synchronization function in the device to ensure that it meets the fault tolerance requirements. In the prior art, when conducting fault tolerance testing, the network topology is usually built through software simulation to implement the basic function testing and fault tolerance testing of the time synchronization algorithm. However, there are often differences between the simulation environment and the real environment, resulting in certain differences between the simulation results and the real performance. In addition, when testing a device with time synchronization function in a network that needs to run the time synchronization algorithm (such as time-triggered Ethernet), the prior art focuses more on testing the protocol consistency of the device, while ignoring the impact of the internal state change of the device on the fault tolerance.
[0004] Therefore, there is an urgent need for a solution that can conduct fault tolerance testing on the time synchronization function in the real environment to make the test results more reliable. Summary of the Invention
[0005] In order to solve the above problems existing in the prior art, the present invention provides a fault injection fault tolerance testing device based on the network time synchronization protocol.
[0006] The technical problems to be solved by the present invention are realized through the following technical solutions:
[0007] A fault injection fault tolerance testing device based on the network time synchronization protocol includes: a first data interface, a shunt module, a test configuration module, a fault injection module, a time synchronization module, a synchronization status monitoring module, and a second data interface;
[0008] The first data interface is used to receive network data; the network data includes service frames and synchronization frames;
[0009] The shunt module is used to perform frame shunting on the network data, so that the synchronization frames enter the fault injection module;
[0010] The test configuration module is used to obtain fault injection configuration information and generate a fault injection instruction according to the fault injection configuration information, and send the fault injection instruction to the fault injection module;
[0011] The fault injection module is used to perform fault injection on the received synchronization frame according to the fault injection instruction, and output a fault-injected synchronization frame to the time synchronization module;
[0012] The time synchronization module is used to implement the network time synchronization protocol function according to the fault-injected synchronization frame, and output a response synchronization frame to the fault injection module according to the fault-injected synchronization frame;
[0013] The fault injection module is further used to perform fault injection on the received response synchronization frame according to the fault injection instruction to obtain a fault-injected response synchronization frame;
[0014] The second data interface is used to output the fault-injected response synchronization frame;
[0015] The synchronization status monitoring module is used to monitor the working status of the time synchronization module to obtain status monitoring information, so as to evaluate the fault tolerance of the time synchronization function according to the status monitoring information.
[0016] Optionally, the device further includes: a synchronization logic reinforcement module;
[0017] The synchronization logic reinforcement module is used for:
[0018] Performing synchronization logic reinforcement on the fault-injected synchronization frame output by the fault injection module, so that the time synchronization module implements the network time synchronization protocol function according to the fault-injected synchronization frame after synchronization logic reinforcement;
[0019] Performing synchronization logic reinforcement on the response synchronization frame output by the time synchronization module, so that the fault injection module performs fault injection on the received response synchronization frame after synchronization logic reinforcement.
[0020] Optionally, the device further includes: a status reporting module;
[0021] The status reporting module is used to convert the format of the status monitoring information and report it to the host computer, so as to evaluate the fault tolerance of the time synchronization function in the host computer.
[0022] Optionally, the device further includes: a storage module;
[0023] The storage module is used to store the status monitoring information;
[0024] The status reporting module is specifically used to read the status monitoring information from the storage module, convert the format, and report it to the host computer.
[0025] Optionally, the synchronization status monitoring module is specifically configured to:
[0026] By monitoring the execution status, reception and transmission time points, and frame content of the fault injection synchronization frame in the time synchronization module, determine whether the time synchronization module is in an abnormal state, and obtain status monitoring information.
[0027] Optionally, the synchronization logic reinforcement includes: implementing the central guard inspection mechanism CGIM and learning and predicting the synchronization frame.
[0028] Optionally, the fault injection configuration information includes: fault type, fault frequency, number of faults, fault input port, and fault output port.
[0029] Optionally, the device is applied to an FPGA.
[0030] Optionally, the FPGA is applied to a network card device, a switch device, or a bridge device.
[0031] The fault injection and fault tolerance test device based on the network time synchronization protocol provided by the present invention includes a first data interface, a shunt module, a test configuration module, a fault injection module, a time synchronization module, a synchronization status monitoring module, and a second data interface. The fault injection module injects faults into the synchronization frame according to the fault injection configuration information to simulate the possible fault types during the data transmission process, thereby testing the fault tolerance of the time synchronization function; through the synchronization status monitoring module, the functional status of the time synchronization module is monitored in real time, so as to determine whether the function of the time synchronization module is abnormal under the condition of fault injection, and evaluate the fault tolerance of the time synchronization function accordingly.
[0032] The present invention realizes the synchronization logic reinforcement function through the synchronization logic reinforcement module, so that when the fault tolerance does not meet the requirements, the fault tolerance can be further improved through synchronization logic reinforcement.
[0033] The present invention realizes the fault tolerance test of the device with the time synchronization function through hardware logic, makes up for the limitations of the original theoretical analysis and software simulation, makes the fault tolerance test effect more reliable, and provides a more reliable reference basis for the design of the device with the time synchronization function.
[0034] The following will further elaborate on the present invention in conjunction with the accompanying drawings. Description of the Drawings
[0035] Figure 1 is a structural diagram of a fault injection and fault tolerance test device based on the network time synchronization protocol provided by an embodiment of the present invention;
[0036] Figure 2It is a structural diagram of another fault injection fault tolerance test device based on the network time synchronization protocol provided by an embodiment of the present invention;
[0037] Figure 3 It is a schematic diagram of a fault injection configuration information format of a fault injection fault tolerance test device based on the network time synchronization protocol provided by an embodiment of the present invention;
[0038] Figure 4 It is a schematic diagram of the status monitoring information format of a fault injection fault tolerance test device based on the network time synchronization protocol provided by an embodiment of the present invention. Detailed implementation manners
[0039] The following further describes the present invention in detail with reference to specific embodiments, but the implementation manners of the present invention are not limited thereto.
[0040] In order to be able to perform time synchronization fault tolerance testing on devices with time synchronization functions in a real environment, so as to obtain more reliable fault tolerance test results and provide a reliable reference basis for the design of the device, an embodiment of the present invention proposes a fault injection fault tolerance test device based on the network time synchronization protocol, as shown in Figure 1 and Figure 2 The device includes: a first data interface, a shunt module, a test configuration module, a fault injection module, a time synchronization module, a synchronization status monitoring module, and a second data interface.
[0041] Among them, the first data interface is used to receive network data; the network data includes service frames and synchronization frames.
[0042] Specifically, the first data interface may include a physical layer and a MAC general IP core. The first data interface receives network data, specifically converting the received physical signals of the network into network data frames at the data link layer.
[0043] Exemplarily, in the TTE network, the first data interface is specifically used to convert the physical signals of the network into standard TTE format data at the data link layer to obtain TTE network data frames. TTE (Time-Triggered Ethernet) is a time deterministic network protocol, which is widely used in scenarios with strict timing requirements such as aerospace, automotive (such as in-vehicle networks), and industrial control. The TTE data frame is an extension of the standard Ethernet frame, adding time-trigger related fields to support time synchronization and deterministic scheduling. The TTE data frame usually includes: a standard Ethernet header, TTE specific fields, a data payload, and a frame check sequence.
[0044] The shunt module is used to perform frame shunting on the network data, so that the synchronization frames enter the fault injection module.
[0045] Specifically, the shunt module identifies the synchronization frame according to the frame type field and shunts the synchronization frame to the fault injection module. Additionally, different service frame processing methods can be selected according to different test scenarios. When only testing the time synchronization function of the device, the service frames can be discarded without any processing; when it is necessary to test both the service function and the time synchronization function simultaneously, the service frames can be shunted to other processing modules or transmission paths within the test device through the shunt module, so as to complete the corresponding service functions. At this time, a data selection output module can be introduced to sort and select the service frames and response synchronization frames that need to be output, and then output them respectively through the second data interface.
[0046] The test configuration module is used to obtain the fault injection configuration information and generate a fault injection instruction according to the fault injection configuration information and send it to the fault injection module.
[0047] In one implementation, the upper computer generates the fault injection configuration information, and the test configuration module obtains the fault injection configuration information through a Peripheral Component Interconnect Express (PCIE) interface. As Figure 3 shown, the fault injection configuration information includes: fault type, fault frequency, number of faults, fault input port, and fault output port. It can be understood that the fault input port and the fault output port are ports of the test device.
[0048] The test configuration module generates a fault injection instruction according to the fault injection configuration information, which means parsing the fault injection configuration information according to a pre-agreed rule and translating it into a fault injection instruction executable by the fault injection module.
[0049] The fault injection module is used to perform fault injection on the received synchronization frame according to the fault injection instruction and output the fault-injected synchronization frame to the time synchronization module.
[0050] Here, by performing fault injection on the synchronization frame, abnormal scenarios that may occur during data transmission (such as frame loss, delay, and tampering) can be simulated, so as to test whether the behavior of the time synchronization function under fault conditions meets the design expectations, and thus evaluate its fault tolerance. Here, the fault injection types can include: tampering with the frame type field, extending the frame residence time, tampering with the synchronization information field, and modifying the frame length.
[0051] Specifically, taking the example of tampering with the synchronization frame content in a TTE network based on the AS6802 time synchronization protocol to simulate a transparent clock anomaly for illustration. In a stable TTE network, synchronization frame interactions occur in each basic cycle. When the transparent clock in the synchronization frame field sent from the synchronization host to the compression host undergoes an abnormal change, it will cause two effects:
[0052] The first is that the abnormal change exceeds the maximum transmission delay. At this time, the time point calculated by the fixed function in the time synchronization logic is a negative number, so it will cross the boundary to an absolutely unreachable time point, making it impossible to complete the time synchronization function normally, and even causing the synchronization state machine to freeze.
[0053] The second type is the abnormal change to less than or equal to the maximum transmission delay. At this time, the calculated solidification time point will be offset, but because the AS6802 time synchronization protocol has a fault tolerance window, the solidification time point within the fault tolerance window will participate in the time synchronization process, thereby affecting the time synchronization accuracy of the TTE network. The solidification time points outside the fault tolerance window will be received through a new observation window, and the number of observation windows will be determined according to the window opening principle. The compressed time point obtained after calculation will be screened according to the optimal frame selection principle.
[0054] The time synchronization module is used to implement the network time synchronization protocol function according to the fault injection synchronization frame, and output a response synchronization frame to the fault injection module according to the fault injection synchronization frame.
[0055] The main function of the network time synchronization protocol is to keep the time of each device in the network consistent, and ensure that the operations between different nodes in the distributed system are consistent and coordinated in time. In this embodiment, the network time synchronization protocol can be the AS6802 time synchronization protocol or the Precision Time Protocol (PTP). The Precision Time Protocol adopts a master-slave clock architecture, and can achieve high-precision time synchronization in a local area network through hardware timestamp technology and precise clock synchronization algorithm. It can keep the slave clock highly synchronized with the master clock by accurately measuring and compensating for network delays. The AS6802 time synchronization protocol has been improved and expanded on the basis of the Precision Time Protocol, introduced a global time reference, added a fault-tolerant mechanism, and adopted a fully distributed clock synchronization algorithm. Through functional components such as message solidification, compression and clustering detection, high-precision and high-fault-tolerant time synchronization is achieved, which can keep the nodes in the network consistent in time within microsecond accuracy. The AS6802 time synchronization protocol plays an important role in the fields of flight control systems, avionics equipment, automated production lines for industrial control, industrial robot control, and automotive automatic driving systems and power control systems.
[0056] It can be understood that the time synchronization module implements the network time synchronization protocol function according to the fault injection synchronization frame, and the operation is the same as that of the time synchronization module implementing the network time synchronization protocol function according to the normal synchronization frame. Compared with the normal synchronization frame, since pre-configured faults are injected into the fault injection synchronization frame, when the time synchronization module implements the network time synchronization protocol function according to the fault injection synchronization frame, the time synchronization function may be abnormal due to the fault. Therefore, through fault injection, the fault tolerance of the time synchronization function to this fault can be verified.
[0057] Similarly, the time synchronization module outputs the response synchronization frame according to the fault injection synchronization frame, which is actually the same as the time synchronization module outputting the response synchronization frame after implementing the network time synchronization protocol function according to the normal synchronization frame.
[0058] That is to say, the key point of the implementation of the time synchronization module in the present invention lies in: the consistency between the time synchronization behavior and the network time synchronization protocol function and whether the network time synchronization function can be normally implemented, rather than implementing the enhanced fault tolerance function not designed in the network time synchronization protocol.
[0059] In practice, the time synchronization module can be implemented by using an IP core or a Register Transfer Level (RTL) implementation.
[0060] The fault injection module is also used to perform fault injection on the received response synchronization frame according to the fault injection instruction to obtain a fault injection response synchronization frame.
[0061] Here, the response synchronization frame received by the fault injection module is output by the time synchronization module. The method of the fault injection module performing fault injection on the received response synchronization frame is similar to the method of performing fault injection on the synchronization frame output by the shunt module, so it will not be elaborated here.
[0062] It can be understood that when the fault injection configuration information does not set to perform fault injection on the response synchronization frame, the fault injection module does not perform fault injection on the response synchronization frame, but directly outputs it to the second data interface.
[0063] The second data interface is used to output the fault injection response synchronization frame.
[0064] Specifically, the second data interface converts the fault injection response synchronization frame into a physical signal and then outputs it to other nodes in the network.
[0065] The synchronization status monitoring module is used to monitor the working status of the time synchronization module to obtain status monitoring information, so as to evaluate the fault tolerance of the time synchronization function according to the status monitoring information.
[0066] Specifically, the synchronization status monitoring module is used for:
[0067] By monitoring the execution status, reception and transmission time points, and frame content of the fault injection synchronization frame in the time synchronization module, it is determined whether the time synchronization module is in an abnormal state, and status monitoring information is obtained. Here, the format of the status monitoring information is as Figure 4 shown, including synchronization frame content, behavior, time point, status, and abnormal event. Among them, the behavior refers to the transmission or reception behavior of the synchronization frame; the status is the status information of the time synchronization module during the time synchronization process; the abnormal event is the category of abnormal events that occur during the time synchronization process.
[0068] Exemplarily, taking the monitoring of the working status of the time synchronization module of devices in the TTE network as an example. When the time synchronization module receives a fault injection synchronization frame, first, it is determined whether an abnormality occurs according to the reception time point of the fault injection synchronization frame. If there is a deviation between the arrival time of the received fault injection synchronization frame and the reception window, it is determined that a first status abnormal event occurs; secondly, it is determined whether there is an abnormal frame content through the frame content of the fault injection synchronization frame. If the received frame content does not match the expectation, it is considered that a second status abnormal event occurs; finally, during the process of the time synchronization module processing the fault injection synchronization frame, if the processing state machine makes an abnormal jump, it is determined that a third status abnormal event occurs. The synchronization status monitoring module collects and records the frame content and abnormal situation information of each interaction to obtain status monitoring information.
[0069] In the embodiment of the present invention, the fault tolerance of the time synchronization function is evaluated according to the status monitoring information. The specific evaluation basis may include: whether the behavior of the time synchronization function under fault conditions conforms to the design expectation, that is, whether the time synchronization function can identify the abnormality in the fault injection synchronization frame, so as to convert it into an omitted fault, not execute the time synchronization function according to the fault injection synchronization frame, and the output response synchronization frame is normal. Of course, it is not limited to this.
[0070] In one embodiment, as Figure 2 shown, the above device may further include: a synchronization logic strengthening module;
[0071] The synchronization logic strengthening module is used for:
[0072] Strengthen the synchronization logic of the fault injection synchronization frame output by the fault injection module, so that the time synchronization module realizes the network time synchronization protocol function according to the synchronized and strengthened fault injection synchronization frame;
[0073] Strengthen the synchronization logic of the response synchronization frame output by the time synchronization module, so that the fault injection module performs fault injection on the received response synchronization frame with strengthened synchronization logic.
[0074] In one implementation, the synchronization logic hardening includes: executing a Central Guard Inspection Mechanism (CGIM) and performing learning and prediction on synchronization frames. Among them, the Central Guard Inspection Mechanism (CGIM) includes: performing CRC verification and secondary encryption verification on the fault injection synchronization frames output by the fault injection module, and performing secondary encryption on the response synchronization frames output by the time synchronization module. The encryption algorithm can be an asymmetric hashing encryption algorithm; performing learning and prediction on synchronization frames includes performing timing analysis and prediction on the response synchronization frames output by the time synchronization module. When the response synchronization frame does not match the expected response synchronization frame, the output of the response synchronization frame is truncated, thereby converting the time synchronization fault in the network into an omission fault and implementing a self-detection mechanism.
[0075] It can be understood that when the fault tolerance of the time synchronization function cannot meet the requirements, the synchronization logic hardening module can strengthen the time synchronization logic on the basis of the time synchronization module, thereby improving the fault tolerance of the time synchronization function.
[0076] At the same time, through the independent design of the synchronization logic hardening module, this solution realizes the decoupling of the synchronization logic hardening module and the time synchronization module, so that this solution has higher flexibility, and it is possible to choose whether to apply the synchronization logic hardening module and select an appropriate synchronization logic hardening method.
[0077] In one embodiment, as Figure 2 shown, the above device may further include: a status reporting module;
[0078] The status reporting module is used to convert the format of the status monitoring information and report it to the host computer, so as to realize the evaluation of the fault tolerance of the time synchronization function in the host computer.
[0079] Specifically, the status reporting module converts the status monitoring information into a format adapted to the PCIE interface and reports it to the host computer periodically or aperiodically. The host computer performs the evaluation of the fault tolerance of the time synchronization function based on the status monitoring information. The specific evaluation basis is: whether the behavior of the time synchronization function under fault conditions conforms to the design expectation, that is, whether the time synchronization function can convert the fault injection synchronization frame into an omission fault and output a normal synchronization frame.
[0080] It can be understood that by reporting the status monitoring information to the host computer through the status reporting module and having the host computer implement the evaluation of the fault tolerance of the time synchronization function, the fault tolerance test process and results can be made more transparent and intuitive, so that it is easier to discover problems in the design and perform corresponding analysis and modification.
[0081] In one embodiment, as Figure 2 shown, the above device may further include: a storage module;
[0082] A storage module for storing status monitoring information;
[0083] A status reporting module, specifically used to read the status monitoring information from the storage module, perform format conversion, and then report it to the host computer.
[0084] Specifically, the storage module may include: a memory controller sub-module and a memory sub-module.
[0085] Among them, the memory controller sub-module is used to write the status monitoring information into the memory sub-module by partition or read the status monitoring information from the memory sub-module. The memory sub-module is used to store the status monitoring information by partition. The memory controller sub-module divides different address spaces for storing the status monitoring information of different behaviors and different states. When the storage space of a partition is full and not read in time, it retreats to the first address of the partition address space to start writing, and at the same time reports an information overwrite signal to the host computer.
[0086] It can be understood that the storage module first stores the status monitoring information generated by the status monitoring module, and then the status reporting module reports it to the host computer. Through such an implementation method, offline analysis of fault tolerance test data can be realized, the real-time requirement for the device can be reduced, and the traceability of the test process can be enhanced.
[0087] In one embodiment, the above device is applied to an FPGA.
[0088] Specifically, refer to Figure 1 and Figure 2 , and all the modules therein can be implemented by defining modules with corresponding functions in the FPGA. The specific definition method can refer to the specific implementation of customizing modules in the FPGA in the relevant prior art (such as instantiating existing modules to build more complex modules, using IP cores, or using hardware description languages for design, etc.), which will not be elaborated in the present invention.
[0089] In one embodiment, the above FPGA is applied to a network card device, a switch device, or a bridge device. That is to say, the fault injection and fault tolerance test device based on the network time synchronization protocol provided by the embodiments of the present invention can be applied to a network card device, a switch device, or a bridge device, but is not limited thereto.
[0090] It can be understood that when the above device is applied to a network card device, a switch device, or a bridge device, the time synchronization module is the time synchronization module in the network card device, the switch device, or the bridge device.
[0091] The fault injection fault tolerance testing device based on the network time synchronization protocol provided by the present invention includes a first data interface, a shunt module, a test configuration module, a fault injection module, a time synchronization module, a synchronization status monitoring module, and a second data interface. The fault injection module injects faults into the synchronization frame according to the fault injection configuration information to simulate the possible fault types during the data transmission process, so as to test the fault tolerance of the time synchronization function; through the synchronization status monitoring module, the functional status of the time synchronization module is monitored in real time, so as to judge whether the function of the time synchronization module is abnormal under the condition of fault injection, and evaluate the fault tolerance of the time synchronization function accordingly.
[0092] The present invention realizes the synchronization logic reinforcement function through the synchronization logic reinforcement module, so that when the fault tolerance does not meet the requirements, the fault tolerance can be further improved through synchronization logic reinforcement.
[0093] The present invention realizes the fault tolerance testing of devices with time synchronization function through hardware logic, making up for the limitations of the original theoretical analysis and software simulation, making the fault tolerance testing effect more reliable, and providing a more reliable reference basis for the design of devices with time synchronization function.
[0094] It should be noted that the terms "first", "second", etc. are used to distinguish similar objects and do not necessarily need to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present invention described here can be implemented in an order different from those illustrated or described here. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present invention.
[0095] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. means that the specific features or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification.
[0096] Although the present invention has been described in connection with various embodiments, those skilled in the art will understand and realize other variations of the disclosed embodiments by viewing the accompanying drawings and the disclosure during the implementation of the claimed invention. In the description of the present invention, the term "comprising" does not exclude other components or steps, the indefinite article "a" or "an" does not exclude a plurality, and "plurality" means two or more unless specifically defined otherwise. In addition, certain measures are described in different embodiments, but this does not mean that these measures cannot be combined to produce good results.
[0097] The above content is a further detailed description of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can be made, and all should be regarded as belonging to the protection scope of the present invention.
Claims
1. A fault injection fault tolerance test device based on the network time synchronization protocol, characterized in that Including: A first data interface, a shunt module, a test configuration module, a fault injection module, a time synchronization module, a synchronization status monitoring module, and a second data interface; The first data interface is used to receive network data; the network data includes service frames and synchronization frames; The shunt module is used to perform frame shunting on the network data, so that the synchronization frames enter the fault injection module; The test configuration module is used to obtain fault injection configuration information and generate a fault injection instruction according to the fault injection configuration information and send it to the fault injection module; The fault injection module is used to perform fault injection on the received synchronization frames according to the fault injection instruction and output the fault-injected synchronization frames to the time synchronization module; The time synchronization module is used to implement the network time synchronization protocol function according to the fault-injected synchronization frames and output response synchronization frames to the fault injection module according to the fault-injected synchronization frames; The fault injection module is further used to perform fault injection on the received response synchronization frames according to the fault injection instruction to obtain fault-injected response synchronization frames; The second data interface is used to output the fault-injected response synchronization frames; The synchronization status monitoring module is used to monitor the working status of the time synchronization module to obtain status monitoring information, so as to evaluate the fault tolerance of the time synchronization function according to the status monitoring information.
2. The fault injection fault tolerance test device based on the network time synchronization protocol according to claim 1, characterized in that The device further includes: a synchronization logic reinforcement module; The synchronization logic reinforcement module is used for: Performing synchronization logic reinforcement on the fault-injected synchronization frames output by the fault injection module, so that the time synchronization module implements the network time synchronization protocol function according to the fault-injected synchronization frames after synchronization logic reinforcement; Performing synchronization logic reinforcement on the response synchronization frames output by the time synchronization module, so that the fault injection module performs fault injection on the received response synchronization frames after synchronization logic reinforcement.
3. The fault injection tolerance test device based on the network time synchronization protocol according to claim 1, wherein The device further includes: a status reporting module; The status reporting module is used to convert the format of the status monitoring information and report it to the host computer, so as to evaluate the fault tolerance of the time synchronization function in the host computer.
4. The fault injection fault tolerance test device based on the network time synchronization protocol according to claim 3, characterized in that The device further includes: a storage module; The storage module is used to store the status monitoring information; The status reporting module is specifically used to read the status monitoring information from the storage module, convert the format, and report it to the host computer.
5. The fault injection fault tolerance test device based on the network time synchronization protocol according to claim 1, characterized in that The synchronization status monitoring module is specifically used for: By monitoring the execution status, reception and transmission time points, and frame content of the reception and transmission behavior of the fault-injected synchronization frames in the time synchronization module, it is determined whether the time synchronization module is in an abnormal state to obtain status monitoring information.
6. The fault injection tolerance testing device based on the network time synchronization protocol according to claim 2, wherein The synchronization logic reinforcement includes: executing a central guard inspection mechanism CGIM and learning and predicting synchronization frames.
7. The fault injection fault tolerance test device based on the network time synchronization protocol according to claim 1, characterized in that The fault injection configuration information includes: fault type, fault frequency, number of faults, fault input port, and fault output port.
8. The fault injection fault tolerance test device based on the network time synchronization protocol according to any one of claims 1 to 7, characterized in that, The device is applied to an FPGA.
9. The fault injection fault tolerance test device based on the network time synchronization protocol according to claim 8, characterized in that The FPGA is applied to a network card device, a switch device, or a bridge device.
Citation Information
Patent Citations
Fault traffic injection method for airborne network reliability evaluation
CN104486104A
Device for testing clock synchronization correction value of time-triggered Ethernet by capturing protocol control frame
CN106059701A
AS6802 synchronization frame transparent transmission system and method in TTE switch
CN113114590A
Method for realizing client synchronization function in AS6802 protocol based on FPGA
CN119449217A
METHOD AND DEVICE FOR ERROR-TOLERANT ETHERNET TIME SYNCHRONIZATION
DE102021105683A1