Diode structure and manufacturing method thereof

Abstract

The invention relates to a diode structure and a manufacturing method thereof, the diode structure comprises at least a Schottky diode units, at least b bipolar diode units and a plurality of isolation groove structures, and the Schottky diode units and the adjacent bipolar diode units are insulated and isolated by one isolation groove structure; each Schottky diode unit comprises a first cathode contact region and a second cathode contact region; a first N-type region; the first anode is in Schottky contact with the first N-type region; each bipolar diode unit comprises a second cathode contact region; a second N-type region; and an anode contact region; the a Schottky diodes and the b bipolar diodes are connected in parallel to form a target diode. The reverse recovery time and the conduction current of the target diode can be adjusted by adjusting the number, the width and the like of the Schottky diodes and the bipolar diodes which are connected in parallel.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a diode structure and a manufacturing method thereof. Background Art

[0002] Due to the bipolar conduction characteristic of bipolar diodes, the reverse recovery speed is very slow. While Schottky diodes have no reverse recovery problem due to unipolar conduction, but the current density is low because there is no large injection problem in the drift region. For some circuit application scenarios, a diode that can balance a short reverse recovery time and a large on-state current density is required. Summary of the Invention

[0003] Based on this, it is necessary to provide a diode structure and a manufacturing method thereof that can balance a short reverse recovery time and a large on-state current.

[0004] A diode structure includes at least a Schottky diode units, at least b bipolar diode units, and a plurality of isolation trench structures. The Schottky diode units and the adjacent bipolar diode units are insulated and isolated by one of the isolation trench structures, where a and b are positive integers; each of the Schottky diode units includes: a first cathode contact region, which is an N-type doped region; a first N-type region; and a first anode, and the first anode forms a Schottky contact with the first N-type region; each of the bipolar diode units includes: a second cathode contact region, which is an N-type doped region; a second N-type region; and an anode contact region, which is a P-type doped region; wherein, the conduction channel length directions of the Schottky diode units are parallel to the conduction channel length directions of the bipolar diode units and perpendicular to the connection direction between the adjacent Schottky diode units and bipolar diode units. The first cathode contact regions of the a Schottky diode units are electrically connected to the second cathode contact regions of the b bipolar diode units, and the first anodes of the a Schottky diode units are electrically connected to the anode contact regions of the b bipolar diode units, thereby forming a target diode composed of a Schottky diodes and b bipolar diodes connected in parallel.

[0005] In the above diode structure, the Schottky diode units and the bipolar diode units are arranged side by side. The reverse recovery time and the on-state current magnitude of the target diode can be adjusted by adjusting the number and width of the Schottky diodes and bipolar diodes connected in parallel in the target diode (the width direction is the connection direction between the adjacent Schottky diode units and bipolar diode units), etc.

[0006] In one embodiment, the diode structure is a silicon-on-insulator structure, which includes a substrate, a buried insulating layer on the substrate, and a top semiconductor layer on the buried insulating layer. The first cathode contact region, the first N-type region, the second cathode contact region, the second N-type region, and the anode contact region are located in the top semiconductor layer. The isolation trench structure includes an insulating dielectric filled in the trench, and the bottom of the insulating dielectric extends to the buried insulating layer.

[0007] In one embodiment, the top height of the insulating dielectric is the same as the top heights of the top semiconductor layers on both sides.

[0008] In one embodiment, the Schottky diode unit further includes a P-type region in the first N-type region, and the P-type region is located between the position where the first anode forms a Schottky contact with the first N-type region and the first cathode contact region.

[0009] In one embodiment, the bipolar diode unit further includes a P-well in the top semiconductor layer, the anode contact region is located in the P-well, and the doping concentration of the anode contact region is greater than that of the P-well.

[0010] In one embodiment, the bottom of the P-well extends to the buried insulating layer.

[0011] In one embodiment, the diode structure further includes a field oxide layer. One side of the field oxide layer extends to one side of the P-well close to the field oxide layer and one side of the P-type region close to the field oxide layer; the other side of the field oxide layer extends to one side of the first cathode contact region close to the field oxide layer and one side of the second cathode contact region close to the field oxide layer.

[0012] In one embodiment, the Schottky diode unit further includes a first N-well, the first cathode contact region is located in the first N-well, and the doping concentration of the first cathode contact region is greater than that of the first N-well; the bipolar diode unit further includes a second N-well, the second cathode contact region is located in the second N-well, and the doping concentration of the second cathode contact region is greater than that of the second N-well.

[0013] In one embodiment, each of the Schottky diode units and each of the bipolar diode units are alternately arranged in a first direction, and the first direction is the direction of the conduction channel width of each of the Schottky diode units and each of the bipolar diode units.

[0014] A manufacturing method of a diode structure includes: obtaining a wafer formed with an N-type region; forming a plurality of isolation trench structures; each of the isolation trench structures divides the wafer to form at least a Schottky diode regions and at least b bipolar diode regions, and the N-type region is divided by each of the isolation trench structures into a first N-type region located in the Schottky diode region and a second N-type region located in the bipolar diode region; forming a first cathode contact region, a second cathode contact region and an anode contact region, the first cathode contact region and the second cathode contact region are N-type doped regions, the anode contact region is a P-type doped region, the first cathode contact region is formed in each of the Schottky diode regions, and the second cathode contact region and the anode contact region are formed in each of the bipolar diode regions; forming a first anode in each of the Schottky diode regions, and the first anode forms a Schottky contact with the first N-type region; electrically connecting the first cathode contact regions of a Schottky diode units to the second cathode contact regions of b bipolar diode units, and electrically connecting the first anodes of a Schottky diode units to the anode contact regions of b bipolar diode units, so as to form a target diode composed of a Schottky diodes in parallel with b bipolar diodes, and the conduction channel length directions of the Schottky diodes are parallel to the conduction channel length directions of the bipolar diodes and perpendicular to the connection direction between adjacent Schottky diodes and bipolar diodes.

[0015] The manufacturing method of the above diode structure is easy to be compatible with the BCD process platform. The Schottky diode regions and the bipolar diode regions are arranged side by side, and the reverse recovery time and the conduction current magnitude of the target diode can be adjusted by adjusting the number and width of the Schottky diodes and bipolar diodes in parallel in the target diode. Description of the Drawings

[0016] To better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, one or more drawings may be referred to. Additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the currently described embodiments and / or examples, and the currently understood best mode of these inventions.

[0017] Figure 1 is a schematic top view of a diode structure in an embodiment of the present application.

[0018] Figure 2 is a schematic diagram showing that the Schottky diode units and the bipolar diode units are arranged alternately in an embodiment of the present application.

[0019] Figure 3 is Figure 2 a partial view of.

[0020] Figure 4a is alongFigure 3 Cross-sectional view along line A-A' in Figure 4b is a cross-sectional view along Figure 3 line B-B' in Figure 4c is a cross-sectional view along Figure 3 line C-C' in

[0021] Figure 5 is a flowchart of a method for manufacturing a diode structure according to an embodiment of the present application. Detailed implementation manners

[0022] To facilitate the understanding of the present invention, the present invention will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided so that the disclosure of the present invention is thorough and comprehensive.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which the present invention belongs. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0024] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Thus, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be denoted as the second element, component, region, layer or part.

[0025] Spatial relationship terms such as "under", "below", "lower", "beneath", "above", "upper", etc. may be used herein for convenience of description to describe the relationship of one element or feature shown in the figures with other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are also intended to include different orientations of the device in use and operation. For example, if the device in the drawings is flipped, then an element or feature described as "under other elements" or "beneath them" or "below them" will be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0026] The purpose of the terms used herein is only to describe specific embodiments and not to limit the present invention. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the associated listed items.

[0027] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the invention. Thus, variations from the shapes shown are to be expected due to, for example, manufacturing techniques and / or tolerances. Accordingly, embodiments of the present invention should not be limited to the particular shapes of regions shown herein but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as rectangular will typically have rounded or curved features at its edges and / or an implantation concentration gradient, rather than a binary change from the implanted region to the non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions shown in the figures are substantially schematic, and their shapes are not intended to show the actual shape of the regions of the device and are not intended to limit the scope of the present invention.

[0028] The semiconductor field vocabulary used herein is common technical vocabulary for those skilled in the art. For example, for P-type and N-type impurities, to distinguish the doping concentration, simply P+ type represents P-type with a high doping concentration, P type represents P-type with a medium doping concentration, P- type represents P-type with a low doping concentration, N+ type represents N-type with a high doping concentration, N type represents N-type with a medium doping concentration, and N- type represents N-type with a low doping concentration.

[0029] The present application provides a diode structure, which includes a novel fast-recovery diode. The novel fast-recovery diode combines the advantages of a bipolar diode and a Schottky diode. By adjusting the widths and area ratio numbers of the Schottky diode region and the bipolar diode region in the photolithography mask layout of the diode structure, the current and reverse recovery time of the novel fast-recovery diode can be adjusted.

[0030] Figure 1 is a schematic top view of the diode structure in an embodiment of the present application. Figure 1 shows the layout of each Schottky diode region, bipolar diode region, and isolation trench structure 30. The diode structure includes at least a Schottky diode units, at least b bipolar diode units, and a plurality of isolation trench structures 30. Each Schottky diode unit is located in the Schottky diode region, each bipolar diode unit is located in the bipolar diode region, and adjacent Schottky diode units and bipolar diode units are insulated and isolated by an isolation trench structure 30. a and b are positive integers. Figure 1 The ellipsis in indicates that a number of Schottky diode units, bipolar diode units, and isolation trench structures 30 are omitted.

[0031] See Figure 2 , in an embodiment of the present application, each Schottky diode unit and each bipolar diode unit are alternately arranged in the first direction. The isolation trench structure 30 is located between adjacent Schottky diode units and bipolar diode units to insulate and isolate adjacent Schottky diode units and bipolar diode units. The first direction is the direction of the conduction channel width of each Schottky diode unit and each bipolar diode unit (i.e., Figure 2 the Y-axis direction in).

[0032] Figure 3 is Figure 2 a partial view of Figure 4a is a cross-sectional view along the A-A' line in Figure 3 ; Figure 4b is a cross-sectional view along the B-B' line in Figure 3 ; Figure 4c is a cross-sectional view along the C-C' line in Figure 3 . See Figure 4a , each bipolar diode unit includes a second N-type region 112, a second cathode contact region 122, and an anode contact region 124, thus forming a bipolar diode. The second cathode contact region 122 is an N-type doped region, the anode contact region 124 is a P-type doped region, and the second N-type region 112 serves as the drift region of the bipolar diode. See Figure 4b, each Schottky diode unit includes a first N-type region 111, a first cathode contact region 121, and a first anode 132, thus forming a Schottky diode. The first cathode contact region 121 is an N-type doped region, the first N-type region 111 serves as the drift region of the Schottky diode, and the first anode 132 forms a Schottky contact with the first N-type region 111. The conduction channel length direction of each Schottky diode unit is parallel to the conduction channel length direction of each bipolar diode unit ( Figure 1 the X-axis direction in Figure 1 ), and perpendicular to the connection direction between adjacent Schottky diode units and bipolar diode units ( Figure 1 the Y-axis direction in

[0033] ). The first cathode contact regions 121 of a Schottky diode units are electrically connected to the second cathode contact regions 122 of b bipolar diode units, and the first anodes 132 of a Schottky diode units are electrically connected to the anode contact regions 124 of b bipolar diode units, thus forming a target diode composed of a Schottky diodes and b bipolar diodes connected in parallel. a and b are positive integers, and a and b can be equal or unequal.

[0033] In the above diode structure, the Schottky diode units and the bipolar diode units are arranged side by side. By adjusting the number and width of the Schottky diodes and bipolar diodes connected in parallel in the target diode, etc., the reverse recovery time and the on-state current magnitude of the target diode can be adjusted.

[0034] In an embodiment of the present application, the diode structure is a silicon-on-insulator (SOI) structure, including a substrate 10, an insulating buried layer 20 on the substrate 10, and a top semiconductor layer on the insulating buried layer 20. The first cathode contact region 121, the first N-type region 111, the second cathode contact region 122, the second N-type region 112, and the anode contact region 124 are located in the top semiconductor layer. In an embodiment of the present application, the isolation trench structure 30 includes an insulating medium filled in the trench, and the bottom of the insulating medium extends to the insulating buried layer 20, see Figure 4c . The top of the insulating medium reaches the top of the top semiconductor layer on both sides ( Figure 1 both sides in the Y-axis direction in

[0035] ), that is, the top height of the insulating medium is the same as the top height of the top semiconductor layer on both sides. The insulating medium can be an oxide, such as silicon dioxide.

[0035] In the Figure 4b shown embodiment, the Schottky diode unit further includes a P-type region 115 located in the first N-type region 111. The P-type region 115 is located between the position where the first anode 132 forms a Schottky contact with the first N-type region 111 and the first cathode contact region 121. The setting of the P-type region 115 can assist in depleting the first N-type region 111, thereby improving the breakdown voltage of the diode.

[0036] In the Figure 4aIn the illustrated embodiment, the bipolar diode unit further includes a P well 116 in the top semiconductor layer. The anode contact region 124 is located in the P well 116, and the doping concentration of the anode contact region 124 is greater than that of the P well 116. In an embodiment of the present application, the anode contact region 124 is a P+ region. In Figure 4a In the illustrated embodiment, the bottom of the P well 116 extends to the buried insulating layer 20.

[0037] In an embodiment of the present application, the diode structure further includes a field oxide layer 150. One side of the field oxide layer 150 extends to the side of the P well 116 close to the field oxide layer 150 (which is also the side of the P-type region 115 close to the field oxide layer 150); the other side of the field oxide layer 150 extends to the side of the first cathode contact region 121 close to the field oxide layer 150, (which is also the side of the second cathode contact region 122 close to the field oxide layer 150).

[0038] In Figure 4b In the illustrated embodiment, the Schottky diode unit further includes a first N well 113. The first cathode contact region 121 is located in the first N well 113. The doping concentration of the first cathode contact region 121 is greater than that of the first N well 113. In an embodiment of the present application, the first cathode contact region 121 is an N+ region.

[0039] In Figure 4a In the illustrated embodiment, the bipolar diode unit further includes a second N well 114. The second cathode contact region 122 is located in the second N well 114, and the doping concentration of the second cathode contact region 122 is greater than that of the second N well 114. In an embodiment of the present application, the second cathode contact region 122 is an N+ region.

[0040] The present application correspondingly provides a manufacturing method of a diode structure, which can be used to manufacture the diode structure described in any of the foregoing embodiments. Figure 5 FIG. is a flowchart of a manufacturing method of a diode structure in an embodiment of the present application, including the following steps:

[0041] S510, obtain a wafer formed with an N-type region.

[0042] The N-type region serves as the drift region of the Schottky diode unit and the bipolar diode unit.

[0043] In an embodiment of the present application, in step S510, an SOI wafer is first obtained. The SOI wafer includes a substrate 10, a buried insulating layer 20 on the substrate 10, and a top semiconductor layer on the buried insulating layer 20. Then, the top semiconductor layer is subjected to ion implantation (implanting N-type ions), and after well pushing, an N-type region located on the buried insulating layer 20 is formed.

[0044] S520, form a plurality of isolation trench structures.

[0045] In one embodiment of the present application, before step S520, there are further steps of forming a first N-well 113 and a second N-well 114 in the top semiconductor layer by photolithography and ion implantation (implanting N-type ions), and forming a P-well 116 and a P-type region 115 in the top semiconductor layer by photolithography and ion implantation (implanting P-type ions).

[0046] In one embodiment of the present application, step S520 includes forming a plurality of trenches by photolithography and etching, and then filling the trenches with an insulating medium to obtain a plurality of isolation trench structures 30. In one embodiment of the present application, an oxide layer can be deposited in the trenches by CVD (chemical vapor deposition) to form the isolation trench structures 30. Each isolation trench structure 30 divides the wafer into at least a Schottky diode regions and at least b bipolar diode regions. The N-type regions in the top semiconductor layer are divided by each isolation trench structure 30 into a first N-type region 111 located in the Schottky diode region and a second N-type region 112 located in the bipolar diode region. The first N-type region 111 serves as the drift region of the Schottky diode, and the second N-type region 112 serves as the drift region of the bipolar diode.

[0047] In one embodiment of the present application, after filling the trenches with the insulating medium, there is further a step of forming a field oxide layer 150 on the N-type regions.

[0048] S530, forming a first cathode contact region, a second cathode contact region, and an anode contact region.

[0049] The first cathode contact region 121, the second cathode contact region 122, and the anode contact region 124 are formed by photolithography and ion implantation processes. The first cathode contact region 121 and the second cathode contact region 122 are N-type doped regions, and the anode contact region 124 is a P-type doped region. The first cathode contact region 121 is formed in each Schottky diode region, and the second cathode contact region 122 and the anode contact region 124 are formed in each bipolar diode region. The doping concentration of the first cathode contact region 121 is greater than the doping concentration of the first N-well 113, the doping concentration of the second cathode contact region 122 is greater than the doping concentration of the second N-well 122, and the doping concentration of the anode contact region 124 is greater than the doping concentration of the P-well 116.

[0050] S540, forming a first anode in each Schottky diode region.

[0051] A Schottky metal layer is formed on the first N-type region 111 as the first anode 132. In one embodiment of the present application, the Schottky metal layer includes at least one metal among Ti, Pt, Ni, Cr, W, Mo, and Co.

[0052] S550, forming a target diode composed of a Schottky diodes connected in parallel with b bipolar diodes.

[0053] Electrically connect the first cathode contact regions 121 of a Schottky diode units to the second cathode contact regions 122 of b bipolar diode units, and electrically connect the first anodes 132 of the a Schottky diode units to the anode contact regions 124 of the b bipolar diode units, so as to form a target diode composed of a Schottky diodes and b bipolar diodes connected in parallel. The conductive channel length directions of the respective Schottky diodes are parallel to the conductive channel length directions of the respective bipolar diodes and perpendicular to the connection direction between adjacent Schottky diodes and bipolar diodes.

[0054] In an embodiment of the present application, an interlayer dielectric (ILD) layer covering the first N-type region 111, the second N-type region 112 and the field oxide layer 150 is formed on the front surface of the wafer, and by forming contact holes penetrating the interlayer dielectric layer and metal wirings on the interlayer dielectric layer, the first cathode contact regions 121 of the a Schottky diode units are short-circuited to the second cathode contact regions 122 of the b bipolar diode units, and the first anodes 132 of the a Schottky diode units are short-circuited to the anode contact regions 124 of the b bipolar diode units.

[0055] The manufacturing method of the above diode structure is easy to be compatible with the BCD (Bipolar-CMOS-DMOS) process platform. The Schottky diode region and the bipolar diode region are arranged side by side, and the reverse recovery time and the on-state current magnitude of the target diode can be adjusted by adjusting the number and width of the Schottky diodes and bipolar diodes connected in parallel in the target diode.

[0056] The manufacturing method of the diode structure of the present application and the diode structure are based on the same inventive concept. For the content not specifically described in the manufacturing method of the diode structure, reference can be made to the introduction of the diode structure above.

[0057] It should be understood that although the steps in the flowchart of the present application are sequentially shown according to the indication of the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps has no strict order limitation, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the present application may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same moment, but can be executed at different moments. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least a part of other steps or steps or stages in other steps.

[0058] In the description of this specification, the descriptions referring to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0059] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as within the scope described in this specification.

[0060] The above-described embodiments only express several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A diode structure, characterized in that, Including at least a Schottky diode units, at least b bipolar diode units, and a number of isolation trench structures, the Schottky diode units are insulated from adjacent bipolar diode units by one of the isolation trench structures, and a and b are positive integers; Each of the Schottky diode units includes: A first cathode contact region, which is an N-type doped region; A first N-type region; and A first anode, the first anode forming a Schottky contact with the first N-type region; Each of the bipolar diode units includes: A second cathode contact region, which is an N-type doped region; A second N-type region; and An anode contact region, which is a P-type doped region; Wherein, the conductive channel length directions of the Schottky diode units are parallel to those of the bipolar diode units, and perpendicular to the connection direction between adjacent Schottky diode units and bipolar diode units. The first cathode contact regions of the a Schottky diode units are electrically connected to the second cathode contact regions of the b bipolar diode units, and the first anodes of the a Schottky diode units are electrically connected to the anode contact regions of the b bipolar diode units, thereby forming a target diode composed of a parallel connection of a Schottky diodes and b bipolar diodes.

2. The diode structure according to claim 1, characterized in that, The diode structure is a silicon-on-insulator structure, the silicon-on-insulator structure includes a substrate, an insulating buried layer on the substrate, and a top semiconductor layer on the insulating buried layer. The first cathode contact region, the first N-type region, the second cathode contact region, the second N-type region, and the anode contact region are located in the top semiconductor layer. The isolation trench structure includes an insulating medium filled in a trench, and the bottom of the insulating medium extends to the insulating buried layer.

3. The diode structure according to claim 2, wherein The top height of the insulating medium is the same as the top heights of the top semiconductor layers on both sides.

4. The diode structure according to claim 2, wherein, The Schottky diode unit further includes a P-type region located in the first N-type region, and the P-type region is located between the position where the first anode forms a Schottky contact with the first N-type region and the first cathode contact region.

5. The diode structure according to claim 4, characterized in that, The bipolar diode unit further includes a P-well located in the top semiconductor layer, the anode contact region is located in the P-well, and the doping concentration of the anode contact region is greater than that of the P-well.

6. The diode structure according to claim 5, characterized in that, The bottom of the P-well extends to the insulating buried layer.

7. The diode structure according to claim 5, characterized in that, It further includes a field oxide layer, one side of the field oxide layer extends to one side of the P-well close to the field oxide layer and one side of the P-type region close to the field oxide layer; the other side of the field oxide layer extends to one side of the first cathode contact region close to the field oxide layer and one side of the second cathode contact region close to the field oxide layer.

8. The diode structure according to claim 1, characterized in that, The Schottky diode unit further includes a first N-well, the first cathode contact region is located in the first N-well, and the doping concentration of the first cathode contact region is greater than that of the first N-well; the bipolar diode unit further includes a second N-well, the second cathode contact region is located in the second N-well, and the doping concentration of the second cathode contact region is greater than that of the second N-well.

9. The diode structure according to claim 1, characterized in that, Each of the Schottky diode units and each of the bipolar diode units are alternately arranged in a first direction, which is the conduction channel width direction of each of the Schottky diode units and each of the bipolar diode units.

10. A manufacturing method of a diode structure, comprising: Obtaining a wafer formed with an N-type region; Forming a plurality of isolation trench structures; Each of the isolation trench structures divides the wafer to form at least a Schottky diode regions and at least b bipolar diode regions, and the N-type region is divided by each of the isolation trench structures into a first N-type region located in the Schottky diode regions and a second N-type region located in the bipolar diode regions; Forming a first cathode contact region, a second cathode contact region and an anode contact region, the first cathode contact region and the second cathode contact region are N-type doped regions, the anode contact region is a P-type doped region, the first cathode contact region is formed in each of the Schottky diode regions, and the second cathode contact region and the anode contact region are formed in each of the bipolar diode regions; Forming a first anode in each of the Schottky diode regions, and the first anode forms a Schottky contact with the first N-type region; Electrically connecting the first cathode contact regions of a Schottky diode units to the second cathode contact regions of b bipolar diode units, and electrically connecting the first anodes of a Schottky diode units to the anode contact regions of b bipolar diode units, so as to form a target diode composed of a Schottky diodes and b bipolar diodes connected in parallel, and the conduction channel length directions of each of the Schottky diodes are parallel to the conduction channel length directions of each of the bipolar diodes and perpendicular to the connection direction between adjacent Schottky diodes and bipolar diodes.

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