Mode-switchable tantalum oxide-based RRAM (Resistive Random Access Memory) and application

Abstract

The invention discloses a mode-switchable tantalum oxide-based RRAM (Resistance Random Access Memory) and application, and belongs to the field of semiconductor memory devices. The tantalum oxide-based RRAM comprises a top electrode, a Ta2O5 layer, a TaOx layer and a bottom electrode which are sequentially stacked from top to bottom, according to the tantalum oxide-based RRAM, the fracture position of the conductive filament can be controlled under different voltages, and the tantalum oxide-based RRAM can be switched between a bipolar memristor mode and a complementary resistance mode through different voltage thresholds. Signal input is adjusted in the read-write and calculation process, so that the RRAM device keeps a high resistance state of a complementary resistance mode when storing data, and sneak current interference is reduced; a bipolar memristor mode is maintained when data is read out, so that the problem of destructive reading out is avoided.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor memory devices, and particularly relates to a tantalum oxide-based RRAM with a switchable mode and its application. Background Art

[0002] Traditional resistive random access memory (RRAM) arrays have non-ideal factors (such as sneak current, parasitic current paths, destructive reading, etc.) in the integration of storage and computing, resulting in poor read and write performance, high energy consumption, and low reliability. Although the existing bipolar memristor has the advantage of non-destructive reading, its low resistance state is prone to cause sneak current; while the complementary resistive switch (CRS) device can suppress sneak current, but there is a problem of destructive reading, which requires an additional recovery operation, increasing energy consumption and complexity.

[0003] Therefore, a tantalum oxide-based RRAM with a switchable mode is proposed. Summary of the Invention

[0004] Aiming at the deficiencies of the prior art, the purpose of the present invention is to provide a tantalum oxide-based RRAM with a switchable mode and its application, which solves the problems in the prior art.

[0005] The purpose of the present invention can be achieved by the following technical solutions:

[0006] A tantalum oxide-based RRAM with a switchable mode includes, stacked from top to bottom: a top electrode, a Ta2O5 layer, a TaO x layer and a bottom electrode;

[0007] The tantalum oxide-based RRAM can control the fracture position of the conductive filament at different voltages, and through different voltage thresholds, realize the switching of the tantalum oxide-based RRAM between the bipolar memristor mode and the complementary resistance mode.

[0008] Further, the materials of the top electrode and the bottom electrode are both TiN.

[0009] Further, the thicknesses of the top electrode and the bottom electrode are both 20 nm, and the sum of the thicknesses of the Ta2O5 layer and the TaO x layer is 20 nm.

[0010] Further, the thickness of the Ta2O5 layer is 1 - 5 nm, and the thickness of the TaO x layer is 15 - 19 nm.

[0011] The signal design method of the above-mentioned switchable-mode tantalum oxide-based RRAM includes: by adjusting the signal input during reading, writing, and computing, the RRAM maintains a complementary resistance mode and a bipolar memristor mode respectively when storing data and reading data.

[0012] The application of the above-mentioned switchable-mode tantalum oxide-based RRAM in the training of deep learning networks.

[0013] A storage device includes the above-mentioned switchable-mode tantalum oxide-based RRAM.

[0014] A neuromorphic computing chip includes the above-mentioned switchable-mode tantalum oxide-based RRAM.

[0015] A computer includes the above-mentioned switchable-mode tantalum oxide-based RRAM.

[0016] The beneficial effects of the present invention:

[0017] 1. The RRAM device of the present invention uses a TiN / Ta2O5 / TaOx / TiN stacked structure and designs with an oxygen vacancy concentration gradient to achieve controllable fracture positions of conducting filaments (CFs) at different voltages. Through different voltage thresholds, it can be switched between the bipolar memristor mode and the complementary resistance mode.

[0018] 2. Based on the variable-mode RRAM device mentioned in the present invention, a signal design method is proposed. By adjusting the signal input during reading, writing, and computing, the RRAM device maintains a high-resistance state in the complementary resistance mode when storing and computing data to reduce the negative impact of sneak current; it maintains the bipolar memristor mode when reading data to avoid destructive readout problems. Description of the Drawings

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for description in the embodiments or the prior art. Obviously, for those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0020] Figure 1 It is the schematic diagram of the device model structure of the switchable-mode TiN / Ta2O5 / TaO x / TiN device and the functional relationships between the pre-factor σ0 of the conductivity of the conducting filaments in the dielectric layer, the conductance activation energy E AC , the thermal conductivity K of the conducting filaments th and the oxygen vacancy concentration n D ;

[0021] Figure 2 is the TiN / Ta2O5 / TaO with switchable modes x / TiN device, showing the variation of current with time and voltage in bipolar memristor mode and complementary resistor mode respectively;

[0022] Figure 3 is the TiN / Ta2O5 / TaO with switchable modes x / TiN device, showing the distribution map of oxygen vacancy concentration within one scanning voltage cycle in bipolar memristor mode and complementary resistor mode respectively;

[0023] Figure 4 is the design schematic diagram of read / write method for TiN / Ta2O5 / TaO x / TiN device with switchable modes;

[0024] Figure 5 is the TiN / Ta2O5 / TaO with switchable modes x / TiN device, showing the variation of conductance with pulse number under the pulse stimulation with a period of 200 microseconds for every 1000 times of changing direction in bipolar memristor mode and complementary resistor mode respectively;

[0025] Figure 6 is the TiN / Ta2O5 / TaO with switchable modes x / TiN device, showing the cumulative probability graph of the minimum conductance G min and the maximum conductance G max (G: device conductance) obtained from 1000 - time pulse switching tests on the device in bipolar memristor mode;

[0026] Figure 7 is the TiN / Ta2O5 / TaO with switchable modes x / TiN device, showing the variation of conductance with the number of storage pulses of the device and the ordinary Ta2O5 - based RRAM device in the array under the interference of non - ideal factors;

[0027] Figure 8 is on the simulated memristor array, showing the error rate variation with the number of training times for the digital recognition task training of the TiN / Ta2O5 / TaO x / TiN device with switchable modes and the ordinary Ta2O5 - based RRAM device, as well as the multiple training of the randomly initial states of the TiN / Ta2O5 / TaO x / TiN device with switchable modes in the array; Detailed implementation manners

[0028] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0029] As Figure 1 shown in (a) of [], a tantalum oxide-based RRAM with a switchable mode includes, from top to bottom in sequence: a top electrode, a Ta2O5 layer, a TaO x layer, and a bottom electrode; wherein, both the top electrode and the bottom electrode are made of TiN material.

[0030] Among them, the Ta2O5 layer: low oxygen vacancy concentration (~0.8×10 21 cm -3 ), serving as the "regulation layer" of the conductive filament. The TaO x layer: high oxygen vacancy concentration (~1.2×10 21 cm -3 ), serving as the "storage repository" of oxygen vacancies (V0), providing an abundant source of migrating ions. The electrode material is selected as TiN due to its high conductivity, thermal stability, and compatibility with the CMOS process.

[0031] In this embodiment, the thickness of both the top electrode and the bottom electrode is 20 nm, the thickness of the Ta2O5 layer is 4 nm, and the thickness of the TaO x layer is 16 nm. In other embodiments, the sum of the thicknesses of the Ta2O5 layer and the TaO x layer is 20 nm, the value range of the thickness of the Ta2O5 layer is 1 - 5 nm, and the value range of the thickness of the TaO x layer is 15 - 19 nm.

[0032] Next, the implementation process of the RRAM device will be analyzed;

[0033] In this embodiment, a multi-physics field numerical simulation method is used to simulate the entire process of RRAM formation, reset, and set starting from the initial state. Oxygen vacancies are expected to be evenly distributed throughout the oxide layer. Temperature (T), electric field (E), and oxygen vacancy concentration (n D ) all have the following effects on the conductivity of the oxide.

[0034] In this work, through physical field modeling of three partial differential equations (PDEs) and using finite element analysis means, the conductive process of oxygen vacancies in the TiN / Ta2O5 / TaO x / TiN device with a switchable mode is simulated.

[0035] (1) Ion migration model

[0036] The migration of oxygen ions is equivalent to the migration of oxygen vacancies, and its migration flux j d (cm -2 s -1 ) is given by the equation:

[0037]

[0038] where j diff and j drift represent the diffusion and drift fluxes; D represents the ion diffusion coefficient; the migration of oxygen vacancies is temperature-dependent and follows the Arrhenius law:

[0039]

[0040] where k is the Boltzmann constant and T is the temperature variable.

[0041] μ represents the ion mobility, and it satisfies the Einstein equation with the diffusion coefficient:

[0042]

[0043] where q is the elementary charge;

[0044]

[0045] where Ψ is the electric potential.

[0046] In summary, the continuity equation for drift-diffusion is:

[0047]

[0048] where E is the electric field strength.

[0049] (2) Electrical conduction model

[0050] The carrier continuity equation is expressed as:

[0051]

[0052] where σ is the conductivity of the conductive filament.

[0053] (3) Joule heat model

[0054] The heat conduction equation is:

[0055]

[0056] where T is the temperature variable and J is the current density vector.

[0057] In this model, it is assumed that TaO in the resistance layer xThe oxygen vacancies in the layer are highly concentrated, and the oxygen vacancy concentration is uniformly distributed, with a concentration of 1.2×10 21 cm -3 . However, the concentration in the Ta2O5 region is relatively low, and the oxygen vacancy concentration is assumed to be 0.8×10 21 cm -3 . The coefficients and parameter values of the multi-physics partial differential equations (PDEs) used in the model are as shown in Figure 1 and Table 1;

[0058] Table 1 Material parameters considered in the finite element simulation

[0059]

[0060] Among them, Figure 1 (b) in represents the functional relationship between the pre-exponential coefficient of conductivity σ0 and the local oxygen vacancy V O density n D ; Figure 1 (c) in represents the functional relationship between the assumed conduction activation energy E AC and the local oxygen vacancy V O density n D ; Figure 1 (d) in represents the functional relationship between the thermal conductivity k th and the local oxygen vacancy V O density n D .

[0061] Working principle:

[0062] When the excitation voltage is lower than the threshold voltage, the drift behavior of oxygen vacancies under the action of the electric field is not sufficient to dilute the oxygen vacancies in the TaO x substrate layer, so the CFs in this layer cannot be broken. The concentration of oxygen vacancies in the Ta2O5 layer is relatively low, and at this time, the drift of oxygen vacancies is sufficient to break the CFs. Therefore, the generation and recombination process of oxygen vacancies only occur near the Ta2O5 layer, making the device exhibit typical bipolar memristor switching characteristics. In this case, the TaO x substrate layer contains a high concentration of oxygen vacancies and can act as an infinite oxygen vacancy reservoir. On the other hand, when the excitation voltage is large enough, the oxygen vacancies in the TaO x substrate layer drift under the action of the electric field, resulting in a decrease in its oxygen vacancy concentration. The TaO x substrate layer can no longer act as an oxygen vacancy reservoir, which may lead to the generation and recombination process of oxygen vacancies in the TaO x substrate layer. Furthermore, the CFs in the TaO x substrate layer are broken, making the device exhibit typical complementary resistive switching behavior. This is the reason why the device can have two storage modes at the same time.

[0063] Example 2

[0064] In this embodiment, the tantalum oxide-based RRAM with a switchable mode mentioned in Embodiment 1 is simulated and tested to verify its superiority.

[0065] 1) Test the I-V characteristics of the TiN / Ta2O5 / TaO x / TiN device;

[0066] The testing process is as follows: Apply a scanning voltage with a fixed period of 0.2 seconds and gradually increasing to the device, and observe the change of its current within one period of the scanning voltage under the operation of a single switchable mode TiN / Ta2O5 / TaO x / TiN device.

[0067] The test results are as Figure 2 shown. Figure 2 (a) in it represents the I-V characteristics of the device in the bipolar memristor mode, Figure 2 (b) in it represents the I-V characteristics of the device in the complementary resistor (CRS) mode; it can be seen that when the scanning voltage is lower than 0.5V, the device exhibits typical bipolar memristive behavior. However, as the scanning voltage continues to increase, the device shows complementary resistor behavior. The specific switching thresholds are shown in Table 2 below.

[0068] 2) Observe the change of the oxygen vacancy concentration in the TiN / Ta2O5 / TaO x / TiN device under different working modes;

[0069] The testing process is as follows: Apply scanning voltages of 0.5V and 0.7V with a period of 0.2 seconds respectively to make the switchable mode TiN / Ta2O5 / TaO x / TiN device operate in two modes: the bipolar memristor mode and the complementary resistor mode, and observe the change of oxygen vacancies in the oxide layer of the device.

[0070] The test results are as Figure 3 shown. Figure 3 (a) and (b) in it respectively represent the device operating in the bipolar memristor mode and the complementary resistor mode; it can be seen that observe the CFs breaking and reforming behavior of the TiN / TaO x / Ta2O5 / TiN device. When the scanning voltage is low (0.5V), the breaking and reforming processes of the bipolar memristive behavior occur near the Ta2O5 interlayer interface. When the applied scanning voltage exceeds the threshold (0.7V), the CFs show different breaking positions under the scanning voltages in the positive and negative directions. By comparing Figure 3As can be seen from (a) and (b) in [the figure], due to the influence of high voltage, the device exhibits a wider low-concentration oxygen vacancy gap in the complementary resistance mode. This means that during the CFs setting process, the concentration of oxygen vacancies at the fracture position is lower than that during bipolar memristive behavior. This reflects that the complementary resistance mode stores data with a higher resistance value, thereby reducing the sneak current in the cross-point array.

[0071] 3) The simulated pulse responses of the device in two modes;

[0072] The simulation process is as follows: Based on the finite element simulation method, the continuous operation of the switchable-mode device in the bipolar memristor mode and the complementary resistance mode was simulated. By applying pulse signals with different voltage amplitudes to the device, with a period of 200 microseconds and changing the pulse direction every 0.2 seconds, a relationship diagram between the device conductance and the number of pulses was obtained.

[0073] The simulation results are as Figure 5 shown, Figure 5 where (a) and (b) in [the figure] respectively represent the device operating in the bipolar memristor mode and the complementary resistance mode. To distinguish different storage states that exhibit the same conductance in the complementary resistance mode, when a negative pulse is applied, the conductance is defined as negative; it can be seen that in the complementary resistance mode, as the pulse direction changes, Figure 5 a conductance spike appears in (b) in [the figure]. This indicates that the device briefly turns on at this time and then quickly fractures the CFs at the lower end of the TaO x layer. Comparing Figure 5 the two figures (a) and (b) in [the figure], it can be seen that the device conductance has a low-resistance state (≈120 uS) in the bipolar memristor mode, while in the complementary resistance mode, the device is always in a high-resistance state (≤30 uS).

[0074] The device was tested for pulse switching in the bipolar memristor mode to obtain the cumulative probability diagrams of G min and G max ;

[0075] The test process is as follows: The device underwent 1000 consecutive fracture and recombination processes under pulses to analyze the stability of the device in the bipolar memristor mode, in order to determine G max and G min of the device when it is in the bipolar memristor mode in the array simulation, and to provide samples for the random variation of the device conductance update.

[0076] The test results are as Figure 6 shown. It can be seen from the figure that the average switching ratio is 21 times, and the switching ratio of 100% is greater than 10 times. Thus, it can be concluded that the designed device has excellent stability in the bipolar memristor mode and can be used as a good memristor device.

[0077] 5) Test the conductance of the test device in the array under the interference of non-ideal factors;

[0078] The test process is as follows: For the TiN / Ta2O5 / TaO x / TiN device with switchable mode and ordinary Ta2O5-based RRAM device, apply simulated storage tasks in the array to obtain the graph of the conductance of the device affected by non-ideal factors changing with the number of storage pulses.

[0079] Among them Figure 7 (a) and (b) in it respectively reflect the situation of the conductance of the switchable mode device and the ordinary bipolar Ta2O5 device of the present invention in the array being interfered by non-ideal factors; it can be seen that: compared with the bipolar memristor mode, the complementary resistance mode significantly suppresses the sneak current and interconnect voltage drop, and effectively reduces the influence of non-ideal factors. This optimization stems from the fact that the information in the complementary resistance mode is stored in the high-resistance state of the device, greatly reducing the data dependence and parasitic current path generated by partially selected devices.

[0080] 6) Simulate the task training of the devices on the memristor array;

[0081] The simulation process is as follows: A subset of the MNIST dataset (categories 0 and 1) is used, and the original MNIST 784 input dimension is reduced to 16 inputs through random projection. The digital classification task of DNN training is implemented on a 16 / 4 RRAM array. In this task, the recognition accuracies of the switchable mode device, the ordinary Ta2O5 memristor device, and the digital floating-point device (ideal device) are all tested. Then, the switchable mode device is trained for three different random initial state tasks to check the stability of the device accuracy.

[0082] Among them, Figure 8 (a) in it represents the training accuracies of the switchable mode device, the ordinary Ta2O5 device, and the digital floating-point device (ideal device); Figure 8 (b) in it represents training three times starting from different random initial states to test the stability of the device accuracy; it can be seen that: the ordinary Ta2O5 memristor device only reaches 90% of the test accuracy, far lower than the floating-point (FP) simulation baseline (99%). Obviously, the accuracy of this device training is extremely unstable, indicating that the device array is not stable enough in terms of task training memory. However, the switchable mode device shows convergent repeatability under different random initial weights and significantly improves the best accuracy to 98%, comparable to the FP baseline. The results of the switchable mode device array show that the switchable mode TiN

[0083] / Ta2O5 / TaO xThe / TiN device shows great advantages in terms of training accuracy. This means that the switchable-mode device has proven its excellent performance in practice while reducing the influence of non-ideal factors such as leakage current.

[0084] Example 3

[0085] For the switchable-mode TiN / Ta2O5 / TaO x / TiN device mentioned in Example 1, in this example, a hybrid signal scheme combining high-resistance state storage in complementary resistance mode and non-destructive reading in bipolar memristor mode is proposed. This signal design effectively solves the problem of destructive reading of traditional complementary resistance switching devices while retaining its advantage of suppressing leakage current.

[0086] Based on the switchable-mode TiN / Ta2O5 / TaO x / TiN device, its signal design method includes: solving the problem of non-ideal factors existing in the memristor device in the array through different working states of the above-designed memristor device under different working voltages. The general idea is to adjust the signal input during the read-write and calculation processes so that the device maintains the high-resistance state in complementary resistance mode when storing data to avoid the generation of sneak current; and maintains the bipolar memristor mode when reading data to avoid the problem of destructive reading.

[0087] The working principle diagram of the designed device is as shown in Figure 4 (a). In the write operation, by using a high threshold voltage, the device is maintained in the complementary resistance mode when storing data in the array to maintain the high-resistance state of all devices in the array. During the read process, the switchable-mode TiN / Ta2O5 / TaO x / TiN device will have a problem of destructive reading if it is in the complementary resistance mode, as shown in Figure 4 (b). At a high read voltage (such as V + th,2 ), the array will clear the internal data. The switchable-mode characteristic of the device can be utilized, as shown in Figure 4 (c), and the lower threshold voltage V of the bipolar memristor mode is used + th,1 to read the array. At this time, the '0'-state devices in the complementary resistance mode in the array will switch to the low-resistance state in the bipolar memristor mode, while the '1'-state devices in the complementary resistance mode will still maintain their original high-resistance state. At this time, the device feeds back different signals to distinguish the data it stores. After that, a uniform V - th1 signal is applied to the array to make the devices in the low-resistance state in the bipolar memristor mode return to the high-resistance state of the '0'-state in the complementary resistance mode.

[0088] In this embodiment, the threshold voltages of different working modes are shown in Table 2 as follows:

[0089] Table 2 Threshold voltages of the device operating in bipolar memristor mode and complementary resistor mode

[0090]

[0091] In the description of this specification, the descriptions with reference to terms such as "one embodiment", "example", "specific example", etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0092] The foregoing has shown and described the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments, and what is described in the above embodiments and the specification is only to illustrate the principle of the present invention. Without departing from the spirit and scope of the present invention, the present invention will also have various changes and improvements, and these changes and improvements fall within the scope of the present invention claimed.

Claims

1. A tantalum oxide-based RRAM with a switchable mode, characterized in that, Comprising, stacked from top to bottom: a top electrode, a Ta2O5 layer, a TaO x layer, and a bottom electrode; The tantalum oxide-based RRAM can control the breaking position of the conductive filament at different voltages and switch between the bipolar memristor mode and the complementary resistor mode of the tantalum oxide-based RRAM through different voltage thresholds.

2. The tantalum oxide-based RRAM with a switchable mode according to claim 1, wherein The materials of the top electrode and the bottom electrode are both TiN.

3. The tantalum oxide-based RRAM with a switchable mode according to claim 1, characterized in that, The thicknesses of both the top electrode and the bottom electrode are 20 nm, and the sum of the thicknesses of the Ta2O5 layer and the TaO x layer is 20 nm.

4. The tantalum oxide-based RRAM with a switchable mode according to claim 3, characterized in that, The thickness of the Ta2O5 layer is 1 - 5 nm, and the TaO x layer has a thickness of 15 - 19 nm.

5. A signal design method for a switchable-mode tantalum oxide-based RRAM according to any one of claims 1-4, characterized in that, Comprising: By adjusting the signal input during the reading, writing, and computing processes, the RRAM maintains the complementary resistor mode and the bipolar memristor mode respectively when storing data and reading data.

6. Application of the switchable-mode tantalum oxide-based RRAM according to any one of claims 1-4 in the training of a deep learning network.

7. A storage device, characterized in that, Comprising the switchable-mode tantalum oxide-based RRAM according to any one of claims 1-4.

8. A neuromorphic computing chip, characterized in that, Comprising the switchable-mode tantalum oxide-based RRAM according to any one of claims 1-4.

9. A computer, characterized in that, Comprising the switchable-mode tantalum oxide-based RRAM according to any one of claims 1-4.

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