Protection circuit for power switch
By establishing a parallel current path between the control terminal of the transistor and the ground and between the voltage output, the coordination of the control signal and the voltage signal is solved, and the problem of difficult to disconnect the transistor when there is no power connection and large leakage current in the low power mode is achieved, and more efficient circuit operation is achieved.
Patent Information
- Application Number
- CN202480005730.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-08-25
- Filing Date
- 2024-01-31
- Publication Date
- 2025-07-25
AI Technical Summary
In existing circuits, transistors are difficult to keep disconnected when there is no power connection, and the leakage current is too high in low power mode, affecting the power efficiency.
The first and second protection circuit systems are used to establish parallel current paths between the control terminals of the transistor and the ground and between the voltage output, respectively. Through the combination of the control signal and the voltage signal, the transistor is ensured to be disconnected when there is no power connection and to reduce leakage current in low power mode.
Effectively keep the transistor disconnected when there is no power connection, reducing current consumption in low-power mode and improving circuit efficiency.
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Figure CN120380701A_ABST
Abstract
Description
BACKGROUND OF THE INVENTION
[0001] Many modern devices include various circuits. Some circuits include a switch between a power source and a load to connect and disconnect the power source from the load. Connecting the power source to the load through the switch allows current to be provided from the power source to the load, thereby powering the load. A transistor (e.g., a metal oxide semiconductor field effect transistor (MOSFET)) can be used as a switch by controlling the voltage at a control terminal (e.g., a gate electrode) of the transistor. SUMMARY OF THE INVENTION
[0002] In one example, a circuit includes a first voltage input, a second voltage input, and a voltage output. A transistor is coupled between the first voltage input and the voltage output in a first current path. The first current path includes the first voltage input, a first terminal of the transistor, a second terminal of the transistor, and the voltage output. A first circuitry is coupled between the second voltage input and the control terminal of the transistor in a first control path and is coupled between the voltage output and the control terminal of the transistor in a second control path. The first control path includes the second voltage input, a first terminal of the first circuitry, a third terminal of the first circuitry, and the control terminal of the transistor. The second control path includes the voltage output, a second terminal of the first circuitry, the third terminal of the first circuitry, and the control terminal of the transistor. A second circuitry is coupled between the control terminal of the transistor and ground in a second current path and is coupled between the control terminal of the transistor and ground in a third current path parallel to the second current path. The second current path includes the control terminal of the transistor, a first terminal of the second circuitry, a third terminal of the second circuitry, and ground. The third current path includes the control terminal of the transistor, a second terminal of the second circuitry, the third terminal of the second circuitry, and ground. A third circuitry is coupled between the control terminal of the transistor and the voltage output in a fourth current path. The fourth current path includes the control terminal of the transistor, a first terminal of the third circuitry, a second terminal of the third circuitry, and the voltage output.
[0003] In one example, a circuit includes a first voltage input, a second voltage input, a first control signal input, a second control signal input, and a voltage output. A first transistor is coupled between the first voltage input and the voltage output in a first current path. The first current path includes the first voltage input, a first terminal of the first transistor, a second terminal of the first transistor, and the voltage output. A second transistor includes a first terminal coupled to the second voltage input, a second terminal coupled to a control terminal of the first transistor, and a control terminal coupled to the first control signal input. A third transistor includes a first terminal coupled to the control terminal of the first transistor, a second terminal coupled to the voltage output, and a control terminal coupled to the first control signal input. A fourth transistor is coupled between the control terminal of the first transistor and ground in both a second current path and a third current path parallel to the second current path. The second current path and the third current path include the control terminal of the first transistor, a first terminal of the fourth transistor, a second terminal of the fourth transistor, and ground. The fourth transistor includes a control terminal coupled to the second control signal input. A fifth transistor is coupled between the control terminal of the first transistor and the first terminal of the fourth transistor in the second current path. The second current path further includes a first terminal of the fifth transistor and a second terminal of the fifth transistor. A sixth transistor is coupled between the control terminal of the first transistor and the first terminal of the fourth transistor in the third current path. The third current path further includes a first terminal of the sixth transistor and a second terminal of the sixth transistor. A seventh transistor is coupled between the control terminal of the first transistor and the voltage output in a fourth current path. The fourth current path includes the control terminal of the first transistor, a first terminal of the seventh transistor, a second terminal of the seventh transistor, and the voltage output. An eighth transistor is coupled between ground and the voltage output in a fifth current path. The fifth current path includes ground, a first terminal of the eighth transistor, a second terminal of the eighth transistor, and the voltage output. The eighth transistor includes a control terminal coupled to a control terminal of the seventh transistor. A ninth transistor is coupled between ground and the first terminal of the eighth transistor in the fifth current path. The fifth current path further includes a first terminal of the ninth transistor and a second terminal of the ninth transistor.
[0004] In one example, a system includes a controller, a voltage source, a voltage converter, a load circuitry, and a switching circuitry. The controller includes a first output and a second output. The voltage converter includes an input and an output. The input of the voltage converter is coupled to the voltage source. The load circuitry includes an input. The switching circuitry is coupled to the controller, the voltage source, the voltage converter, and the load circuitry. The switching circuitry includes a first voltage input, a second voltage input, a voltage output, a first control signal input, a second control signal input, a first transistor, a transistor control circuitry, a first protection circuitry, and a second protection circuitry. The first voltage input is coupled to the voltage source. The second voltage input is coupled to the output of the voltage converter. The voltage output is coupled to the input of the load circuitry. The first control signal input is coupled to the first output of the controller. The second control signal input is coupled to the second output of the controller. The first transistor is coupled between the first voltage input and the voltage output in a first current path. The first current path includes the first voltage input, a first terminal of the first transistor, a second terminal of the first transistor, and the voltage output. The transistor control circuitry is coupled between the second voltage input and a control terminal of the first transistor in a first control path, and is coupled between the voltage output and the control terminal of the first transistor in a second control path. The transistor control circuitry includes a control terminal coupled to the first control signal input. The first control path includes the second voltage input, a first terminal of the transistor control circuitry, a third terminal of the transistor control circuitry, and the control terminal of the first transistor. The second control path includes the voltage output, a second terminal of the transistor control circuitry, the third terminal of the transistor control circuitry, and the control terminal of the first transistor. The first protection circuitry is coupled between the control terminal of the first transistor and ground in a second current path, and is coupled between the control terminal of the first transistor and ground in a third current path parallel to the second current path. The first protection circuitry includes a control terminal coupled to the second control signal input. The second current path includes the control terminal of the first transistor, a first terminal of the first protection circuitry, a third terminal of the first protection circuitry, and ground. The third current path includes the control terminal of the first transistor, a second terminal of the first protection circuitry, the third terminal of the first protection circuitry, and ground. The second protection circuitry is coupled between the control terminal of the first transistor and the voltage output in a fourth current path. The second protection circuitry includes a control terminal coupled to the voltage output.The fourth current path includes the control terminal of the first transistor, a first terminal of the second protection circuitry, a second terminal of the second protection circuitry, and the voltage output. BRIEF DESCRIPTION OF THE DRAWINGS
[0005] Figure 1 are circuit diagrams of some examples of a switching circuit.
[0006] Figure 2 corresponds to Figure 1 is an example timing diagram of the circuit.
[0007] Figure 3 is a circuit diagram of some examples of a system including a circuit including Figure 1 .
[0008] Figure 4 are circuit diagrams of some other examples of a switching circuit.
[0009] Figure 5A and Figure 5B are circuit diagrams of some other examples of a switching circuit.
[0010] Figure 6 are top views of some examples of an integrated chip including a transistor device.
[0011] Figure 7 corresponds to Figure 5A and Figure 5B is an example timing diagram of the circuit.
[0012] Identical reference numerals or other reference indicators are used in the drawings to denote (functionally and / or structurally) identical or similar features. DETAILED DESCRIPTION
[0013] The following description provides many different examples for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the description. The drawings are not drawn to scale.
[0014] Figure 1The circuit diagram of some examples of the switching circuit 100. The circuit 100 includes a first voltage input 102, a second voltage input 104, a first control signal input 134, a second control signal input 128, and a voltage output 106. The first transistor 108 is coupled between the first voltage input 102 and the voltage output 106 in the first current path 110. The transistor 108 includes a first terminal 108a, a second terminal 108b, and a control terminal 108c. The first current path 110 includes the first voltage input 102, the first terminal 108a of the transistor 108, the second terminal 108b of the transistor 108, and the voltage output 106. The transistor 108 is configured to selectively couple the first voltage input 102 to the voltage output 106 such that current can flow from the first voltage input 102 to the voltage output 106 via the first current path 110.
[0015] The first transistor control circuitry 112 is coupled to the control terminal 108c of the transistor 108. More specifically, the first transistor control circuitry 112 is coupled between the second voltage input 104 and the control terminal 108c of the transistor 108 in the first control path 114 (e.g., the first pull-up path). In addition, the first transistor control circuitry 112 is coupled between the voltage output 106 and the control terminal 108c of the transistor 108 in the second control path 116 (e.g., the first pull-down path). The first transistor control circuitry 112 includes a first terminal 112a, a second terminal 112b, a third terminal 112c, and a control terminal 112d. The first control path 114 includes the second voltage input 104, the first terminal 112a of the first transistor control circuitry 112, the third terminal 112c of the first transistor control circuitry 112, and the control terminal 108c of the transistor 108. The second control path 116 includes the voltage output 106, the second terminal 112b of the first transistor control circuitry 112, the third terminal 112c of the first transistor control circuitry 112, and the control terminal 108c of the transistor 108. The control terminal 112d of the first transistor control circuitry 112 is coupled to the first control signal input 134.
[0016] The transistor control circuitry 112 is configured to receive a first control signal (e.g., Figure 2 the first control signal 202) from the first control signal input 134 at the control terminal 112d. The first transistor control circuitry 112 is configured to selectively couple the control terminal 108c of the transistor 108 to the second voltage input 104 (via the first control path 114) or the voltage output 106 (via the second control path 116) based on the first control signal.
[0017] For example, when the first control signal is high, the first transistor control circuitry 112 couples the second voltage input 104 to the control terminal 108c of the transistor 108 via the first control path 114 (e.g., the first transistor control circuitry 112 pulls up the control terminal 108c). Accordingly, the voltage at the control terminal 108c of the transistor 108 is high, as shown, for example Figure 2 as in. In response, the transistor 108 turns on, such that the first voltage input 102 is coupled to the voltage output 106. Accordingly, the voltage at the voltage output 106 is high. Conversely, when the first control signal is low, the first transistor control circuitry 112 couples the voltage output 106 to the control terminal 108c of the transistor 108 via the second control path 116 (e.g., the first transistor control circuitry 112 pulls down the control terminal 108c). Accordingly, the voltage at the control terminal 108c of the transistor 108 is low, as shown, for example Figure 2 as in. In response, the transistor 108 turns off, such that the first voltage input 102 is not coupled to the voltage output 106. Accordingly, the voltage at the voltage output 106 is low.
[0018] One challenge for the circuit is to ensure that the transistor 108 remains off when not coupled to the power supply of the circuit 100 (e.g., when there is no voltage at both the first voltage input 102 and the second voltage input 104, and when no signal is received at the control terminal 112d, such that the transistor control circuitry 112 neither couples the second voltage input 104 nor the voltage output 106 to the control terminal 108c). In some circuits, a protection resistor (not shown) is coupled between the control terminal 108c of the transistor 108 and the voltage output 106 to passively couple the control terminal 108c of the transistor 108 to the voltage output 106, such that the transistor 108 remains off when no power is coupled to the circuit 100.
[0019] However, using a protection resistor (not shown) to passively couple the control terminal 108c of transistor 108 to voltage output 106 makes operation in the low-power mode challenging (e.g., when transistor 108 is turned on and the total current consumed by a power supply (not shown) is less than about 10 microamps, less than about 8 microamps, less than about 6 microamps, or some other suitable value). For example, when transistor 108 is turned on, the difference between the voltage at the control terminal 108c of transistor 108 and the voltage at voltage output 106 (e.g., gate-to-source voltage Vgs) is greater than zero. Due to this non-zero voltage difference, current leaks from the control terminal 108c to voltage output 106 through a protection resistor (not shown). This leakage current may cause the power supply (not shown) to consume more current than is allowed during the low-power mode. Thus, a low-power mode may not be achievable when a protection resistor (not shown) is coupled between control terminal 108c and voltage output 106.
[0020] In various examples of the present specification, circuit 100 includes a first protection circuitry 120 and a second protection circuitry 130 for ensuring that transistor 108 remains off when not coupled to a power supply of circuit 100 without hindering the low-power mode.
[0021] The first protection circuitry 120 is coupled between the control terminal 108c of transistor 108 and ground 122 in a second current path 124. Additionally, the first protection circuitry 120 is coupled between the control terminal 108c of transistor 108 and ground 122 in a third current path 126. The third current path 126 is parallel to the second current path 124. The first protection circuitry 120 includes a first terminal 120a, a second terminal 120b, a third terminal 120c, and a control terminal 120d. The second current path 124 includes the control terminal 108c of transistor 108, the first terminal 120a of the first protection circuitry 120, the third terminal 120c of the first protection circuitry 120, and ground 122. The third current path 126 includes the control terminal 108c of transistor 108, the second terminal 120b of the first protection circuitry 120, the third terminal 120c of the first protection circuitry 120, and ground 122. The control terminal 120d of the first protection circuitry 120 is coupled to the second control signal input 128.
[0022] The second protection circuit system 130 is coupled between the control terminal 108c of the transistor 108 and the voltage output 106 in the fourth current path 132. The second protection circuit system 130 includes a first terminal 130a, a second terminal 130b, and a control terminal 130c. The fourth current path 132 includes the control terminal 108c of the transistor 108, the first terminal 130a of the second protection circuit system 130, the second terminal 130b of the second protection circuit system 130, and the voltage output 106. The control terminal 130c of the second protection circuit system 130 is coupled to the voltage output 106.
[0023] The first protection circuit system 120 is configured to receive a second control signal (e.g., Figure 2 the second control signal 204) from the second control signal input 128 at the control terminal 120d. The first protection circuit system 120 is configured to selectively couple the control terminal 108c of the transistor 108 to ground 122 (via the second current path 124 and the third current path 126) based on the second control signal and the voltage at the control terminal 108c of the transistor 108. The second protection circuit system 130 is configured to selectively couple the control terminal 108c of the transistor 108 to the voltage output 106 (via the fourth current path 132) based on the voltage at the voltage output 106.
[0024] For example, when the second control signal (at the control terminal 120d of the first protection circuit system 120) is high and the voltage at the control terminal 108c of the transistor 108 is non-negative (e.g., when no power supply is coupled to the circuit 100), the first protection circuit system 120 is turned on and the second protection circuit system 130 is turned off, as shown, for example, in Figure 2 . Thus, the control terminal 108c of the transistor 108 is coupled to ground 122 (via the second current path 124 and the third current path 126), but not to the voltage output 106, and thus the voltage at the control terminal 108c of the transistor 108 is low. In response, the transistor 108 is turned off. Thus, when no power supply is coupled to the circuit 100, the first protection circuit system 120 can ensure that the transistor 108 remains off.
[0025] When the voltage at voltage output 106 (and at the control terminal 130c of the second protection circuitry 130) is negative (e.g., during a circuit test such as a direct power injection (DPI) test), the first protection circuitry 120 is turned off and the second protection circuitry 130 is turned on. Accordingly, the control terminal 108c of the transistor is coupled to voltage output 106, but not to ground 122, and thus the difference between the voltage at the control terminal 108c of transistor 108 and the voltage at voltage output 106 is substantially zero. In response, transistor 108 turns off. Thus, when the voltage at voltage output 106 is negative, the second protection circuitry 130 ensures that transistor 108 remains off.
[0026] When the second control signal is low (e.g., when transistor 108 is on in normal power mode or low power mode) and the voltage at voltage output 106 is non - negative, the first protection circuitry 120 is turned off and the second protection circuitry 130 is turned off, as shown, for example, Figure 2 In response, the control terminal 108c of transistor 108 is not coupled to ground 122 through the first protection circuitry 120, nor is it coupled to voltage output 106 through the second protection circuitry 130. Accordingly, current leakage from the control terminal 108c to ground 122 or to voltage output 106 can be eliminated, and thus the power supply current consumption requirements for the low power mode can be met (e.g., less than about 10 micro - amperes, less than about 8 micro - amperes, less than about 6 micro - amperes, or some other suitable value). In some instances, the low power mode can be enabled when the load at voltage output 106 is low to increase the efficiency of the circuit.
[0027] Figure 2 is an example timing diagram of circuit 100 corresponding to Figure 1 as shown.
[0028] Refer to Figure 1 and Figure 2 During normal on - mode (e.g., when a power supply (not shown) is coupled to circuit 100, transistor 108 will be on and there is no power current limit), the first control signal 202 is high. In response, the first transistor control circuitry 112 couples the second voltage input 104 to the control terminal 108c via the first control path 114 (e.g., pulls the control terminal 108c up to the second voltage input 104). Accordingly, the voltage at the control terminal 108c of transistor 108 is high. In response, transistor 108 turns on, and thus the first voltage input 102 is coupled to voltage output 106. Accordingly, the voltage at voltage output 106 is high. Additionally, the second control signal 204 is low. Thus, the first protection circuitry 120 is turned off. Additionally, since the voltage at voltage output 106 is non - negative, the second protection circuitry 130 is turned off.
[0029] During normal disconnection mode (e.g., when a power supply (not shown) is coupled to circuit 100, transistor 108 will be disconnected and there is no power current limit), the first control signal 202 is low. In response, the first transistor control circuitry 112 couples the voltage output 106 to the control terminal 108c via the second control path 116 (e.g., pulls the control terminal 108c down to the voltage output 106). Accordingly, the voltage at the control terminal 108c of transistor 108 is low. In response, transistor 108 is disconnected, so the first voltage input 102 is not coupled to the voltage output 106. Thus, the voltage at the voltage output 106 is low. Additionally, the second control signal 204 is high. Since the second control signal 204 is high and the voltage at the control terminal 108c of transistor 108 is non-negative, the first protection circuitry 120 is turned on. Additionally, since the voltage at the voltage output 106 is non-negative, the second protection circuitry 130 is turned off.
[0030] During low power mode (e.g., when a power supply (not shown) is coupled to circuit 100, transistor 108 will be turned on and the amount of current consumed by the power supply must be less than about 10 microamps, less than about 8 microamps, less than about 6 microamps, or some other suitable value), the first control signal 202 is high. In response, the first transistor control circuitry 112 couples the second voltage input 104 to the control terminal 108c via the first control path 114 (e.g., pulls the control terminal 108c up to the second voltage input 104). Accordingly, the voltage at the control terminal 108c of transistor 108 is high. In response, transistor 108 is turned on, such that the first voltage input 102 is coupled to the voltage output 106. Thus, the voltage at the voltage output 106 is high. Additionally, the second control signal 204 is low. Accordingly, the first protection circuitry 120 is turned off. Additionally, since the voltage output is non-negative, the second protection circuitry 130 is turned off.
[0031] In some cases, a negative voltage may be applied at the voltage output 106 (e.g., during a circuit test such as a direct power injection (DPI) test or some other circuit test). During this negative output voltage mode (e.g., when the voltage at the voltage output 106 is negative, the power supply is coupled to circuit 100 and transistor 108 will be disconnected), transistor 108 may be briefly turned on. Since the voltage at the voltage output 106 is negative, the second protection circuitry 130 is turned on. In response, the control terminal of the transistor 108c is coupled to the voltage output 106 via the fourth current path 132. Accordingly, the difference between the voltage at the control terminal 108c of transistor 108 and the voltage at the voltage output (e.g., the gate-to-source voltage Vgs) drops to approximately zero. In response, transistor 108 is disconnected.
[0032] During the sleep mode (e.g., when power is coupled to circuit 100, transistor 108 will be turned off and the current consumed by the power supply connected to the circuit must be less than 2 microamps, less than 1 microamp, or some other suitable value), the first control signal 202 is not available. Thus, transistor control circuitry 112 neither couples control terminal 108c to the second voltage input 104 nor couples control terminal 108c to the voltage output 106. The second control signal 204 remains available and is high. Since the second control signal 204 is high and the voltage at the control terminal 108c of transistor 108 is non - negative, the first protection circuitry 120 is turned on. In response, the control terminal 108c of transistor 108 is coupled to ground 122 via the second current path 124 and the third current path 126. Thus, the voltage at the control terminal 108c of transistor 108 is low. In response, the first transistor 108 turns off, such that the first voltage input 102 is not coupled to the voltage output 106. Thus, the voltage at the voltage output 106 is low. Additionally, since the voltage at the voltage output 106 is non - negative, the second protection circuitry 130 is turned off.
[0033] During the no - power mode (e.g., when power is not coupled to circuit 100 and transistor 108 will be turned off), the first control signal 202 is not available and thus transistor control circuitry 112 neither couples control terminal 108c to the second voltage input 104 nor couples control terminal 108c to the voltage output 106. The second control signal 204 remains available and is high. Since the second control signal 204 is high and the voltage at the control terminal 108c of transistor 108 is non - negative, the first protection circuitry 120 is turned on. In response, the control terminal 108c of transistor 108 is coupled to ground 122 via the second current path 124 and the third current path 126. Thus, the voltage at the control terminal 108c of transistor 108 is low. In response, the first transistor 108 turns off, such that the first voltage input 102 is not coupled to the voltage output 106. Thus, the voltage at the voltage output 106 is low. Additionally, since the voltage at the voltage output 106 is non - negative, the second protection circuitry 130 is turned off.
[0034] In some instances, the second control signal 204 is available during the sleep mode and the no - power mode because the second control signal 204 is generated using a power - on reset (POR) signal that is available regardless of the operating mode.
[0035] Figure 3 is a circuit diagram of some instances of system 300 that includes Figure 1 circuit 100. System 300 further includes a controller 302, a voltage source 304, a voltage converter 306, and a load circuitry 308.
[0036] The controller 302 (e.g., a microcontroller or some other suitable controller circuitry) includes a first output 302a and a second output 302b. The first output 302a of the controller 302 is coupled to the first control signal input 134 of the circuit 100. The second output 302b of the controller 302 is coupled to the second control signal input 128 of the circuit 100.
[0037] The voltage source 304 (e.g., a battery or some other suitable direct current (DC) voltage source) includes a first terminal 304a (e.g., a positive terminal) and a second terminal 304b (e.g., a negative terminal). The first terminal 304a is coupled to the first voltage input 102 of the circuit 100 and the voltage converter 306. In some instances, the second terminal 304b is coupled to ground 122.
[0038] The voltage converter 306 (e.g., a charge pump, a boost DC-to-DC converter, or some other suitable voltage conversion circuitry) includes an input 306a and an output 306b. The input 306a of the voltage converter 306 is coupled to the first terminal 304a of the voltage source 304. The output 306b of the voltage converter 306 is coupled to the second voltage input 104 of the circuit 100. In some instances, the voltage source 304 and the voltage converter 306 are part of a power supply.
[0039] The load circuitry 308 includes a first terminal 308a and a second terminal 308b. The first terminal 308a of the load circuitry 308 is coupled to the voltage output 106 of the circuit 100. In some instances, the second terminal 308b of the load circuitry 308 is coupled to ground 122. The load circuitry 308 may include, for example, resistors, inductors, and capacitors.
[0040] The controller 302 is configured to generate a first control signal (e.g., Figure 2 the first control signal 202 of Figure 2 and a second control signal (e.g.,
[0041] The voltage source 304 is configured to generate a first voltage (e.g., a DC voltage) at a first terminal 304a. The voltage converter 306 is configured to receive the first voltage (at input 306a) from the voltage source 304 and generate a second voltage that is greater than the first voltage (at output 306b). In some instances, the first voltage is in the range of about 3 volts to about 40 volts or some other suitable range. Additionally, the second voltage is about 8 volts higher than the first voltage, 10 volts higher than the first voltage, 12 volts higher than the first voltage, or some other suitable voltage.
[0042] The circuit 100 is configured to supply current to the load circuitry 308 by selectively coupling the voltage source 304 to the load circuitry 308 using the transistor 108.
[0043] Figure 4 is with Figure 1 A circuit diagram of some examples of the circuit 400 similar to the circuit 100, where the first transistor control circuitry 112, the first protection circuitry 120, and the second protection circuitry 130 include a plurality of transistors.
[0044] For example, the first transistor control circuitry 112 includes a second transistor 402 (e.g., a pull-up transistor) and a third transistor 404 (e.g., a pull-down transistor). The transistor 402 is coupled between the second voltage input 104 and the control terminal 108c of the transistor 108 in a first control path 114. The first control path includes the second voltage input 104, the first terminal 402a of the transistor 402, the second terminal 402b of the transistor 402, and the control terminal 108c of the transistor 108.
[0045] The transistor 404 is coupled between the voltage output 106 and the control terminal 108c of the transistor 108 in a second control path 116. The second control path 116 includes the voltage output 106, the first terminal 404a of the transistor 404, the second terminal 404b of the transistor 404, and the control terminal 108c of the transistor 108.
[0046] In some instances, the first transistor control circuitry 112 further includes an inverter 426. The input (not labeled) of the inverter 426 is coupled to the first control signal input 134. The control terminal 402c of the transistor 402 is coupled to the output (not labeled) of the inverter 426. Additionally, the control terminal 404c of the transistor 404 is coupled to the output (not labeled) of the inverter 426.
[0047] The inverter 426 is configured to receive a first control signal from the first control signal input 134 (e.g., Figure 7The first control signal 202). The inverter 426 inverts the first control signal and outputs the inverted first control signal. The transistors 402 and 404 are configured to receive the inverted first control signal from the inverter 426 at the control terminals 402c and 404c, respectively. The transistor 402 is configured to selectively couple the control terminal 108c of the transistor 108 to the second voltage input 104 (via the first control path 114) based on the (inverted) first control signal. The transistor 404 is configured to selectively couple the control terminal 108c of the transistor 108 to the voltage output 106 (via the second control path 116) based on the (inverted) first control signal.
[0048] For example, when the first control signal is high (when the inverted first control signal is low), the transistor 402 is turned on and the transistor 404 is turned off, as shown in, for example, Figure 7 shown. In response, the second voltage input 104 is coupled to the control terminal 108c of the transistor 108 via the first control path 114. Accordingly, the voltage at the control terminal 108c of the transistor is high. In response, the transistor 108 is turned on, such that the first voltage input 102 is coupled to the voltage output 106. Accordingly, the voltage at the voltage output 106 is high. Conversely, when the first control signal is low (when the inverted first control signal is high), the transistor 402 is turned off and the transistor 404 is turned on, as shown in, for example, Figure 7 shown. In response, the voltage output 106 is coupled to the control terminal 108c of the transistor 108 via the second control path 116. Accordingly, the voltage at the control terminal 108c is low. In response, the transistor 108 is turned off, and thus the first voltage input 102 is not coupled to the voltage output 106. Accordingly, the voltage at the voltage output 106 is low.
[0049] The first protection circuit system 120 includes a fourth transistor 406, a fifth transistor 408, a sixth transistor 410, and a first resistor 412. The transistor 406 is coupled between the control terminal 108c of the first transistor 108 and ground 122 in both the second current path 124 and the third current path 126. The control terminal 406c of the transistor 406 is coupled to the second control signal input 128.
[0050] The transistor 408 is coupled in the second current path 124 between the control terminal 108c of the transistor 108 and the first terminal 406a of the transistor 406. The control terminal 408c of the transistor 408 is coupled to the first terminal 408a of the transistor 408, such that the transistor 408 is a "diode-connected" transistor that allows unidirectional current flow from the control terminal 108c of the transistor 108 to ground 122.
[0051] The transistor 410 is coupled between the control terminal 108c of the first transistor 108 and the first terminal 406a of the transistor 406 in the third current path 126. The resistor 412 is coupled between the control terminal 108c of the transistor 108 and the first terminal 410a of the transistor 410 in the third current path 126. The control terminal 410c of the transistor 410 is coupled to the first terminal 410a of the transistor 410 (through the resistor 412), such that the transistor 410 is a "diode-connected" transistor that allows unidirectional current flow from the control terminal 108c of the transistor 108 to the ground 122.
[0052] The second current path 124 includes the control terminal 108c of the transistor 108, the first terminal 408a of the transistor 408, the second terminal 408b of the transistor 408, the first terminal 406a of the transistor 406, the second terminal 406b of the transistor 406, and the ground 122. The third current path 126 includes the control terminal 108c of the first transistor 108, the first terminal 412a of the resistor 412, the second terminal 412b of the resistor 412, the first terminal 410a of the transistor 410, the second terminal 410b of the transistor 410, the first terminal 406a of the transistor 406, the second terminal 406b of the transistor 406, and the ground 122.
[0053] The transistor 406 is configured to receive a second control signal (e.g., Figure 7 the second control signal 204) from the second control signal input 128 at the control terminal 406c of the transistor 406. The transistors 406, 408, and 410 are configured to selectively couple the control terminal 108c of the transistor 108 to the ground 122 (via the second current path 124 and the third current path 126) based on the second control signal and the voltage at the control terminal 108c of the transistor 108.
[0054] For example, when the second control signal (e.g., Figure 7 the second control signal 204) is high, the transistor 406 is turned on, as for example Figure 7As shown. When transistor 406 is turned on and the voltage at control terminal 108c is non - negative, transistors 408 and 410 are turned on (e.g., transistors 408 and 410 are forward - biased). When transistor 408 is turned on, the control terminal 108c of transistor 108 is coupled to ground 122 via the second current path 124. However, the voltage drop across transistor 408 is greater than zero. Thus, the voltage at the control terminal 108c of transistor 108 is greater than zero. To make the voltage at the control terminal 108c of transistor 108 closer to zero, transistor 410 is included in the first protection circuitry 120. Transistor 410 has a reduced voltage drop. For example, transistor 410 is a “natural” device with a voltage drop approximately equal to zero. When transistor 410 is turned on, the control terminal 108c of transistor 108 is coupled to ground 122 via the third current path 126, and thus the voltage at the control terminal 108c of transistor 108 is pulled down to approximately zero. Resistor 412 is included in the third current path 126 to limit the current in the third current path 126 to protect transistor 410. Thus, transistor 408 allows most of the current to flow from the control terminal 108c of transistor 108 to ground 122 (via the second current path 124), while transistor 410 allows a small portion of the current to flow from the control terminal 108c of transistor 108 to ground 122 (via the third current path 126). When the control terminal 108c of transistor 108 is coupled to ground 122, the voltage at the control terminal 108c of transistor 108 is low. In response, transistor 108 turns off, such that the first voltage input 102 is not coupled to the voltage output. Thus, the voltage at the voltage output 106 is low.
[0055] When the second control signal is low, transistor 406 turns off, and thus transistors 408 and 410 turn off, as for example Figure 7 shown. Thus, the control terminal 108c of transistor 108 is not coupled to ground 122.
[0056] In addition, when the voltage at the voltage output 106 is negative, transistors 408 and 410 turn off (e.g., reverse - biased), as for example Figure 7 shown. Thus, the control terminal 108c of transistor 108 is not coupled to ground 122.
[0057] The second protection circuitry 130 includes a seventh transistor 414, an eighth transistor 416, a second resistor 418, and a ninth transistor 420. Transistor 414 is coupled between the control terminal 108c of transistor 108 and the voltage output 106 in a fourth current path 132. The fourth current path includes the control terminal 108c of transistor 108, the first terminal 414a of transistor 414, the second terminal 414b of transistor 414, and the voltage output 106.
[0058] The transistor 416 is coupled between the voltage output 106 and the ground 122 in a fifth current path 424. A control terminal 416c of the transistor 416 is coupled to a first terminal 416a of the transistor 416 such that the transistor 416 is a "diode-connected" transistor that permits unidirectional current flow from the ground 122 to the voltage output 106. A control terminal 414c of the transistor 414 is coupled to the control terminal 416c of the transistor 416.
[0059] A resistor 418 is coupled between the first terminal 416a of the transistor 416 and the ground 122 in the fifth current path 424. A transistor 420 is coupled between a second terminal 418b of the resistor 418 and the ground 122 in the fifth current path 424. A control terminal 420c of the transistor 420 is coupled to a second terminal 420b of the transistor 420 such that the transistor 420 is a "diode-connected" transistor that permits unidirectional current flow from the ground 122 to the voltage output 106. In some examples, the transistor 420 forms a body diode 422 coupled between the second terminal 420b and the first terminal 420a of the transistor 420.
[0060] The fifth current path 424 includes the ground 122, the second terminal 420b of the transistor 420, the first terminal 420a of the transistor 420, the second terminal 418b of the resistor 418, the first terminal 418a of the resistor 418, the first terminal 416a of the transistor 416, the second terminal 416b of the transistor 416, and the voltage output 106.
[0061] The transistor 414 is configured to selectively couple the control terminal 108c of the transistor 108 to the voltage output 106 (via the fourth current path 132) based on the voltage at the voltage output 106. For example, when the voltage at the voltage output 106 is negative, the transistors 416 and 420 are turned on (e.g., the transistors 416 and 420 are forward biased). Thus, current can flow from the ground 122 to the voltage output 106 via the fifth current path 424. In response to the transistors 416 and 420 being turned on, the transistor 414 is turned on. Because the transistor 414 is turned on, the control terminal 108c of the transistor 108 is coupled to the voltage output 106. Thus, the voltage at the control terminal 108c of the transistor 108 is substantially equal to the voltage at the voltage output 106. In response, the transistor 108 is turned off such that the first voltage input 102 is not coupled to the voltage output 106.
[0062] Further, when the voltage at the voltage output 106 is non-negative, the transistors 416 and 420 are turned off (e.g., reverse biased), and thus the transistor 414 is turned off, as shown, for example, Figure 7 in. Thus, the control terminal 108c is not coupled to the voltage output 106.
[0063] During the low power mode, the second control signal is low and the voltage at the voltage output 106 is non - negative. In response, transistors 406, 408, 410, 416, 420, and 414 are turned off, such that the control terminal 108c is not coupled to the ground 122 nor to the voltage output 106. Thus, current leakage from the control terminal 108c to the ground 122 or to the voltage output 106 can be eliminated. Accordingly, the power - current consumption requirement of the low power mode can be met.
[0064] Although transistors 408, 410, 416, and 420 are referred to as "diode - connected transistors", it should be understood that in some instances, these transistors may alternatively be referred to as unidirectional current devices and / or may alternatively be diodes, etc.
[0065] Figure 5A and Figure 5B is a circuit diagram of some examples of a circuit 500 similar to the circuit 400 of Figure 4 wherein a tenth transistor 506 is coupled between a first voltage input 102 and a voltage output 106 in a sixth current path 507 parallel to a first current path 110.
[0066] The circuit 500 includes a first part 501a and a second part 501b. The first part 501a includes a first voltage input 102, a second voltage input 104, a first control signal input 134, a second control signal input 128, a voltage output 106, a transistor 108, a first transistor control circuitry 112 (including transistors 402, 404, and an inverter 426), a first protection circuitry 120 (including transistors 406, 408, 410, and a resistor 412), and a second protection circuitry 130 (including transistors 414, 416, a resistor 418, and a transistor 420), which are coupled together as described with reference to Figure 4 In addition, the first part 501a includes a first current path 110, a first control path 114, a second control path 116, a second current path 124, a third current path 126, a fourth current path 132, and a fifth current path 424, as described with reference to Figure 4
[0067] In short, the second part 501b is a copy of the first part 501a. More specifically, the second part 501b includes a first voltage input 102, a third voltage input 502, a third control signal input 505, a second control signal input 128, a voltage output 106, a tenth transistor 506, a second transistor control circuitry 504, a third protection circuitry 510, and a fourth protection circuitry 512.
[0068] The transistor 506 is coupled between the first voltage input 102 and the voltage output 106 in a sixth current path 507. The sixth current path 507 includes the first voltage input 102, a first terminal 506a of the transistor 506, a second terminal 506b of the transistor 506, and the voltage output 106. The sixth current path 507 is parallel to the first current path 110.
[0069] The second transistor control circuitry 504 includes an eleventh transistor 514 and a twelfth transistor 518. The transistor 514 is coupled between a third voltage input 502 and a control terminal 506c of the transistor 506 in a third control path 516 (e.g., a second pull-up path). The third control path 516 includes the third voltage input 502, a first terminal 514a of the transistor 514, a second terminal 514b of the transistor 514, and the control terminal 506c of the transistor 506. The transistor 518 is coupled between the voltage output 106 and the control terminal 506c of the transistor 506 in a fourth control path 520 (e.g., a second pull-down path). The fourth control path 520 includes the voltage output 106, a second terminal 518b of the transistor 518, a first terminal 518a of the transistor 518, and the control terminal 506c of the transistor 506.
[0070] In some examples, the second transistor control circuitry 504 further includes an inverter 548. An input (not labeled) of the inverter 548 is coupled to a third control signal input 505. A control terminal 514c of the transistor 514 is coupled to an output (not labeled) of the inverter 548. A control terminal 518c of the transistor 518 is coupled to an output (not labeled) of the inverter 548.
[0071] The third protection circuitry 510 includes a thirteenth transistor 522, a fourteenth transistor 528, a fifteenth transistor 530, and a third resistor 532. The transistors 528 and 522 are coupled between the control terminal 506c of the transistor 506 and ground 122 in a seventh current path 524. The seventh current path 524 includes the control terminal 506c of the transistor 506, a first terminal 528a of the transistor 528, a second terminal 528b of the transistor 528, a first terminal 522a of the transistor 522, a second terminal 522b of the transistor 522, and ground 122.
[0072] The resistor 532, the transistor 530, and the transistor 522 are coupled between the control terminal 506c of the transistor 506 and the ground 122 in the eighth current path 526. The eighth current path 526 includes the control terminal 506c of the transistor 506, the first terminal 532a of the resistor 532, the second terminal 532b of the resistor 532, the first terminal 530a of the transistor 530, the second terminal 530b of the transistor 530, the first terminal 522a of the transistor 522, the second terminal 522b of the transistor 522, and the ground 122.
[0073] The control terminal 522c of the transistor 522 is coupled to the second control signal input 128. The control terminal 528c of the transistor 528 is coupled to the first terminal 528a of the transistor 528, such that the transistor 528 is a "diode-connected" transistor that allows unidirectional current flow from the control terminal 108c of the transistor 108 to the ground 122 (via the seventh current path 524). The control terminal 530c of the transistor 530 is coupled to the first terminal 530a of the transistor 530 (through the resistor 532), such that the transistor 530 is a "diode-connected" transistor that allows unidirectional current flow from the control terminal 108c of the transistor 108 to the ground 122 (via the current path 526).
[0074] The fourth protection circuit system 512 includes a sixteenth transistor 534, a seventeenth transistor 538, a fourth resistor 542, and an eighteenth transistor 544. The transistor 534 is coupled between the control terminal 506c of the transistor 506 and the voltage output 106 in the ninth current path 536. The ninth current path 536 includes the control terminal 506c of the transistor 506, the first terminal 534a of the transistor 534, the second terminal 534b of the transistor 534, and the voltage output 106.
[0075] The transistor 538, the resistor 542, and the transistor 544 are coupled between the voltage output 106 and the ground 122 in the tenth current path 540. The tenth current path 540 includes the ground 122, the second terminal 544b of the transistor 544, the first terminal 544a of the transistor 544, the second terminal 542b of the resistor 542, the first terminal 542a of the resistor 542, the first terminal 538a of the transistor 538, the second terminal 538b of the transistor 538, and the voltage output 106. In some instances, the transistor 544 forms a body diode 546 coupled between the second terminal 544b and the first terminal 544a of the transistor 544.
[0076] The control terminal 534c of transistor 534 is coupled to the control terminal 538c of transistor 538. The control terminal 538c of transistor 538 is coupled to the first terminal 538a of transistor 538 such that transistor 538 is a "diode-connected" transistor that permits unidirectional current flow from ground 122 to voltage output 106 (via tenth current path 540). The control terminal 544c of transistor 544 is coupled to the second terminal 544b of transistor 544 such that transistor 544 is a "diode-connected" transistor that permits unidirectional current flow from ground 122 to voltage output 106 (via tenth current path 540).
[0077] In some example systems, a first voltage input 102 is coupled to a voltage source (e.g., Figure 3 voltage source 304), a second voltage input 104 is coupled to the output of a first voltage converter (e.g., Figure 3 output 306b of voltage converter 306), and a third voltage input 502 is coupled to the output of a second voltage converter (not shown) different from the first voltage converter. Additionally, a third control signal input 505 is coupled to the output of a controller (e.g., Figure 3 third output (not shown) of controller 302).
[0078] In some instances, transistors 108, 404, 406, 408, 410, 414, 416, 420, 506, 518, 522, 528, 530, 534, 538, 544 are n-channel metal oxide semiconductor field effect transistors (MOSFETs), and transistors 402, 514 are p-channel MOSFETs. Although Figure 4 , Figure 5A and Figure 5B the transistors shown in
[0079] are illustrated and described as MOSFETs, in some other instances, the transistors may alternatively be corresponding bipolar junction transistors (BJTs), junction field effect transistors (JFETs), or some other suitable transistors.
[0080] Figure 6is a top view of an example of an integrated chip that includes transistor 108 and transistor 506. Transistor 108 includes a channel 602 that extends between a first source / drain region 604a and a second source / drain region 604b. A first gate electrode 606 extends over the channel 602. The first source / drain region 604a is coupled to a first voltage input 102 and forms a first terminal 108a of transistor 108. The second source / drain region 604b is coupled to a voltage output 106 and forms a second terminal 108b of transistor 108. The first gate electrode 606 forms a control terminal 108c of transistor 108.
[0081] In addition, transistor 506 includes a first channel 608a that extends between a first source / drain region 604a and a third source / drain region 604c, a second channel 608b that extends between the third source / drain region 604c and a fourth source / drain region 604d, a third channel 608c that extends between the fourth source / drain region 604d and a fifth source / drain region 604e, and a fourth channel 608d that extends between the fifth source / drain region 604e and a sixth source / drain region 604f. A first finger of a second gate electrode 610 extends over the first channel 608a, a second finger of the second gate electrode 610 extends over the second channel 608b, a third finger of the second gate electrode 610 extends over the third channel 608c, and a fourth finger of the second gate electrode 610 extends over the fourth channel 608d. The first source / drain region 604a, the fourth source / drain region 604d, and the sixth source / drain region 604f are coupled to the first voltage input 102 and form a first terminal 506a of transistor 506. The third source / drain region 604c and the fifth source / drain region 604e are coupled to the voltage output 106 and form a second terminal 506b of transistor 506. The second gate electrode 610 forms a control terminal 506c of transistor 506.
[0082] Although transistors 108 and 506 are illustrated as planar transistors in Figure 6 , in some other examples, transistors 108 and 506 may alternatively be three-dimensional transistors (e.g., fin field-effect transistors, gate-all-around field-effect transistors, etc.).
[0083] Figure 7 is a timing diagram of an example of circuit 500 corresponding to Figure 5A and Figure 5B .
[0084] During a normal turn-on mode (e.g., when the power supply (voltage source 304 and voltage converter 306) is coupled to the circuit 500, the first voltage input 102 will be coupled to the voltage output 106 via both the first current path 110 and the sixth current path 507, and there is no power supply current limit), the first control signal 202 is high (when the inverted first control signal is low) and the third control signal 702 is high (when the inverted third control signal is low). In response, transistor 402 and transistor 514 are turned on, while transistor 404 and transistor 518 are turned off, such that the second voltage input 104 is coupled to the control terminal 108c (via the first control path 114) and the third voltage input 502 is coupled to the control terminal 506c (via the third control path 516). Accordingly, the voltage at the control terminal 108c is high and the voltage at the control terminal 506c is high. In response, transistor 108 and transistor 506 are turned on, such that the first voltage input 102 is coupled to the voltage output 106 through transistor 108 (via the first current path 110) and through transistor 506 (via the sixth current path 507). Accordingly, the voltage at the voltage output 106 is high. Additionally, the second control signal 204 is low. Accordingly, transistor 406 and transistor 522 are turned off, and thus transistor 408, transistor 410, transistor 528, and transistor 530 are turned off. Additionally, since the voltage output is non-negative, transistor 416, transistor 420, transistor 538, and transistor 544 are turned off, and thus transistor 414 and transistor 534 are turned off.
[0085] During normal disconnect mode (e.g., when power is coupled to circuit 500, first voltage input 102 is not coupled to voltage output 106 and there is no power current limit), first control signal 202 is low and third control signal 702 is low. In response, transistors 404 and 518 are turned on while transistors 402 and 514 are turned off, causing voltage output 106 to be coupled to the control terminal 108c of transistor 108 (via second control path 116) and to the control terminal 506c of transistor 506 (via fourth control path 520). Accordingly, the voltage at control terminal 108c is low and the voltage at control terminal 506c is low. In response, transistor 108 is turned off and transistor 506 is turned off, causing first voltage input 102 to not be coupled to voltage output 106. Thus, voltage output 106 is low. Additionally, second control signal 204 is high. Because second control signal 204 is high, transistors 406, 408, and 410 are turned on and transistors 522, 528, and 530 are turned on. Additionally, because the voltage at control terminal 108c is non-negative and the voltage at control terminal 506c is non-negative, transistors 416, 420, 538, and 544 are turned off, and thus transistors 414 and 534 are turned off.
[0086] During a low power mode (e.g., when power is coupled to circuit 500, transistor 108 will be turned on, transistor 506 will be turned off and the amount of current consumed by the power supply must be less than about 10 microamps, less than about 8 microamps, less than about 6 microamps or some other suitable value), the first control signal 202 is high and the third control signal 702 is low. In response, transistor 402 is turned on, transistor 514 is turned off, transistor 404 is turned off, and transistor 518 is turned on, such that the second voltage input 104 is coupled to the control terminal 108c and the voltage output 106 is coupled to the control terminal 506c. Accordingly, the voltage at the control terminal 108c is high and the voltage at the control terminal 506c is low. In response, transistor 108 is turned on and transistor 506 is turned off, such that the first voltage input 102 is coupled to the voltage output 106 through transistor 108 (via the first current path) but not through transistor 506. Since the first voltage input 102 is coupled to the voltage output 106 through transistor 108 (via the first current path) but not through transistor 506, the voltage at the voltage output 106 may be slightly lower than the voltage during normal on mode, but the voltage at the voltage output 106 is still high. Additionally, the second control signal 204 is low. Accordingly, transistors 406 and 522 are turned off, and thus transistors 408, 410, 528, and 530 are turned off. Additionally, since the voltage at the voltage output 106 is non-negative, transistors 416, 420, 538, and 544 are turned off, and thus transistors 414 and 534 are turned off.
[0087] In some instances, the second voltage input 104 is coupled to a first voltage converter (e.g., Figure 3 voltage converter 306) and the third voltage input 502 is coupled to a second voltage converter (not shown). The first voltage converter (not shown) is smaller (e.g., includes fewer stages) and more efficient than the second voltage converter. During low power mode, the second voltage input 104 is coupled to the control terminal 108c, but the third voltage input 502 is not coupled to the control terminal 506c, such that the more efficient voltage converter (the first voltage converter) is used and the less efficient voltage converter (the second voltage converter) is decoupled from the circuit. By using the more efficient voltage converter during low power mode and decoupling the less efficient voltage converter, the current consumed by the power supply (e.g., Figure 3 voltage source 304, Figure 3 first voltage converter 306, and the second voltage converter (not shown)) during low power mode is reduced. Accordingly, the power supply current consumption requirements for the low power mode can be achieved.
[0088] In addition, since transistor 108 is used during both the normal on mode and the low power mode, the resistance between the first voltage input 102 and the voltage output 106 may be only slightly higher during the low power mode than during the normal on mode. Accordingly, the difference between the voltage at the voltage output 106 during the normal on mode and the voltage at the voltage output 106 during the low power mode may be negligible. In addition, since transistor 108 is used during both the normal on mode and the low power mode, the transition from the low power mode to the normal on mode may occur more quickly.
[0089] During the negative output voltage mode (e.g., when the voltage at the voltage output 106 is negative, the power supply is coupled to the circuit 500 and the first voltage input 102 is not coupled to the voltage output 106), transistor 108 and transistor 506 may be briefly turned on. Since the voltage at the voltage output 106 is non-negative, transistors 420, 416, 544, and 538 are turned on, and thus transistors 414 and 534 are turned on. In response, the control terminal 108c is coupled to the voltage output 106 through transistor 414 (via the fourth current path 132), and the control terminal 506c is coupled to the voltage output 106 through transistor 534 (via the current path 536). Accordingly, the difference between the voltage at the control terminal 108c and the voltage at the voltage output 106 drops to substantially zero, and the difference between the voltage at the control terminal 506c and the voltage at the voltage output 106 drops to substantially zero. In response, transistor 108 turns off and transistor 506 turns off.
[0090] During the sleep mode (e.g., when power is coupled to circuit 500, and the first voltage input 102 will not be coupled to the voltage output 106, and the current consumed by the power supply connected to the circuit must be less than 2 microamps, less than 1 microamp, or some other suitable value), the first control signal 202 and the third control signal 702 are not available. Accordingly, transistors 402 and 404 neither couple the control terminal 108c to the second voltage input 104 nor couple the control terminal 108c to the voltage output 106, and transistors 514 and 518 neither couple the control terminal 506c to the third voltage input 502 nor couple the control terminal 506c to the voltage output 106. However, the second control signal 204 remains available and high. Because the second control signal 204 is high, the voltage at the control terminal 108c is non-negative, and the voltage at the control terminal 506c is non-negative, transistors 406, 408, 410, 522, 528, and 530 are turned on. Accordingly, the control terminal 108c is coupled to ground 122 (via the second current path 124 and the third current path 126) and the control terminal 506c is coupled to ground 122 (via the seventh current path 524 and the eighth current path 526). In response, transistors 108 and 506 are turned off. Accordingly, the voltage at the voltage output 106 is low. Additionally, because the voltage at the voltage output 106 is non-negative, transistors 416, 420, 538, and 544 are turned off, and thus transistors 414 and 534 are turned off.
[0091] During a power-off mode (e.g., when power is not coupled to circuit 500 and first voltage input 102 will not be coupled to voltage output 106), first control signal 202 and third control signal 702 are not available. Accordingly, transistors 402 and 404 neither couple control terminal 108c to second voltage input 104 nor couple control terminal 108c to voltage output 106, and transistors 514 and 518 neither couple control terminal 506c to third voltage input 502 nor couple control terminal 506c to voltage output 106. However, second control signal 204 remains available and high. Because second control signal 204 is high, the voltage at control terminal 108c is non-negative and the voltage at control terminal 506c is non-negative, so transistors 406, 408, 410, 522, 528, and 530 are turned on. Accordingly, control terminal 108c is coupled to ground 122 (via second current path 124 and third current path 126) and control terminal 506c is coupled to ground 122 (via seventh current path 524 and eighth current path 526). In response, transistors 108 and 506 are turned off. Accordingly, the voltage at voltage output 106 is low. Additionally, because the voltage at voltage output 106 is non-negative, transistors 416, 420, 538, and 544 are turned off, and thus transistors 414 and 534 are turned off.
[0092] Because protection circuitry 120, protection circuitry 130, protection circuitry 510, and protection circuitry 512 only require second control signal 204 (which is available even when power is not coupled to circuit 500) to operate, protection circuitry 120, protection circuitry 130, protection circuitry 510, and protection circuitry 512 can reliably protect transistors 108 and 506 even when power is not coupled to circuit 500.
[0093] The methods described above are illustrated and described as a series of acts or events, but the illustrated ordering of such acts or events is not restrictive. For example, some acts or events may occur in a different order and / or concurrently with other acts or events than those illustrated and / or described herein. Moreover, some of the illustrated acts or events are optional to implement one or more aspects or examples of this specification. Additionally, one or more of the acts or events depicted herein may be performed in one or more separate acts and / or phases. In some instances, the methods described above may be implemented in a computer-readable medium using instructions stored in a memory.
[0094] In this specification, the term "coupled" may encompass a connection, communication, or signal path that achieves a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first instance, device A is coupled to device B by a direct connection; or (b) in a second instance, device A is coupled to device B through an intermediate component C, provided that the intermediate component C does not change the functional relationship between device A and device B such that device B is controlled by device A via the control signal generated by device A.
[0095] A device "configured to" perform a task or function may be configured (e.g., programmed and / or hardwired) by a manufacturer to perform the function at the time of manufacture, and / or may be configured (or reconfigured) by a user after manufacture to perform the function and / or other additional or alternative functions. The configuration may be performed through firmware and / or software programming of the device, through the construction and / or layout of hardware components, and the interconnection of the device, or a combination thereof.
[0096] As used herein, the terms "terminal", "node", "interconnect", "pin", and "lead" may be used interchangeably. Unless specifically stated to the contrary, these terms are generally used to denote the interconnection between device elements, circuit elements, integrated circuits, devices, or other electronic devices or semiconductor components, or their ends.
[0097] A circuit or device described herein as including certain components may actually be adapted to be coupled to those components to form the described circuit system or device. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage sources and / or current sources) may alternatively include semiconductor elements (e.g., semiconductor die and / or integrated circuit (IC) packages) within only a single physical device, and may be adapted to be coupled to at least some of the passive elements and / or sources to form the described structure, for example, at the time of manufacture by an end user and / or a third party or after manufacture.
[0098] Although the use of specific transistors is described herein, other transistors (or equivalent devices) may alternatively be used with little or no change to the remaining circuitry. For example, a metal oxide silicon FET ("MOSFET") (e.g., an n-channel MOSFET (nMOSFET) or a p-channel MOSFET (pMOSFET)), a bipolar junction transistor (BJT - e.g., NPN or PNP), an insulated gate bipolar transistor (IGBT), and / or a junction field effect transistor (JFET) may be used in place of the devices described herein, or these may be used in combination with the devices described herein. The transistor may be a depletion device, a drain extension device, an enhancement device, a natural transistor, or other types of device structure transistors. Additionally, the device may be implemented in or on a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs).
[0099] Although some elements of the described examples are included in an integrated circuit and other elements are external to the integrated circuit, in other examples, additional or fewer features may be incorporated into the integrated circuit. Additionally, some or all of the features described as being external to the integrated circuit may be included in the integrated circuit, and / or some of the features described as being internal to the integrated circuit may be incorporated external to the integrated circuit. As used herein, the term "integrated circuit" means one or more circuits that: (i) are incorporated in or on a semiconductor substrate; (ii) are incorporated in a single semiconductor package; (iii) are incorporated into the same module; and / or (iv) are incorporated in or on the same printed circuit board.
[0100] The use of the phrase "ground" in the foregoing description includes chassis ground, earth ground, floating ground, virtual ground, digital ground, common ground, and / or any other form of ground connection applicable to or suitable for the teachings of this description. Unless otherwise stated, "about", "substantially", or "essentially" before a value means + / - 10% of the stated value, or if the value is zero, a reasonable range of values near zero.
[0101] Within the scope of the claims, modifications are possible in the described examples, and other embodiments are possible.
Claims
1. A circuit, comprising: A first voltage input, a second voltage input, and a voltage output; A transistor coupled between the first voltage input and the voltage output in a first current path, the first current path including the first voltage input, a first terminal of the transistor, a second terminal of the transistor, and the voltage output; A first circuitry coupled between the second voltage input and a control terminal of the transistor in a first control path and between the voltage output and the control terminal of the transistor in a second control path, the first control path including the second voltage input, a first terminal of the first circuitry, a third terminal of the first circuitry, and the control terminal of the transistor, the second control path including the voltage output, a second terminal of the first circuitry, the third terminal of the first circuitry, and the control terminal of the transistor; A second circuitry coupled between the control terminal of the transistor and ground in a second current path and between the control terminal of the transistor and ground in a third current path parallel to the second current path, the second current path including the control terminal of the transistor, a first terminal of the second circuitry, a third terminal of the second circuitry, and ground, the third current path including the control terminal of the transistor, a second terminal of the second circuitry, the third terminal of the second circuitry, and ground; And A third circuitry coupled between the control terminal of the transistor and the voltage output in a fourth current path, the fourth current path including the control terminal of the transistor, a first terminal of the third circuitry, a second terminal of the third circuitry, and the voltage output.
2. The circuit according to claim 1, wherein the third circuitry includes a control terminal coupled to the voltage output, and the circuit further includes: A first control signal input coupled to a control terminal of the first circuitry; And A second control signal input coupled to a control terminal of the second circuitry.
3. The circuit according to claim 1, wherein the transistor is a first transistor, and the second circuitry includes: A second transistor coupled between the control terminal of the first transistor and ground in both the second current path and the third current path, the second current path and the third current path further including a first terminal of the second transistor and a second terminal of the second transistor; A first unidirectional current device coupled between the control terminal of the first transistor and the first terminal of the second transistor in the second current path, the second current path further including between a first terminal of the first unidirectional current device and a second terminal of the first unidirectional current device; And A second unidirectional current device, which is coupled between the control terminal of the first transistor and the first terminal of the second transistor in the third current path, and the third current path further includes a first terminal of the second unidirectional current device and a second terminal of the second unidirectional current device.
4. The circuit according to claim 3, wherein the third circuit system includes: A third transistor, which is coupled between the control terminal of the first transistor and the voltage output in the fourth current path, and the fourth current path further includes a first terminal of the third transistor and a second terminal of the third transistor; A third unidirectional current device, which is coupled between the voltage output and ground in a fifth current path, and the fifth current path includes the voltage output, a first terminal of the third unidirectional current device, a second terminal of the third unidirectional current device, and ground; and A fourth unidirectional current device, which is coupled between the second terminal of the third unidirectional current device and ground in the fifth current path, and the fifth current path further includes a first terminal of the fourth unidirectional current device and a second terminal of the fourth unidirectional current device, wherein the control terminal of the third transistor is coupled between the second terminal of the third unidirectional current device and the first terminal of the fourth unidirectional current device.
5. The circuit according to claim 4, further comprising: A first control signal input, which is coupled to the control terminal of the second transistor.
6. The circuit according to claim 1, wherein the transistor is a first transistor, and the circuit further includes: A third voltage input; A second transistor, which is coupled between the first voltage input and the voltage output in a fifth current path parallel to the first current path, and the fifth current path includes the first voltage input, a first terminal of the second transistor, a second terminal of the second transistor, and the voltage output; A fourth circuit system, which is coupled between the third voltage input and the control terminal of the second transistor in a third control path, and is coupled between the voltage output and the control terminal of the second transistor in a fourth control path, the third control path includes the third voltage input, a first terminal of the fourth circuit system, a third terminal of the fourth circuit system, and the control terminal of the second transistor, and the fourth control path includes the voltage output, a second terminal of the fourth circuit system, the third terminal of the fourth circuit system, and the control terminal of the second transistor; A fifth circuit system, coupled between the control terminal of the second transistor and ground in a sixth current path and between the control terminal of the second transistor and ground in a seventh current path parallel to the sixth current path, the sixth current path including the control terminal of the second transistor, a first terminal of the fifth circuit system, a third terminal of the fifth circuit system, and ground, the seventh current path including the control terminal of the second transistor, a second terminal of the fifth circuit system, the third terminal of the fifth circuit system, and ground; and A sixth circuit system, coupled between the control terminal of the second transistor and the voltage output in an eighth current path, the eighth current path including the control terminal of the second transistor, a first terminal of the sixth circuit system, a second terminal of the sixth circuit system, and the voltage output.
7. The circuit according to claim 1, wherein the first control path is a pull-up path, the second control path is a pull-down path, the first circuit system is a transistor control circuit system, and the transistor control circuit system includes a pull-up transistor in the pull-up path and a pull-down transistor in the pull-down path.
8. A circuit, comprising: A first voltage input, a second voltage input, a first control signal input, a second control signal input, and a voltage output; A first transistor, coupled between the first voltage input and the voltage output in a first current path, the first current path including the first voltage input, a first terminal of the first transistor, the Second terminal of the first transistor and the voltage output; A second transistor, including a first terminal coupled to the second voltage input, a second terminal coupled to the control terminal of the first transistor, and a control terminal coupled to the first control signal input; A third transistor, including a first terminal coupled to the control terminal of the first transistor, a second terminal coupled to the voltage output, and a control terminal coupled to the first control signal input; A fourth transistor, coupled between the control terminal of the first transistor and ground in both a second current path and a third current path parallel to the second current path, the second current path and the third current path including the control terminal of the first transistor, a first terminal of the fourth transistor, the Second terminal of the fourth transistor and ground, the fourth transistor including a control terminal coupled to the second control signal input; A fifth transistor, coupled between the control terminal of the first transistor and the first terminal of the fourth transistor in the second current path, the second current path further including a first terminal of the fifth transistor and a second terminal of the fifth transistor; A sixth transistor, coupled between the control terminal of the first transistor and the first terminal of the fourth transistor in the third current path, the third current path further including a first terminal of the sixth transistor and a second terminal of the sixth transistor; A seventh transistor coupled between the control terminal of the first transistor and the voltage output in a fourth current path, the fourth current path including the control terminal of the first transistor, a first terminal of the seventh transistor, a second terminal of the seventh transistor, and the voltage output; An eighth transistor coupled between ground and the voltage output in a fifth current path, the fifth current path including ground, a first terminal of the eighth transistor, a second terminal of the eighth transistor, and the voltage output, the eighth transistor including a control terminal coupled to the control terminal of the seventh transistor; And A ninth transistor coupled between ground and the first terminal of the eighth transistor in the fifth current path, the fifth current path further including a first terminal of the ninth transistor and a second terminal of the ninth transistor.
9. The circuit according to claim 8, wherein the fifth transistor and the sixth transistor are diode-connected transistors adapted to allow unidirectional current flow from the control terminal of the first transistor to ground, and wherein the eighth transistor and the ninth transistor are diode-connected transistors adapted to allow unidirectional current flow from ground to the voltage output.
10. The circuit according to claim 8, wherein the control terminal of the fifth transistor is coupled to the first terminal of the fifth transistor, the control terminal of the sixth transistor is coupled to the first terminal of the sixth transistor, the control terminal of the eighth transistor is coupled to the first terminal of the eighth transistor, and the control terminal of the ninth transistor is coupled to the second terminal of the ninth transistor.
11. The circuit according to claim 8, further comprising: A first resistor coupled between the control terminal of the first transistor and the first terminal of the sixth transistor in the third current path; And A second resistor coupled between the first terminal of the eighth transistor and the first terminal of the ninth transistor in the fifth current path.
12. The circuit according to claim 8, further comprising: A third voltage input; And A tenth transistor coupled between the first voltage input and the voltage output in a sixth current path parallel to the first current path, the sixth current path including the first voltage input, a first terminal of the tenth transistor, a second terminal of the tenth transistor, and the voltage output.
13. The circuit according to claim 12, further comprising: An eleventh transistor coupled between the control terminal of the tenth transistor and ground in both a seventh current path and an eighth current path parallel to the seventh current path, the seventh current path and the eighth current path including the control terminal of the tenth transistor, a first terminal of the eleventh transistor, the Second terminal of the eleventh transistor and ground; A twelfth transistor, which is coupled between the control terminal of the tenth transistor and the first terminal of the eleventh transistor in the seventh current path, and the seventh current path further includes a first terminal and a second terminal of the twelfth transistor; A thirteenth transistor, which is coupled between the control terminal of the tenth transistor and the first terminal of the eleventh transistor in the eighth current path, and the eighth current path further includes a first terminal and a second terminal of the thirteenth transistor; A fourteenth transistor, which is coupled between the control terminal of the tenth transistor and the voltage output in a ninth current path, and the ninth current path includes the control terminal of the tenth transistor, the first terminal of the fourteenth transistor, the second terminal of the fourteenth transistor, and the voltage output; A fifteenth transistor, which is coupled between ground and the voltage output in a tenth current path, and the tenth current path includes ground, the first terminal of the fifteenth transistor, the second terminal of the fifteenth transistor, and the voltage output, and the fifteenth transistor includes a control terminal coupled to the control terminal of the fourteenth transistor; and A sixteenth transistor, which is coupled between the first terminal of the fifteenth transistor and ground in the tenth current path, and the tenth current path further includes a first terminal and a second terminal of the sixteenth transistor.
14. The circuit according to claim 13, further comprising: A third control signal input; A seventeenth transistor, which includes a first terminal coupled to the second voltage input, a second terminal coupled to the control terminal of the tenth transistor, and a control terminal coupled to the third control signal input; and An eighteenth transistor, which includes a first terminal coupled to the control terminal of the tenth transistor, a second terminal coupled to the voltage output, and a control terminal coupled to the third control signal input.
15. The circuit according to claim 13, wherein the first transistor has a first number of channels, the tenth transistor has a second number of channels, and the second number is greater than the first number.
16. A system, comprising: A controller, which includes a first output and a second output; A voltage source; A voltage converter, which includes an input and an output, and the input of the voltage converter is coupled to the voltage source; A load circuit system, which includes an input; and A switching circuit system, which is coupled to the controller, the voltage source, the voltage converter, and the load circuit system, and the switching circuit system includes: A first voltage input, which is coupled to the voltage source; A second voltage input, which is coupled to the output of the voltage converter; A voltage output, which is coupled to the input of the load circuit system; A first control signal input, which is coupled to the first output of the controller; A second control signal input, which is coupled to the second output of the controller; A first transistor coupled between the first voltage input and the voltage output in a first current path, the first current path including the first voltage input, a first terminal of the first transistor, a second terminal of the first transistor, and the voltage output; A transistor control circuit system coupled between the second voltage input and a control terminal of the first transistor in a first control path and between the voltage output and the control terminal of the first transistor in a second control path, the transistor control circuit system including a control terminal coupled to the first control signal input, the first control path including the second voltage input, a first terminal of the transistor control circuit system, a third terminal of the transistor control circuit system, and the control terminal of the first transistor, the second control path including the voltage output, a second terminal of the transistor control circuit system, the third terminal of the transistor control circuit system, and the control terminal of the first transistor; A first protection circuit system coupled between the control terminal of the first transistor and ground in a second current path and between the control terminal of the first transistor and ground in a third current path parallel to the second current path, the first protection circuit system including a control terminal coupled to the second control signal input, the second current path including the control terminal of the first transistor, a first terminal of the first protection circuit system, a third terminal of the first protection circuit system, and ground, the third current path including the control terminal of the first transistor, a second terminal of the first protection circuit system, the third terminal of the first protection circuit system, and ground; and A second protection circuit system coupled between the control terminal of the first transistor and the voltage output in a fourth current path, the second protection circuit system including a control terminal coupled to the voltage output, the fourth current path including the control terminal of the first transistor, a first terminal of the second protection circuit system, a second terminal of the second protection circuit system, and the voltage output.
17. The system of claim 16, wherein the first protection circuit system includes: A second transistor coupled between the control terminal of the first transistor and ground in both the second current path and the third current path, the second current path and the third current path further including a first terminal and a second terminal of the second transistor, the second transistor including a control terminal coupled to a second control signal input; A first unidirectional current device coupled between the control terminal of the first transistor and the first terminal of the second transistor in the second current path, the second current path further including between a first terminal and a second terminal of the first unidirectional current device; and A second unidirectional current device, which is coupled between the control terminal of the first transistor and the first terminal of the second transistor in the third current path, and the third current path further includes a first terminal of the second unidirectional current device and a second terminal of the second unidirectional current device.
18. The system according to claim 17, wherein the second protection circuit system includes: A third transistor, which is coupled between the control terminal of the first transistor and the voltage output in the fourth current path, and the fourth current path further includes a first terminal of the third transistor and a second terminal of the third transistor; A third unidirectional current device, which is coupled between ground and the voltage output in a fifth current path, and the fifth current path includes ground, a first terminal of the third unidirectional current device, a second terminal of the third unidirectional current device, and the voltage output; and A fourth unidirectional current device, which is coupled between ground and the first terminal of the third unidirectional current device in the fifth current path, and the fifth current path further includes a first terminal of the fourth unidirectional current device and a second terminal of the fourth unidirectional current device, wherein the control terminal of the third transistor is coupled between the first terminal of the third unidirectional current device and the first terminal of the fourth unidirectional current device.
19. The system according to claim 16, further comprising: A second transistor, which is coupled between the first voltage input and the voltage output in a fifth current path parallel to the first current path, and the fifth current path includes the first voltage input, a first terminal of the second transistor, a second terminal of the second transistor, and the voltage output; A third protection circuit system, which is coupled between the control terminal of the second transistor and ground in a sixth current path and between the control terminal of the second transistor and ground in a seventh current path parallel to the sixth current path, and the third protection circuit system includes a control terminal coupled to the second control signal input, the sixth current path includes the control terminal of the second transistor, a first terminal of the third protection circuit system, a third terminal of the third protection circuit system, and ground, and the seventh current path includes the control terminal of the second transistor, a second terminal of the third protection circuit system, the third terminal of the third protection circuit system, and ground; and A fourth protection circuit system, which is coupled between the control terminal of the second transistor and the voltage output in an eighth current path, and the fourth protection circuit system includes a control terminal coupled to the voltage output, and the eighth current path includes the control terminal of the second transistor, a first terminal of the fourth protection circuit system, a second terminal of the fourth protection circuit system, and the voltage output.
20. The system according to claim 16, wherein the voltage source is a battery, the voltage converter is a charge pump, and the controller is a microcontroller.