Design method and system for intelligent layout of flexible printed circuit wire harness

Abstract

The invention discloses a design method and system for intelligent layout of a flexible printed circuit harness, and the method comprises the steps: firstly obtaining multi-level constraint data, including parameters of a physical layer, an electrical layer and a mechanical layer, generating a preliminary layout candidate scheme through a multi-objective optimization algorithm, then carrying out the screening of the control features of the physical layer of the candidate scheme, and carrying out the design of the intelligent layout of the flexible printed circuit harness; the method comprises the following steps: firstly, designing a mechanical layer to ensure that the high-density design requirement is met, then evaluating the matching performance of the electrical layer, screening out a scheme that the impedance matching degree and the crosstalk suppression rate reach the standard, then analyzing the response of a mechanical layer rule in a dynamic stress field, ensuring that the reliability requirement of a repeated bending scene is met, and finally, carrying out dynamic coordination optimization on three-layer constraints by adopting a genetic algorithm. And a layout design result with optimal comprehensive performance is obtained. The method further comprises a process design effect evaluation and parameter dynamic adjustment mechanism, iterative optimization can be carried out according to actual requirements, and the design quality and the production efficiency of the flexible printed circuit wire harness are effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of intelligent manufacturing technology, and in particular, to a design method and system for intelligent layout of flexible printed circuit harnesses. Background Art

[0002] As an indispensable connecting component in modern electronic devices, flexible printed circuit harnesses play a crucial role in fields such as aerospace, medical devices, and consumer electronics. Their high flexibility, lightweight, and ability to adapt to complex spatial layouts make them a key technology for promoting the miniaturization and intelligence of electronic products. However, with the complication of application scenarios and the improvement of performance requirements, the production process design of flexible printed circuit harnesses faces severe challenges. The precision and reliability of the process directly determine the final performance of the product.

[0003] Current production process design methods mostly rely on manual experience or single-dimensional rule setting, and it is difficult to comprehensively meet the complex requirements under multi-physical field coupling. Traditional methods often lack the ability of dynamic adjustment when dealing with high-density layouts or special mechanical stress areas, resulting in low design efficiency or difficult-to-meet performance indicators. For example, existing design systems usually cannot balance electrical performance and mechanical reliability at the same time, and are prone to failure risks in scenarios such as high-frequency signal transmission or repeated bending.

[0004] The core challenges in this field focus on how to effectively manage multi-level design constraints and how to achieve intelligent layout in high-density and dynamic stress environments. Specifically, the conflicts and coordination among physical layer constraints such as precise control of line width and line spacing, electrical layer constraints such as impedance matching and crosstalk suppression, and mechanical layer constraints such as special rules for bending areas have become technical bottlenecks. Since these factors have not been systematically solved in the design stage, designers often need to repeatedly weigh between performance optimization and process feasibility, resulting in an extended production cycle or a decrease in product reliability. In addition, the lack of a flexible custom constraint mechanism also limits the adaptability of process design to specific application scenarios.

[0005] Therefore, how to establish a multi-level constraint management system in the production process of flexible printed circuit harnesses and achieve dynamic coordination of physical, electrical, and mechanical constraints through intelligent layout design has become a key issue for improving process design efficiency and product reliability. Summary of the Invention

[0006] To solve the technical problems raised in the above background art, in the first aspect of the present invention, a design method for intelligent layout of flexible printed circuit harnesses is provided, including: S1. Obtain the multi-level constraint data of the flexible printed circuit wire harness. By analyzing the physical layer control parameters such as line width and line pitch, the electrical layer matching parameters such as impedance matching degree and crosstalk suppression rate, and the mechanical layer rule parameters such as bending area rules, an initial design constraint set is obtained; S2. According to the initial design constraint set, use a multi-objective optimization algorithm to perform preliminary layout calculations for high-density design and dynamic stress fields, and determine a candidate solution set for intelligent layout; S3. Extract the physical layer control characteristics of each solution from the candidate solution set. By comparing the preset line width and line pitch thresholds and the dynamic stress field distribution, determine whether the physical layer control meets the high-density design requirements, and obtain a filtered layout solution set; S4. For the filtered layout solution set, obtain the electrical layer matching data of each solution. By calculating the deviation between the impedance matching degree and crosstalk suppression rate and the preset standards, determine an optimized layout solution set with qualified electrical performance; S5. In the optimized layout solution set, obtain the mechanical layer rule parameters. By simulating the response curve of the bending area rules under the dynamic stress field, determine whether it meets the reliability requirements of the repeated bending scenario, and obtain a final layout solution set with qualified mechanical performance; S6. According to the final layout solution set, use a genetic algorithm to dynamically coordinate and optimize the physical layer control, electrical layer matching, and mechanical layer rules, and obtain an intelligent layout design result that takes into account the constraints of all three; S7. Through the intelligent layout design result, obtain quantitative indicators of the process design effect such as production cycle and error rate. By comparing and analyzing with historical data, determine the improvement range of product reliability, and output the final process design plan; S8. If the impedance matching degree or crosstalk suppression rate of the final process design plan is lower than the matching degree threshold, recalculate the layout design result by adjusting the electrical layer matching parameters to obtain an updated process design plan; S9. Through the updated process design plan, obtain the stress distribution data of the bending area rules. By analyzing the matching degree with the dynamic stress field, determine whether it is necessary to further optimize the mechanical layer rules, and output an adjusted complete design plan.

[0007] Optionally, in step S1, obtaining the multi-level constraint data of the flexible printed circuit wire harness, and by analyzing the physical layer control parameters such as line width and line pitch, the electrical layer matching parameters such as impedance matching degree and crosstalk suppression rate, and the mechanical layer rule parameters such as bending area rules, obtaining the initial design constraint set includes: Step S11. By analyzing the parameters of line width and line pitch and impedance matching, obtain the constraint data of the physical layer and electrical layer, and obtain a preliminary multi-level constraint set; Step S12: Extract relevant data on crosstalk suppression and electrical matching from the preliminary constraint set. Using logical judgment, if the crosstalk suppression rate is lower than the constraint threshold, then by adjusting the line width and line spacing parameters, determine the optimized electrical layer constraints. Step S13: According to the optimized electrical layer constraints, combined with the parameters of the bending area and mechanical rules, obtain the mechanical layer constraint data to get the complete design constraint set. Step S14: For the complete design constraint set, use a regression analysis tool to optimize the parameters of line width, line spacing, and impedance matching, and judge the boundary conditions of multi-level constraints. Step S15: Analyze the correlation between physical control and electrical matching through the boundary conditions, obtain the adjusted constraint data, and determine the design parameter set that conforms to the hierarchical division. Step S16: Extract the mapping relationship between mechanical rules and constraint data from the design parameter set, use an optimization algorithm to judge the optimization parameters of the bending area, and obtain the final design constraint set. Step S17: According to the final design constraint set, through the logical mapping of parameter parsing and data acquisition, determine the multi-level constraint data output of the flexible printed circuit harness.

[0008] Optionally, in step S17, according to the final design constraint set, through the logical mapping of parameter parsing and data acquisition, determine the multi-level constraint data output of the flexible printed circuit harness, including: Step S171: By parsing the final design constraint set, use a data extraction method to obtain constraint data from parameter parsing to get a preliminary hierarchical set. Step S172: For the preliminary hierarchical set, use a logical mapping method to judge the multi-level characteristics and determine the constraint structure of the hierarchical division. Step S173: According to the constraint structure of the hierarchical division, extract the mapping relationship from data acquisition to get the adjusted constraint data set. Step S174: Through the adjusted constraint data set, use a support vector machine algorithm to judge the matching degree between parameter parsing and design constraints, and determine the optimized hierarchical set. Step S175: For the optimized hierarchical set, use logical mapping to process the mapping relationship, obtain the correlation between multi-level characteristics and constraint data, and get a refined output set. Step S176: According to the refined output set, obtain the distribution law of hierarchical division from data extraction, judge the integrity of set generation, and determine the final output set. Step S177: Through the final output set, use a clustering analysis algorithm to judge the multi-level distribution of design constraints, and get the hierarchical constraint output of the flexible printed circuit harness.

[0009] Optionally, in step S2, according to the initial design constraint set, a multi-objective optimization algorithm is used to perform preliminary layout calculations for high-density design and dynamic stress fields to determine a candidate solution set for intelligent layout, including: Step S21, using a multi-objective optimization algorithm, obtain data on high-density design and dynamic stress fields from the initial constraints and design set, complete preliminary layout calculations, and obtain a preliminary layout result; Step S22, through the preliminary layout result, for the change characteristics of the dynamic stress field, use the finite element analysis method to calculate stress distribution data and determine stress field adjustment parameters; Step S23, according to the stress field adjustment parameters, combined with the space requirements of high-density design, adjust the preliminary layout result to obtain an optimized layout plan; Step S24, extract data from the optimized layout plan, obtain its key features, and judge whether the constraint conditions for intelligent layout are met. If they are met, generate a candidate solution set; if not, return the adjustment parameters; Step S25, extract the key features of layout calculations from the candidate solution set, use the K-means clustering algorithm to analyze the similarity between solutions, and determine solution clustering groups; Step S26, through solution clustering groups, for the solution features within the group, use the weighted average method to calculate comprehensive performance indicators and obtain a performance ranking result; Step S27, according to the performance ranking result, screen out the top 10% of the solutions with the best comprehensive performance indicators from the candidate solution set to determine the final solution set as the output result.

[0010] Optionally, in step S3, extract the physical layer control features of each solution from the candidate solution set, and by comparing the preset line width and line spacing thresholds with the dynamic stress field distribution, judge whether the physical layer control meets the high-density design requirements to obtain a screened layout plan set, including: Step S31, obtain the physical layer control data of each solution from the candidate solution set, and use the principal component analysis tool to separate the control features to obtain a feature set; Step S32, for the control features in the feature set, compare with the preset line width and line spacing thresholds to judge whether they exceed the range, and obtain a preliminary screening feature set; Step S33, obtain the dynamic stress field data in the preliminary screening feature set, and use the finite element analysis tool to calculate the stress distribution to obtain a stress distribution set; Step S34, if the values in the stress distribution set meet the line width and line spacing rules corresponding to high-density design, retain the corresponding solutions to obtain the first layout plan set; Step S35: Extract the remaining features of the physical layer control from the first set of layout schemes, and determine whether they are consistent through a secondary comparison with the preset line width and line spacing thresholds, to obtain the second set of layout schemes; Step S36: Use the support vector machine algorithm to classify the second set of layout schemes to determine the final set of layout schemes that meet the conditions; Step S37: By calculating the stress distribution results in the final set of layout schemes, obtain the physical layer control features of the screening results to get the optimized set of layout schemes.

[0011] Optionally, in step S4, for the screened set of layout schemes, obtain the electrical layer matching data of each scheme, and determine the optimized set of layout schemes with qualified electrical performance by calculating the deviations of the impedance matching degree and crosstalk suppression rate from the preset standards, including: Step S41: Obtain the electrical layer matching data of each scheme in the screened set of layout schemes to get the initial data set; Step S42: Extract the impedance matching degree and crosstalk suppression rate according to the initial data set, and calculate the deviations of the impedance matching degree and crosstalk suppression rate from the preset standards to get the deviation data set; Step S43: If the impedance matching degree deviation in the deviation data set is less than the first preset threshold, it is determined that the impedance matching performance of this scheme meets the standard, to obtain the impedance matching qualified set; Step S44: If the crosstalk suppression rate deviation in the deviation data set is less than the second preset threshold, it is determined that the crosstalk suppression performance of this scheme meets the standard, to obtain the crosstalk suppression qualified set; Step S45: Obtain the intersection of the impedance matching qualified set and the crosstalk suppression qualified set, and determine the schemes whose electrical performance simultaneously meets the dual standards of impedance matching performance and crosstalk suppression performance to get the preliminary optimized scheme set; Step S46: Use the support vector machine algorithm to classify the preliminary optimized scheme set to judge the differences in electrical layer features among the schemes to get the final optimized set of layout schemes; Step S47: Obtain the electrical layer matching data update records of each scheme in the final optimized set of layout schemes, and determine the dynamic optimization results of the final optimized set of layout schemes according to the electrical layer matching data update records.

[0012] Optionally, in step S6, according to the final set of layout schemes, use the genetic algorithm to dynamically coordinate and optimize the physical layer control, electrical layer matching and mechanical layer rules to obtain an intelligent layout design result that takes into account the constraints of all three, including: Step S61: Generate initial layout data from the set of schemes using the genetic algorithm to get the preliminary solution set; Step S62: Extract the constraint conditions for physical layer control and electrical layer matching based on the preliminary solution set to form a multi-dimensional constraint condition set; Step S63: Use the dynamic coordination algorithm to iteratively adjust the multi-dimensional constraint condition set to generate a coordinated parameter set; Step S64: Search the coordinated parameter set through the global optimization algorithm to determine the optimal solution range; Step S65: Extract the boundary conditions of the mechanical layer rules based on the optimal solution range to generate a rule matching result; Step S66: Use the genetic algorithm to iteratively optimize the rule matching result to generate an intelligent design output; Step S67: Verify the integrity of the layout based on the intelligent design output to generate a final layout plan.

[0013] Optionally, in step S67, verifying the integrity of the layout based on the intelligent design output to generate a final layout plan specifically includes: Step S671: Obtain layout data according to the design output, and perform data cleaning and preprocessing through the Pandas library of Python to obtain an initial verification set; Step S672: Use the decision tree algorithm in Scikit-learn to judge the integrity of the initial verification set to obtain a verification result; Step S673: Determine the integrity status according to the accuracy rate and recall rate in the verification result; Step S674: If the integrity status is abnormal, generate correction data through the K-nearest neighbor algorithm; Step S675: Integrate the data through the Pandas library according to the correction data to obtain an updated layout set; Step S676: Optimize the updated layout set through the random forest algorithm in Scikit-learn to obtain an optimization plan; Step S677: Obtain the final plan according to the optimization plan, and determine the layout integrity of the final plan through cross-validation; Step S678: Generate an intelligent layout output for the final plan using the Matplotlib library.

[0014] Optionally, in step S9, obtain the stress distribution data of the bending area gauge through the updated process design plan, and judge whether it is necessary to further optimize the mechanical layer rules through the matching degree analysis with the dynamic stress field, and output the adjusted complete design plan, including: Step S91: Obtain the stress distribution data of the bending area through the updated process design plan, and obtain the initial stress distribution result by using the finite element analysis method; Step S92: Extract key area data from the initial stress distribution results, perform a matching degree analysis on the dynamic stress field using the Pearson correlation coefficient, and determine the matching degree deviation value. Step S93: If the matching degree deviation value exceeds the preset deviation value threshold, adjust the mechanical layer rule parameters and output the updated rule set. Step S94: According to the updated rule set, re-obtain the stress distribution data of the bending area to obtain the adjusted stress distribution result. Step S95: Perform a secondary matching degree analysis on the adjusted stress distribution result and the dynamic stress field to determine whether the deviation converges. Step S96: Generate complete design scheme data based on the deviation convergence result and output the final process design scheme. Step S97: Obtain the verification data of the final process design scheme and use the ANSYS simulation tool to determine the stability of the scheme.

[0015] In the second aspect of the present invention, a design system for the intelligent layout of a flexible printed circuit harness is provided. The intelligent layout design is carried out by using the method described above. The system further includes: A constraint data acquisition module for acquiring multi-level constraint data of the flexible printed circuit harness, and obtaining an initial design constraint set by analyzing physical layer control parameters such as line width and line spacing, electrical layer matching parameters such as impedance matching degree and crosstalk suppression rate, and mechanical layer rule parameters such as bending area rules. A preliminary layout calculation module for performing a preliminary layout calculation on the high-density design and the dynamic stress field by using a multi-objective optimization algorithm according to the initial design constraint set, and determining a candidate scheme set for the intelligent layout. A physical layer control screening module for extracting the physical layer control characteristics of each scheme from the candidate scheme set, and judging whether the physical layer control meets the high-density design requirements by comparing the preset line width and line spacing thresholds with the dynamic stress field distribution, so as to obtain a screened layout scheme set. An electrical layer matching optimization module for obtaining the electrical layer matching data of each scheme in the screened layout scheme set, and determining an optimized layout scheme set with qualified electrical performance by calculating the deviation between the impedance matching degree and the crosstalk suppression rate and the preset standard. A mechanical layer rule verification module for obtaining the mechanical layer rule parameters in the optimized layout scheme set, and judging whether it meets the reliability requirements of the repeated bending scenario by simulating the response curve of the bending area rule under the dynamic stress field, so as to obtain a final layout scheme set with qualified mechanical performance. A dynamic coordination and optimization module, which is used to dynamically coordinate and optimize the physical layer control, electrical layer matching, and mechanical layer rules according to the final layout scheme set by using a genetic algorithm, so as to obtain an intelligent layout design result that takes into account the constraints of all three; A process design evaluation module, which is used to obtain quantitative indicators of the process design effect such as the production cycle and error rate through the intelligent layout design result, and determine the improvement range of product reliability through comparative analysis with historical data, and output the final process design scheme; An electrical parameter adjustment module, which is used to recalculate the layout design result by adjusting the electrical layer matching parameters and obtain an updated process design scheme if the impedance matching degree or crosstalk suppression rate of the final process design scheme is lower than the matching degree threshold; A mechanical rule optimization module, which is used to obtain the stress distribution data of the bending area rules through the updated process design scheme, and judge whether it is necessary to further optimize the mechanical layer rules through the matching degree analysis with the dynamic stress field, and output the adjusted complete design scheme.

[0016] The present invention provides a design method and system for the intelligent layout of a flexible printed circuit harness. First, multi-level constraint data including physical layer, electrical layer, and mechanical layer parameters are obtained, and preliminary layout candidate schemes are generated through a multi-objective optimization algorithm. Subsequently, the physical layer control features of the candidate schemes are screened to ensure meeting the high-density design requirements. Then, the electrical layer matching performance is evaluated, and the schemes with qualified impedance matching degree and crosstalk suppression rate are screened out. Then, the response of the mechanical layer rules under the dynamic stress field is analyzed to ensure meeting the reliability requirements of the repeated bending scenario. Finally, a genetic algorithm is used to dynamically coordinate and optimize the three-layer constraints to obtain the layout design result with the optimal comprehensive performance. The present invention also includes a process design effect evaluation and parameter dynamic adjustment mechanism, which can be iteratively optimized according to actual needs, effectively improving the design quality and production efficiency of the flexible printed circuit harness. Description of the Drawings

[0017] Figure 1 It is a flowchart of a design method for the intelligent layout of a flexible printed circuit harness of the present invention.

[0018] Figure 2 It is a schematic structural diagram of a design system for the intelligent layout of a flexible printed circuit harness of the present invention. Detailed Embodiments

[0019] To further understand the content of the present invention, the present invention will be described in detail in combination with the drawings and embodiments. The following further describes the present application in detail with reference to the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the related invention, rather than limiting the invention. In addition, it should be noted that only the parts related to the invention are shown in the drawings for the convenience of description.

[0020] As Figure 1 shown, in the first aspect of the present invention, a design method for the intelligent layout of a flexible printed circuit harness is provided, which may specifically include: S1. Obtain the multi-level constraint data of the flexible printed circuit harness, and obtain the initial design constraint set by analyzing the physical layer control parameters such as line width and line spacing, the electrical layer matching parameters such as impedance matching degree and crosstalk suppression rate, and the mechanical layer rule parameters such as bending area rules.

[0021] Optionally, this step further includes: Step S11. Obtain the constraint data of the physical layer and the electrical layer by analyzing the parameters of line width, line spacing and impedance matching, and obtain the preliminary multi-level constraint set.

[0022] Step S12. Extract the relevant data of crosstalk suppression and electrical matching from the preliminary constraint set, and use logical judgment. If the crosstalk suppression rate is lower than the constraint threshold, determine the optimized electrical layer constraint by adjusting the line width and line spacing parameters.

[0023] Step S13. According to the optimized electrical layer constraint, combine the parameters of the bending area and mechanical rules to obtain the mechanical layer constraint data, and obtain the complete design constraint set.

[0024] Step S14. For the complete design constraint set, use a regression analysis tool to optimize the parameters of line width, line spacing and impedance matching, and judge the boundary conditions of multi-level constraints.

[0025] Step S15. Analyze the correlation between physical control and electrical matching through the boundary conditions, obtain the adjusted constraint data, and determine the design parameter set that meets the hierarchical division.

[0026] Step S16. Extract the mapping relationship between mechanical rules and constraint data from the design parameter set, use an optimization algorithm to judge the optimized parameters of the bending area, and obtain the final design constraint set.

[0027] Step S17. According to the final design constraint set, determine the output of the multi-level constraint data of the flexible printed circuit harness through the logical mapping of parameter parsing and data acquisition.

[0028] Specifically, by analyzing the parameters of line width, line spacing and impedance matching, the constraint data of the physical layer and the electrical layer can be obtained.

[0029] For example, in the flexible printed circuit design, the line width may be set to 0.1 mm, the line spacing is 0.15 mm, and the impedance target is 50 ohms. This parsing process is based on the dielectric constant of the circuit board material and the signal transmission requirements, aiming to ensure signal integrity.

[0030] Exemplarily, if the dielectric constant is 4.5 and the signal frequency is 1 GHz, by adjusting the line width and line spacing, the constraint ranges of the physical layer and the electrical layer can be preliminarily determined to form a multi-level constraint set. This step lays a data foundation for subsequent optimization. When extracting crosstalk suppression and electrical matching data from the preliminary constraint set, logical judgment can be used.

[0031] For example, the crosstalk suppression rate needs to reach more than 80%. If it is detected that the current design is only 70%, the line width needs to be adjusted to 0.12 mm and the line spacing to 0.18 mm to reduce the electromagnetic interference between adjacent signal lines.

[0032] In a possible implementation, the designer will verify the adjusted effect through a simulation tool to ensure that the electrical layer constraints meet the performance requirements after optimization. This can effectively improve the stability of signal transmission. According to the optimized electrical layer constraints, combined with the parameters of the bending area and mechanical rules, the mechanical layer constraint data can be obtained.

[0033] Specifically, the radius of curvature of the bending area may be required to be not less than 2 mm to avoid material fatigue fracture. After combining with the electrical layer data, the complete design constraint set will consider both electrical performance and mechanical durability.

[0034] For example, in a certain design, the line width of the bending area is adjusted to 0.15 mm, which not only meets the impedance matching but also meets the mechanical strength requirements. This comprehensive constraint improves the reliability of the design. For the complete design constraint set, a regression analysis tool can be used to optimize the line width, line spacing, and impedance matching parameters.

[0035] In one embodiment, by analyzing historical design data, the line width change range is determined to be 0.1 to 0.2 mm, and the impedance deviation is controlled within ±5%. This can help judge the boundary conditions of multi-level constraints, such as still meeting the crosstalk suppression requirements when the maximum line spacing is 0.2 mm.

[0036] Preferably, this method can also predict potential design bottlenecks. By analyzing the correlation between physical control and electrical matching through boundary conditions, the constraint data can be adjusted.

[0037] For example, if increasing the line width to 0.18 mm may cause the impedance to exceed the target value, the line spacing needs to be adjusted to 0.22 mm synchronously to maintain the match. This adjustment ensures that the set of design parameters for hierarchical division meets both electrical requirements and physical limitations.

[0038] It should be noted that this correlation analysis improves the feasibility of the design. When extracting the mapping relationship between mechanical rules and constraint data from the set of design parameters, an optimization algorithm can be used to judge the parameters of the bending area.

[0039] In one embodiment, the algorithm first ensures that the radius of curvature is 2.5 millimeters while optimizing the line width to 0.14 millimeters. This mapping relationship ensures a balance between mechanical flexibility and electrical performance.

[0040] For example, the adjusted parameters can reduce bending stress and improve product lifespan. According to the final set of design constraints, through the logical mapping of parameter parsing and data acquisition, the multi-level constraint data output of the flexible printed circuit harness is determined.

[0041] It can be understood that the output data may include specific values such as a line width of 0.15 millimeters, a line pitch of 0.2 millimeters, an impedance of 50 ohms, a bending radius of 2 millimeters, etc. This output not only meets the design specifications but also improves production efficiency and product reliability through multi-level constraint optimization.

[0042] For example, the final design can reduce signal distortion while ensuring that the flexible circuit remains functionally intact after multiple bends.

[0043] Optionally, step S17, according to the final set of design constraints, through the logical mapping of parameter parsing and data acquisition, determining the multi-level constraint data output of the flexible printed circuit harness, further includes: Step S171, by parsing the final set of design constraints, using a data extraction method to obtain constraint data from parameter parsing, obtaining a preliminary hierarchical set.

[0044] Step S172, for the preliminary hierarchical set, using a logical mapping method to determine the multi-level characteristics and determine the constraint structure of the hierarchical division.

[0045] Step S173, according to the constraint structure of the hierarchical division, extract the mapping relationship from data acquisition to obtain an adjusted set of constraint data.

[0046] Step S174, through the adjusted set of constraint data, use the support vector machine algorithm to determine the matching degree between parameter parsing and design constraints, and determine the optimized hierarchical set.

[0047] Step S175, for the optimized hierarchical set, use logical mapping to process the mapping relationship, obtain the correlation between multi-level characteristics and constraint data, and obtain a refined output set.

[0048] Step S176, according to the refined output set, obtain the distribution law of hierarchical division from data extraction, judge the integrity of set generation, and determine the final output set.

[0049] Step S177, through the final output set, use the clustering analysis algorithm to determine the multi-level distribution of design constraints, and obtain the hierarchical constraint output of the flexible printed circuit harness.

[0050] Specifically, when obtaining constraint data through a data extraction method by parsing the final design constraint set, it can be understood that the core of this method lies in sorting out key information from complex parameters.

[0051] For example, in the design of a flexible printed circuit harness, core data such as line width, line spacing, and impedance value may be extracted from a large number of parameters to form a preliminary hierarchical set.

[0052] Exemplarily, assuming the initial data includes a line width of 0.1 mm, a line spacing of 0.2 mm, and an impedance of 50 ohms, through data extraction, one can quickly focus on these key metrics and ignore secondary variables, thereby simplifying subsequent analysis.

[0053] Specifically, when using a logical mapping method to determine the multi-level characteristics for the preliminary hierarchical set, the levels can be divided by establishing logical relationships between parameters.

[0054] In one possible implementation, the line width and line spacing may be classified as physical layer characteristics, while the impedance and crosstalk suppression rate belong to the electrical layer. This division helps to clarify the constraint structures at different levels.

[0055] For example, the physical layer focuses on geometric characteristics, while the electrical layer focuses on signal integrity, and the two form a clear hierarchical relationship through logical mapping.

[0056] According to the constraint structure divided by levels, when extracting the mapping relationship from data acquisition, it should be noted that the extraction of the mapping relationship can reflect the dependence between parameters.

[0057] In one embodiment, if the line width is adjusted from 0.1 mm to 0.15 mm, the impedance may change from 50 ohms to 45 ohms. The clarification of this mapping relationship helps to generate an adjusted set of constraint data, providing a basis for subsequent optimization.

[0058] Preferably, when using the support vector machine algorithm to determine the matching degree between parameter parsing and design constraints through the adjusted set of constraint data, the parameters can be evaluated by classification to determine whether they meet the design requirements.

[0059] For example, setting the design constraint matching degree threshold to 90%, if the predicted design constraint matching degree of a certain set of parameters is 85%, then the line width or line spacing needs to be further adjusted. This method can effectively screen out the optimized hierarchical set and improve the reliability of the design.

[0060] Specifically, when using logical mapping to process the mapping relationship for the optimized hierarchical set, the correlation between multi-level characteristics and constraint data can be analyzed.

[0061] In one embodiment, electrical layer constraints (such as impedance matching) may affect the mechanical layer (such as the flexibility of the bending area).

[0062] For example, after impedance adjustment, the line pitch in the bending area needs to be increased from 0.2 mm to 0.25 mm to maintain flexibility. The sorting out of this correlation helps to generate a refined output set.

[0063] For example, according to the refined output set, when obtaining the distribution law of hierarchical division from data extraction, the distribution characteristics of each hierarchical parameter can be judged through statistical analysis. Assuming that the physical layer parameters are concentrated in the range of 0.1 - 0.2 mm and the electrical layer impedance is distributed between 45 - 55 ohms, the integrity of the set can be confirmed. The extraction of this distribution law lays the foundation for the final output set.

[0064] It can be understood that when using the clustering analysis algorithm to judge the multi-level distribution of design constraints through the final output set, the clustering can classify similar parameters into one category.

[0065] For example, designs with a line width of 0.1 - 0.15 mm are classified into the low impedance group, and those with a line width of 0.15 - 0.2 mm are classified into the high flexibility group. This classification method can clearly present the hierarchical constraint output of the flexible printed circuit wire harness, facilitating subsequent applications.

[0066] S2. According to the initial design constraint set, use the multi-objective optimization algorithm to perform preliminary layout calculations for high-density designs and dynamic stress fields, and determine the candidate solution set for intelligent layout.

[0067] Optionally, this step further includes: Step S21. Use the multi-objective optimization algorithm to obtain data on high-density designs and dynamic stress fields from the initial constraints and design set, complete the preliminary layout calculation, and obtain the preliminary layout result.

[0068] Optionally, the following formula is used to calculate the layout density: ;

[0069] Among them, is the layout density, represents the volume of the solid material, represents the total volume of the design space, p represents the number of sampling points, represents the stress value at the i-th sampling point.

[0070] Step S22. Through the preliminary layout result, for the change characteristics of the dynamic stress field, use the finite element analysis method to calculate the stress distribution data and determine the stress field adjustment parameters.

[0071] Step S23. According to the stress field adjustment parameters, combined with the space requirements of high-density designs, adjust the preliminary layout result to obtain the optimized layout plan.

[0072] In step S24, data extraction is performed on the optimized layout scheme to obtain its key features, and it is judged whether the constraint conditions for intelligent layout are satisfied. If satisfied, a candidate solution set is generated; if not satisfied, the adjustment parameters are returned.

[0073] In step S25, the key features for layout calculation are extracted from the candidate solution set, and the K-means clustering algorithm is used to analyze the similarity between the solutions to determine the solution clustering groups.

[0074] In step S26, through the solution clustering groups, for the solution features within the groups, the weighted average method is used to calculate the comprehensive performance index to obtain the performance ranking result.

[0075] In step S27, according to the performance ranking result, the solutions with the top 10% in the comprehensive performance index are screened out from the candidate solution set to determine the final solution set as the output result.

[0076] Specifically, when using the multi-objective optimization algorithm to obtain the data of high-density design and dynamic stress field from the initial constraints and design set, it can be understood that this process aims to balance multiple design requirements.

[0077] For example, in the design of flexible printed circuits, it may be necessary to consider both the space utilization rate and the uniformity of stress distribution simultaneously.

[0078] Exemplarily, the design set contains initial parameters of a line width of 0.15 mm and a line pitch of 0.2 mm. Through the multi-objective optimization algorithm, it can be calculated that the proportion of the solid material volume in the total volume of the design space reaches 60%, and at the same time, the stress value at the sampling points is controlled within the safe range. This method can provide data support for subsequent layout.

[0079] In a possible implementation, when analyzing the change characteristics of the dynamic stress field through the preliminary layout result, the finite element analysis method is used to calculate the stress distribution data.

[0080] Specifically, the designer may divide the circuit board into multiple regions and apply different dynamic loads to each region.

[0081] For example, after applying periodic stress to the bending region, the maximum stress value in a certain region is detected to be 50 MPa. By analyzing these data, the parameters that need to be adjusted can be determined, such as reducing the local line density to reduce stress concentration. This adjustment lays the foundation for optimizing the layout.

[0082] It should be noted that when adjusting the preliminary layout result in combination with the space requirements of high-density design, the circuit positions can be redistributed according to the stress field adjustment parameters.

[0083] For example, if the stress in a certain area is too high, the line pitch can be adjusted from 0.2 mm to 0.25 mm while maintaining the compactness of the overall layout.

[0084] Preferably, such adjustment can improve the space efficiency of the design.

[0085] In one embodiment, the adjusted layout scheme shows that the stress distribution is more uniform and the density of the key area still meets the design specifications. When extracting the key features from the optimized layout scheme, it is possible to determine whether the constraints of the intelligent layout are met.

[0086] For example, the extracted data may include an average stress value of 40 MPa and a layout density of 65%. If the constraints require the stress not to exceed 45 MPa and the density to be greater than 60%, then this scheme meets the requirements and a candidate scheme set is generated. If not, parameters such as the line pitch or line width are returned for adjustment. This data-driven judgment improves the controllability of the design.

[0087] In one embodiment, when using the K-means clustering algorithm to analyze the similarity between candidate schemes, the schemes can be grouped according to the stress distribution and density characteristics.

[0088] For example, the stress values of the schemes within a certain group are concentrated between 38 - 42 MPa and the density is between 62 - 66%. This grouping can clearly distinguish the characteristics of different schemes. When calculating the comprehensive performance index through the clustering and grouping of schemes, the weighted average method is a common choice.

[0089] For example, a weight of 40% is assigned to the stress distribution and a weight of 60% is assigned to the density, and the comprehensive index of a certain scheme is calculated to be 0.85. This method helps to quantify the advantages and disadvantages of the scheme.

[0090] It can be understood that when screening the top 10% of the schemes in terms of the comprehensive performance index according to the performance ranking results, this process ensures the high quality of the final scheme set.

[0091] For example, a scheme with a comprehensive index of 0.9, a stress value of 39 MPa, and a density of 67% is included in the final scheme set. This screening method improves the overall performance of the design.

[0092] In one possible implementation, the schemes in the final scheme set can also be further verified to ensure their long-term stability under dynamic stress. This rigorous process provides a reliable guarantee for the design of flexible printed circuits.

[0093] S3. Extract the physical layer control features of each scheme from the candidate scheme set, and by comparing the preset line width and line pitch thresholds with the dynamic stress field distribution, determine whether the physical layer control meets the high-density design requirements to obtain the screened layout scheme set.

[0094] Optionally, this step further includes: Step S31: Obtain the physical layer control data of each solution from the candidate solution set, use the principal component analysis tool to separate the control features, and obtain the feature set.

[0095] Step S32: For the control features in the feature set, compare with the preset line width and line pitch thresholds to determine whether they exceed the range, and obtain the preliminary screening feature set.

[0096] Step S33: Obtain the dynamic stress field data in the preliminary screening feature set, use the finite element analysis tool to calculate the stress distribution, and obtain the stress distribution set.

[0097] Step S34: If the values in the stress distribution set satisfy the line width and line pitch rules corresponding to the high-density design, retain the corresponding solutions to obtain the first layout solution set.

[0098] Step S35: Extract the remaining features of the physical layer control from the first layout solution set, and determine whether they are consistent through a secondary comparison with the preset line width and line pitch thresholds to obtain the second layout solution set.

[0099] Step S36: Use the support vector machine algorithm to classify the second layout solution set to determine the final layout solution set that meets the conditions.

[0100] Step S37: By calculating the stress distribution results in the final layout solution set, obtain the physical layer control features of the screening results to obtain the optimized layout solution set.

[0101] Specifically, when obtaining the physical layer control data of each solution from the candidate solution set, it can be understood that this process aims to extract the core parameters directly related to the design performance.

[0102] Exemplarily, in the flexible printed circuit design, the physical layer control data may include line width, line pitch, material thickness, etc. Suppose the line width of a certain solution is 0.15 mm, the line pitch is 0.2 mm, and the material thickness is 0.05 mm. The principal component analysis tool can decompose these data into independent features, such as the impact of line width on space utilization and the contribution of line pitch to electrical performance, to generate the feature set. When using the principal component analysis tool to separate the control features, specifically, the designer may focus on the dimensionality reduction processing of the data.

[0103] In a possible implementation, by analyzing the line width and line pitch combinations of multiple solutions, the main features accounting for 80% of the total variance are extracted, such as the impact of line width variation on the overall layout density. This method can simplify the subsequent judgment.

[0104] For example, when comparing the control features in the feature set with the preset line width and line pitch thresholds, the preset line width threshold is 0.1 - 0.2 mm, and the line pitch is 0.15 - 0.25 mm. For a certain solution, the line width is 0.15 mm and the line pitch is 0.18 mm, which is within the range; for another solution, the line width is 0.22 mm, which exceeds the line width and line pitch thresholds and is thus excluded. This screening ensures that the solution complies with the basic rules.

[0105] When obtaining dynamic stress field data and using finite element analysis, it should be noted that the designer may divide the circuit board into several regions.

[0106] In one embodiment, a periodic load is applied to a certain bending region, and the calculation results show that the stress at a certain point is 45 MPa.

[0107] Preferably, this analysis can accurately locate the high-stress regions, providing a basis for subsequent optimization. If the stress distribution set meets the high-density design rules, the solution is retained.

[0108] For example, for a certain solution, the stress values are all lower than 50 MPa, and the line width and line pitch meet the requirements, so it is included in the first layout solution set. This retention method ensures the feasibility of the solution.

[0109] When extracting the remaining features from the first layout solution set and performing a secondary comparison, it can be understood that this process further refines the screening.

[0110] In one embodiment, after the line pitch of a certain solution is adjusted to 0.22 mm, it still meets the line width and line pitch threshold requirements and enters the second layout solution set. This secondary verification improves the reliability of the design.

[0111] Specifically, when classifying the solution set using the support vector machine algorithm, it can be divided according to features such as stress values and density.

[0112] For example, for a certain solution with a stress of 40 MPa and a density of 65%, it is classified as a high-performance category. This classification can quickly lock in high-quality solutions.

[0113] In one possible implementation, when calculating the stress distribution results of the final layout solution set, the designer extracts the average stress of a certain solution as 38 MPa and the local maximum as 42 MPa, generating an optimized layout solution set.

[0114] Exemplarily, this result reflects the balance of the design, providing a solid basis for subsequent verification.

[0115] S4. For the screened layout solution set, obtain the electrical layer matching data of each solution, and determine the optimized layout solution set with qualified electrical performance by calculating the deviations of the impedance matching degree and crosstalk suppression rate from the preset standards.

[0116] Optionally, this step further includes: Step S41: Obtain the electrical layer matching data of each layout scheme in the filtered layout scheme set to obtain an initial data set. Step S42: Extract the impedance matching degree and crosstalk suppression rate from the initial data set, and calculate the deviation between the impedance matching degree and crosstalk suppression rate and the preset standard to obtain a deviation data set. Step S43: If the impedance matching degree deviation in the deviation data set is less than the first preset threshold, determine that the impedance matching performance of this scheme meets the standard to obtain an impedance matching compliance set. Step S44: If the crosstalk suppression rate deviation in the deviation data set is less than the second preset threshold, determine that the crosstalk suppression performance of this scheme meets the standard to obtain a crosstalk suppression compliance set. Step S45: Obtain the intersection of the impedance matching compliance set and the crosstalk suppression compliance set, and determine the schemes whose electrical performance simultaneously meets the dual standards of impedance matching performance and crosstalk suppression performance to obtain a preliminary optimized scheme set. Step S46: Classify the preliminary optimized scheme set using the support vector machine algorithm to judge the electrical layer feature differences between each scheme to obtain a final optimized layout scheme set. Step S47: Obtain the electrical layer matching data update record of each scheme in the final optimized layout scheme set, and determine the dynamic optimization result of the final optimized layout scheme set according to the electrical layer matching data update record.

[0117] Specifically, when obtaining the electrical layer matching data of each layout scheme in the filtered layout scheme set, it can be understood that this process aims to collect a data set directly related to electrical performance.

[0118] For example, in flexible circuit design, the electrical layer matching data may include the impedance value of the signal transmission line, the crosstalk value between adjacent signal lines, etc.

[0119] Exemplarily, the impedance value of a certain scheme is 50 ohms and the crosstalk value is -30 dB, and these data form the basis of the initial data set.

[0120] In a possible implementation manner, when extracting the impedance matching degree and crosstalk suppression rate from the initial data set, the designer may focus on signal integrity. Specifically, the impedance matching degree reflects the degree of proximity between the transmission line and the target impedance, and the crosstalk suppression rate measures the control level of signal interference.

[0121] For example, the impedance matching degree of a certain scheme is 98% and the crosstalk suppression rate is -28 dB. After comparison with the preset standards of 50 ohms and -25 dB, the deviations are 2% and 3 dB respectively, forming a deviation data set. This extraction method lays the foundation for subsequent analysis.

[0122] It should be noted that when judging whether the impedance matching performance meets the standard, if the impedance matching deviation of a certain scheme is 1%, which is lower than the first preset threshold of 3%, its performance is considered qualified.

[0123] Exemplarily, the deviation of another scheme is 4%, which exceeds the first preset threshold and is excluded. This screening ensures the stability of signal transmission.

[0124] Preferably, the determination of crosstalk suppression performance is similar. If the crosstalk suppression rate deviation of a certain scheme is 2 dB, which is less than the second preset threshold of 5 dB, it is included in the qualified set.

[0125] For example, the deviation of a certain scheme is 6 dB, which is excluded due to insufficient interference control. This method improves the anti-interference ability of the design.

[0126] In one embodiment, when obtaining the intersection of the impedance matching qualified set and the crosstalk suppression qualified set, the designer locks the schemes that meet the dual criteria. Specifically, if a certain scheme has an impedance deviation of 1% and a crosstalk deviation of 2 dB, and both conditions are met, it enters the preliminary optimization scheme set. This intersection method ensures the comprehensiveness of electrical performance.

[0127] It can be understood that when using the support vector machine algorithm to classify the preliminary optimization scheme set, this process distinguishes the differences in electrical layer characteristics between the schemes.

[0128] For example, a certain scheme has a high impedance matching degree but slightly weak crosstalk, and is classified as the "high stability type"; another scheme has excellent crosstalk suppression and is classified as the "low interference type". This classification facilitates the rapid screening of high-quality schemes.

[0129] In one possible implementation, when obtaining the electrical layer matching data update record of the final optimized layout scheme set, the designer tracks the process of scheme adjustment.

[0130] Exemplarily, the initial impedance of a certain scheme is adjusted from 52 ohms to 50 ohms, and the crosstalk is optimized from -27 dB to -30 dB. These records reflect the dynamic optimization results and provide a basis for subsequent verification.

[0131] S5. In the optimized layout scheme set, obtain the mechanical layer rule parameters, and by simulating the response curve of the bending area under the dynamic stress field, judge whether it meets the reliability requirements of the repeated bending scenario, and obtain the final layout scheme set with qualified mechanical performance.

[0132] Optionally, this step further includes: Step S51, obtain the key parameter data by parsing the mechanical layer rules.

[0133] Step S52, use the obtained parameter data to perform a simulation analysis of the bending area under the dynamic stress field, and obtain a set of response curves.

[0134] Step S53: Extract feature point data from the set of response curves and determine whether the reliability requirements for the repeated bending scenario are met.

[0135] Step S54: If the feature point data exceeds the preset feature point threshold, eliminate the corresponding layout scheme to obtain a preliminary screened set of schemes.

[0136] Step S55: Use the scikit-learn library in Python to classify the mechanical properties of the preliminarily screened set of schemes through a support vector machine to determine a subset of high-performance schemes.

[0137] Step S56: Obtain the stress distribution data of the subset of high-performance schemes, and through iterative simulation analysis, judge the stability of the scheme under repeated bending to obtain an optimized set of schemes.

[0138] Step S57: Adopt the statistical features of the optimized set of schemes, use the scikit-learn library in Python, and through a logistic regression algorithm, determine the final set of layout schemes that meet the mechanical properties.

[0139] Specifically, when obtaining key parameter data by parsing the mechanical layer rules, it can be understood that this process aims to extract the core information affecting the mechanical properties of the layout scheme.

[0140] For example, in flexible circuit design, the key parameters may include the elastic modulus, thickness, and bending radius of the material.

[0141] Exemplarily, for a certain scheme, the elastic modulus of the material is 2 GPa, the thickness is 0.1 mm, and the bending radius is 5 mm. These data provide a basis for subsequent analysis. When performing simulation analysis of the bending area under a dynamic stress field using the obtained parameter data to obtain a set of response curves.

[0142] In a possible implementation, the designer uses a finite element analysis tool to simulate the bending process.

[0143] Specifically, after inputting an elastic modulus of 2 GPa and a thickness of 0.1 mm, the simulation shows that the maximum stress value of a certain scheme under dynamic stress is 50 MPa, and the response curve shows the trend of stress changing with time. This method helps to reveal the behavior of the scheme in actual use.

[0144] It should be noted that when extracting feature point data from the set of response curves and determining whether the reliability requirements for the repeated bending scenario are met, the feature points may include the maximum stress point and the fatigue life point.

[0145] For example, the maximum stress of a certain solution is 50 MPa, and the fatigue life is expected to be 100,000 bending times. Compared with the preset standards of 60 MPa and 80,000 times, it shows that its reliability is relatively excellent. This extraction method provides a basis for screening.

[0146] Preferably, if the feature point data exceeds the preset feature point threshold, the corresponding layout solution is excluded. When obtaining the initially screened solution set, the designer sets the maximum stress threshold to 60 MPa.

[0147] Exemplarily, the stress of a certain solution reaches 70 MPa and is excluded for exceeding the maximum stress threshold; another solution with 55 MPa is retained. This screening ensures the mechanical safety of the solution. Using the scikit-learn library in Python, when classifying the mechanical properties of the initially screened solution set through support vector machines to determine the high-performance solution subset.

[0148] In one embodiment, the classification basis may be stress values and life data.

[0149] For example, a solution with low stress and long life is classified as "high durability type"; another solution with slightly higher stress but still qualified is classified as "balanced type". This classification facilitates locking in high-quality solutions.

[0150] Specifically, when obtaining the stress distribution data of the high-performance solution subset and judging the stability of the solution under repeated bending through iterative simulation analysis to obtain the optimized solution set, the designer pays attention to the uniformity of the stress distribution.

[0151] Exemplarily, the stress distribution range of a certain solution is between 40 - 50 MPa, and the stability is improved after iteration and it enters the optimization set. This method improves the long-term reliability of the solution.

[0152] In a possible implementation manner, when using the statistical features of the optimized solution set and using the scikit-learn library in Python to determine the final layout solution set that meets the mechanical properties through the logistic regression algorithm, the statistical features may include the stress mean and life variance.

[0153] For example, the stress mean of a certain solution is 45 MPa and the variance is small, and the logistic regression predicts that it meets the requirements. This method optimizes the final solution through data-driven and enhances the robustness of the design.

[0154] S6. According to the final layout solution set, use the genetic algorithm to dynamically coordinate and optimize the physical layer control, electrical layer matching, and mechanical layer rules to obtain an intelligent layout design result that takes into account the constraints of all three.

[0155] Optionally, this step further includes: Step S61. Generate initial layout data from the solution set using the genetic algorithm to obtain a preliminary solution set.

[0156] Step S62: Extract the constraint conditions for physical layer control and electrical layer matching based on the preliminary solution set to form a multi-dimensional constraint condition set.

[0157] Step S63: Use the dynamic coordination algorithm to iteratively adjust the multi-dimensional constraint condition set to generate a coordinated parameter set.

[0158] Step S64: Search the coordinated parameter set through the global optimization algorithm to determine the optimal solution range.

[0159] Step S65: Extract the boundary conditions of the mechanical layer rules according to the optimal solution range to generate a rule matching result.

[0160] Step S66: Use the genetic algorithm to iteratively optimize the rule matching result to generate an intelligent design output.

[0161] Step S67: Verify the integrity of the layout according to the intelligent design output to generate the final layout plan.

[0162] Specifically, when generating the initial layout data from the solution set using the genetic algorithm to obtain the preliminary solution set, it can be understood that this process aims to quickly generate diverse design starting points by simulating the natural selection mechanism.

[0163] For example, in flexible electronics design, the initial layout data may include combinations of different layer spacings and trace widths. For instance, Plan A with a layer spacing of 0.2 mm and a trace width of 0.15 mm, and Plan B with a layer spacing of 0.3 mm and a trace width of 0.1 mm. These data are generated through the crossover and mutation operations of the genetic algorithm to form a preliminary solution set, laying the foundation for subsequent optimization.

[0164] When extracting the constraint conditions for physical layer control and electrical layer matching based on the preliminary solution set to form a multi-dimensional constraint condition set, it should be noted that physical layer control may involve material stiffness and thermal expansion coefficient, while electrical layer matching focuses on resistance and signal delay.

[0165] For example, Plan A has a material stiffness of 1.5 GPa and a resistance value of 10 ohms; Plan B has a stiffness of 2.0 GPa and a resistance value of 8 ohms.

[0166] In a possible implementation, the designer sets the stiffness upper limit to 2.5 GPa and the resistance upper limit to 12 ohms to form a constraint condition set to ensure the feasibility of the layout in terms of physical and electrical performance.

[0167] Specifically, when using the dynamic coordination algorithm to iteratively adjust the multi-dimensional constraint condition set to generate a coordinated parameter set, the dynamic coordination algorithm optimizes by weighing the priorities of each constraint.

[0168] Exemplarily, the resistance of Solution A is slightly higher but the stiffness is appropriate. The algorithm may adjust the layer spacing to 0.25 mm, reducing the resistance to 9 ohms while maintaining the stiffness stable. This iterative adjustment generates a coordinated parameter set, enhancing the overall consistency of the design.

[0169] In one embodiment, when determining the optimal solution range by searching the coordinated parameter set through a global optimization algorithm, the global optimization algorithm may be the simulated annealing method for exploring the parameter space.

[0170] For example, for Solution B, the algorithm searches and finds that when the trace width is adjusted to 0.12 mm, the resistance and stiffness reach an equilibrium point, determining it as part of the optimal solution range. This method ensures efficient screening from a global perspective.

[0171] Preferably, according to the optimal solution range, when extracting the boundary conditions of the mechanical layer rules to generate the rule matching result, the boundary conditions may include the minimum bend radius and the maximum stress limit.

[0172] For example, the minimum bend radius of Solution A is 4 mm and the maximum stress is 45 MPa, meeting the rule requirements; while after adjustment, Solution B is 5 mm and 40 MPa, also meeting the conditions. This extraction process provides an accurate basis for subsequent intelligent design.

[0173] In one possible implementation, when using a genetic algorithm to iteratively optimize the rule matching result to generate the intelligent design output, the genetic algorithm further refines the parameters through multiple rounds of iteration.

[0174] Exemplarily, the layer spacing of Solution A is optimized from 0.25 mm to 0.22 mm, and the stress is reduced to 42 MPa, generating a more intelligent output. This method improves the adaptability and accuracy of the design.

[0175] For example, according to the intelligent design output, when verifying the integrity of the layout to generate the final layout plan, the designer checks the trace connectivity and stress distribution of Solution A and finds that it performs stably under repeated bending, and finally confirms it as the preferred solution.

[0176] In another embodiment, Solution B is also included in the final solution set due to better thermal expansion matching. This verification ensures the practicality and reliability of the layout.

[0177] Optionally, step S67, according to the intelligent design output, verifying the integrity of the layout to generate the final layout plan, further includes: Step S671, obtaining layout data according to the design output, performing data cleaning and preprocessing through the Pandas library of Python to obtain the initial verification set.

[0178] Step S672: Use the decision tree algorithm in Scikit-learn to judge the integrity of the initial validation set and obtain the verification result.

[0179] Step S673: Determine the integrity status according to the accuracy rate and recall rate in the verification result.

[0180] Step S674: If the integrity status is abnormal, generate correction data through the K-nearest neighbor algorithm.

[0181] Step S675: Integrate the data using the Pandas library according to the correction data to obtain the updated layout set.

[0182] Step S676: Optimize the updated layout set through the random forest algorithm in Scikit-learn to obtain an optimization plan.

[0183] Step S677: According to the optimization plan, obtain the final plan and determine the layout integrity of the final plan through cross-validation.

[0184] Step S678: Use the Matplotlib library to generate an intelligent layout output for the final plan.

[0185] Specifically, obtain layout data according to the design output, and perform data cleaning and preprocessing through the Pandas library in Python to obtain the initial validation set. The core of this process is to convert the original layout data into analyzable structured data.

[0186] For example, table data containing position coordinates, electrical connection parameters, and mechanical dimensions can be extracted from the design output. Duplicate items are removed, missing values are filled, and non-numerical data is converted into numerical data through Pandas to generate a clean initial validation set, such as a two-dimensional data table containing 1000 rows of layout parameters.

[0187] It should be noted that this process ensures the data quality for subsequent analysis. Use the decision tree algorithm in Scikit-learn to judge the integrity of the initial validation set and obtain the verification result. The decision tree classifies data by constructing feature rules.

[0188] For example, whether the coordinates in the physical layer exceed the boundary and whether the electrical layer connection is closed can be used as features to judge whether the layout is complete.

[0189] In a possible implementation, if the validation set contains 500 layout samples, the decision tree may identify that 450 samples meet the integrity requirements and output a classification label of "complete" or "incomplete".

[0190] It is understandable that this method is intuitive and easy to explain, facilitating quick problem location. The integrity status is determined based on the accuracy and recall rate in the verification results.

[0191] Specifically, the accuracy reflects the overall correctness of the classification, while the recall rate focuses on whether incomplete samples are missed.

[0192] Exemplarily, if the accuracy is 95% and the recall rate is 90%, it indicates that the integrity status is relatively reliable. If it is lower than expected, further adjustment is required.

[0193] Preferably, this indicator provides a quantitative basis for subsequent correction. If the integrity status is abnormal, correction data is generated through the K-nearest neighbor algorithm. K-nearest neighbor searches for similar solutions based on the distance between samples.

[0194] For example, if the electrical connection parameters of a layout sample are abnormal, 5 most similar normal samples can be found from the validation set, and their average value is taken to correct the abnormal point. For example, the voltage value is adjusted from the abnormal 50V to the average value of the neighboring samples, which is 48V.

[0195] In one embodiment, this method can effectively smooth local anomalies and ensure data consistency. According to the correction data, the Pandas library is used for data integration to obtain the updated layout set. This process is to re-combine the corrected data.

[0196] For example, 100 corrected samples are integrated with the original 900 samples to form a new 1000-row data table.

[0197] It should be noted that the efficient merging function of Pandas ensures seamless data connection. Through the random forest algorithm in Scikit-learn, the updated layout set is optimized to obtain an optimization plan. The random forest improves robustness through the integration of multiple decision trees.

[0198] For example, based on the comprehensive constraints of the physical layer, electrical layer, and mechanical layer, 10 trees can be generated, and each tree outputs an optimized layout. Finally, the best plan is selected by voting.

[0199] It is understandable that this method performs more stably under complex constraints. According to the optimization plan, the final plan is obtained, and the layout integrity is determined through cross-validation. Cross-validation divides the data into 5 folds and trains and tests alternately.

[0200] For example, among 1000 samples, 800 are for training and 200 are for testing, repeating 5 times. The verification accuracy is stable above 98%, confirming that the plan is reliable.

[0201] Preferably, this method improves the credibility of the results. Using the Matplotlib library, an intelligent layout output is generated for the final plan.

[0202] For example, a two-dimensional layout diagram can be drawn, with the horizontal axis representing the physical location and the vertical axis representing the electrical parameters. The mechanical rule compliance is distinguished by colors to visually display the optimization results.

[0203] In one embodiment, this visualization facilitates designers to quickly understand and adjust the layout.

[0204] Exemplarily, this output can also provide a reference for subsequent decision-making and improve the design efficiency.

[0205] S7. Through the intelligent layout design result, obtain the quantitative indicators of the process design effect such as the production cycle and error rate. By comparing and analyzing with historical data, determine the improvement range of product reliability, and output the final process design scheme.

[0206] Optionally, this step further includes: Step S71. Generate an initial process design scheme through a preset intelligent layout tool to obtain the preliminary design result.

[0207] Step S72. Extract the production cycle and error rate from the preliminary design result as quantitative indicators.

[0208] Step S73. Obtain historical data, and use a standardization method to process the production cycle and error rate data to obtain a standardized data set.

[0209] Step S74. Use a comparative analysis method to process the standardized data set and the quantitative indicators to judge the change trend of product reliability.

[0210] Step S75. Calculate the improvement range according to the change trend and determine the quantitative value of the reliability improvement.

[0211] Step S76. Adjust the initial process design scheme using the improvement range and output the optimized final scheme.

[0212] Step S77. Perform data processing on the final scheme to obtain the complete quantitative indicator set of the process design.

[0213] Specifically, generating an initial process design scheme through a preset intelligent layout tool to obtain the preliminary design result can be understood as using an automated tool to quickly construct a basic design framework.

[0214] For example, when manufacturing a circuit board, the tool automatically generates a preliminary wiring scheme and component position distribution according to the input component list and connection requirements.

[0215] In a possible implementation, the tool will give priority to the shortest path principle to ensure signal transmission efficiency, while the generated visualization results are convenient for subsequent adjustment. Extract the production cycle and error rate from the preliminary design results as quantitative indicators. This step focuses on transforming the design into measurable parameters.

[0216] Specifically, the production cycle can be the time required to complete a circuit board. For example, the preliminary plan shows that it takes 48 hours, and the error rate may be the failure rate of solder joints, assumed to be 2%.

[0217] Exemplarily, these indicators provide a data basis for subsequent optimization and help clarify the improvement direction. Obtain historical data and use standardization methods to process the production cycle and error rate data to obtain a standardized data set. This step aims to eliminate the dimensional differences between the data.

[0218] In one embodiment, assuming that the production cycle range in the historical data is 40 - 60 hours and the error rate is between 1% - 3%, through standardization processing (such as mean normalization), these data can be transformed into the range of 0 - 1 for unified analysis.

[0219] It should be noted that this method can effectively improve the comparability of data. Use the comparative analysis method to process the standardized data set and quantitative indicators to judge the change trend of product reliability. This process reveals the improvement space through the comparison of historical and current data.

[0220] For example, comparing the current production cycle of 48 hours and error rate of 2% with the historical best data (40 hours, 1% error rate), it is found that the reliability has decreased.

[0221] Preferably, this analysis can also combine with time series to observe whether the trend is stable. Calculate the improvement amplitude according to the change trend to determine the quantitative value of reliability improvement. This step transforms the trend into a specific goal.

[0222] In a possible implementation, if the historical best data is taken as a reference, the production cycle can be shortened to 42 hours and the error rate can be reduced to 1.5%, with improvement amplitudes of 12.5% and 25% respectively.

[0223] It can be understood that these quantitative values directly guide subsequent optimization. Adjust the initial process design scheme according to the improvement amplitude and output the optimized final scheme. This process feeds the data back into the design.

[0224] For example, adjust the wiring density or optimize the soldering parameters to shorten the production cycle to 42 hours and reduce the error rate to 1.5%.

[0225] Specifically, such adjustments can also reduce resource waste and improve production consistency. Data processing is performed on the final solution to obtain a complete set of quantitative indicators for the process design, which provides a basis for the comprehensive evaluation of the design.

[0226] In one embodiment, the final set of indicators may include a production cycle of 42 hours, an error rate of 1.5%, a 10% reduction in energy consumption, etc.

[0227] Exemplarily, these indicators not only verify the feasibility of the solution but also provide data support for continuous improvement, contributing to the enhancement of the overall process level.

[0228] S8. If the impedance matching degree or crosstalk suppression rate of the final process design solution is lower than the matching degree threshold, the layout design result is recalculated by adjusting the electrical layer matching parameters to obtain an updated process design solution.

[0229] Optionally, this step further includes: Step S81: Obtain the data of the impedance matching degree and crosstalk suppression rate from the process design solution and determine whether it is lower than the preset matching degree threshold.

[0230] Step S82: If the impedance matching degree or crosstalk suppression rate is lower than the preset matching degree threshold, extract the current values from the electrical layer parameters and use a parameter optimization tool to adjust the parameter configuration.

[0231] Step S83: According to the adjusted electrical layer parameters, use a layout design tool to recalculate the layout design and obtain an updated calculation result.

[0232] Step S84: For the updated calculation result, obtain the new impedance matching degree and crosstalk suppression rate and determine whether they meet the matching degree threshold.

[0233] Step S85: If it still does not meet the matching degree threshold, iteratively adjust the electrical layer parameters through a parameter optimization tool, repeatedly use the layout design tool to calculate the layout design, and obtain a further optimized result.

[0234] Step S86: Determine the final process design solution based on the optimized result and generate an updated solution.

[0235] Step S87: Use a verification tool to verify the impedance matching degree and crosstalk suppression rate of the updated solution to obtain a qualified process design solution.

[0236] Specifically, obtaining the data of the impedance matching degree and crosstalk suppression rate from the process design solution and determining whether it is lower than the preset matching degree threshold focuses on evaluating the key indicators of electrical performance.

[0237] For example, in circuit board design, the impedance matching degree reflects the stability of signal transmission, while the crosstalk suppression rate measures the degree of interference between adjacent lines.

[0238] Specifically, assume that the preset matching degree threshold is that the impedance matching degree needs to reach 90% and the crosstalk suppression rate needs to be higher than 85%. The current solution data shows 88% and 83%, which are obviously not up to the standard.

[0239] Exemplarily, this judgment provides a clear direction for subsequent optimization. If the impedance matching degree or the crosstalk suppression rate is lower than the preset matching degree threshold, extract the current value from the electrical layer parameters and use a parameter optimization tool to adjust the parameter configuration.

[0240] In one possible implementation, the electrical layer parameters may include the dielectric thickness, conductor width, etc.

[0241] For example, the current dielectric thickness is 1 mm and the conductor width is 0.2 mm. After tool analysis, it is recommended to adjust the dielectric thickness to 1.2 mm to improve impedance matching. This adjustment is based on the impact of the parameters on signal transmission and can effectively improve the electrical performance. According to the adjusted electrical layer parameters, use a layout design tool to recalculate the layout design and obtain the updated calculation result.

[0242] It should be noted that the layout design tool will re-plan the wiring path and component positions according to the new parameters.

[0243] For example, the adjusted dielectric thickness may cause the wiring spacing to increase, thereby reducing crosstalk.

[0244] In one embodiment, the new layout generated by the tool shows that the crosstalk suppression rate is increased from 83% to 86%, and the impedance matching degree is close to 90%. The results are gradually approaching the expectation. For the updated calculation result, obtain the new impedance matching degree and crosstalk suppression rate, and judge whether they meet the preset matching degree threshold.

[0245] Specifically, if the new data is an impedance matching degree of 90% and a crosstalk suppression rate of 86%, the former has reached the standard, while the latter still needs to be optimized.

[0246] Preferably, this step-by-step verification can clearly locate the problem points and avoid blind adjustment.

[0247] It can be understood that the process of gradually approaching the matching degree threshold improves the accuracy of the design. If the matching degree threshold is still not met, iterate and adjust the electrical layer parameters through a parameter optimization tool, and repeatedly use the layout design tool to calculate the layout design to obtain a further optimized result.

[0248] In one embodiment, the tool may further adjust the conductor width to 0.25 mm, and after recalculation, the crosstalk suppression rate rises to 87%.

[0249] Exemplarily, the iterative process can continuously narrow the gap with the target, ensuring the gradual improvement of the design. Based on the optimized results, determine the final process design plan and generate an updated plan.

[0250] For example, after multiple adjustments, the impedance matching degree of the final plan is stabilized at 92% and the crosstalk suppression rate reaches 88%, both exceeding the matching degree threshold.

[0251] Specifically, this plan not only meets the performance requirements but also improves the reliability of signal transmission. In one possible implementation, the updated plan also optimizes the wiring density to further reduce potential interference. Use a verification tool to verify the impedance matching degree and crosstalk suppression rate of the updated plan, and obtain a process design plan that meets the conditions.

[0252] It should be noted that the verification tool confirms the authenticity of the data through simulation tests.

[0253] For example, the simulation results show that the impedance matching degree is 92% and the crosstalk suppression rate is 88%, which is consistent with the calculation.

[0254] Exemplarily, this verification ensures the feasibility of the plan, provides a reliable basis for production, and helps to improve the stability of the overall electrical performance.

[0255] S9. Through the updated process design plan, obtain the stress distribution data of the bending area gauge. Through the matching degree analysis with the dynamic stress field, determine whether it is necessary to further optimize the mechanical layer rules, and output the adjusted complete design plan.

[0256] Optionally, this step further includes: Step S91. Through the updated process design plan, obtain the stress distribution data of the bending area, and use the finite element analysis method to obtain the initial stress distribution result.

[0257] Step S92. Extract the key area data from the initial stress distribution result, and perform the matching degree analysis using the Pearson correlation coefficient for the dynamic stress field to determine the matching degree deviation value.

[0258] Step S93. If the matching degree deviation value exceeds the preset deviation value threshold, adjust the mechanical layer rule parameters and output the updated rule set.

[0259] Step S94. According to the updated rule set, re-obtain the stress distribution data of the bending area to obtain the adjusted stress distribution result.

[0260] Step S95. Perform a secondary matching degree analysis using the adjusted stress distribution result and the dynamic stress field to determine whether the deviation converges.

[0261] Step S96: Generate complete design scheme data based on the deviation convergence result and output the final process design scheme.

[0262] Step S97: Obtain the verification data of the final process design scheme and determine the stability of the scheme using the ANSYS simulation tool.

[0263] Specifically, when obtaining the stress distribution data of the bending area through the updated process design scheme, the finite element analysis method can be used to simulate the mechanical behavior of the circuit board in the bent state.

[0264] Exemplarily, in circuit board design, the bending area is usually a key position of the flexible part, and its stress distribution directly affects the durability of the structure.

[0265] In a possible implementation, the designer imports the geometric model of the updated scheme into the analysis software, sets the material properties such as elastic modulus and Poisson's ratio, and then applies the bending load. The obtained initial stress distribution result may show that the maximum stress value in a certain area is 150 MPa, concentrated near the connection point. This method can intuitively reflect the stress concentration area through mesh generation and numerical simulation, providing a basis for subsequent analysis. When extracting the key area data from the initial stress distribution result, the matching degree of the dynamic stress field needs to be concerned.

[0266] It should be noted that the dynamic stress field reflects the stress changes of the circuit board during actual use, such as the fatigue effect during repeated bending.

[0267] Specifically, the data of the stress peak area can be extracted, and the Pearson correlation coefficient can be used to calculate its correlation with the expected stress field. Suppose the peak value of the expected stress field is 140 MPa, while the initial result is 150 MPa, and the calculated matching degree deviation value is 0.15, exceeding the preset deviation value threshold of 0.1. This analysis can quickly locate the source of the deviation and provide a direction for optimization. If the matching degree deviation value exceeds the deviation value threshold, it is necessary to adjust the mechanical layer rule parameters.

[0268] Preferably, the mechanical layer rules may include the interlayer thickness or material stiffness.

[0269] For example, the current interlayer thickness is 0.5 mm, and the analysis shows that the stress concentration is related to the insufficient thickness.

[0270] In one embodiment, the thickness is adjusted to 0.6 mm to generate an updated rule set. This adjustment reduces the stress peak and gradually improves the distribution uniformity by enhancing the local rigidity. When re-obtaining the stress distribution data according to the updated rule set, the adjusted result may show that the maximum stress drops to 145 MPa.

[0271] Exemplarily, after re-running the finite element analysis, the distribution of the stress concentration area becomes smoother. This method can effectively verify the feasibility of the adjustment and ensure that the design gradually approaches the expectation. When performing a secondary matching degree analysis on the adjusted stress distribution result and the dynamic stress field, it is possible to determine whether the deviation converges.

[0272] In a possible implementation, if the new deviation value drops to 0.08, which is lower than the deviation value threshold of 0.1, it indicates that the adjustment is effective.

[0273] It can be understood that this iterative verification can improve the accuracy of the design and ensure that the stress distribution meets the usage requirements. After generating the complete design scheme data through the deviation convergence result, the output final scheme integrates all optimization parameters.

[0274] For example, the adjusted interlayer thickness and material configuration form a complete set of rules suitable for production. This integrity ensures the implementation efficiency of the scheme. When obtaining the verification data of the final process design scheme, using the ANSYS simulation tool can further confirm the stability.

[0275] Specifically, the simulation may show that the maximum stress stabilizes at 142 MPa and is evenly distributed. This verification passes multi-condition tests to ensure the reliability of the scheme under different bending scenarios and provides a solid guarantee for mass production.

[0276] As Figure 2 shown, the second aspect of the present invention provides a design system for the intelligent layout of a flexible printed circuit harness, which uses the method described above to design the intelligent layout. The system mainly includes: A constraint data acquisition module, which is used to acquire the multi-level constraint data of the flexible printed circuit harness, and obtain the initial design constraint set by parsing the physical layer control parameters such as line width and line spacing, the electrical layer matching parameters such as impedance matching degree and crosstalk suppression rate, and the mechanical layer rule parameters such as bending area rules; A preliminary layout calculation module, which is used to perform a preliminary layout calculation on the high-density design and the dynamic stress field according to the initial design constraint set by using a multi-objective optimization algorithm, and determine the candidate scheme set of the intelligent layout; A physical layer control screening module, which is used to extract the physical layer control characteristics of each scheme from the candidate scheme set, and judge whether the physical layer control meets the high-density design requirements by comparing the preset line width and line spacing thresholds and the dynamic stress field distribution, and obtain the screened layout scheme set; An electrical layer matching optimization module, which is used to obtain the electrical layer matching data of each scheme for the screened layout scheme set, and determine the optimized layout scheme set with qualified electrical performance by calculating the deviation of the impedance matching degree and the crosstalk suppression rate from the preset standard; The mechanical layer rule verification module is used to obtain mechanical layer rule parameters from the optimized layout solution set, judge whether the reliability requirements of the repeated bending scenario are met by simulating the response curve of the bending area rule under the dynamic stress field, and obtain the final layout solution set with qualified mechanical performance; The dynamic coordination optimization module is used to dynamically coordinate and optimize the physical layer control, electrical layer matching and mechanical layer rules according to the final layout solution set by using the genetic algorithm, and obtain the intelligent layout design result that takes into account the constraints of all three; The process design evaluation module is used to obtain the quantitative indicators of the process design effect such as the production cycle and error rate from the intelligent layout design result, determine the improvement range of the product reliability through the comparative analysis with historical data, and output the final process design plan; The electrical parameter adjustment module is used to recalculate the layout design result by adjusting the electrical layer matching parameters and obtain the updated process design plan if the impedance matching degree or crosstalk suppression rate of the final process design plan is lower than the matching degree threshold; The mechanical rule optimization module is used to obtain the stress distribution data of the bending area rule from the updated process design plan, judge whether it is necessary to further optimize the mechanical layer rule through the matching degree analysis with the dynamic stress field, and output the adjusted complete design plan.

[0277] The above content is only an example and illustration of the structure of the present invention. Those skilled in the art of this technology can make various modifications or supplements to the described specific embodiments or use similar methods to replace them. As long as they do not deviate from the structure of the invention or exceed the scope defined by this claim book, they shall fall within the protection scope of the present invention.

Claims

1. A design method for the intelligent layout of a flexible printed circuit harness, characterized in that, The method includes: S1. Obtain the multi-level constraint data of the flexible printed circuit harness. By analyzing physical layer control parameters such as line width and line pitch, electrical layer matching parameters such as impedance matching degree and crosstalk suppression rate, and mechanical layer rule parameters such as bending area rules, an initial design constraint set is obtained. S2. According to the initial design constraint set, use a multi-objective optimization algorithm to perform preliminary layout calculations for high-density design and dynamic stress fields, and determine a candidate solution set for intelligent layout. S3. Extract the physical layer control characteristics of each solution from the candidate solution set. By comparing the preset line width and line pitch thresholds with the dynamic stress field distribution, determine whether the physical layer control meets the high-density design requirements, and obtain a filtered layout solution set. S4. For the filtered layout solution set, obtain the electrical layer matching data of each solution. By calculating the deviation between the impedance matching degree and crosstalk suppression rate and the preset standards, determine an optimized layout solution set with qualified electrical performance. S5. In the optimized layout solution set, obtain the mechanical layer rule parameters. By simulating the response curve of the bending area rules under the dynamic stress field, determine whether the reliability requirements of the repeated bending scenario are met, and obtain a final layout solution set with qualified mechanical performance. S6. According to the final layout solution set, use a genetic algorithm to dynamically coordinate and optimize the physical layer control, electrical layer matching, and mechanical layer rules, and obtain an intelligent layout design result that takes into account the constraints of all three. S7. Through the intelligent layout design result, obtain quantitative indicators of the process design effect such as production cycle and error rate. By comparing and analyzing with historical data, determine the improvement range of product reliability, and output the final process design plan. S8. If the impedance matching degree or crosstalk suppression rate of the final process design plan is lower than the matching degree threshold, recalculate the layout design result by adjusting the electrical layer matching parameters to obtain an updated process design plan. S9. Through the updated process design plan, obtain the stress distribution data of the bending area rules. By analyzing the matching degree with the dynamic stress field, determine whether it is necessary to further optimize the mechanical layer rules, and output an adjusted complete design plan.

2. The method according to claim 1, wherein In step S1 mentioned above, obtaining the multi-level constraint data of the flexible printed circuit harness. By analyzing physical layer control parameters such as line width and line pitch, electrical layer matching parameters such as impedance matching degree and crosstalk suppression rate, and mechanical layer rule parameters such as bending area rules, an initial design constraint set is obtained, including: Step S11. By analyzing the parameters of line width and line pitch and impedance matching, obtain the constraint data of the physical layer and electrical layer, and obtain a preliminary multi-level constraint set. Step S12. Extract the relevant data of crosstalk suppression and electrical matching from the preliminary constraint set. Use logical judgment. If the crosstalk suppression rate is lower than the constraint threshold, determine the optimized electrical layer constraint by adjusting the line width and line pitch parameters. Step S13. According to the optimized electrical layer constraint, combine the parameters of the bending area and mechanical rules to obtain the mechanical layer constraint data, and obtain a complete design constraint set. Step S14. For the complete design constraint set, use a regression analysis tool to optimize the parameters of line width and line pitch and impedance matching, and judge the boundary conditions of the multi-level constraints. Step S15: Analyze the correlation between physical control and electrical matching through boundary conditions, obtain the adjusted constraint data, and determine the set of design parameters that conform to the hierarchical division; Step S16: Extract the mapping relationship between mechanical rules and constraint data from the set of design parameters, use an optimization algorithm to judge the optimization parameters of the bending area, and obtain the final design constraint set; Step S17: According to the final design constraint set, determine the multi-level constraint data output of the flexible printed circuit wire harness through the logical mapping of parameter parsing and data acquisition.

3. The method according to claim 2, wherein In step S17, according to the final design constraint set, determine the multi-level constraint data output of the flexible printed circuit wire harness through the logical mapping of parameter parsing and data acquisition, including: Step S171: Parse the final design constraint set, and use the data extraction method to obtain constraint data from parameter parsing to get the preliminary hierarchical set; Step S172: For the preliminary hierarchical set, use the logical mapping method to judge the multi-level characteristics and determine the constraint structure of the hierarchical division; Step S173: According to the constraint structure of the hierarchical division, extract the mapping relationship from data acquisition to obtain the adjusted constraint data set; Step S174: Through the adjusted constraint data set, use the support vector machine algorithm to judge the matching degree between parameter parsing and design constraints, and determine the optimized hierarchical set; Step S175: For the optimized hierarchical set, use logical mapping to process the mapping relationship, obtain the correlation between multi-level characteristics and constraint data, and get the refined output set; Step S176: According to the refined output set, obtain the distribution law of hierarchical division from data extraction, judge the integrity of set generation, and determine the final output set; Step S177: Through the final output set, use the clustering analysis algorithm to judge the multi-level distribution of design constraints, and obtain the hierarchical constraint output of the flexible printed circuit wire harness.

4. The method according to claim 1, characterized in that In step S2, according to the initial design constraint set, use the multi-objective optimization algorithm to perform preliminary layout calculations for high-density design and dynamic stress field, and determine the candidate solution set for intelligent layout, including: Step S21: Use the multi-objective optimization algorithm to obtain data on high-density design and dynamic stress field from the initial constraints and design set, complete the preliminary layout calculation, and get the preliminary layout result; Step S22: Through the preliminary layout result, for the change characteristics of the dynamic stress field, use the finite element analysis method to calculate the stress distribution data and determine the stress field adjustment parameters; Step S23: According to the stress field adjustment parameters, combined with the space requirements of high-density design, adjust the preliminary layout result to get the optimized layout plan; Step S24: Extract data from the optimized layout plan to obtain its key features, judge whether the constraint conditions for intelligent layout are met. If they are met, generate a candidate solution set; if not, return the adjustment parameters; Step S25: Extract the key features of layout calculation from the candidate solution set, use the K-means clustering algorithm to analyze the similarity between solutions, and determine the solution clustering group; Step S26: Through solution clustering and grouping, for the solution features within the group, use the weighted average method to calculate the comprehensive performance index and obtain the performance ranking result. Step S27: According to the performance ranking result, select the solutions with the top 10% comprehensive performance index from the candidate solution set to determine the final solution set as the output result.

5. The method according to claim 1, wherein In step S3, extract the physical layer control features of each solution from the candidate solution set. By comparing the preset line width and line spacing thresholds with the dynamic stress field distribution, determine whether the physical layer control meets the high-density design requirements to obtain the filtered layout solution set, including: Step S31: Obtain the physical layer control data of each solution from the candidate solution set, and use the principal component analysis tool to separate the control features to obtain the feature set. Step S32: For the control features in the feature set, compare with the preset line width and line spacing thresholds to determine whether they exceed the range to obtain the preliminary filtered feature set. Step S33: Obtain the dynamic stress field data in the preliminary filtered feature set, and use the finite element analysis tool to calculate the stress distribution to obtain the stress distribution set. Step S34: If the values in the stress distribution set meet the line width and line spacing rules corresponding to the high-density design, retain the corresponding solutions to obtain the first layout solution set. Step S35: Extract the remaining features of the physical layer control from the first layout solution set, and through a secondary comparison with the preset line width and line spacing thresholds, determine whether they are consistent to obtain the second layout solution set. Step S36: Use the support vector machine algorithm to classify the second layout solution set to determine the final layout solution set that meets the conditions. Step S37: By calculating the stress distribution result in the final layout solution set, obtain the physical layer control features of the screening result to obtain the optimized layout solution set.

6. The method according to claim 1, wherein In step S4, for the filtered layout solution set, obtain the electrical layer matching data of each solution. By calculating the deviation of the impedance matching degree and crosstalk suppression rate from the preset standard, determine the optimized layout solution set with qualified electrical performance, including: Step S41: Obtain the electrical layer matching data of each solution in the filtered layout solution set to obtain the initial data set. Step S42: Extract the impedance matching degree and crosstalk suppression rate according to the initial data set, and calculate the deviation of the impedance matching degree and crosstalk suppression rate from the preset standard to obtain the deviation data set. Step S43: If the impedance matching degree deviation in the deviation data set is less than the first preset threshold, determine that the impedance matching performance of the solution meets the standard to obtain the impedance matching compliance set. Step S44: If the crosstalk suppression rate deviation in the deviation data set is less than the second preset threshold, determine that the crosstalk suppression performance of the solution meets the standard to obtain the crosstalk suppression compliance set. Step S45: Obtain the intersection of the impedance matching compliance set and the crosstalk suppression compliance set, and determine the solutions that meet the dual standards of impedance matching performance and crosstalk suppression performance simultaneously to obtain the preliminary optimized solution set. Step S46: Use the support vector machine algorithm to classify the preliminary optimized solution set to judge the electrical layer feature differences between the solutions to obtain the final optimized layout solution set. Step S47: Obtain the electrical layer matching data update records for each solution in the final optimized layout solution set, and determine the dynamic optimization result of the final optimized layout solution set according to the electrical layer matching data update records.

7. The method according to claim 1, characterized in that, In step S6, based on the final layout solution set, use the genetic algorithm to dynamically coordinate and optimize the physical layer control, electrical layer matching, and mechanical layer rules to obtain an intelligent layout design result that takes into account the constraints of all three, including: Step S61: Generate initial layout data from the solution set using the genetic algorithm to obtain a preliminary solution set. Step S62: Extract the constraint conditions of the physical layer control and electrical layer matching from the preliminary solution set to form a multi-dimensional constraint condition set. Step S63: Use the dynamic coordination algorithm to iteratively adjust the multi-dimensional constraint condition set to generate a coordinated parameter set. Step S64: Search the coordinated parameter set through the global optimization algorithm to determine the optimal solution range. Step S65: Extract the boundary conditions of the mechanical layer rules according to the optimal solution range to generate a rule matching result. Step S66: Use the genetic algorithm to iteratively optimize the rule matching result to generate an intelligent design output. Step S67: Verify the integrity of the layout according to the intelligent design output to generate a final layout solution.

8. The method according to claim 7, wherein In step S67, verify the integrity of the layout according to the intelligent design output to generate a final layout solution, including: Step S671: Obtain layout data according to the design output, and perform data cleaning and preprocessing through the Pandas library of Python to obtain an initial verification set. Step S672: Use the decision tree algorithm in Scikit-learn to judge the integrity of the initial verification set to obtain a verification result. Step S673: Determine the integrity status according to the accuracy rate and recall rate in the verification result. Step S674: If the integrity status is abnormal, generate correction data through the K-nearest neighbor algorithm. Step S675: Integrate the data using the Pandas library according to the correction data to obtain an updated layout set. Step S676: Optimize the updated layout set through the random forest algorithm in Scikit-learn to obtain an optimization plan. Step S677: Obtain the final plan according to the optimization plan, and determine the layout integrity of the final plan through cross-validation. Step S678: Use the Matplotlib library to generate an intelligent layout output for the final plan.

9. The method according to claim 1, characterized in that, In step S9, obtain the stress distribution data of the bending area gauge through the updated process design plan, and judge whether it is necessary to further optimize the mechanical layer rules through the matching degree analysis with the dynamic stress field, and output the adjusted complete design plan, including: Step S91: Obtain the stress distribution data of the bending area through the updated process design plan, and use the finite element analysis method to obtain the initial stress distribution result. Step S92: Extract the key area data from the initial stress distribution result, and perform matching degree analysis on the dynamic stress field using the Pearson correlation coefficient to determine the matching degree deviation value. Step S93, if the matching degree deviation value exceeds the preset deviation value threshold, adjust the mechanical layer rule parameters and output the updated rule set; Step S94, according to the updated rule set, re-obtain the stress distribution data of the bending area to obtain the adjusted stress distribution result; Step S95, perform a secondary matching degree analysis on the adjusted stress distribution result and the dynamic stress field to determine whether the deviation converges; Step S96, generate the complete design scheme data based on the deviation convergence result and output the final process design scheme; Step S97, obtain the verification data of the final process design scheme and use the ANSYS simulation tool to determine the stability of the scheme.

10. An intelligent layout design system for a flexible printed circuit harness, characterized in that, Use the method described in any one of claims 1 to 9 for the design of intelligent layout. The system further includes: A constraint data acquisition module, configured to acquire multi-level constraint data of a flexible printed circuit harness, and obtain an initial design constraint set by parsing physical layer control parameters such as line width and line spacing, electrical layer matching parameters such as impedance matching degree and crosstalk suppression rate, and mechanical layer rule parameters such as bending area rules; A preliminary layout calculation module, configured to perform a preliminary layout calculation for high-density design and dynamic stress field according to the initial design constraint set by using a multi-objective optimization algorithm, and determine a candidate scheme set for intelligent layout; A physical layer control screening module, configured to extract the physical layer control characteristics of each scheme from the candidate scheme set, and determine whether the physical layer control meets the high-density design requirements by comparing the preset line width and line spacing thresholds with the dynamic stress field distribution, so as to obtain a screened layout scheme set; An electrical layer matching optimization module, configured to obtain the electrical layer matching data of each scheme for the screened layout scheme set, and determine an optimized layout scheme set with qualified electrical performance by calculating the deviation between the impedance matching degree and the crosstalk suppression rate and the preset standard; A mechanical layer rule verification module, configured to obtain the mechanical layer rule parameters in the optimized layout scheme set, and determine whether the reliability requirements of the repeated bending scenario are met by simulating the response curve of the bending area rule in the dynamic stress field, so as to obtain a final layout scheme set with qualified mechanical performance; A dynamic coordination optimization module, configured to perform dynamic coordination optimization on the physical layer control, electrical layer matching, and mechanical layer rules by using a genetic algorithm according to the final layout scheme set, so as to obtain an intelligent layout design result that takes into account the constraints of the three; A process design evaluation module, configured to obtain quantitative indicators of the process design effect such as production cycle and error rate through the intelligent layout design result, and determine the improvement range of product reliability by comparing and analyzing with historical data, and output the final process design scheme; An electrical parameter adjustment module, configured to, if the impedance matching degree or crosstalk suppression rate of the final process design scheme is lower than the matching degree threshold, re-calculate the layout design result by adjusting the electrical layer matching parameters to obtain an updated process design scheme; A mechanical rule optimization module, configured to obtain the stress distribution data of the bending area rule through the updated process design scheme, and determine whether the mechanical layer rule needs to be further optimized by the matching degree analysis with the dynamic stress field, and output the adjusted complete design scheme.

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