Double-sided heat dissipation semiconductor package and manufacturing method thereof

Abstract

The present invention discloses a double-sided heat dissipation semiconductor package and a method of manufacturing the same, the package comprising: one or more semiconductor elements bonded to a lower substrate, an upper substrate, or each of the lower substrate and the upper substrate with one surface thereof interposed by a first bonding member; one or more semiconductor components, one surface of which is bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate with a fourth bonding component interposed therebetween; one or more first electrical connection members bonded to the other surface of the semiconductor element so as to sandwich the second bonding member, and bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate so as to sandwich the third bonding member; one or more second electrical connection members; a package housing; and one or more terminal leads that are bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate so as to sandwich the fifth bonding member, and that are exposed to the outside of the package case.

Description

Technical Field

[0001] The present invention relates to a double-sided heat dissipation semiconductor package and a manufacturing method thereof, and more particularly, to a double-sided heat dissipation semiconductor package and a manufacturing method thereof that can improve quality by suppressing re-melting or crack generation of bonding components occurring in successive bonding processes. Background Art

[0002] Generally, a semiconductor package is configured to include: a semiconductor chip mounted on a lower substrate or an upper substrate; metal column conductors acting as spacers bonded to the semiconductor chip; a lead frame made of Cu and applying an external electrical signal; and a package case formed by a package material. Among them, the semiconductor chip adheres to a lead frame pad, and is electrically connected to the lead of the lead frame through a bonding wire serving as a signal wire by sandwiching a plating layer made of Ag and the pad of the semiconductor chip.

[0003] For example, as shown in (a) of Figure 1 , in an existing semiconductor package, a semiconductor chip 14 is bonded to a lower metal-insulating substrate 11A in a manner of sandwiching a first bonding portion 12, a hexahedral or cylindrical conductor 17 having a vertical structure as a metal spacer is bonded to the semiconductor chip 14 in a manner of sandwiching a second bonding portion 16, and is bonded to an upper metal-insulating substrate 11B in a manner of sandwiching a third bonding portion 13, and a metal bridge 18 having a vertical structure for electrical connection between the lower metal-insulating substrate 11A and the upper metal-insulating substrate 11B is formed.

[0004] However, since the semiconductor chip is bonded to the substrate and the conductor by sandwiching solder, due to different coefficients of thermal expansion (CTE: Coefficient of Thermal Expansion) between the substrates 11A, 11B, the conductor 17, the primary bonding portion 12, and the secondary bonding portion 16, as shown in (b) of Figure 1 , cracks occur at the primary bonding portion 12 or the secondary bonding portion 16, resulting in reliability problems.

[0005] In addition, in the bonding process, the closer the curing temperature is to the subsequent process, the lower the temperature needs to be for curing. This is because, in the existing process, the already bonded bonding portion will be re-melted in the subsequent process in the case of solder, or in the case of sintering or epoxy resin, if a relatively higher temperature is applied in the subsequent process than in the existing process, cracks will be induced, resulting in the destruction of the bonding and a decrease in quality.

[0006] Therefore, a technology that can suppress re-melting or crack generation of bonding components occurring in successive bonding processes is needed.

[0007]

Prior Art Documents

[0008]

Patent Documents

[0009] Korean Patent Publication No. 10 - 1643332 (Clip - bonded semiconductor package using ultrasonic welding and method for manufacturing the same, announced on July 27, 2016)

[0010] Korean Patent Publication No. 10 - 0867573 (Power module package with improved heat dissipation ability and method for manufacturing the same, announced on November 10, 2008) Summary of the Invention

[0011] The technical problem to be achieved by the idea of the present invention is to provide a double - sided heat - dissipating semiconductor package and a method for manufacturing the same, which can improve the quality by suppressing the re - melting or crack generation of the bonding components occurring in the sequential bonding process.

[0012] To achieve the above object, a first embodiment of the present invention provides a double - sided heat - dissipating semiconductor package, including: one or more lower substrates formed with one or more metal patterns; one or more upper substrates formed with one or more metal patterns and facing and spaced apart from the lower substrates; one or more semiconductor elements, one surface of which is bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate in a manner of sandwiching a first bonding component; one or more semiconductor components, one surface of which is bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate in a manner of sandwiching a fourth bonding component; one or more first electrical connection components, one surface of which is bonded to the other surface of the semiconductor element in a manner of sandwiching a second bonding component, and the other surface of which is bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate in a manner of sandwiching a third bonding component; one or more second electrical connection components electrically connected to the one or more semiconductor elements; a package housing surrounding the one or more semiconductor elements and the one or more semiconductor components; and one or more terminal leads bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate in a manner of sandwiching a fifth bonding component, and part or all of which are exposed outside the package housing, wherein, when corresponding bonding processes are performed on the first bonding component and the third bonding component, the bonding temperatures of the first bonding component and the third bonding component are different or the bonding materials are different, and when corresponding bonding processes are performed on the third bonding component and the fifth bonding component, the bonding temperatures of the third bonding component and the fifth bonding component are the same or the bonding materials are the same.

[0013] Herein, one or more of the first to fifth bonding members may be a solder containing an Sn component, or may be a bonding agent containing 55% or more of an Ag or Cu component.

[0014] At this time, when one or more of the first to fifth bonding members are the solder, the melting temperature of the solder may be 180°C to 500°C.

[0015] Also, when one or more of the first to fifth bonding members are the bonding agent, the bonding agent may be bonded by pressure sintering or non-pressure sintering, or the bonding agent may include an epoxy material and be bonded by curing of the epoxy material.

[0016] Moreover, the semiconductor component is bonded to the lower substrate or the upper substrate once using the fourth bonding member. The semiconductor element may be bonded to the lower substrate or the upper substrate a second time using the first bonding member, and at the same time, the first electrical connection member may be bonded to the semiconductor element a second time using the second bonding member. Herein, the first bonding member and the second bonding member may have the same material or the same bonding temperature, and may have a different material or a different bonding temperature from the fourth bonding member. The other surface of the first electrical connection member may be bonded to the lower substrate or the upper substrate a third time using the third bonding member, and at the same time, the terminal lead may be bonded to the lower substrate or the upper substrate a third time using the fifth bonding member. Herein, the third bonding member and the fifth bonding member may have the same material or the same bonding temperature, and may have a different material or a different bonding temperature from the first bonding member and the second bonding member.

[0017] Also, the semiconductor element may be bonded to the lower substrate or the upper substrate a first time using the first bonding member, and at the same time, one surface of the first electrical connection member may be bonded to the semiconductor element a first time using the second bonding member. At the same time, the semiconductor component is bonded to the lower substrate or the upper substrate a first time using the fourth bonding member, and the first bonding member, the second bonding member, and the fourth bonding member may have the same material or the same bonding temperature. The other surface of the first electrical connection member may be bonded to the lower substrate or the upper substrate a second time using the third bonding member, and at the same time, the terminal lead may be bonded to the lower substrate or the upper substrate a second time using the fifth bonding member. The third bonding member and the fifth bonding member may have the same material or the same bonding temperature, and may have a different material or a different bonding temperature from the first bonding member, the second bonding member, and the fourth bonding member.

[0018] Moreover, while the semiconductor component can be joined to the lower substrate or the upper substrate at one time by the fourth joining component, the semiconductor element can be joined to the lower substrate or the upper substrate at one time by the first joining component. While one surface of the first electrical connection component can be joined to the other surface of the semiconductor element at a second time by the second joining component, the second joining component can have a different material or a different joining temperature from the first joining component and the fourth joining component. While the other surface of the first electrical connection component can be joined to the lower substrate or the upper substrate at a third time by the third joining component, the terminal lead can be joined to the lower substrate or the upper substrate at a third time by the fifth joining component. The third joining component and the fifth joining component can have the same material or the same joining temperature, and can have a different material or a different joining temperature from the first joining component, the second joining component, and the fourth joining component.

[0019] Moreover, while the semiconductor element can be joined to the lower substrate or the upper substrate at one time by the first joining component, one surface of the first electrical connection component can be joined to the other surface of the semiconductor element at a second time by the second joining component. While the semiconductor component can be joined to the lower substrate or the upper substrate at a second time by the fourth joining component, the second joining component and the fourth joining component can have the same material or the same joining temperature, and can have a different material or a different joining temperature from the first joining component. While the other surface of the first electrical connection component can be joined to the lower substrate or the upper substrate at a third time by the third joining component, the terminal lead can be joined to the lower substrate or the upper substrate at a third time by the fifth joining component. The third joining component and the fifth joining component can have the same material or the same joining temperature, and can have a different material or a different joining temperature from the second joining component and the fourth joining component.

[0020] Moreover, the lower substrate or the upper substrate can include one or more insulating layers, and the thickness of the metal pattern can be greater than the thickness of the insulating layer.

[0021] Herein, the thickness of the insulating layer can be from 0.2 mm to 0.35 mm.

[0022] Moreover, the insulating layer can be Al2O3, ZTA, AlN, or Si3N4.

[0023] Furthermore, the semiconductor component may be a negative temperature coefficient thermistor (NTC).

[0024] Furthermore, the third bonding component and the fourth bonding component may include a solder composition, and the melting point of the third bonding component may be lower than that of the fourth bonding component.

[0025] Furthermore, the third bonding component and the fifth bonding component may include a solder composition, and the melting points may be the same.

[0026] Furthermore, the fifth bonding component that bonds the terminal lead may be a solder adhesive including an epoxy material, and after being soldered and bonded to the terminal lead, at least a part of the epoxy material may be included on the surface or within the solder.

[0027] Furthermore, the second electrical connection component may contain more than 50% of an Al component and may be bonded to the semiconductor element by an ultrasonic bonding method.

[0028] Furthermore, one surface and the other surface of the semiconductor element may be made of a metal containing 80% or more of Au or Ag.

[0029] Furthermore, at least a part or all of the terminal lead may contain an Al metal.

[0030] Furthermore, a part or all of the lower substrate or the upper substrate may be exposed on the surface of the package housing.

[0031] Furthermore, a part or all of the surface of the terminal lead may be coated with an Sn component.

[0032] Furthermore, pin fins for heat dissipation may be structurally protruded and formed on the lower substrate or the upper substrate.

[0033] Furthermore, the first electrical connection component may be a spacer including a hexahedron-shaped metal component or a metal clip in the form of a clip.

[0034] In addition, a method for manufacturing a double-sided heat dissipation semiconductor package according to a second embodiment of the present invention includes the following steps: a first step of preparing one or more lower substrates and one or more upper substrates, wherein one or more metal patterns are formed on the one or more lower substrates, one or more metal patterns are formed on the one or more upper substrates, and the upper substrates face and are spaced apart from the lower substrates; a second step of using a fourth bonding component to bond one or more semiconductor components to the lower substrate or the upper substrate at one time; a third step of using a first bonding component to secondarily bond one or more semiconductor elements to the lower substrate or the upper substrate while using a second bonding component to secondarily bond one or more first electrical connection components to the semiconductor elements; a fourth step of checking the electrical characteristics of the lower substrate and the upper substrate; a fifth step of using a third bonding component to thirdly bond the first electrical connection components to the lower substrate or the upper substrate while using a fifth bonding component to thirdly bond one or more terminal leads to the lower substrate or the upper substrate; a sixth step of forming a package housing by molding the one or more semiconductor elements and the one or more semiconductor components; a seventh step of curing at a predetermined temperature for a predetermined time or more; an eighth step of plating the terminal leads; and a ninth step of cutting into individual semiconductor packages, wherein when the first bonding component and the third bonding component perform corresponding bonding processes, the bonding temperatures or bonding materials of the first bonding component and the third bonding component are different, and when the third bonding component and the fifth bonding component perform corresponding bonding processes, the bonding temperatures or bonding materials of the third bonding component and the fifth bonding component are the same.

[0035] Moreover, a method for manufacturing a double-sided heat dissipation semiconductor package according to a third embodiment of the present invention includes the following steps: a first step of preparing one or more lower substrates and one or more upper substrates, wherein one or more metal patterns are formed on the one or more lower substrates, one or more metal patterns are formed on the one or more upper substrates, and the upper substrates face and are spaced apart from the lower substrates; a second step of simultaneously bonding one or more semiconductor elements to the lower substrate or the upper substrate by a first bonding member, bonding one surface of one or more first electrical connection members to one or more semiconductor components by a second bonding member, and bonding one or more semiconductor components to the lower substrate or the upper substrate by a fourth bonding member; a third step of inspecting the electrical characteristics of the lower substrate and the upper substrate; a fourth step of secondarily bonding the other surface of the first electrical connection member to the lower substrate or the upper substrate by a third bonding member, and secondarily bonding one or more terminal leads to the lower substrate or the upper substrate by a fifth bonding member; a fifth step of forming a package housing by molding the one or more semiconductor elements and the one or more semiconductor components; a sixth step of curing at a predetermined temperature for a predetermined time or more; a seventh step of plating the terminal leads; and an eighth step of cutting into individual semiconductor packages, wherein when the first bonding member and the third bonding member perform corresponding bonding processes, the bonding temperatures or bonding materials of the first bonding member and the third bonding member are different, and when the third bonding member and the fifth bonding member perform corresponding bonding processes, the bonding temperatures or bonding materials of the third bonding member and the fifth bonding member are the same.

[0036] Moreover, a method for manufacturing a double-sided heat dissipation semiconductor package according to a fourth embodiment of the present invention may include the following steps: a first step of preparing one or more lower substrates and one or more upper substrates, wherein one or more metal patterns are formed on the one or more lower substrates, one or more metal patterns are formed on the one or more upper substrates, and the upper substrates face and are spaced apart from the lower substrates; a second step of simultaneously bonding one or more semiconductor components to the lower substrate or the upper substrate by means of a fourth bonding component and bonding one or more semiconductor elements to the lower substrate or the upper substrate by means of a first bonding component; a third step of secondarily bonding one or more first electrical connection components to the other surface of the semiconductor element by means of a second bonding component; a fourth step of inspecting the electrical characteristics of the lower substrate and the upper substrate; a fifth step of simultaneously tertiary bonding the other surface of the first electrical connection component to the lower substrate or the upper substrate by means of a third bonding component and tertiary bonding one or more terminal leads to the lower substrate or the upper substrate by means of a fifth bonding component; a sixth step of forming a package housing by molding the one or more semiconductor elements and the one or more semiconductor components; a seventh step of curing at a predetermined temperature for a predetermined time or more; an eighth step of plating the terminal leads; and a ninth step of cutting into individual semiconductor packages, wherein when the first bonding component and the third bonding component perform corresponding bonding processes, the bonding temperatures or bonding materials of the first bonding component and the third bonding component are different, and when the third bonding component and the fifth bonding component perform corresponding bonding processes, the bonding temperatures or bonding materials of the third bonding component and the fifth bonding component are the same or the bonding materials are the same.

[0037] Moreover, a method for manufacturing a double-sided heat dissipation semiconductor package according to a fifth embodiment of the present invention includes the following steps: a first step of preparing one or more lower substrates and one or more upper substrates, wherein one or more metal patterns are formed on the one or more lower substrates, one or more metal patterns are formed on the one or more upper substrates, and the upper substrate and the lower substrate face each other and are spaced apart; a second step of integrally bonding one or more semiconductor elements to the lower substrate or the upper substrate by a first bonding member; a third step of secondarily bonding one or more first electrical connection members to the other surface of the semiconductor element by a second bonding member, and secondarily bonding one or more semiconductor components to the lower substrate or the upper substrate by a fourth bonding member; a fourth step of inspecting the electrical characteristics of the lower substrate and the upper substrate; a fifth step of thirdly bonding the first electrical connection members to the lower substrate or the upper substrate by a third bonding member, and thirdly bonding one or more terminal leads to the lower substrate or the upper substrate by a fifth bonding member; a sixth step of forming a package housing by molding the one or more semiconductor elements and the one or more semiconductor components; a seventh step of curing at a predetermined temperature for a predetermined time or more; an eighth step of plating the terminal leads; and a ninth step of cutting into individual semiconductor packages, wherein when the first bonding member and the third bonding member perform corresponding bonding processes, the bonding temperatures or bonding materials of the first bonding member and the third bonding member are different, and when the third bonding member and the fifth bonding member perform corresponding bonding processes, the bonding temperatures or bonding materials of the third bonding member and the fifth bonding member are the same.

[0038] According to the present invention, the following effects are achieved: the bonding members in the same bonding process have the same material or the same bonding temperature, and the bonding members in different bonding processes have different materials or different bonding temperatures, so that during the sequential execution of the bonding processes, in subsequent processes, curing is performed at a relatively low temperature, thereby suppressing re-melting or crack generation, and thus the quality can be improved. Description of the Drawings

[0039] Figure 1 is a diagram illustrating a semiconductor package according to the prior art.

[0040] Figure 2 is a diagram showing a cross-sectional structure of a double-sided heat dissipation semiconductor package according to a first embodiment of the present invention.

[0041] Figure 3 is a diagram showing a manufacturing method of a double-sided heat dissipation semiconductor package according to a second embodiment of the present invention.

[0042] Figure 4 FIG. Figure 4 is a view showing a method of manufacturing a double-sided heat dissipation semiconductor package according to a third embodiment of the present invention.

[0043] Figure 5 FIG. Figure 5 is a view showing a method of manufacturing a double-sided heat dissipation semiconductor package according to a fourth embodiment of the present invention.

[0044] Figure 6 FIG. Figure 6 is a view showing a method of manufacturing a double-sided heat dissipation semiconductor package according to a fifth embodiment of the present invention.

[0045] Description of Reference Numerals

[0046] 110: Lower substrate 111: Metal pattern

[0047] 112: Insulating layer 120: Upper substrate

[0048] 121: Metal pattern 122: Insulating layer

[0049] 130: Semiconductor element 140: Semiconductor component

[0050] 150: First electrical connection component 160: Second electrical connection component

[0051] 170: Package housing 180: Terminal lead

[0052] 201: First bonding component 202: Second bonding component

[0053] 203: Third bonding component 204: Fourth bonding component

[0054] 205: Fifth bonding component Detailed Description of the Invention

[0055] Hereinafter, embodiments of the present invention having the above characteristics will be described in more detail with reference to the accompanying drawings.

[0056] The gist of the double-sided heat dissipation semiconductor package according to the first embodiment of the present invention is as follows: including more than one semiconductor element 130, one surface of which is joined to the lower substrate 110, the upper substrate 120, or each of the lower substrate 110 and the upper substrate 120 in a manner of sandwiching the first joining member 201; more than one semiconductor component 140, one surface of which is joined to the lower substrate 110, the upper substrate 120, or each of the lower substrate 110 and the upper substrate 120 in a manner of sandwiching the fourth joining member 204; more than one first electrical connection member 150, which is joined to the other surface of the semiconductor element 130 in a manner of sandwiching the second joining member 202, and is joined to the lower substrate 110, the upper substrate 120, or each of the lower substrate 110 and the upper substrate 120 in a manner of sandwiching the third joining member 203; more than one second electrical connection member 160, which is electrically connected to the semiconductor element 130; a package housing 170; and more than one terminal lead 180, which is joined to the lower substrate 110, the upper substrate 120, or each of the lower substrate 110 and the upper substrate 120 in a manner of sandwiching the fifth joining member 205 and is exposed outside the package housing 170. Among them, when the first joining member 201 and the third joining member 203 perform the corresponding joining processes, the bonding temperatures of the first joining member 201 and the third joining member 203 are different or the bonding materials are different. When the third joining member 203 and the fifth joining member 205 perform the corresponding joining processes, the bonding temperatures of the third joining member 203 and the fifth joining member 205 are the same or the bonding materials are the same, thereby improving the quality.

[0057] Hereinafter, with reference to Figure 2 The double-sided heat dissipation semiconductor package according to the first embodiment will be described in detail as follows.

[0058] First, more than one lower substrate 110 is configured, and more than one metal pattern 111 is formed on the lower substrate 110. More than one upper substrate 120 is configured, and is formed opposite to and spaced apart from the lower substrate 110, and more than one metal pattern 121 is formed on the upper substrate 120.

[0059] Here, the lower substrate 110 or the upper substrate 120 may include more than one insulating layer 112, 122, and the thicknesses of the metal patterns 111, 121 may be formed to be greater than the thicknesses of the insulating layers 112, 122.

[0060] Moreover, the thicknesses of the insulating layers 112, 122 may be 0.2 mm to 0.35 mm, and the insulating layers may be made of Al2O3, ZTA, AlN, or Si3N4.

[0061] In addition, a part or all of the lower substrate 110 or the upper substrate 120 is exposed on the surface of the package housing 170 to provide a heat dissipation effect to the outside, or pin fins (not shown) for heat dissipation can be structurally protruded and formed on the lower substrate 110 or the upper substrate 120, so as to further improve the heat dissipation efficiency.

[0062] Next, more than one semiconductor element 130 can be configured, and one surface thereof is joined to the lower substrate 110 and the upper substrate 120 in a manner of sandwiching the first joining member 201, or each of the lower substrate 110 and the upper substrate 120 and is electrically connected.

[0063] Here, one surface and the other surface of the semiconductor element 130 can be made of a metal containing 80% or more of Au or Ag to improve the conductivity.

[0064] Next, more than one semiconductor component 140 can be configured, and one surface thereof is joined to the lower substrate 110 and the upper substrate 120 in a manner of sandwiching the fourth joining member 204, or each of the lower substrate 110 and the upper substrate 120 and is electrically connected.

[0065] Here, the semiconductor component 140 can be a negative temperature coefficient thermistor (NTC) whose resistance value changes with an increase in temperature, and can detect the heat generated due to a large current applied to the semiconductor element 130 to control the operation of the semiconductor element 130 or abort the operation of the circuit.

[0066] Next, more than one first electrical connection member 150 can be configured. One surface of the first electrical connection member 150 can be joined to the other surface of the semiconductor element 130 in a manner of sandwiching the second joining member 202, and the other surface of the first electrical connection member 150 can be joined to the lower substrate 110, the upper substrate 120, or each of the lower substrate 110 and the upper substrate 120 in a manner of sandwiching the third joining member 203 to support the lower substrate 110 and the upper substrate 120 and be electrically connected to the semiconductor element 130.

[0067] In addition, the first electrical connection member 150 can be a spacer including a metal component in a hexahedron form or a metal clip in a form providing elasticity, and the metal clip can be a 3D clip, a Z-shaped clip, etc. with various structures.

[0068] Next, more than one second electrical connection member 160 can be configured, be electrically connected to more than one semiconductor element 130, and can be a metal clip or a bonding wire.

[0069] Here, the second electrical connection component 160 can be a bonding wire, contain more than 50% of Al component to provide good electrical conductivity, and can be bonded to the semiconductor element 130 by ultrasonic bonding method.

[0070] Next, the package housing 170 is formed to surround one or more semiconductor elements 130 and one or more semiconductor components 140.

[0071] Next, the terminal leads 180 can be configured as one or more, and can be bonded to the lower substrate 110, the upper substrate 120, or each of the lower substrate 110 and the upper substrate 120 in a manner of sandwiching the fifth bonding component 205, and a part or all of them are exposed outside the package housing 170.

[0072] And, since at least a part or all of the terminal leads 180 are made of Al metal, compared with the case of using copper material, the terminal leads 180 can be lightened by reducing the weight.

[0073] And, a part or all of the surface of the terminal leads 180 is coated with Sn component to prevent oxidation of the terminal leads 180 exposed outside the package housing 170, and it can be achieved at a price lower than nickel plating or gold plating, so as to reduce the production cost.

[0074] Here, when performing the corresponding bonding processes of the bonding between the substrates 110, 120 and the semiconductor element 130 by the first bonding component 201 and the bonding between the substrates 110, 120 and the first electrical connection component 150 by the third bonding component 203, the bonding temperature or bonding material of the first bonding component 201 and the third bonding component 203 is different. Thus, in the process of performing the bonding process of the first electrical connection component 150 after the bonding process of the semiconductor element 130, as the curing temperature of the bonding process approaches the subsequent process, the third bonding component 203 can be cured at a relatively lower temperature compared with the first bonding component 201, so as to suppress remelting or crack generation.

[0075] And, when performing the corresponding bonding processes of the bonding between the substrates 110, 120 and the first electrical connection component 150 by the third bonding component 203 and the bonding between the substrates 110, 120 and the terminal leads 180 by the fifth bonding component 205, the bonding temperature of the third bonding component 203 and the fifth bonding component 205 can be the same or the bonding material can be the same.

[0076] That is, the first electrical connection component 150 and the terminal leads 180 can be simultaneously bonded to the substrates 110, 120 respectively, so as to maintain the same bonding characteristics.

[0077] Moreover, one or more of the aforementioned first to fifth joining members 201 to 205 may be a solder containing an Sn component, or may be an adhesive containing 55% or more of an Ag or Cu component.

[0078] Here, when one or more of the mentioned first to fifth joining members 201 to 205 are solders, the melting temperature of the solder may be 180°C to 500°C, and when one or more of the first to fifth joining members 201 to 205 are adhesives, the adhesive may be joined by pressure sintering or non-pressure sintering, or the adhesive may include an epoxy material and be joined by curing of the epoxy material.

[0079] In addition, various deformations can be made according to the joining process sequence of the lower substrate 110 or the upper substrate 120, the semiconductor element 130, the semiconductor component 140, the first electrical connection component 150, the second electrical connection component 160, or the terminal lead 180. Since the curing temperature of the joining member in the subsequent process is lower than that of the joining member in the preceding process, joining failure can be prevented due to re-melting in the case of solder or cracking in the case of sintering or epoxy resin.

[0080] Specifically, in the first example, the semiconductor component 140 may be joined to the lower substrate 110 or the upper substrate 120 at once using the fourth joining member 204. Subsequently, the semiconductor element 130 may be joined to the lower substrate 110 or the upper substrate 120 secondly using the first joining member 201, and at the same time, the first electrical connection component 150 may be joined to the semiconductor element 130 secondly using the second joining member 202. At this time, the first joining member 201 and the second joining member 202 may have the same material or the same joining temperature, and may have a different material or a different joining temperature from the fourth joining member 204. Subsequently, the first electrical connection component 150 may be joined to the lower substrate 110 or the upper substrate 120 thirdly using the third joining member 203, and at the same time, the terminal lead 180 may be joined to the lower substrate 110 or the upper substrate 120 thirdly using the fifth joining member 205. At this time, the third joining member 203 and the fifth joining member 205 may have the same material or the same joining temperature, and may have a different material or a different joining temperature from the first joining member 201 and the second joining member 202.

[0081] That is, as a total of three bonding processes, the bonding process can be carried out in the order of the first bonding of the semiconductor component 140, the second bonding of the semiconductor element 130 and the first electrical connection component 150, and the third bonding of the terminal lead 180. Moreover, the bonding components in the same bonding process can have the same material or the same bonding temperature, and the bonding components in different bonding processes can have different materials or different bonding temperatures. Here, each bonding component made of different materials can respectively achieve different bonding temperature characteristics.

[0082] Alternatively, in the second example, while the semiconductor element 130 can be first bonded to the lower substrate 110 or the upper substrate 120 by the first bonding component 201, one surface of the first electrical connection component 150 can be first bonded to the semiconductor element 130 by the second bonding component 202. At the same time, the semiconductor component 140 can be first bonded to the lower substrate 110 or the upper substrate 120 by the fourth bonding component 204. At this time, the first bonding component 201, the second bonding component 202, and the fourth bonding component 204 can have the same material or the same bonding temperature. Subsequently, while the other surface of the first electrical connection component 150 can be secondarily bonded to the lower substrate 110 or the upper substrate 120 by the third bonding component 203, the terminal lead 180 can be secondarily bonded to the lower substrate 110 or the upper substrate 120 by the fifth bonding component 205. At this time, the third bonding component 203 and the fifth bonding component 205 can have the same material or the same bonding temperature, and can have different materials or different bonding temperatures from the first bonding component 201, the second bonding component 202, and the fourth bonding component 204.

[0083] That is, as a total of two bonding processes, the bonding process can be carried out in the order of the first bonding of the semiconductor element 130, the semiconductor component 140, and one surface of the first electrical connection component 150, and the second bonding of the other surface of the first electrical connection component 150 and the terminal lead 180. Moreover, the bonding components in the same bonding process can have the same material or the same bonding temperature, and the bonding components in different bonding processes can have different materials or different bonding temperatures.

[0084] Alternatively, in the third example, while the semiconductor component 140 can be joined to the lower substrate 110 or the upper substrate 120 by the fourth joining component 204 at one time, the semiconductor element 130 can be joined to the lower substrate 110 or the upper substrate 120 by the first joining component 201 at one time. Subsequently, one surface of the first electrical connection component 150 can be joined to the other surface of the semiconductor element 130 by the second joining component 202 at a second time. At this time, the second joining component 202 can have a different material or a different joining temperature from the first joining component 201 and the fourth joining component 204. Subsequently, while the other surface of the first electrical connection component 150 can be joined to the lower substrate 110 or the upper substrate 120 by the third joining component 203 at a third time, the terminal lead 180 can be joined to the lower substrate 110 or the upper substrate 120 by the fifth joining component 205 at a third time. At this time, the third joining component 203 and the fifth joining component 205 can have the same material or the same joining temperature, and can have a different material or a different joining temperature from the first joining component 201, the second joining component 202, and the fourth joining component 204.

[0085] That is, as a total of three joining processes, the joining process is performed in the order of the first joining of the semiconductor component 140 and the semiconductor element 130, the second joining of one surface of the first electrical connection component 150, and the third joining of the other surface of the first electrical connection component 150 and the terminal lead 180. And it is possible to make the joining components in the same joining process have the same material or the same joining temperature, and it is possible to make the joining components in different joining processes have different materials or different joining temperatures.

[0086] Alternatively, in the fourth example, the semiconductor element 130 can be joined to the lower substrate 110 or the upper substrate 120 by the first joining component 201 at one time. Subsequently, while one surface of the first electrical connection component 150 can be joined to the other surface of the semiconductor element 130 by the second joining component 202 at a second time, the semiconductor component 140 can be joined to the lower substrate 110 or the upper substrate 120 by the fourth joining component 204 at a second time. At this time, the second joining component 202 and the fourth joining component 204 can have the same material or the same joining temperature, and can have a different material or a different joining temperature from the second joining component 202 and the fourth joining component 204. Subsequently, while the other surface of the first electrical connection component 150 can be joined to the lower substrate 110 or the upper substrate 120 by the third joining component 203 at a third time, the terminal lead 180 can be joined to the lower substrate 110 or the upper substrate 120 by the fifth joining component 205 at a third time. At this time, the third joining component 203 and the fifth joining component 205 can have the same material or the same joining temperature, and can have a different material or a different joining temperature from the second joining component 202 and the fourth joining component 204.

[0087] That is, as the three bonding processes, the bonding process can be performed in the order of the first bonding of the semiconductor element 130, the second bonding of one surface of the first electrical connection component 150 and the semiconductor component 140, and the third bonding of the other surface of the first electrical connection component 150 and the terminal lead 180. Moreover, the bonding components in the same bonding process can have the same material or the same bonding temperature, and the bonding components in different bonding processes can have different materials or different bonding temperatures.

[0088] In addition, the third bonding component 203 and the fourth bonding component 204 can include a solder component, and the melting point of the third bonding component 203 can be lower than that of the fourth bonding component 204. As in the first to fourth examples mentioned above, the bonding process using the third bonding component 203 is performed after the bonding process using the fourth bonding component 204. As the subsequent process proceeds, the curing temperature of the bonding component decreases, thereby suppressing the re-melting of the solder, and thus the bonding quality can be further improved.

[0089] Furthermore, the third bonding component 203 and the fifth bonding component 205 can include a solder component, and their melting points can be the same. As described in the first to fourth examples mentioned above, since the bonding processes using the third bonding component 203 and the fifth bonding component 205 are performed simultaneously, the same bonding characteristics can be maintained.

[0090] Also, the fifth bonding component 205 for bonding the terminal lead 180 can be a solder adhesive including an epoxy material, and at least a part of the epoxy material can be included on the surface of or within the solder after being welded and bonded to the terminal lead 180.

[0091] In addition, Figure 3 A method for manufacturing a double-sided heat dissipation semiconductor package according to a second embodiment of the present invention is related to the method for manufacturing the double-sided heat dissipation semiconductor package of the first example mentioned above.

[0092] That is, the method for manufacturing a double-sided heat dissipation semiconductor package according to the second embodiment of the present invention includes: a first step (S110) of preparing one or more lower substrates 110 and one or more upper substrates 120, wherein one or more metal patterns 111 are formed on the one or more lower substrates 110, and one or more metal patterns 121 are formed on the one or more upper substrates 120, and the upper substrate 120 faces and is spaced apart from the lower substrate; a second step (S120) of using a fourth bonding member 204 to bond a semiconductor component 140 (e.g., an NTC element) to the lower substrate 110 or the upper substrate 120 at one time; a third step (S130) of secondarily bonding the semiconductor element 130 to the lower substrate 110 or the upper substrate 120 by means of a first bonding member 201, and secondarily bonding one or more first electrical connection members 150 to the semiconductor element 130 by means of a second bonding member 202; a fourth step (S140) of inspecting (middle test) the electrical characteristics of the lower substrate 110 and the upper substrate 120; a fifth step (S150) of thirdly bonding the first electrical connection member 150 to the lower substrate 110 or the upper substrate 120 by means of a third bonding member 203, and thirdly bonding one or more terminal leads 180 to the lower substrate 110 or the upper substrate 120 by means of a fifth bonding member 205; a sixth step (S160) of molding one or more semiconductor elements 130 and one or more semiconductor components 140 with an epoxy molding compound (EMC: Epoxy Molding Compound) to form a package housing 170; a seventh step (S170) of curing at a predetermined temperature (e.g., a temperature of 150°C to 200°C) for a predetermined time (e.g., three hours) or more; an eighth step (S180) of plating the terminal leads 180; and a ninth step (S190) of singulating into individual semiconductor packages.

[0093] Here, the bonding can be performed in the order of the fourth bonding member 204, the first bonding member 201 and the second bonding member 202, the third bonding member 203 and the fifth bonding member 205. And when performing the corresponding bonding processes of the first bonding member 201 and the third bonding member 203, the bonding temperatures of the first bonding member 201 and the third bonding member 203 can be different or the bonding materials can be different. When performing the corresponding bonding processes of the third bonding member 203 and the fifth bonding member 205, the bonding temperatures of the third bonding member 203 and the fifth bonding member 205 can be the same or the bonding materials can be the same.

[0094] That is, the bonding process can be performed in the order of the primary bonding of the semiconductor component 140, the secondary bonding of the semiconductor element 130 and the first electrical connection component 150, and the tertiary bonding of the terminal lead 180. The bonding components in the same bonding process can have the same material or the same bonding temperature, and the bonding components in different bonding processes can have different materials or different bonding temperatures.

[0095] And, Figure 4 Disclosed is a method for manufacturing a double-sided heat dissipation semiconductor package according to a third embodiment of the present invention, which relates to the method for manufacturing the double-sided heat dissipation semiconductor package of the second example mentioned above.

[0096] That is, the method for manufacturing a double-sided heat dissipation semiconductor package according to the third embodiment of the present invention includes: a first step (S110) of preparing one or more lower substrates 110 and one or more upper substrates 120, wherein one or more metal patterns 111 are formed on the one or more lower substrates 110, one or more metal patterns 121 are formed on the one or more upper substrates 120, and the upper substrate 120 faces and is spaced apart from the lower substrate 110; a second step (S120) of primarily bonding one or more semiconductor elements 130 to the lower substrate 110 or the upper substrate 120 by means of a first bonding component 201, while primarily bonding one surface of one or more first electrical connection components 150 to one or more semiconductor elements 130 by means of a second bonding component 202, and primarily bonding one or more semiconductor components 140 to the lower substrate 110 or the upper substrate 120 by means of a fourth bonding component 204; a third step (S130) of checking the electrical characteristics of the lower substrate 110 and the upper substrate 120; a fourth step (S140) of secondarily bonding the other surface of the first electrical connection component 150 to the lower substrate 110 or the upper substrate 120 by means of a third bonding component 203, while secondarily bonding one or more terminal leads 180 to the lower substrate 110 or the upper substrate 120 by means of a fifth bonding component 205; a fifth step (S150) of molding one or more semiconductor elements 130 and one or more semiconductor components 140 with an epoxy molding compound (EMC) to form a package housing 170; a sixth step (S160) of curing at a predetermined temperature (for example, a temperature of 150°C to 200°C) for a predetermined time (for example, three hours) or more; a seventh step (S170) of plating the terminal leads 180; and an eighth step (S180) of singulating into individual semiconductor packages.

[0097] Here, the joining can be performed in the order of the fourth joining member 204, the first joining member 201, the second joining member 202, the third joining member 203, and the fifth joining member 205. And when performing the respective joining processes of the first joining member 201 and the third joining member 203, the bonding temperature of the first joining member 201 and the third joining member 203 can be different or the bonding material can be different. That is, when performing the respective joining processes of the third joining member 203 and the fifth joining member 205, the bonding temperature of the third joining member 203 and the fifth joining member 205 can be the same or the bonding material can be the same.

[0098] That is, the joining process can be performed in the order of the primary joining of one surface of the semiconductor element 130, the semiconductor component 140, and the first electrical connection component 150, and the secondary joining of the other surface of the first electrical connection component 150 and the terminal lead 180. And the joining members in the same joining process can have the same material or the same bonding temperature, and the joining members in different joining processes can have different materials or different bonding temperatures.

[0099] And, Figure 5 A method for manufacturing a double-sided heat dissipation semiconductor package according to a fourth embodiment of the present invention is related to the method for manufacturing a double-sided heat dissipation semiconductor package of the third example mentioned above.

[0100] That is, the method for manufacturing a double-sided heat dissipation semiconductor package according to the fourth embodiment of the present invention includes: a first step (S110) of preparing one or more lower substrates 110 and one or more upper substrates 120, wherein one or more metal patterns 111 are formed on the one or more lower substrates 110, and one or more metal patterns 121 are formed on the one or more upper substrates 120, and the upper substrate 120 faces and is spaced apart from the lower substrate 110; a second step (S120) of simultaneously and once bonding one or more semiconductor components 140 to the lower substrate 110 or the upper substrate 120 by means of a fourth bonding member 204 and bonding one or more semiconductor elements 130 to the lower substrate 110 or the upper substrate 120 by means of a first bonding member 201; a third step (S130) of secondarily bonding one or more first electrical connection members 150 to the other surface of the semiconductor element 130 by means of a second bonding member 202; a fourth step (S140) of inspecting the electrical characteristics of the lower substrate 110 and the upper substrate 120; a fifth step (S150) of simultaneously and thirdly bonding the other surface of the first electrical connection member 150 to the lower substrate 110 or the upper substrate 120 by means of a third bonding member 203 and thirdly bonding one or more terminal leads 180 to the lower substrate 110 or the upper substrate 120 by means of a fifth bonding member 205; a sixth step (S160) of molding one or more semiconductor elements 130 and one or more semiconductor components 140 with an epoxy molding compound (EMC) to form a package case 170; a seventh step (S170) of curing at a predetermined temperature (for example, a temperature of 150°C to 200°C) for a predetermined time (for example, three hours) or more; an eighth step (S180) of plating the terminal leads 180; and a ninth step (S190) of singulating into individual semiconductor packages.

[0101] Herein, the bonding can be performed in the order of the fourth bonding member 204, the first bonding member 201, the second bonding member 202, the third bonding member 203, and the fifth bonding member 205, and when performing the corresponding bonding processes of the first bonding member 201 and the third bonding member 203, the bonding temperatures of the first bonding member 201 and the third bonding member 203 can be different or the bonding materials can be different, and when performing the corresponding bonding processes of the third bonding member 203 and the fifth bonding member 205, the bonding temperatures of the third bonding member 203 and the fifth bonding member 205 can be the same or the bonding materials can be the same.

[0102] That is, the bonding process can be performed in the order of the primary bonding of the semiconductor component 140 and the semiconductor element 130, the secondary bonding of one surface of the first electrical connection component 150, and the tertiary bonding of the other surface of the first electrical connection component 150 and the terminal lead 180. Moreover, the bonding components in the same bonding process can have the same material or the same bonding temperature, and the bonding components in different bonding processes can have different materials or different bonding temperatures.

[0103] Moreover, Figure 6 Disclosed is a method for manufacturing a double-sided heat dissipation semiconductor package according to a fifth embodiment of the present invention, which relates to the method for manufacturing the double-sided heat dissipation semiconductor package of the fourth example mentioned above.

[0104] That is, the method for manufacturing a double-sided heat dissipation semiconductor package according to the fifth embodiment of the present invention includes: a first step (S110) of preparing one or more lower substrates 110 and one or more upper substrates 120, wherein one or more metal patterns 111 are formed on the one or more lower substrates 110, one or more metal patterns 121 are formed on the one or more upper substrates 120, and the upper substrate 120 faces and is spaced apart from the lower substrate 110; a second step (S120) of primarily bonding one or more semiconductor elements 130 to the lower substrate 110 or the upper substrate 120 by means of a first bonding component 201; a third step (S130) of secondarily bonding one or more first electrical connection components 150 to the other surface of the semiconductor element 130 by means of a second bonding component 202, and secondarily bonding one or more semiconductor components 140 to the lower substrate 110 or the upper substrate 120 by means of a fourth bonding component 204; a fourth step (S140) of inspecting the electrical characteristics of the lower substrate 110 and the upper substrate 120; a fifth step (S150) of tertiarily bonding the other surface of the first electrical connection component 150 to the lower substrate 110 or the upper substrate 120 by means of a third bonding component 203, and tertiarily bonding one or more terminal leads 180 to the lower substrate 110 or the upper substrate 120 by means of a fifth bonding component 205; a sixth step (S160) of molding one or more semiconductor elements 130 and one or more semiconductor components 140 with an epoxy molding compound (EMC) to form a package housing 170; a seventh step (S170) of curing at a predetermined temperature (e.g., a temperature of 150 °C to 200 °C) for a predetermined time (e.g., three hours) or more; an eighth step (S180) of plating the terminal leads 180; and a ninth step (S190) of singulating into individual semiconductor packages.

[0105] Here, the joining can be performed in the order of the first joining member 201, the second joining member 202, and the fourth joining member 204, the third joining member 203, and the fifth joining member 205. When performing the respective joining processes of the first joining member 201 and the third joining member 203, the bonding temperatures of the first joining member 201 and the third joining member 203 can be different or the bonding materials can be different. When performing the respective joining processes of the third joining member 203 and the fifth joining member 205, the bonding temperatures of the third joining member 203 and the fifth joining member 205 can be the same or the bonding materials can be the same.

[0106] That is, the joining process can be performed in the order of the primary joining of the semiconductor element 130, the secondary joining of one surface of the first electrical connection member 150 and the semiconductor member 140, and the tertiary joining of the other surface of the first electrical connection member 150 and the terminal lead 180. The joining members in the same joining process can have the same material or the same bonding temperature, and the joining members in different joining processes can have different materials or different bonding temperatures.

[0107] Therefore, according to the configuration of the double-sided heat dissipation semiconductor package and its manufacturing method as described above, the joining members in the same joining process have the same material or the same bonding temperature, and the joining members in different joining processes have different materials or different bonding temperatures. Thus, during the sequential execution of the joining process, in subsequent processes, curing is performed at a relatively low temperature, thereby suppressing the generation of re-melting or cracks, and thus the quality can be improved.

[0108] The embodiments described in this specification and the structures shown in the drawings are only the most preferred embodiment of the present invention and do not represent all the technical ideas of the present invention. Therefore, it should be understood that there can be various equivalents and variations that can replace these at the time of this application.

Claims

1. A double-sided heat dissipation semiconductor package, characterized in that, Comprising: One or more lower substrates, on which one or more metal patterns are formed; One or more upper substrates, on which one or more metal patterns are formed, and which are arranged opposite to and spaced apart from the lower substrate; One or more semiconductor elements, one surface of which is bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate with a first bonding member interposed therebetween; One or more semiconductor components, one surface of which is bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate with a fourth bonding member interposed therebetween; One or more first electrical connection components, one surface of which is bonded to the other surface of the semiconductor element with a second bonding member interposed therebetween, and the other surface of which is bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate with a third bonding member interposed therebetween; One or more second electrical connection components, which are electrically connected to the one or more semiconductor elements; A package housing, which surrounds the one or more semiconductor elements and the one or more semiconductor components; and One or more terminal leads, which are bonded to the lower substrate, the upper substrate, or each of the lower substrate and the upper substrate with a fifth bonding member interposed therebetween, and a part or all of which are exposed outside the package housing, wherein, when the first bonding member and the third bonding member perform corresponding bonding processes, the bonding temperatures or bonding materials of the first bonding member and the third bonding member are different, and when the third bonding member and the fifth bonding member perform corresponding bonding processes, the bonding temperatures or bonding materials of the third bonding member and the fifth bonding member are the same.

2. The double-sided heat dissipation semiconductor package according to claim 1, wherein One or more of the first bonding member to the fifth bonding member is a solder containing an Sn component, or a bonding agent containing 55% or more of an Ag or Cu component.

3. The double-sided heat dissipation semiconductor package according to claim 2, wherein When one or more of the first bonding member to the fifth bonding member is the solder, the melting temperature of the solder is 180°C to 500°C.

4. The double-sided heat dissipation semiconductor package according to claim 2, wherein When one or more of the first bonding member to the fifth bonding member is the bonding agent, the bonding agent is bonded by pressure sintering or non-pressure sintering, or the bonding agent includes an epoxy material and is bonded by curing of the epoxy material.

5. The double-sided heat dissipation semiconductor package according to claim 1, wherein The semiconductor component is bonded to the lower substrate or the upper substrate once with the fourth bonding member. While the semiconductor element is secondarily bonded to the lower substrate or the upper substrate by the first bonding member, the first electrical connection member is secondarily bonded to the semiconductor element by the second bonding member, wherein the first bonding member and the second bonding member have the same material or the same bonding temperature, and have a different material or a different bonding temperature from the fourth bonding member. While the other surface of the first electrical connection member is tertiarily bonded to the lower substrate or the upper substrate by the third bonding member, the terminal lead is tertiarily bonded to the lower substrate or the upper substrate by the fifth bonding member, wherein the third bonding member and the fifth bonding member have the same material or the same bonding temperature, and have a different material or a different bonding temperature from the first bonding member and the second bonding member.

6. The double-sided heat dissipation semiconductor package according to claim 1, wherein While the semiconductor element is primarily bonded to the lower substrate or the upper substrate by the first bonding member, one surface of the first electrical connection member is primarily bonded to the semiconductor element by the second bonding member. Meanwhile, the semiconductor component is primarily bonded to the lower substrate or the upper substrate by the fourth bonding member, and the first bonding member, the second bonding member, and the fourth bonding member have the same material or the same bonding temperature. While the other surface of the first electrical connection member is secondarily bonded to the lower substrate or the upper substrate by the third bonding member, the terminal lead is secondarily bonded to the lower substrate or the upper substrate by the fifth bonding member. The third bonding member and the fifth bonding member have the same material or the same bonding temperature, and have a different material or a different bonding temperature from the first bonding member, the second bonding member, and the fourth bonding member.

7. The double-sided heat dissipation semiconductor package according to claim 1, wherein While the semiconductor component is primarily bonded to the lower substrate or the upper substrate by the fourth bonding member, the semiconductor element is primarily bonded to the lower substrate or the upper substrate by the first bonding member. While one surface of the first electrical connection member is secondarily bonded to the other surface of the semiconductor element by the second bonding member, the second bonding member has a different material or a different bonding temperature from the first bonding member and the fourth bonding member. While the other surface of the first electrical connection member is tertiarily bonded to the lower substrate or the upper substrate by the third bonding member, the terminal lead is tertiarily bonded to the lower substrate or the upper substrate by the fifth bonding member. The third bonding member and the fifth bonding member have the same material or the same bonding temperature, and have a different material or a different bonding temperature from the first bonding member, the second bonding member, and the fourth bonding member.

8. The dual-sided heat dissipation semiconductor package according to claim 1, wherein the semiconductor element is once joined to the lower substrate or the upper substrate by the first joining member, while one surface of the first electrical connection member is secondarily joined to the other surface of the semiconductor element by the second joining member, the semiconductor component is secondarily joined to the lower substrate or the upper substrate by the fourth joining member, the second joining member and the fourth joining member have the same material or the same joining temperature, and have a different material or a different joining temperature from the first joining member, while the other surface of the first electrical connection member is tertiarily joined to the lower substrate or the upper substrate by the third joining member, the terminal lead is tertiarily joined to the lower substrate or the upper substrate by the fifth joining member, the third joining member and the fifth joining member have the same material or the same joining temperature, and have a different material or a different joining temperature from the second joining member and the fourth joining member.

9. The dual-sided heat dissipation semiconductor package according to claim 1, wherein the lower substrate or the upper substrate includes one or more insulating layers, and the thickness of the metal pattern is greater than the thickness of the insulating layer.

10. The dual-sided heat dissipation semiconductor package according to claim 9, wherein the thickness of the insulating layer is 0.2 mm to 0.35 mm.

11. The dual-sided heat dissipation semiconductor package according to claim 9, wherein the insulating layer is Al2O3, ZTA, AlN or Si3N4.

12. The dual-sided heat dissipation semiconductor package according to claim 1, wherein the semiconductor component is a negative temperature coefficient thermistor.

13. The dual-sided heat dissipation semiconductor package according to claim 1, wherein the third joining member and the fourth joining member include a solder component, and the melting point of the third joining member is lower than the melting point of the fourth joining member.

14. The dual-sided heat dissipation semiconductor package according to claim 1, wherein the third joining member and the fifth joining member include a solder component, and have the same melting point.

15. The dual-sided heat dissipation semiconductor package according to claim 1, wherein the fifth joining member for joining the terminal lead is a solder adhesive including an epoxy material, and after being welded and joined to the terminal lead, at least a part of the epoxy material is included on the surface or in the solder of the solder.

16. The dual-sided heat dissipation semiconductor package according to claim 1, wherein the second electrical connection member contains more than 50% of Al component, and is joined to the semiconductor element by an ultrasonic bonding method.

17. The dual-sided heat dissipation semiconductor package according to claim 1, wherein one surface and the other surface of the semiconductor element are made of a metal containing more than 80% of Au or Ag.

18. The double-sided heat dissipation semiconductor package according to claim 1, wherein at least a part or all of the terminal leads contain Al metal.

19. The double-sided heat dissipation semiconductor package according to claim 1, wherein a part or all of the lower substrate or the upper substrate is exposed on the surface of the package housing.

20. The double-sided heat dissipation semiconductor package according to claim 1, wherein a part or all of the surface of the terminal leads is coated with an Sn component.

21. The double-sided heat dissipation semiconductor package according to claim 1, wherein stud fins for heat dissipation are structurally protruded and formed on the lower substrate or the upper substrate.

22. The double-sided heat dissipation semiconductor package according to claim 1, wherein the first electrical connection component is a spacer including a hexahedral metal component or a metal clip in the form of a clip.

23. A method for manufacturing a double-sided heat dissipation semiconductor package, characterized in that, Comprising: a first step of preparing one or more lower substrates and one or more upper substrates, wherein one or more metal patterns are formed on the one or more lower substrates, one or more metal patterns are formed on the one or more upper substrates, and the upper substrate and the lower substrate face each other and are spaced apart; a second step of using a fourth bonding component to bond one or more semiconductor components to the lower substrate or the upper substrate at one time; a third step of secondarily bonding one or more semiconductor elements to the lower substrate or the upper substrate by a first bonding component, and secondarily bonding one or more first electrical connection components to the semiconductor elements by a second bonding component; a fourth step of checking the electrical characteristics of the lower substrate and the upper substrate; a fifth step of thirdly bonding the first electrical connection component to the lower substrate or the upper substrate by a third bonding component, and thirdly bonding one or more terminal leads to the lower substrate or the upper substrate by a fifth bonding component; a sixth step of forming a package housing by molding the one or more semiconductor elements and the one or more semiconductor components; a seventh step of curing at a predetermined temperature for a predetermined time or more; an eighth step of plating the terminal leads; and a ninth step of cutting into individual semiconductor packages, wherein when the first bonding component and the third bonding component perform the corresponding bonding processes, the bonding temperatures or bonding materials of the first bonding component and the third bonding component are different, when the third bonding component and the fifth bonding component perform the corresponding bonding processes, the bonding temperatures or bonding materials of the third bonding component and the fifth bonding component are the same.

24. A manufacturing method of a double-sided heat dissipation semiconductor package, characterized in that, Comprising: a first step of preparing one or more lower substrates and one or more upper substrates, wherein one or more metal patterns are formed on the one or more lower substrates, one or more metal patterns are formed on the one or more upper substrates, and the upper substrate and the lower substrate face each other and are spaced apart; In the second step, while bonding one or more semiconductor elements to the lower substrate or the upper substrate at once by the first bonding component, bonding one surface of one or more first electrical connection components to one or more semiconductor components at once by the second bonding component, and bonding one or more semiconductor components to the lower substrate or the upper substrate at once by the fourth bonding component; In the third step, inspect the electrical characteristics of the lower substrate and the upper substrate; In the fourth step, while secondarily bonding the other surface of the first electrical connection component to the lower substrate or the upper substrate by the third bonding component, secondarily bonding one or more terminal leads to the lower substrate or the upper substrate by the fifth bonding component; In the fifth step, form a package housing by molding the one or more semiconductor elements and the one or more semiconductor components; In the sixth step, cure at a predetermined temperature for a predetermined time or more; In the seventh step, plate the terminal leads; and In the eighth step, cut into individual semiconductor packages, wherein, when the first bonding component and the third bonding component perform the corresponding bonding processes, the bonding temperatures or the bonding materials of the first bonding component and the third bonding component are different; when the third bonding component and the fifth bonding component perform the corresponding bonding processes, the bonding temperatures or the bonding materials of the third bonding component and the fifth bonding component are the same.

25. A method for manufacturing a double-sided heat dissipation semiconductor package, characterized in that, Comprising: In the first step, prepare one or more lower substrates and one or more upper substrates, wherein one or more metal patterns are formed on the one or more lower substrates, one or more metal patterns are formed on the one or more upper substrates, and the upper substrate and the lower substrate face each other and are spaced apart to form; In the second step, while bonding one or more semiconductor components to the lower substrate or the upper substrate at once by the fourth bonding component, bonding one or more semiconductor elements to the lower substrate or the upper substrate at once by the first bonding component; In the third step, secondarily bonding one or more first electrical connection components to the other surface of the semiconductor element by the second bonding component; In the third step, inspect the electrical characteristics of the lower substrate and the upper substrate; In the fourth step, while tertiarily bonding the other surface of the first electrical connection component to the lower substrate or the upper substrate by the third bonding component, tertiarily bonding one or more terminal leads to the lower substrate or the upper substrate by the fifth bonding component; In the fifth step, form a package housing by molding the one or more semiconductor elements and the one or more semiconductor components; In the sixth step, cure at a predetermined temperature for a predetermined time or more; In the seventh step, plate the terminal leads; and In the ninth step, cut into individual semiconductor packages, wherein, when the first bonding component and the third bonding component perform the corresponding bonding processes, the bonding temperatures or the bonding materials of the first bonding component and the third bonding component are different; When corresponding bonding processes are performed on the third bonding component and the fifth bonding component, the bonding temperatures of the third bonding component and the fifth bonding component are the same or the bonding materials are the same.

26. A method for manufacturing a double-sided heat dissipation semiconductor package, characterized in that, Comprising: A first step of preparing one or more lower substrates and one or more upper substrates, wherein one or more metal patterns are formed on the one or more lower substrates, one or more metal patterns are formed on the one or more upper substrates, and the upper substrate and the lower substrate face each other and are spaced apart; A second step of bonding one or more semiconductor elements to the lower substrate or the upper substrate at one time by a first bonding component; A third step of secondarily bonding one or more first electrical connection components to the other surface of the semiconductor element by a second bonding component, and secondarily bonding one or more semiconductor components to the lower substrate or the upper substrate by a fourth bonding component; A fourth step of inspecting the electrical characteristics of the lower substrate and the upper substrate; A fifth step of tertiarily bonding the first electrical connection component to the lower substrate or the upper substrate by a third bonding component, and tertiarily bonding one or more terminal leads to the lower substrate or the upper substrate by a fifth bonding component; A sixth step of forming a package housing by molding the one or more semiconductor elements and the one or more semiconductor components; A seventh step of curing at a predetermined temperature for a predetermined time or more; An eighth step of plating the terminal leads; and A ninth step of cutting into individual semiconductor packages, wherein when corresponding bonding processes are performed on the first bonding component and the third bonding component, the bonding temperatures of the first bonding component and the third bonding component are different or the bonding materials are different, When corresponding bonding processes are performed on the third bonding component and the fifth bonding component, the bonding temperatures of the third bonding component and the fifth bonding component are the same or the bonding materials are the same.

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