Code configuration method and device

Abstract

The invention provides a coding configuration method and device. The method comprises the following steps: an optical network unit receives first information, wherein the first information is used for indicating the change amount of forward error correction code word information relative to a first forward error correction mother code; and the optical network unit determines the forward error correction code word information according to the first information. According to the technical scheme provided by the invention, the change amount of the forward error correction code word information relative to the first forward error correction mother code is indicated, so that the forward error correction code word information can be flexibly configured.

Description

[0001] This application is a divisional application. The application number of the original application is 202210015997.2, and the application date of the original application is January 7, 2022. The entire content of the original application is incorporated herein by reference. Technical Field

[0002] This application relates to the field of optical communication, and more specifically, to a method and apparatus for encoding configuration. Background Art

[0003] In a passive optical network (PON) system, the transmission distances from different optical network units (ONUs) to the optical line termination (OLT) or the splitting ratios of the splitters are different. Therefore, the link losses between different ONUs and the OLT are also different. Forward error correction (FEC) is used to solve the link losses and transmission costs introduced by splitters and fiber optic transmissions. This technology can add redundant error correction codes to the transmission code sequence, which can greatly reduce the optical signal-to-noise ratio (OSNR) tolerance at the receiving end, reduce the bit error rate, and reduce the transmission power.

[0004] Currently, to ensure transmission performance, the OLT and ONUs define the FEC encoding method based on the maximum possible link loss and use a unified FEC encoding. Usually, in a certain PON system, some ONUs have a large link loss to the OLT, and some ONUs have a small link loss to the OLT. For ONUs with small link losses, they do not require a very strong error correction ability FEC encoding, but they also need to use the same FEC encoding method as ONUs with large link losses. Such FEC encodings usually have a relatively large overhead or are relatively complex in encoding, which will cause certain waste.

[0005] Therefore, there is an urgent need for a method for encoding configuration that can flexibly configure the forward error correction FEC codeword information. Summary of the Invention

[0006] This application provides a method and apparatus for encoding configuration, which helps to flexibly configure the forward error correction codeword information.

[0007] In a first aspect, a method for encoding configuration is provided. The method includes: an optical network unit receives first information, where the first information is used to indicate the change amount of the forward error correction codeword information relative to a first forward error correction mother code; the optical network unit determines the forward error correction codeword information according to the first information.

[0008] The technical solution provided by this application helps to achieve flexible configuration of forward error correction codeword information by indicating the change amount of forward error correction codeword information relative to the first forward error correction mother code.

[0009] In combination with the first aspect, in some implementation manners of the first aspect, before receiving the first information, the method further includes: the optical network unit sending capability reporting information, where the capability reporting information is used to indicate the forward error correction mother code supported by the optical network unit, and the forward error correction mother code supported by the optical network unit includes the first forward error correction mother code.

[0010] The technical solution provided by this application enables the optical line terminal to determine the first forward error correction mother code among the forward error correction mother codes supported by the optical network unit, and can process the first forward error correction mother code to determine the forward error correction codeword information suitable for the optical network unit. Further, without the codeword information defined by the standard, it helps to achieve flexible configuration of forward error correction codeword information.

[0011] In combination with the first aspect, in some implementation manners of the first aspect, before sending the capability reporting information, the method further includes: the optical network unit receiving capability query information, where the capability query information is used to query the forward error correction mother code supported by the optical network unit.

[0012] In combination with the first aspect, in some other implementation manners of the first aspect, the first information includes second information, and the second information indicates the change amount of the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction mother code through a bit sequence.

[0013] In combination with the first aspect, in some other implementation manners of the first aspect, the bit sequence of the second information includes a first sequence, and the value of the first sequence is 0, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the first sequence are truncated; at this time, the bit sequence of the second information may further include a second sequence, and the value of the second sequence is 1, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the second sequence are not truncated. Or, the bit sequence of the second information includes a first sequence, and the corresponding value of the first sequence is 1, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the second sequence are truncated; at this time, the bit sequence of the second information may further include a second sequence, and the value of the second sequence is 0, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the second sequence are not truncated.

[0014] Wherein, one bit of the bit sequence corresponds to one column (half column) of the mother code matrix and corresponds to 256 (128) bits of the mother codeword information.

[0015] In combination with the first aspect, in some other implementations of the first aspect, the first information further includes third information, and the third information indicates, through a bit sequence, the change amount of the parity bit information of the forward error correction codeword information relative to the parity information of the first forward error correction mother code.

[0016] In combination with the first aspect, in some other implementations of the first aspect, the bit sequence of the third information includes a third sequence, and the value corresponding to the third sequence is 0, which is used to indicate that puncturing is performed on 256 or 128 bits of the first forward error correction mother code corresponding to the third sequence; at this time, the bit sequence of the third information may further include a fourth sequence, and the value corresponding to the fourth sequence is 1, which is used to indicate that no puncturing is performed on 256 or 128 bits of the first forward error correction mother code corresponding to the fourth sequence. Alternatively, the bit sequence of the third information includes a third sequence, and the value corresponding to the third sequence is 1, which is used to indicate that puncturing is performed on 256 or 128 bits of the first forward error correction mother code corresponding to the third sequence; at this time, the bit sequence of the third information may further include a fourth sequence, and the value corresponding to the fourth sequence is 0, which is used to indicate that no puncturing is performed on 256 or 128 bits of the first forward error correction mother code corresponding to the fourth sequence.

[0017] The technical solution of the present application represents specific forward error correction codeword information through a bit sequence, and can process the first forward error correction mother code in units of one column or half a column of the coding matrix to obtain the forward error correction codeword information, which helps to achieve flexible configuration of the forward error correction codeword information.

[0018] In combination with the first aspect, in some other implementations of the first aspect, the first information includes a first value, which indicates that the payload information of the first forward error correction mother code is truncated by the Mth bit in the first order to obtain the payload information of the forward error correction codeword information, and M is obtained by multiplying the first value by 256 or 128.

[0019] In combination with the first aspect, in some other implementations of the first aspect, the first information includes a second value, which indicates that N bits are punctured from the parity bit information of the first forward error correction mother code in the second order to obtain the parity bit information of the forward error correction codeword information, and N is obtained by multiplying the second value by 256 or 128.

[0020] The technical solution of the present application represents the processing of the mother code matrix corresponding to the first forward error correction mother code through a value to obtain specific forward error correction codeword information, which helps to achieve flexible configuration of the forward error correction codeword information.

[0021] Wherein, the first order and / or the second order include from back to front or from front to back.

[0022] In combination with the first aspect, in some certain implementations of the first aspect, the first information further includes fourth information, and the fourth information is used to indicate that the first information becomes effective.

[0023] Among them, the first piece of information is carried in the first message, and the first message includes at least one of the following: Physical Layer Operations, Administration, and Maintenance (PLOAM) message, Optical Network Terminal Management and Control Interface (OMCI) message, Operations, Administration, and Maintenance (OAM) message.

[0024] In a second aspect, a method for encoding configuration is provided. The method includes: an optical line terminal determines first information, where the first information is used to indicate the change amount of forward error correction codeword information relative to a first forward error correction mother code, and the optical line terminal sends the first information to an optical network unit, where the first information is used for the optical network unit to determine the forward error correction codeword information.

[0025] The technical solution provided by this application helps to achieve flexible configuration of forward error correction codeword information by indicating the change amount of forward error correction codeword information relative to the first forward error correction mother code.

[0026] In combination with the second aspect, in some implementation manners of the second aspect, before sending the first information, the above method further includes: the optical line terminal receives capability reporting information, where the capability reporting information is used to indicate the forward error correction mother code supported by the optical network unit, and the forward error correction mother code supported by the optical network unit includes the first forward error correction mother code.

[0027] For the technical solution provided by this application, the optical line terminal determines the first forward error correction mother code among the forward error correction mother codes supported by the optical network unit, and can process the first forward error correction mother code to determine the forward error correction codeword information suitable for the optical network unit. Further, without the codeword information defined by the standard, it helps to achieve flexible configuration of forward error correction codeword information.

[0028] In combination with the second aspect, in some implementation manners of the second aspect, before receiving the capability reporting information, the above method further includes: the optical line terminal sends capability query information, where the capability query information is used to query the forward error correction mother code supported by the optical network unit.

[0029] In combination with the second aspect, in some other implementation manners of the second aspect, the first information includes second information, and the second information indicates the change amount of the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction mother code through a bit sequence.

[0030] In combination with the second aspect, in some other implementation manners of the second aspect, the bit sequence of the second information includes a first sequence, and the value of the first sequence is 0, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the first sequence are truncated; at this time, the bit sequence of the second information may further include a second sequence, and the value of the second sequence is 1, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the second sequence are not truncated. Or, the bit sequence of the second information includes a first sequence, and the corresponding value of the first sequence is 1, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the second sequence are truncated; at this time, the bit sequence of the second information may further include a second sequence, and the value of the second sequence is 0, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the second sequence are not truncated.

[0031] Wherein, one bit of the bit sequence corresponds to one column (half column) of the mother code matrix, and corresponds to 256 (128) bits of the mother code word information.

[0032] In combination with the second aspect, in some other implementation manners of the second aspect, the first information further includes a third information, and the third information indicates the change amount of the check bit information of the forward error correction code word information relative to the check information of the first forward error correction mother code through a bit sequence.

[0033] In combination with the second aspect, in some other implementation manners of the second aspect, the bit sequence of the third information includes a third sequence, and the corresponding value of the third sequence is 0, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the third sequence are punctured; at this time, the bit sequence of the third information may further include a fourth sequence, and the corresponding value of the fourth sequence is 1, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the fourth sequence are not punctured. Or, the bit sequence of the third information includes a fourth sequence, and the corresponding value of the fourth sequence is 1, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the fourth sequence are punctured; at this time, the bit sequence of the third information may further include a fourth sequence, and the corresponding value of the fourth sequence is 0, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the fourth sequence are not punctured.

[0034] The technical solution of the present application represents the specific forward error correction code word information through a bit sequence, and can process the first forward error correction mother code in units of one column or half column of the encoded matrix to obtain the forward error correction code word information, which helps to realize the flexible configuration of the forward error correction code word information.

[0035] In combination with the second aspect, in some further implementations of the second aspect, the first information includes a first value, indicating that the payload information of the first forward error correction mother code is truncated by the Mth bit in the first order to obtain the payload information of the forward error correction codeword information, where M is obtained by multiplying the first value by 256 or 128.

[0036] In combination with the second aspect, in some further implementations of the second aspect, the first information includes a second value, indicating that the parity bit information of the first forward error correction mother code is punctured by N bits in the second order to obtain the parity bit information of the forward error correction codeword information, where N is obtained by multiplying the second value by 256 or 128.

[0037] The technical solution of the present application uses a value to represent the processing of the mother code matrix corresponding to the first forward error correction mother code to obtain specific forward error correction codeword information, which helps to achieve flexible configuration of the forward error correction codeword information.

[0038] Among them, the first order and / or the second order include from the back to the front or from the front to the back.

[0039] In combination with the second aspect, in some certain implementations of the second aspect, the first information further includes a fourth information, and the fourth information is used to indicate that the first information takes effect.

[0040] Among them, the first information is carried in a first message, and the first message includes at least one of the following: a physical layer operation, administration, and maintenance (PLOAM) message, an optical network termination management and control interface (OMCI) message, and an operation, administration, and maintenance (OAM) message.

[0041] In a third aspect, an apparatus for encoding configuration is provided. The apparatus includes: a transceiver unit, configured to receive first information, where the first information is used to indicate the change amount of the forward error correction codeword information relative to the first forward error correction mother code; and a processing unit, configured to determine the forward error correction codeword information according to the first information.

[0042] In combination with the third aspect, in some certain implementations of the third aspect, the transceiver unit is further configured to send capability reporting information, where the capability reporting information is used to indicate the forward error correction mother code supported by the optical network unit, and the forward error correction mother code supported by the optical network unit includes the first forward error correction mother code.

[0043] In combination with the third aspect, in some certain implementations of the third aspect, the transceiver unit is further configured to receive capability query information, where the capability query information is used to query the forward error correction mother code supported by the optical network unit.

[0044] In a fourth aspect, an apparatus for encoding configuration is provided. The apparatus includes: a processing unit, configured to determine first information, where the first information is used to indicate the change amount of the forward error correction codeword information relative to the first forward error correction mother code; and a transceiver unit, configured to send the first information to the optical network unit.

[0045] In combination with the fourth aspect, in some implementations of the fourth aspect, the transceiver unit is further configured to receive capability reporting information, where the capability reporting information is used to indicate the forward error correction mother code supported by the optical network unit, and the forward error correction mother code supported by the optical network unit includes a first forward error correction mother code.

[0046] In combination with the fourth aspect, in some implementations of the fourth aspect, the transceiver unit is further configured to send capability query information, where the capability query information is used to query the forward error correction mother code supported by the optical network unit.

[0047] In a fifth aspect, a communication device is provided, including: a processor; the processor is used to be coupled with a memory and, after reading instructions in the memory, execute the method according to any of the above aspects according to the instructions. The communication device may be the optical network unit entity in the first aspect above, or a device including the optical network unit entity above; or, the communication device may be the optical line terminal entity in the second aspect above, or a device including the optical line terminal entity above.

[0048] In combination with the above fifth aspect, in a possible implementation, the communication device further includes a memory, and the memory is used to store necessary program instructions and data.

[0049] In combination with the above fifth aspect, in a possible implementation, the communication device is a chip or a chip system. Optionally, when the communication device is a chip system, it may be composed of chips or may include chips and other discrete devices.

[0050] In a sixth aspect, a communication device is provided, including: a processor and an interface circuit; the interface circuit is used to receive a computer program or instructions and transmit them to the processor; the processor is used to execute the computer program or instructions so that the communication device executes the method according to the first aspect or the second aspect above.

[0051] In combination with the above sixth aspect, in a possible implementation, the communication device is a chip or a chip system. Optionally, when the device for charging is a chip system, it may be composed of chips or may include chips and other discrete devices.

[0052] In a seventh aspect, a communication system is provided, including the optical network unit described in the first aspect and the second aspect above, and an optical line terminal.

[0053] Wherein, the optical network unit is used to execute the method described in the first aspect, and the optical line terminal is used to execute the method described in the second aspect.

[0054] In an eighth aspect, a computer program product is provided, which includes computer program code that, when running on a computer, causes the computer to execute the methods in the above aspects.

[0055] It should be noted that the above computer program code can be stored in whole or in part on a first storage medium. The first storage medium can be packaged together with the processor or separately packaged from the processor. The embodiments of the present application do not make specific limitations on this.

[0056] In a ninth aspect, a computer-readable medium is provided, which stores program code that, when running on a computer, causes the computer to execute the methods in the above aspects.

[0057] In a tenth aspect, a chip system is provided, including a memory and a processor. The memory is used to store a computer program, and the processor is used to call and run the computer program from the memory, so that a communication device equipped with the chip system executes the methods in any one of the first aspect to the second aspect and their possible implementation manners.

[0058] Among them, the chip system may include an input chip or interface for sending information or data, and an output chip or interface for receiving information or data. Description of the Drawings

[0059] Figure 1 is a schematic diagram of the uplink and downlink transmission of a PON system.

[0060] Figure 2 is a schematic diagram of the encoding configuration method provided by the embodiment of the present application.

[0061] Figure 3 is a schematic diagram of a specific example of the encoding configuration method provided by the embodiment of the present application.

[0062] Figure 4 is a schematic diagram of indicating forward error correction codeword information through a bit sequence provided by the embodiment of the present application.

[0063] Figure 5 is a schematic diagram of indicating forward error correction codeword information through a numerical value provided by the embodiment of the present application.

[0064] Figure 6 is a schematic diagram of the encoding configuration device provided by the embodiment of the present application.

[0065] Figure 7 is a schematic diagram of the encoding configuration apparatus provided by the embodiment of the present application. Detailed Embodiments

[0066] The technical solutions in the present application will be described below in conjunction with the accompanying drawings.

[0067] With the increasing richness of telecommunications services, users' demand for bandwidth is also growing. Operators in China and around the world have regarded the fiber to the home (FTTH) scenario as an inevitable choice for the access network. Using a PON system in FTTH has become the mainstream choice. In a PON network, this access technology only requires optical passive devices such as optical fibers and optical splitters between the central office (OLT) and users (ONU) of the access network, without the need to rent a machine room and equip a power supply, so it is called a passive optical network. Among them, when sending and receiving data, the downstream direction of the PON network is broadcast, and the upstream direction is unicast.

[0068] Figure 1 A schematic diagram of the upstream and downstream transmission of a PON system is shown.

[0069] As Figure 1 shown, during downstream transmission, the 1-way signal sent by the OLT is split into N-way by a splitter and sent to all ONUs simultaneously. The ONU selectively receives the downstream data with the same ID number as itself and discards other data.

[0070] During upstream transmission, the optical signals from N ONUs are combined into a group of optical signals using time division multiplexing (TDM) technology. The principle is to divide the upstream transmission time into several time slots Ti (i = 1, 2, 3,..., 32,...). Only one ONU is arranged to send packet information to the OLT in a packet manner within each time slot, and each ONU sends in sequence according to the order specified by the OLT. TDM requires the OLT to measure its distance from each ONU and then perform strict transmission timing for each ONU. Each ONU obtains timing information from the downstream signal sent by the OLT and sends an upstream packet signal within the time slot specified by the OLT, thus avoiding conflicts between ONUs. Based on this principle, the PON is called a time division multiplexing - passive optical network (TDM-PON).

[0071] In a PON system, the transmission distances from different ONUs to the OLT or the splitters passed through are different. Therefore, the link losses between different ONUs and the OLT are also different. The FEC technology is used to solve the link losses and transmission costs introduced by splitters and optical fiber transmission. This technology can add redundant error correction codes to the transmission code sequence, which can greatly reduce the OSNR tolerance at the receiving end, reduce the bit error rate and transmit power. At the same time, this technology can effectively improve the channel for optical fiber signal transmission. Various types of distortions and non-isochronous delays will always occur during the signal transmission process in each medium. The resulting bit error rate and jitter of the signal can both reflect the final result in the system bit error rate. The FEC technology can solve the optical fiber dispersion, signal attenuation, channel noise, and interference between multiple optical fibers in long-distance, ultra-long-distance, and large-capacity dense wavelength division multiplexing (DWDM) optical fiber communication systems, greatly reducing the performance between each system.

[0072] In 10G PON, FEC using Reed-Solomon (RS) coding is adopted. While in 50G PON, the coding method of low density parity check (LDPC) is selected. The performances and implementation costs of different FEC coding methods are different. Complex FEC coding methods often bring more coding benefits. For the same coding method, introducing more overhead can also bring greater coding benefits.

[0073] Currently, to ensure transmission performance, the FEC coding method is defined based on the maximum possible link loss between the OLT and the ONU, and a unified FEC coding is used. Usually, in a certain PON system, the link losses from some ONUs to the OLT are large, and those from some ONUs to the OLT are small. For ONUs with small link losses, they do not require a very strong error correction ability FEC coding, but they also need to use the same FEC coding method as ONUs with large link losses. Such FEC coding usually has a relatively large overhead or is relatively complex, resulting in a certain waste.

[0074] Based on this, this application proposes a method and device for coding configuration, hoping to achieve flexible configuration of forward error correction FEC codeword information. Taking the interaction between the optical line terminal 110 and the optical network unit 120 as an example, the technical solution of this application will be introduced in detail below.

[0075] Figure 2 The figure shows a schematic diagram of the coding configuration method provided by the embodiment of this application.

[0076] In S210, the optical network unit 120 receives first information, where the first information is used to indicate the change amount of the forward error correction codeword information relative to the first forward error correction mother code.

[0077] The first information is determined by the optical line terminal 110. Among them, the optical line terminal 110 can determine the forward error correction codeword information suitable for the optical network unit 120 according to the signal quality, transmission power, etc. of the optical network unit 120. And in the form of the first information, it indicates the change amount of the forward error correction codeword information relative to the first forward error correction mother code, so that the optical network unit 120 can accurately obtain the forward error correction codeword information.

[0078] Among them, before receiving the first information, the optical network unit 120 can send capability reporting information to the optical line terminal 110, where the capability reporting information is used to indicate the forward error correction mother code supported by the optical network unit 120, and the forward error correction mother code supported by the optical network unit 120 includes the first forward error correction mother code.

[0079] In this way, the optical line terminal 110 determines the first forward error correction mother code among the forward error correction mother codes supported by the optical network unit 120, and can process the first forward error correction mother code, so as to determine the forward error correction codeword information suitable for the optical network unit 120. Further, there is no need for the codeword information defined by the standard, which helps to realize the flexible configuration of the forward error correction codeword information.

[0080] Optionally, before sending the capability reporting information, the optical network unit 120 can receive the capability query information sent by the optical line terminal 110, where the capability query information is used to query the forward error correction mother code supported by the optical network unit 120.

[0081] Among them, the first information is carried in the first message, and the first message includes at least one of the following: Physical Layer Operations, Administration and Maintenance (PLOAM) message, Optical Network Terminal Management and Control Interface (OMCI) message, Operations, Administration and Maintenance (OAM) message.

[0082] In S220, the optical network unit 120 determines the forward error correction codeword information according to the first information.

[0083] As a possible implementation manner, the first information may include second information, and the second information indicates the change amount of the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction mother code through a bit sequence.

[0084] Among them, the bit sequence of the second information includes a first sequence, the value of the first sequence is 0, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the first sequence are truncated; at this time, the bit sequence of the second information may further include a second sequence, the value of the second sequence is 1, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the second sequence are not truncated.

[0085] Alternatively, the bit sequence of the second information includes a first sequence, the corresponding value of the first sequence is 1, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the second sequence are truncated; at this time, the bit sequence of the second information may further include a second sequence, the value of the second sequence is 0, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the second sequence are not truncated.

[0086] Among them, one bit of the bit sequence corresponds to a column (half column) of the mother code matrix and corresponds to 256 (128) bits of the mother code word information.

[0087] Optionally, the first information may further include a third information, and the third information indicates the change amount of the check bit information of the forward error correction code word information relative to the check information of the first forward error correction mother code through a bit sequence.

[0088] Among them, the bit sequence of the third information includes a third sequence, the corresponding value of the third sequence is 0, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the third sequence are punctured; at this time, the bit sequence of the third information may further include a fourth sequence, the corresponding value of the fourth sequence is 1, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the fourth sequence are not punctured.

[0089] Alternatively, the bit sequence of the third information includes a third sequence, the corresponding value of the third sequence is 1, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the third sequence are punctured; at this time, the bit sequence of the third information may further include a fourth sequence, the corresponding value of the fourth sequence is 0, which is used to indicate that 256 or 128 bits of the first forward error correction mother code corresponding to the fourth sequence are not punctured.

[0090] The technical solution of the present application represents specific forward error correction code word information through a bit sequence, and can process the first forward error correction mother code in units of a column or a half column of the encoded matrix to obtain the forward error correction code word information, which helps to achieve flexible configuration of the forward error correction code word information.

[0091] As another possible implementation, the first information may include a first numerical value, which is used to indicate that the payload information of the first forward error correction mother code is truncated by M bits in the first order to obtain the payload information of the forward error correction codeword information, where M is obtained by multiplying the first numerical value by 256 or 128.

[0092] Optionally, the first information may further include a second numerical value, which indicates that the parity bit information of the first forward error correction mother code is punctured by N bits in the second order to obtain the parity bit information of the forward error correction codeword information, where N is obtained by multiplying the second numerical value by 256 or 128.

[0093] Among them, the first order and / or the second order include from the back to the front or from the front to the back.

[0094] The technical solution of this application represents the processing of the mother code matrix corresponding to the first forward error correction mother code through numerical values to obtain specific forward error correction codeword information, which helps to achieve flexible configuration of the forward error correction codeword information.

[0095] Optionally, the first information may further include fourth information, and the fourth information is used to indicate that the first information becomes effective.

[0096] The technical solution provided by this application helps to achieve flexible configuration of the forward error correction codeword information by indicating the change amount of the forward error correction codeword information relative to the first forward error correction mother code.

[0097] Figure 3 FIG. shows a schematic diagram of an example of a specific example of the encoding configuration method provided by an embodiment of this application.

[0098] S310, the optical network unit 120 receives the capability query information sent by the optical line terminal 110.

[0099] Among them, the capability query information is used to query the forward error correction mother code supported by the optical network unit 120. The capability query information may be carried in a first message, and the first message includes at least one of the following: physical layer operation, administration, and maintenance PLOAM message, optical network terminal management and control interface OMCI message, operation, administration, and maintenance OAM message.

[0100] As an example rather than a limitation, when the capability query information is carried in the PLOAM message, its specific form and content are as shown in Table 1 below. Among them, the bold part "FEC capability query" is used to indicate that the optical line terminal 110 queries or asks about the type of forward error correction mother code supported by the optical network unit 120.

[0101] Table 1 Form and content of the capability query information

[0102]

[0103] S320, the optical network unit 120 reports the transmission capability information.

[0104] As an example rather than a limitation, when the capability reporting information is carried in the PLOAM message, its specific form can be as shown in Table 2 and Table 3 below. Among them, the bold part "FEC code Capability" is used to represent the type of the forward error correction mother code supported by the optical network unit 120. In Table 2, the forward error correction mother codes supported by the optical network unit 120 include LDPC. In Table 3, the optical network unit 120 supports truncating and puncturing the forward error correction FEC mother code.

[0105] Table 2 Forms and Contents of Capability Reporting Information

[0106]

[0107] Table 3 Forms and Contents of Capability Reporting Information

[0108]

[0109] S330, the optical line terminal 110 determines the first information, and the first information is used to indicate the change amount of the forward error correction codeword information relative to the first forward error correction mother code.

[0110] The forward error correction codeword information includes payload information and parity bit information. In the embodiments of the present application, the first information can indicate the change amount of the forward error correction codeword information relative to the first forward error correction mother code in the form of a bit sequence and / or a numerical value. In 50G PON, a 12*69 coding matrix is used. When generating a new codeword structure based on this coding matrix, usually one column or half a column is used as a unit to cut the columns of the matrix. As Figure 4 shown, the default codeword LDPC(17280, 14592) uses the first 57 columns + 12 columns of this matrix during encoding. Among them, according to the different contents of the first information, it can be divided into the following four situations.

[0111] Situation 1:

[0112] The payload part and the parity bit part of the forward error correction codeword information are indicated by a bit sequence.

[0113] Specifically, the above first information can include the second information and the third information at the same time. The second information indicates the change amount of the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction mother code through a bit sequence. The third information indicates the change amount of the parity bit information of the forward error correction codeword information relative to the parity information of the first forward error correction mother code through a bit sequence. In this way, the forward error correction codeword information configured for the optical network unit 120 is represented by a bit sequence.

[0114] By way of example and not limitation, when the first information is carried in a PLOAM message, its specific form may be as shown in Table 4 below. Among them, the bold font "FEC capability set" indicates that this message configures the forward error correction codeword information for the optical network unit 120, and the bold font "FEC code selection" indicates that this message includes a bit sequence.

[0115] Form and content of the first information in Case 1 of Table 4

[0116]

[0117] Such as Figure 4As shown in the figure, the mother code matrix of 12 * 69 has 69 columns, among which 57 columns are payload information and 12 columns are parity bit information. Taking the forward error correction codeword information represented by the bit sequence A as an example, 1 column of the mother code matrix corresponds to 256 bits of the codeword information and corresponds to 1 bit of the bit sequence A. Among them, the bit sequence A includes the bit sequence A1 and the bit sequence A2. The bit sequence A includes 69 bits, the bit sequence A1 includes 57 bits, and the bit sequence A2 includes 12 bits. The bit sequence A1 is used to represent the change amount of the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction mother code, and the bit sequence A2 is used to represent the change amount of the parity bit information of the forward error correction codeword information relative to the parity information of the first forward error correction mother code. That is, the first information is the bit sequence A, the second information is the bit sequence A1, and the third information is the bit sequence A2. In the bit sequence A1, there is a first sequence (such as the 1st column and the 2nd column), and the value of the first sequence being 0 is used to represent truncating 256 bits of the first forward error correction mother code corresponding to the first sequence. At this time, there is also a second sequence (such as the 3rd column to the 57th column) in the bit sequence A1, and the value of the second sequence being 0 is used to represent not truncating 256 bits of the first forward error correction mother code corresponding to the second sequence. In this way, the indication of the change amount of the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction mother code is completed through the bit sequence A1. After receiving this second information (i.e., the bit sequence A1), the optical network unit 120 can truncate the payload information of the first forward error correction mother code according to the indication of the bit sequence, so as to obtain the payload information of the forward error correction codeword information configured by the optical network unit 120. In this case, in the bit sequence A2, there is a third sequence (such as the last 1st column to the last 3rd column), and the value corresponding to the third sequence being 0 is used to represent puncturing 256 bits of the first forward error correction mother code corresponding to the third sequence. At this time, there is also a fourth sequence (such as the last 4th column to the last 12th column) in the bit sequence A2, and the value corresponding to the fourth sequence being 1 is used to represent not puncturing 256 bits of the first forward error correction mother code corresponding to the fourth sequence. In this way, the indication of the change amount of the parity bit information of the forward error correction codeword information relative to the parity bit information of the first forward error correction mother code is completed through the bit sequence A2. After receiving this third information (i.e., the bit sequence A2), the optical network unit 120 can puncture the parity bit information of the first forward error correction mother code according to the indication of the bit sequence, so as to obtain the parity bit information of the forward error correction codeword information configured by the optical network unit 120.

[0118] Correspondingly, taking the example of representing the forward error correction codeword information by the bit sequence B, half of the columns of the mother code matrix correspond to 128 bits of the codeword information, corresponding to one bit of the bit sequence B. Among them, the bit sequence B includes the bit sequence B1 and the bit sequence B2. Different from the above-mentioned bit sequence A, the bit sequence B includes 69 * 2 = 138 bits, the bit sequence B1 includes 57 * 2 = 114 bits, and the bit sequence B2 includes 12 * 2 = 24 bits. For the remaining descriptions, please refer to the above introduction about the bit sequence A, which will not be elaborated here.

[0119] It should be understood that in the embodiments of the present application, truncating or puncturing 256 or 128 bits of the first forward error correction mother code corresponding to the sequence can be represented by setting the value corresponding to the sequence to 0, or truncating or puncturing 256 or 128 bits of the first forward error correction mother code corresponding to the sequence can be represented by setting the value corresponding to the sequence to 1. The present application does not limit this.

[0120] In this case, when taking half of the columns as a unit, the bit sequence includes at most 69 * 2 = 138 bits, that is, 18 bytes (144 bits) can be used to complete the indication; when taking a column as a unit, the bit sequence includes at most 69 bits, that is, 9 bytes (72 bits) can be used to complete the indication, which helps to reduce the signaling overhead and save transmission resources.

[0121] Optionally, in order to ensure the validity of the codeword, generally not all columns will be punctured and truncated, and only some columns can be punctured or truncated. For example, at most 32 columns can be truncated and 8 columns can be punctured. Then, when taking half of the columns as a unit, the bit sequence includes at most (32 + 8) * 2 = 80 bits, that is, 10 bytes (80 bits) can be used to complete the indication; when taking a column as a unit, the bit sequence includes at most 32 + 8 = 40 bits, that is, 5 bytes (40 bits) can be used to complete the indication, which can further reduce the signaling overhead and save transmission resources.

[0122] Optionally, the priority order for truncation can be to start truncating from the last column. For example, when truncating 3 columns, start truncating from the 57th column, and truncate the 57th column, the 56th column, and the 55th column in sequence. When puncturing, the priority order can be in the order of the 59th column, the 60th column, the 61st column, the 62nd column, the 67th column...

[0123] According to the technical solution introduced in Case 1, by using a bit sequence to represent the specific forward error correction codeword information, the first forward error correction mother code can be processed in units of one column or half of the columns of the encoded matrix to obtain the forward error correction codeword information, which helps to achieve flexible configuration of the forward error correction codeword information.

[0124] Case 2:

[0125] The payload part and the parity bit part of the forward error correction codeword information are indicated numerically.

[0126] Specifically, the above first information may include a first numerical value and a second numerical value at the same time. The first numerical value is used to indicate that the payload information of the first forward error correction mother code is truncated by the Mth bit in the first order to obtain the payload information of the forward error correction codeword information. The second numerical value is used to indicate that N bits of the parity bit information of the first forward error correction mother code are punctured in the second order to obtain the parity bit information of the forward error correction codeword information. Wherein, M is obtained by multiplying the first numerical value by 256 or 128, and N is obtained by multiplying the second numerical value by 256 or 128.

[0127] As an example rather than a limitation, when the first information is carried in the PLOAM message, its specific form may be as shown in Table 5 below. Wherein, the bold font "FEC capability set" indicates that this message configures the forward error correction codeword information for the optical network unit 120, the bold font "Shortened columns number" indicates the first numerical value, and the bold font "Punctured columns number" indicates the second numerical value.

[0128] Form and content of the first information in Case 2 of Table 5

[0129]

[0130] As Figure 5 shown, the mother code matrix of 12*69 has 69 columns, of which 57 columns are payload information and 12 columns are parity bit information.

[0131] As a possible implementation manner, 1 column of the mother code matrix corresponds to 256 bits of the codeword information and corresponds to 1 bit of the first numerical value. When the first numerical value is 3 and the first order is from the back to the front, it represents that the payload information of the first forward error correction mother code is truncated by the Mth bit from the back to the front to obtain the payload information of the forward error correction codeword information. Wherein, M is obtained by multiplying the first numerical value by 256, that is, M = 3*256 = 768. In this way, after receiving the first numerical value, the optical network unit 120 can process the payload information of the first forward error correction mother code to obtain the payload information of the forward error correction codeword information.

[0132] When the second numerical value is 2 and the second order is from the back to the front, it represents that N bits of the parity bit information of the first forward error correction mother code are punctured from the back to the front to obtain the parity bit information of the forward error correction codeword information. Wherein, N is obtained by multiplying the second numerical value by 256, that is, N = 2*256 = 512. In this way, after receiving the second numerical value, the optical network unit 120 can process the parity bit information of the first forward error correction mother code to obtain the parity bit information of the forward error correction codeword information.

[0133] As another possible implementation, half of a column of the mother code matrix corresponds to 128 bits of the codeword information, corresponding to one bit of the first value. When the first value is 3 and the first order is from the back to the front, it represents truncating the Mth bit of the payload information of the first forward error correction mother code from the back to the front to obtain the payload information of the forward error correction codeword information. Wherein, M is obtained by multiplying the first value by 128, that is, M = 3 * 128 = 384. In this way, after receiving the first value, the optical network unit 120 can process the payload information of the first forward error correction mother code to obtain the payload information of the forward error correction codeword information. When the second value is 2 and the second order is from the back to the front, it represents punching N bits of the parity bit information of the first forward error correction mother code from the back to the front to obtain the parity bit information of the forward error correction codeword information. Wherein, N is obtained by multiplying the second value by 128, that is, N = 2 * 128 = 256. In this way, after receiving the second value, the optical network unit 120 can process the parity bit information of the first forward error correction mother code to obtain the parity bit information of the forward error correction codeword information.

[0134] It should be understood that in the embodiments of the present application, the first order and / or the second order may include from the back to the front or from the front to the back. Among them, the first order and the second order may be the same or different. Optionally, the first order and / or the second order may also be an order specified according to negotiation or agreement, such as starting from a certain column in the middle, etc., and the present application does not limit it. Among them, the first order and / or the second order may be continuous. For example, when the first value is 3, three consecutive columns (or half columns) are processed. Optionally, the first order and / or the second order may also be discontinuous. For example, when the first value is 3, according to the order specified by negotiation or agreement, it may be processed in the order of odd columns or even columns, etc., and the present application does not limit it.

[0135] Optionally, the priority order during truncation may start from the last column. For example, when truncating 3 columns, start truncating from the 57th column, and sequentially truncate the 57th column, the 56th column, and the 55th column. When punching holes, the priority order can be punching holes in the 59th column, the 60th column, the 61st column, the 62nd column, the 67th column......

[0136] In this case, when taking half a column as a unit, there are a total of 57 * 2 possibilities for the payload part, and a total of 12 * 2 possibilities for the parity bits. The payload part can be represented by at least 7 bits, and the parity bits can be represented by 5 bits, which helps to reduce signaling overhead and save transmission resources.

[0137] Optionally, to ensure the validity of the codeword, not all columns are usually punctured or truncated. Only some columns can be punctured or truncated. For example, at most 32 columns can be truncated and 8 columns can be punctured. Then, when using half-columns as the unit, only 6 bits are needed to represent the payload part and 4 bits are needed to represent the parity part, which can further reduce the signaling overhead and save transmission resources.

[0138] According to the technical solution introduced in Case 2, numerically processing the parity matrix corresponding to the first forward error correction mother code to obtain specific forward error correction codeword information helps to achieve flexible configuration of the forward error correction codeword information.

[0139] Case 3:

[0140] The payload part of the forward error correction codeword information is indicated by a bit sequence, and the parity bit part of the forward error correction codeword information is indicated by a numerical value.

[0141] Specifically, the above first information may include second information and a second numerical value at the same time. The second information indicates the change amount of the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction mother code through a bit sequence. The second numerical value is used to indicate that N bits are punctured from the parity bit information of the first forward error correction mother code in the second order to obtain the parity bit information of the forward error correction codeword information. Here, N is obtained by multiplying the second numerical value by 256 or 128. For example, the second information includes the bit sequence A1. When using half-columns as the unit, the bit sequence A1 includes 57 * 2 = 114 bits. At this time, the parity part can be indicated by 5 bits in the numerical representation method.

[0142] It should be understood that the specific representation methods and beneficial effects of the second information and the second numerical value can refer to the descriptions in Case 1 and Case 2 above, and will not be elaborated here.

[0143] According to the technical solution introduced in Case 3, representing the payload information of the forward error correction codeword information by a bit sequence and representing the parity bit information of the forward error correction codeword information by a numerical value can process the first forward error correction mother code in units of one column or half-column of the encoded matrix to obtain the forward error correction codeword information, which helps to achieve flexible configuration of the forward error correction codeword information.

[0144] Case 4:

[0145] The payload part of the forward error correction codeword information is indicated by a numerical value, and the parity bit part of the forward error correction codeword information is indicated by a bit sequence.

[0146] Specifically, the above first information may simultaneously include third information and a first numerical value. The first numerical value is used to indicate that the payload information of the first forward error correction mother code is truncated by the Mth bit in the first order to obtain the payload information of the forward error correction codeword information. Wherein, M is obtained by multiplying the first numerical value by 256 or 128. The third information indicates the change amount of the parity bit information of the forward error correction codeword information relative to the parity information of the first forward error correction mother code through a bit sequence. For example, when in units of columns, the payload part is represented by 7 bits, and the third information includes the bit sequence A2, and the bit sequence A2 includes 12 bits.

[0147] It should be understood that the specific representation methods and beneficial effects of the third information and the first numerical value can be referred to the descriptions in the above Scenario 1 and Scenario 2, and will not be elaborated here.

[0148] According to the technical solution introduced in Scenario 4, by using a numerical value to represent the payload information of the forward error correction codeword information and using a bit sequence to represent the parity bit information of the forward error correction codeword information, the first forward error correction mother code can be processed in units of one column or half a column of the encoding matrix to obtain the forward error correction codeword information, which helps to achieve flexible configuration of the forward error correction codeword information.

[0149] S340, the optical line terminal 110 sends the first information to the optical network unit 120.

[0150] Wherein, the first information is carried in the first message, and the first message includes at least one of the following: Physical Layer Operations, Administration, and Maintenance (PLOAM) message, Optical Network Terminal Management and Control Interface (OMCI) message, Operations, Administration, and Maintenance (OAM) message.

[0151] S350, the optical network unit 120 determines the forward error correction codeword information according to the first information.

[0152] Specifically, corresponding to the description in S330, the optical network unit 120 processes the first forward error correction mother code in units of one column or half a column of the encoding matrix according to the content of the first information, based on the bit sequence and / or the numerical value, to obtain the forward error correction codeword information.

[0153] The technical solution provided by this application helps to achieve flexible configuration of the forward error correction codeword information by indicating the change amount of the forward error correction codeword information relative to the first forward error correction mother code.

[0154] It should be understood that the magnitudes of the sequence numbers of the above processes do not mean the order of execution. The order of execution of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of this application.

[0155] It should also be understood that in various embodiments of the present application, without special instructions and logical conflicts, the terms and / or descriptions between different embodiments are consistent and can be referenced to each other, and the technical features in different embodiments can be combined to form new embodiments according to their internal logical relationships.

[0156] It can be understood that in the above embodiments of the present application, the method implemented by the communication device can also be implemented by components (such as chips or circuits) configurable inside the communication device.

[0157] Above, in combination with Figure 2 、 Figure 3 、 Figure 4 and Figure 5 The method for encoding configuration provided by the embodiments of the present application has been described in detail. The above method for encoding configuration is mainly introduced from the perspective of the interaction between each network element. It can be understood that for each device to implement the above functions, it includes the corresponding hardware structure and / or software module for executing each function. Those skilled in the art should be able to realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed in this article, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the way of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.

[0158] Next, in combination with Figure 6 and Figure 7 The apparatus for encoding configuration provided by the embodiments of the present application will be described in detail. It should be understood that the description of the apparatus embodiments corresponds to the description of the method embodiments. Therefore, for the content not described in detail, reference can be made to the above method embodiments. For the sake of brevity, some content will not be repeated.

[0159] The embodiments of the present application can divide the functional modules of the transmitting end device or the receiving end device according to the above method examples. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated into one processing module. The above integrated module can be implemented in the form of hardware or in the form of a software functional module. It should be noted that the division of modules in the embodiments of the present application is illustrative, only a logical function division, and there can be other division methods in actual implementation. Hereinafter, taking the division of each functional module corresponding to each function as an example for description.

[0160] Figure 6FIG. 0 shows a schematic structural diagram of an example of a device with the encoding configuration of the present application. Any device involved in any of the methods 200 to 400, such as an optical line terminal, an optical network unit, etc., can be implemented by Figure 6 the device with the encoding configuration shown.

[0161] It should be understood that the device 600 with the encoding configuration can be a physical device, a component of a physical device (for example, an integrated circuit, a chip, etc.), or a functional module in a physical device.

[0162] Such as Figure 6 shown, the device 600 with the encoding configuration includes: one or more processors 610. The processor 610 can store execution instructions for executing the methods of the embodiments of the present application. Optionally, an interface can be called in the processor 610 to implement the receiving and sending functions. The interface can be a logical interface or a physical interface, and no limitation is made thereto. For example, the interface can be a transceiver circuit or an interface circuit. The transceiver circuit or the interface circuit for implementing the receiving and sending functions can be separate or integrated together. The above transceiver circuit or interface circuit can be used for reading and writing code / data, or the above transceiver circuit or interface circuit can be used for signal transmission or transfer.

[0163] Optionally, the interface can be implemented through a transceiver. Optionally, the device 600 with the encoding configuration can further include a transceiver 630. The transceiver 630 can be referred to as a transceiver unit, a transceiver, a transceiver circuit, or a transceiver, etc., and is used to implement the transceiver function.

[0164] Optionally, the device 600 with the encoding configuration can further include a memory 620. The embodiments of the present application do not make a specific limitation on the specific deployment location of the memory 620. The memory can be integrated in the processor or independent of the processor. For the case where the device 600 with the encoding configuration does not include a memory, the device 600 with the encoding configuration only needs to have a processing function, and the memory can be deployed at other locations (such as a cloud system).

[0165] The processor 610, the memory 620, and the transceiver 630 communicate with each other through an internal connection path to transmit control and / or data signals.

[0166] It can be understood that although not shown, the device 600 with the encoding configuration can further include other devices, such as an input device, an output device, a battery, etc.

[0167] Optionally, in some embodiments, the memory 620 may store execution instructions for executing the methods of the embodiments of the present application. The processor 610 may execute the instructions stored in the memory 620 in combination with other hardware (such as the transceiver 630) to complete the steps of the methods shown below. The specific working process and beneficial effects can be referred to the descriptions in the method embodiments above.

[0168] The methods disclosed in the embodiments of the present application can be applied to or implemented by the processor 610. The processor 610 may be an integrated circuit chip with signal processing capabilities. In the implementation process, the steps of the method can be completed by the integrated logic circuit of the hardware in the processor or the instructions in the form of software. The above-mentioned processor may be a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as being executed and completed by the hardware decoding processor, or executed and completed by the combination of the hardware and software modules in the decoding processor. The software module may be located in a mature storage medium in the art such as a random access memory (RAM), a flash memory, a read-only memory (ROM), a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the instructions in the memory and combines its hardware to complete the steps of the above method.

[0169] It can be understood that the memory 620 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchlink dynamic random access memory (SLDRAM), and direct rambus random access memory (DR RAM). It should be noted that the memories of the systems and methods described herein are intended to include but not be limited to these and any other suitable types of memories.

[0170] Figure 7 An exemplary schematic structural diagram of the device of the encoding configuration of the present application is shown.

[0171] Optionally, the specific form of the device 700 of the encoding configuration can be a general-purpose computer device or a chip in a general-purpose computer device, and the embodiments of the present application do not limit this. As Figure 7 shown, the device of the encoding configuration includes a processing unit 710 and a transceiver unit 720.

[0172] Specifically, the device 700 of the encoding configuration can be any device involved in the present application and can implement the functions that the device can achieve. It should be understood that the device 700 of the encoding configuration can be a physical device, a component of a physical device (for example, an integrated circuit, a chip, etc.), or a functional module in a physical device.

[0173] In a possible design, the device 700 of the encoding configuration can be the optical line terminal in the above method embodiment, or a chip for implementing the functions of the optical line terminal in the above method embodiment.

[0174] For example, a processing unit 710 is configured to determine first information for indicating a change amount of forward error correction codeword information relative to a first forward error correction mother code, and a transceiver unit 720 is configured to send the first information to an optical network unit.

[0175] Optionally, the transceiver unit 720 is further configured to receive capability reporting information for indicating a forward error correction mother code supported by the optical network unit, where the forward error correction mother code supported by the optical network unit includes the first forward error correction mother code.

[0176] Optionally, the transceiver unit 720 is further configured to send capability query information for querying a forward error correction mother code supported by the optical network unit.

[0177] It should be further understood that when the apparatus 700 with encoding configuration is an optical line terminal device, the transceiver unit 720 in the apparatus 700 with encoding configuration may be implemented through a communication interface (such as a transceiver or an input / output interface), and the processing unit 710 in the apparatus 700 with encoding configuration may be implemented through at least one processor, for example, it may correspond to Figure 6 the processor 610 shown in

[0178] Optionally, the apparatus 700 with encoding configuration may further include a storage unit configured to store instructions or data, and the processing unit may call the instructions or data stored in the storage unit to implement corresponding operations.

[0179] It should be understood that the specific processes for the respective units to execute the corresponding steps have been described in detail in the foregoing method embodiments. For the sake of brevity, they are not elaborated herein again.

[0180] In another possible design, the apparatus 700 with encoding configuration may be the optical network unit apparatus in the foregoing method embodiment, or may be a chip for implementing the functions of the optical network unit in the foregoing method embodiment.

[0181] For example, a transceiver unit 720 is configured to receive first information for indicating a change amount of forward error correction codeword information relative to a first forward error correction mother code, and a processing unit 710 is configured to determine the forward error correction codeword information according to the first information.

[0182] Optionally, the transceiver unit 720 is further configured to send capability reporting information for indicating a forward error correction mother code supported by the optical network unit, where the forward error correction mother code supported by the optical network unit includes the first forward error correction mother code.

[0183] Optionally, the transceiver unit 720 is further configured to receive capability query information for querying a forward error correction mother code supported by the optical network unit.

[0184] It should also be understood that when the device 700 with the encoding configuration is an optical network unit device, the transceiver unit 720 in the device 700 with the encoding configuration can be implemented through a communication interface (such as a transceiver or an input / output interface). For example, it can correspond to Figure 6 the communication interface 630 shown in Figure 6 and the processing unit 710 in the device 700 with the encoding configuration can be implemented through at least one processor. For example, it can correspond to

[0185] the processor 610 shown in

[0186] Optionally, the device 700 with the encoding configuration may further include a storage unit, which can be used to store instructions or data. The processing unit can call the instructions or data stored in the storage unit to implement corresponding operations.

[0187] It should be understood that the specific processes for each unit to execute the above corresponding steps have been described in detail in the above method embodiments. For the sake of brevity, they will not be repeated here.

[0188] In addition, in the present application, the device 700 with the encoding configuration is presented in the form of a functional module. Here, the "module" may refer to an application specific integrated circuit ASIC, a circuit, a processor and a memory that execute one or more software or firmware programs, an integrated logic circuit, and / or other devices that can provide the above functions. In a simple embodiment, those skilled in the art can think that the device 700 can adopt Figure 7 the form shown in Figure 6 . The processing unit 710 can be implemented through Figure 6 the processor 610 shown in Figure 6 . Optionally, if Figure 6All of the memory 620, or alternatively, a storage unit deployed in other systems or devices, is not within the computer device.

[0189] Aspects or features of the present application can be implemented as a method, an apparatus, or an article of manufacture using standard programming and / or engineering techniques. The term "article of manufacture" as used in this application encompasses a computer program accessible from any computer-readable device, carrier, or medium. For example, the computer-readable medium may include, but is not limited to: magnetic storage devices (such as hard disks, floppy disks, or magnetic tapes, etc.), optical discs (such as compact discs (CDs), digital versatile discs (DVDs), etc.), smart cards, and flash memory devices (such as erasable programmable read-only memories (EPROMs), cards, sticks, or key drives, etc.). Additionally, the various storage media described herein may represent one or more devices and / or other machine-readable media for storing information. The term "machine-readable medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing, and / or carrying instructions and / or data.

[0190] According to the method provided by an embodiment of the present application, the present application further provides a computer program product, which includes: computer program code that, when running on a computer, causes the computer to execute Figure 2 through Figure 3 the method of any one of the embodiments shown.

[0191] According to the method provided by an embodiment of the present application, the present application further provides a computer-readable medium storing program code that, when running on a computer, causes the computer to execute Figure 2 or Figure 3 the method of any one of the embodiments shown.

[0192] According to the method provided by an embodiment of the present application, the present application further provides a system including the aforementioned apparatus or device.

[0193] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from a website, computer, server, or data center to another website, computer, server, or data center in a wired manner (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or a wireless manner (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media integrated. The available medium can be a magnetic medium (such as a floppy disk, hard disk, magnetic tape), an optical medium (such as a high-density digital video disc (DVD)), or a semiconductor medium (such as a solid state disc (SSD)), etc.

[0194] The terms "component", "module", "system", etc. used in this specification are used to denote computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. By way of illustration, an application running on a computing device and the computing device can both be components. One or more components can reside in a process and / or an execution thread, and a component can be located on one computer and / or distributed between two or more computers. In addition, these components can execute from various computer-readable media on which various data structures are stored. A component can communicate, for example, through local and / or remote processes according to a signal having one or more data packets (such as data from two components interacting with another component between a local system, a distributed system, and / or a network, such as the Internet interacting with other systems through a signal).

[0195] It should also be understood that the term "and / or" in this text is merely a description of the association relationship between associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. Additionally, the character " / " in this text generally represents an "or" relationship between the associated objects before and after.

[0196] It should also be understood that the introduction of numbers such as "first" and "second" in the embodiments of the present application is only for distinguishing different objects. For example, to distinguish different "information", or "devices", or "units". The understanding of specific objects and the corresponding relationships between different objects should be determined by their functions and internal logics, and should not constitute any limitation to the implementation process of the embodiments of the present application.

[0197] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments, and will not be elaborated herein.

[0198] In several embodiments provided by the present application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division, and there can be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection between each other can be through some interfaces. The indirect coupling or communication connection of the devices or units can be in electrical, mechanical, or other forms.

[0199] The units described as separate components may or may not be physically separated. The components displayed as units may or may not be physical units, that is, they can be located in one place, or can be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0200] In addition, the functional units in each embodiment of the present application can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit.

[0201] When the above-described function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of this application. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs that can store program codes.

[0202] As described above, the above is only the specific implementation manner of this application, but the protection scope of this application is not limited thereto. Any person skilled in the art within the technical scope disclosed by this application can easily think of changes or substitutions, which should all be covered within the protection scope of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

1. A method for encoding a configuration, characterized in that, including: The optical network unit receives first information, where the first information is used to indicate the change amount of the forward error correction codeword information relative to the first forward error correction mother code; The optical network unit determines the forward error correction codeword information according to the first information.

2. The method according to claim 1, wherein The first information includes a first value, indicating that the payload information of the first forward error correction mother code is truncated by M bits in a first order to obtain the payload information of the forward error correction codeword information, where M is obtained by multiplying the first value by 256 or 128.

3. The method according to claim 2, wherein The first order includes from back to front or from front to back.

4. The method according to claim 1, wherein The first information further includes fourth information, where the fourth information is used to indicate that the first information becomes effective.

5. The method according to claim 1, characterized in that The first information includes a second value, indicating that the parity bit information of the first forward error correction mother code is punctured by N bits in a second order to obtain the parity bit information of the forward error correction codeword information, where N is obtained by multiplying the second value by 256 or 128.

6. The method according to any one of claims 1 to 5, characterized in that The first information is carried in a first message, and the first message includes at least one of the following: Physical layer operation, administration, and maintenance (PLOAM) message, optical network termination management and control interface (OMCI) message, operation, administration, and maintenance (OAM) message.

7. The method according to any one of claims 1 to 5, characterized in that The method further includes: The optical network unit sends capability reporting information, where the capability reporting information indicates whether the optical network unit supports truncating the forward error correction mother code.

8. The method according to any one of claims 1 to 5, characterized in that, The method further includes: The optical network unit receives capability query information, where the capability query information is used to query the forward error correction mother code supported by the optical network unit.

9. A method for encoding a configuration, characterized in that, including: The optical line terminal determines first information, where the first information is used to indicate the change amount of the forward error correction codeword information relative to the first forward error correction mother code; The optical line terminal sends the first information to the optical network unit.

10. The method according to claim 9, wherein The first information includes a first value, indicating that the payload information of the first forward error correction mother code is truncated by M bits in a first order to obtain the payload information of the forward error correction codeword information, where M is obtained by multiplying the first value by 256 or 128.

11. The method according to claim 9, wherein The first information includes a second value, indicating that the parity bit information of the first forward error correction mother code is punctured by N bits in a second order to obtain the parity bit information of the forward error correction codeword information, where N is obtained by multiplying the second value by 256 or 128.

12. The method according to claim 10, characterized in that, The first order includes from back to front or from front to back.

13. The method according to any one of claims 9 to 12, characterized in that, The first information further includes fourth information, where the fourth information is used to indicate that the first information becomes effective.

14. The method according to any one of claims 9 to 12, characterized in that, The first information is carried in a first message, and the first message includes at least one of the following: Physical layer operation, administration, and maintenance (PLOAM) message, optical network termination management and control interface (OMCI) message, operation, administration, and maintenance (OAM) message.

15. The method according to any one of claims 9 to 12, characterized in that The method further includes: The optical line terminal receives capability reporting information, where the capability reporting information indicates whether the optical network unit supports truncating the forward error correction mother code.

16. The method according to any one of claims 9 to 12, characterized in that The method further includes: The optical line terminal sends capability query information, where the capability query information is used to query the forward error correction mother code supported by the optical network unit.

17. A communication device, characterized in that, including: A processor, configured to be coupled with a memory, and after reading instructions from the memory, execute the method according to any one of claims 1 to 8; Or, Execute the method according to any one of claims 9 to 16.

18. A chip system, characterized in that, Comprising: a processor, configured to call and run a computer program from a memory, such that a communication device installed with the chip system executes the method according to any one of claims 1 to 8; or, Such that a communication device installed with the chip system executes the method according to any one of claims 9 to 16.

19. A communication system, characterized in that, Comprising an optical line terminal and an optical network unit, The optical network unit is configured to execute the method according to any one of claims 1 to 8; The optical line terminal is configured to execute the method according to any one of claims 9 to 16.

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