Preparation method of SOI (Silicon On Insulator) substrate
By replacing mechanical grinding with substrate corrosion fluid and directional spraying technology, the edge damage problem of SOI substrate is solved, low damage and process-controllable chamfer removal is achieved, and yield rate is improved.
Patent Information
- Application Number
- CN202510715846.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-30
- Publication Date
- 2025-07-29
AI Technical Summary
In the preparation of SOI substrates, mechanical chamfer removal edges are prone to leaving linear damage, affecting yield, and lack selectivity and process controllability.
The substrate corrosion liquid is used to corrode the edge of the device substrate, combine directional spraying and protective gas purging, instead of mechanical grinding, and then grinding is carried out to form an SOI substrate.
It reduces physical damage, improves the smoothness of the substrate edge, and ensures the yield rate of subsequent processes.
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Figure CN120390455A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor materials, and particularly to a method for preparing an SOI substrate. Background Art
[0002] Due to its unique "silicon - silicon oxide - silicon" three - layer structure, the SOI substrate can significantly reduce the parasitic capacitance of devices, improve the integration density, and enhance the anti - latching ability, and is widely used in the fields of integrated circuits, power devices, radio frequency devices, etc.
[0003] A typical existing preparation process flow includes: (1) growing an oxide layer on the substrate surface as the insulating layer of the final product; (2) bonding two substrates, namely the Base and the Device, together (molecular bonding), and performing high - temperature annealing to tightly bond the bonding interface (atomic bonding); (3) removing the unbonded area at the edge of the product to avoid fragmentation during subsequent processing, and rapidly removing a large amount of the thickness of the Device layer by single - side grinding; (4) performing chemical - mechanical polishing on the SOI surface to remove residual damage and provide a smooth surface for device preparation.
[0004] When manufacturing an SOI wafer using the above - mentioned method, since mechanical chamfering is generally used mainly for high efficiency and cost, such as using a grinding wheel to chamfer the edge to remove chipping, sharp corners, etc. to improve the impact resistance and high - temperature resistance of the wafer, but at the same time, due to the characteristics of the grinding wheel, a linear chamfer damage layer will be left, which may cause risks during subsequent processing and affect the yield.
[0005] Therefore, developing an edge - chamfering removal technology with selectivity, low damage, and process controllability has become the key to breaking through the industrialization bottleneck of the SOI substrate. Summary of the Invention
[0006] The technical problem to be solved by the present invention is to provide a method for preparing an SOI substrate, which can have selectivity, low damage, and process controllability during the process of chamfering and removing the edge.
[0007] To solve the above - mentioned problem, the present invention provides a method for preparing an SOI substrate, which includes the following steps: providing a support substrate and a device substrate, at least one of the support substrate and the device substrate having an insulating layer on its surface; bonding the support substrate and the device substrate; corroding the edge of the device substrate with a substrate etching solution to remove the unbonded part at the edge of the device substrate; grinding to remove a part of the thickness of the device substrate to form an SOI substrate.
[0008] Optionally, in the step of removing the unbonded part at the edge of the device substrate, the etching solution is sprayed onto the unbonded part by a directional spraying method. It also includes the step of simultaneously purging the back surface of the support substrate with a protective gas. The protective gas includes at least one of nitrogen and argon.
[0009] Optionally, the etching solution is KOH. The concentration of the KOH solution is 40%-50%, the temperature of the etching solution is 80-90°C, and the etching time is 10-1000 s.
[0010] Optionally, the material of the insulating layer is selected from silicon oxide, silicon nitride, or silicon oxynitride.
[0011] Optionally, the materials of the support substrate and the device substrate are independently selected from single-crystalline silicon, germanium, silicon carbide, gallium nitride, gallium arsenide, glass, or quartz.
[0012] Optionally, the bonding step is carried out by vacuum bonding or atmospheric pressure bonding.
[0013] Etching the edge of the device substrate with a substrate etching solution to remove the unbonded part has obvious advantages compared with mechanical grinding. Mechanical grinding is prone to generating stress due to physical contact, resulting in damage such as edge cracks and chipping. The etching solution acts precisely through chemical reactions, which can avoid these physical damages, make the substrate edge smoother, effectively reduce the damage to the device substrate, and ensure the yield rate of subsequent processes. Description of the Drawings
[0014] Attached Figure 1 Shown is a schematic diagram of the implementation steps of a specific implementation manner of the method for preparing an SOI substrate according to the present invention.
[0015] Attached Figure 2A To attached Figure 2D Shown is a process flow diagram of a specific implementation manner of the method for preparing an SOI substrate according to the present invention. Specific Embodiments
[0016] The following will describe in detail the specific embodiments of the method for preparing an SOI substrate provided by the present invention with reference to the drawings.
[0017] Attached Figure 1 Shown is a schematic diagram of the implementation steps of a specific implementation manner of the method for preparing an SOI substrate according to the present invention, including: Step S10, providing a support substrate and a device substrate, at least one of the support substrate and the device substrate having an insulating layer on its surface; Step S11, bonding the support substrate and the device substrate; Step S12, etching the edge of the device substrate with a substrate etching solution to remove the unbonded part at the edge of the device substrate; Step S13, grinding to remove a part of the thickness of the device substrate to form an SOI substrate.
[0018] Attached Figure 2A To attached Figure 2D Shown is a process flow diagram of a specific implementation manner of the method for preparing an SOI substrate according to the present invention.
[0019] Attached Figure 2AAs shown, referring to step S10, a support substrate 10 and a device substrate 20 are provided, and at least one of the surfaces of the support substrate 10 and the device substrate 20 has an insulating layer 30. The materials of the support substrate 10 and the device substrate 20 have a variety of choices. Besides single-crystalline silicon, they can also be compound semiconductor materials selected from germanium (Ge), silicon carbide (SiC), gallium nitride (GaN), gallium arsenide (GaAs), etc., or insulating materials such as glass and quartz. These materials have their own unique advantages in different application scenarios. For example, germanium materials have a high electron mobility and are suitable for high-frequency devices; silicon carbide and gallium nitride have wide bandgap characteristics and are suitable for making power devices and high-temperature devices; glass and quartz are often used in fields such as microelectromechanical systems (MEMS) that require high insulation performance.
[0020] The material of the insulating layer 30 is selected from silicon oxide, silicon nitride, or silicon oxynitride, preferably silicon oxide, which has good insulation performance, chemical stability, and compatibility with the silicon substrate. In this specific embodiment, the insulating layer 30 is formed on the surface of the support substrate 10. In other specific embodiments, the insulating layer 30 can also be formed on the surface of the device substrate 20, or insulating layers 30 are formed on the surfaces of both the support substrate 10 and the device substrate 20. When the insulating layer 30 is formed on the surface of the device substrate 20, it can better protect the surface of the device substrate 20 during the subsequent bonding and peeling processes, reducing the influence of surface damage on the subsequent processes; while when insulating layers 30 are formed on the surfaces of both substrates, the insulation performance can be further enhanced, and a better interfacial bonding force can be provided during the bonding process.
[0021] Appendix Figure 2B As shown, referring to step S11, the support substrate 10 and the device substrate 20 are bonded. Bonding can be carried out by means of vacuum bonding or atmospheric pressure bonding, etc. Vacuum bonding is carried out in a high-vacuum environment. By removing the gas and impurities on the substrate surface, the substrate surfaces can be in closer contact, thereby improving the bonding quality. During the vacuum bonding process, first, the support substrate 10 and the device substrate 20 are respectively cleaned to remove organic substances, metal impurities, and particulate contaminants on the surface. The cleaning process can adopt the standard RCA cleaning method, including sequentially using a mixture of sulfuric acid and hydrogen peroxide to remove organic substances, using a hydrofluoric acid solution to remove the surface oxide layer, and using a mixture of hydrochloric acid and hydrogen peroxide to remove metal impurities, etc. The cleaned substrates are aligned and bonded in a vacuum chamber, and then by applying a certain pressure and temperature, the atoms on the substrate surfaces diffuse with each other to achieve bonding. The temperature of vacuum bonding is generally between 200 - 500 °C, and the pressure is between 0.1 - 1 MPa. Specific process parameters need to be optimized according to the substrate materials and bonding requirements.
[0022] Atmospheric pressure bonding is carried out in an atmospheric environment. Compared with vacuum bonding, its equipment cost is lower and the operation is relatively simple. Atmospheric pressure bonding usually adopts a plasma-assisted method. Before bonding, the substrate surface is treated with plasma to activate surface atoms and improve surface activity. Plasma treatment can use gases such as oxygen and hydrogen to generate plasma through glow discharge, etch and clean the substrate surface, and remove the surface oxide layer and adsorbed gas molecules. The treated substrate is aligned and bonded in an atmospheric environment, and then bonding is achieved by heating and applying pressure. The temperature of atmospheric pressure bonding is generally between 100 - 300 °C, and the pressure is between 0.5 - 2 MPa. Compared with vacuum bonding, the bonding strength of atmospheric pressure bonding may be relatively lower, but by optimizing the plasma treatment process and bonding parameters, a bonding effect that meets the process requirements can also be obtained.
[0023] In addition, other bonding methods can also be adopted, such as anodic bonding, direct bonding, etc. Anodic bonding uses an electric field to form a chemical bond between insulating materials such as glass and metal or semiconductor substrates. It has high bonding strength and good airtightness, and is suitable for manufacturing devices such as microsensors. Direct bonding is to directly contact the surfaces of two clean substrates at high temperature and high pressure, and achieve bonding through the interaction between atoms. This method has high requirements for the flatness and cleanliness of the substrate surface, but can obtain a high-quality bonding interface.
[0024] As Figure 2C shown, referring to step S12, the edge of the device substrate 20 is etched with a substrate etchant to remove the unbonded part at the edge of the device substrate 20. The etchant is KOH. The concentration of the KOK solution is 48% concentration, the temperature of the etchant is 80 - 90 °C, and the etching time is 10 - 1000 s. Preferably, the concentration of KOH is 48%, the temperature of the etchant is 85 °C, and the etching time is 500.
[0025] In this step, the unbonded part at the edge of the device substrate 20 is removed by the potassium hydroxide (KOH) solution etching process.
[0026] A KOH solution with a concentration of 48% is selected. At this concentration, the etching rate of silicon is about 1 μm / min, and about 8 - 10 μm thick silicon layer can be removed in 500 s, meeting the removal requirements of typical unbonded edges. A concentration higher than 50% will cause the etching rate to be too fast and difficult to control; a concentration lower than 40% may cause increased lateral etching, affecting the stability of the bonding area. The process temperature is controlled at 80 - 90 °C, preferably 85 °C. The temperature is precisely controlled by a constant temperature device. An increase in temperature can accelerate the chemical reaction kinetics, but exceeding 90 °C will cause increased solution volatilization, affecting the concentration uniformity, and may cause thermal stress cracking at the substrate edge. The process time is 10 - 1000 s and preferably 500 s.
[0027] Appendix Figure 2D As shown, referring to step S13, part of the thickness of the device substrate 20 is ground away to form an SOI substrate. The grinding process can be, for example, a process including a rough grinding stage and a fine grinding stage. In the rough grinding stage, a diamond grinding pad with a particle size of 50 - 100 μm is used to remove most of the thick film (the removal amount accounts for 80 - 90% of the total thickness) at a grinding pressure of 20 - 50 kPa and a rotation speed of 50 - 100 rpm. The goal is to reduce the thickness of the device substrate from the initial 500 μm to 50 - 100 μm. In the fine grinding stage, the grinding pad is replaced with a silicon carbide grinding pad with a particle size of 5 - 10 μm, the pressure is reduced to 5 - 10 kPa, and the rotation speed is adjusted to 10 - 20 rpm to precisely control the remaining thickness to the target value (such as 20 - 50 μm), and at the same time, the surface roughness Ra is controlled within 20 - 50 nm. A mixed solution of deionized water and triethanolamine (TEA) (volume ratio 9:1) is used, and TEA is used as a pH buffer (adjusting the pH to 10 - 11) to inhibit the oxidation of the silicon surface during the grinding process, enhance the dispersion of abrasive grains, and avoid scratching the substrate.
[0028] After grinding, chemical mechanical polishing (CMP) can be selectively performed to reduce the surface roughness Ra to <1 nm to meet the accuracy requirements of subsequent processes.
[0029] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.
Claims
1. A method for preparing an SOI substrate, characterized in that, It includes the following steps: Provide a support substrate and a device substrate, at least one of the surfaces of the support substrate and the device substrate having an insulating layer; Bond the support substrate and the device substrate; Etch the edge of the device substrate with a substrate etchant to remove the unbonded portion at the edge of the device substrate; Grind and remove a part of the thickness of the device substrate to form a SOI substrate.
2. The method according to claim 1, characterized in that, In the step of removing the unbonded portion at the edge of the device substrate, the etchant is sprayed onto the unbonded portion in a directional spraying manner.
3. The method according to claim 2, characterized in that, It further includes the step of simultaneously purging the back surface of the support substrate with a protective gas.
4. The method according to claim 3, wherein The protective gas includes at least one of nitrogen and argon.
5. The method according to claim 1, wherein The etchant is KOH.
6. The method according to claim 5, wherein The concentration of the KOH solution is 40%-50%, the temperature of the etchant is 80~90°C, and the etching time is 10-1000 s.
7. The method according to claim 1, characterized in that, The material of the insulating layer is selected from silicon oxide, silicon nitride, or silicon oxynitride.
8. The method according to claim 1, wherein The materials of the support substrate and the device substrate are independently selected from single crystal silicon, germanium, silicon carbide, gallium nitride, gallium arsenide, glass, or quartz.
9. The method according to claim 1, characterized in that, The bonding step uses vacuum bonding or atmospheric pressure bonding.