Piezoelectric device, ultrasonic transducer, microelectromechanical device, and method of forming piezoelectric device

Abstract

The invention relates to a piezoelectric device, an ultrasonic transducer, a microelectromechanical device, and a method of forming a piezoelectric device. A piezoelectric device is provided. The piezoelectric device includes a piezoelectric layer including a first surface and a second surface opposite to each other. Further, the piezoelectric device includes a first electrode formed on the first surface and a second electrode formed on the second surface. The piezoelectric device includes a dielectric material surrounding a piezoelectric layer. In addition, the piezoelectric device includes a first interconnect electrically coupled to the first electrode and a second interconnect electrically coupled to the second electrode. The first electrode is disposed between the piezoelectric layer and each of the first and second interconnects. The first interconnect and the second interconnect are disposed away from the first electrode.

Description

Technical Field

[0001] The present disclosure relates to piezoelectric structures. Specifically, examples of the present disclosure relate to piezoelectric devices, ultrasonic transducers, microelectromechanical devices, and methods of forming piezoelectric devices. Background Art

[0002] Thin film piezoelectric ceramics are used in various microelectromechanical systems (MEMS) devices, such as resonators, actuators, ultrasonic transducers, or sensors. Highly doped piezoelectric ceramics have received increasing attention due to their improved piezoelectric modulus d 33 However, doping of piezoelectric ceramics causes problems during process integration. For example, typical dopants have high resistance to dry etching and show poor selectivity to the surrounding layers in the layer stack. On the other hand, in the case of wet etching, typical dopants leave residues on the surface. In addition, in a conventional architecture, leakage paths along the surface and sidewalls of the piezoelectric ceramic may lead to device breakdown.

[0003] Therefore, improved piezoelectric structures may be needed. Summary of the Invention

[0004] The solutions of the independent claims meet this requirement. The dependent claims relate to advantageous embodiments.

[0005] According to a first aspect, the present disclosure provides a piezoelectric device. The piezoelectric device includes a piezoelectric layer having a first surface and a second surface opposite to each other. In addition, the piezoelectric device includes a first electrode formed on the first surface and a second electrode formed on the second surface. The piezoelectric device includes a dielectric material surrounding the piezoelectric layer. In addition, the piezoelectric device includes a first interconnect electrically coupled to the first electrode and a second interconnect electrically coupled to the second electrode. The first electrode is disposed between the piezoelectric layer and each of the first interconnect and the second interconnect. The first interconnect and the second interconnect are arranged away from the first electrode.

[0006] According to a second aspect, the present disclosure provides an ultrasonic transducer including the piezoelectric device according to the first aspect. A recess is formed in the dielectric material such that a portion of the dielectric material forms a diaphragm embedding the piezoelectric layer.

[0007] According to a third aspect, the present disclosure provides a microelectromechanical device including a micromirror and a spring structure supporting the micromirror. The spring structure includes at least one piezoelectric device according to the first aspect.

[0008] According to a fourth aspect, the present disclosure provides a method of forming a piezoelectric device. The method includes forming a piezoelectric layer including a first surface and a second surface opposite to each other. In addition, the method includes forming a first electrode on the first surface and a second electrode on the second surface. The method includes forming a dielectric material surrounding the piezoelectric layer. Additionally, the method includes forming a first interconnect electrically coupled to the first electrode and a second interconnect electrically coupled to the second electrode. The first electrode is disposed between the piezoelectric layer and each of the first interconnect and the second interconnect. The first interconnect and the second interconnect are arranged away from the first electrode.

[0009] According to the proposed technique, contact with the electrodes can be formed without the piezoelectric layer being exposed to any etchant. Additionally, the sidewalls and surfaces of the piezoelectric layer are insulated by the dielectric material to avoid or at least minimize leakage paths. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Some examples of the device and / or method will now be described only by way of example and with reference to the drawings, in which:

[0011] Figure 1 an example of a piezoelectric device is illustrated;

[0012] Figure 2 an example of an ultrasonic transducer is illustrated;

[0013] Figure 3 an example of a microelectromechanical device is illustrated;

[0014] Figure 4 an example of a method of forming a piezoelectric device is illustrated; and

[0015] Figures 5(a) to 5(p) an exemplary piezoelectric device during various steps of its manufacture is illustrated. DETAILED DESCRIPTION

[0016] Some examples will now be described in more detail with reference to the drawings. However, other possible examples are not limited to the features of these embodiments described in detail. Other examples may include modifications of the features as well as equivalents and alternatives of the features. Additionally, the terms used herein to describe certain examples should not limit other possible examples.

[0017] Throughout the description of the drawings, the same or similar reference numerals refer to the same or similar elements and / or features, which may be the same or implemented in a modified form while providing the same or similar functions. For clarity, the thickness of lines, layers, and / or regions in the figures may also be exaggerated.

[0018] When two elements A and B are combined using "or", this should be understood to discuss all possible combinations, i.e., only A, only B, and A and B, unless otherwise explicitly specified in individual cases. As an alternative wording for the same combination, "at least one of A and B" or "A and / or B" can be used. This also applies to combinations of more than two elements.

[0019] If the singular form is used, such as "a", "an", "the", and "said", and only a single element is not explicitly or implicitly defined as mandatory, then other examples can also use several elements to achieve the same function. If a function is described below as being implemented using multiple elements, then other examples can use a single element or a single processing entity to achieve the same function. It is further understood that the terms "include", "including", "comprise", and / or "comprising", when used, describe the presence of a specified feature, whole, step, operation, process, element, component, and / or a group thereof, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, processes, elements, components, and / or a group thereof.

[0020] Figure 1 A cross-sectional view of an exemplary piezoelectric device 100 is illustrated.

[0021] The piezoelectric device 100 includes a piezoelectric layer 110. The piezoelectric layer 110 includes a first surface 111 and a second surface 112 that face each other. The first surface 111 and the second surface 112 follow each other along the thickness direction of the piezoelectric layer 110 (and the piezoelectric device 100). As Figure 1 shown, the first surface 111 and the second surface 112 can be (substantially) parallel to each other. The first surface 111 and the second surface 112 can be (substantially) planar (flat) surfaces. The piezoelectric layer 110 further includes sidewalls 113 and 114 that face each other. The sidewalls 113 and 114 laterally limit the piezoelectric layer 110. The sidewalls 113 and 114 connect the first surface 111 and the second surface 112. The first surface 111 and the second surface 112 can have any suitable (target) dimensions. Similarly, the thickness of the piezoelectric layer 110 (i.e., the vertical distance between the first surface 111 and the second surface 112) is generally not limited. For example, the piezoelectric layer 110 can be a thin film. In other words, the thickness of the piezoelectric layer 110 can be at least 0.1 μm, 0.5 μm, or 1 μm. The maximum thickness of the piezoelectric layer 110 can be 1 μm, 3 μm, 5 μm, or 10 μm.

[0022] The piezoelectric layer 110 includes a piezoelectric material, such as one or more of aluminum nitride (AlN), quartz (SiO2), lead zirconate titanate (PZT), polyvinylidene fluoride (PVDF), barium titanate (BaTiO3), lithium niobate (LiNbO3), and gallium orthophosphate (GaPO4). However, it should be noted that the present disclosure is not limited to the above materials. Other piezoelectric materials may be used as alternatives or supplements. According to an example, the piezoelectric layer 110 may include or be doped with a piezoelectric material. The piezoelectric material may be lightly doped or highly doped. For example, the atomic ratio of the dopant in the doped piezoelectric material may be at least 1%, 5%, 10%, 15%, 20%, 25%, or 30%. The atomic ratio of the dopant in the doped piezoelectric material refers to the ratio of the atoms of the (one or more) doping elements to the atoms of the (one or more) main components of the piezoelectric material. For a highly doped piezoelectric material, the atomic ratio of the dopant in the doped piezoelectric material may be as high as 50%, 55%, 60%, 65%, 70%, or 75%. Various dopants (dopant materials) may be used, such as one or more of scandium (Sc), chromium (Cr), titanium (Ti), hafnium (Hf), tantalum (Ta), molybdenum (Mo), niobium (Nb), yttrium (Y), and zirconium (Zr). However, it should be noted that the present disclosure is not limited to the above materials. Other dopants may be used as alternatives or supplements. In particular, the doped piezoelectric material may be Sc-doped AlN, where the atomic ratio of the Sc dopant in the doped AlN is at least 20% and at most 60%.

[0023] In addition, the piezoelectric device 100 includes a first electrode 120 formed (directly) on the first surface 111 of the piezoelectric layer 110 and a second electrode 130 formed (directly) on the second surface 112 of the piezoelectric layer 110. Each of the first electrode 120 and the second electrode 130 is formed of one or more conductive materials (such as one or more metals). For example, the first electrode 120 and the second electrode 130 may include one or more of tungsten (W), copper (Cu), titanium (Ti), titanium nitride (TiN), aluminum (Al), and platinum (Pt). However, it should be noted that the present disclosure is not limited to the above materials. Other conductive materials may be used as alternatives or supplements. The first electrode 120 and the second electrode 130 may be made of the same material(s) or different materials. As Figure 1 shown, the first electrode 120 may partially cover the first surface 111. In an alternative example, the first electrode 120 may completely cover the first surface 111. As Figure 1As shown, the second electrode 130 may completely cover the second surface 112. In an alternative example, the second electrode 130 may partially cover the second surface 112. The thicknesses of the first electrode 120 and the second electrode 130 are generally not limited. For example, the respective thicknesses of the first electrode 120 and the second electrode 130 may be at least 1 nm, 10 nm, 20 nm, 50 nm, or 100 nm. On the other hand, the respective thicknesses of the first electrode 120 and the second electrode 130 may be at most 500 nm, 250 nm, 100 nm, or 50 nm. The first electrode 120 and the second electrode 130 may have the same thickness or different thicknesses. The first electrode 120 and the second electrode 130 are provided for making electrical contact with the piezoelectric layer 110. The first electrode 120 and the second electrode 130 allow an electric potential (i.e., voltage) to be provided to the piezoelectric layer 110 to cause the piezoelectric layer 110 to be controllably (and reversibly) deformed due to the piezoelectric effect. Similarly, the first electrode 120 and the second electrode 130 allow the measurement of the electric potential (i.e., voltage) induced in the piezoelectric layer 110 due to the piezoelectric effect caused by the deformation of the piezoelectric layer 110.

[0024] The piezoelectric device 100 includes a dielectric material 140 surrounding the piezoelectric layer 110. The dielectric material 140 also surrounds the first electrode 120 and the second electrode 130. In other words, the piezoelectric layer 110 and the first electrode 120 and the second electrode 130 are completely embedded in the dielectric material 140. For example, the dielectric material 140 may be one or more of silicon dioxide (SiO2) and silicon nitride (Si3N4). However, it should be noted that the present disclosure is not limited to the above materials. Other dielectric materials may be used as alternatives or supplements. The dielectric material 140 provides electrical insulation for the piezoelectric layer 110 and the first electrode 120 and the second electrode 130.

[0025] In addition, the piezoelectric device 100 includes a first interconnect 150 electrically coupled to the first electrode 120 and a second interconnect 160 electrically coupled to the second electrode 130. The first interconnect 150 and the second interconnect 160 allow electrical contact with the electrodes 120 and 130 from the outside (i.e., from outside the piezoelectric device 100) and thus electrical contact with the piezoelectric layer 110. In Figure 1In the example, both the first interconnect 150 and the second interconnect 160 are arranged below the stack formed by the piezoelectric layer 110 and the electrodes 120 and 130. More generally, both the first interconnect 150 and the second interconnect 160 are arranged on the same side with respect to the stack formed by the piezoelectric layer 110 and the electrodes 120 and 130. In other words, the first electrode 120 is arranged between the piezoelectric layer 110 and each of the first interconnect 150 and the second interconnect 160. The first interconnect 150 and the second interconnect 160 are arranged away from the first electrode 120 (at a certain distance from it) (along the thickness direction of the piezoelectric device 100). The vertical distance from the first interconnect 150 to the first electrode 120 is less than the vertical distance from the first interconnect 150 to the second electrode 130. Similarly, the vertical distance from the second interconnect 160 to the first electrode 120 is less than the vertical distance from the second interconnect 160 to the second electrode 130.

[0026] The thicknesses of the first interconnect 150 and the second interconnect 160 are generally not limited. For example, the respective thicknesses of the first interconnect 150 and the second interconnect 160 can be at least 10 nm, 20 nm, 50 nm, 100 nm, 250 nm, or 500 nm. On the other hand, the respective thicknesses of the first electrode 120 and the second electrode 130 can be at most 3 μm, 2 μm, 1.5 μm, 1 μm, 750 nm, 500 nm, 250 nm, 100 nm, or 50 nm. The thicknesses of the first electrode 120 and the second electrode 130 can be selected to facilitate or enable wire bonding or similar post-assembly processes.

[0027] Furthermore, the first interconnect 150 and the second interconnect 160 are arranged in the dielectric material 140. The dielectric material 140 partially surrounds both the first interconnect 150 and the second interconnect 160. The first interconnect 150 is externally accessible via a first opening (recess) 170 formed in the dielectric material 140. The second interconnect 160 is externally accessible via a second opening 175 formed in the dielectric material 140. The first opening 170 extends from the surface 141 of the dielectric material 140 to the first interconnect 150. The second opening 175 extends from the surface 141 of the dielectric material 140 to the second interconnect 160. In Figure 1 the example, the surface 141 of the dielectric material 140 is the top surface of the dielectric material 140, such that the surface 141 of the dielectric material 140 and the interconnects 150 and 160 are arranged on opposite sides of the stack formed by the piezoelectric layer 110 and the electrodes 120 and 130. In other words, the second electrode 130 is arranged between the second surface 112 of the piezoelectric layer 110 and the surface 141 of the dielectric material 140. The first opening 170 and the second opening 175 are laterally offset with respect to the dielectric layer 140 and extend along the thickness direction of the piezoelectric device 100.

[0028] In Figure 1 the example of, both the first opening 170 and the second opening 175 taper from the surface 141 of the dielectric material 140 towards the respective interconnects 150 and 160. However, it should be noted that the present disclosure is not limited to this. Other geometries can be used for the first opening 170 and the second opening 175.

[0029] As described above, the first interconnect 150 is electrically coupled to the first electrode 120. A first conductive path 180 is formed in the dielectric material 140 between the first electrode 120 and the first interconnect 150 for electrically coupling the first interconnect 150 to the first electrode 120. Similarly, a second conductive path 185 is formed in the dielectric material 140 between the second electrode 130 and the second interconnect 160 for electrically coupling the second interconnect 160 to the second electrode 130. The dielectric material 140 separates the piezoelectric layer 110 from the conductive paths 180 and 185, i.e., electrically insulates them. Each of the first conductive path 180 and the second conductive path 185 is formed of one or more conductive materials (such as one or more metals). For example, the first conductive path 180 and the second conductive path 185 can include one or more of Al, W, Cu, Pt, or doped polysilicon (polycrystalline silicon). However, it should be noted that the present disclosure is not limited to the above materials. Other conductive materials can be used as an alternative or in addition. Figure 1 The illustrated geometric dimensions of the first conductive path 180 and the second conductive path 185 are for illustrative purposes only. In other examples, the first conductive path 180 and the second conductive path 185 can exhibit different geometries (wiring in the dielectric material 140).

[0030] The structures for contacting the electrodes 120 and 130 (i.e., the interconnects 150 and 160 and the conductive paths 180 and 185) can be formed without the piezoelectric layer 110 being exposed to any etchant. This is particularly advantageous when the piezoelectric layer 110 includes a highly doped piezoelectric material because typical dopants have a high resistance to dry etching and exhibit poor selectivity to the surrounding layers in the layer stack. Additionally, in the case of wet etching, typical dopants leave residues on the surface. Further, the sidewalls 113 and 114 and the surfaces 111 and 112 of the piezoelectric layer 110 are electrically insulated by the dielectric material 140 to avoid or at least minimize leakage paths. Thus, failures of the piezoelectric device 100 can be avoided.

[0031] The piezoelectric device 100 can be used in various applications due to its advantageous characteristics. Two exemplary applications will be described below with reference to Figure 2 and Figure 3 However, it should be noted that the piezoelectric device 100 is not limited to the exemplary applications described below.

[0032] Figure 2 FIG. shows a cross-sectional view of an exemplary ultrasonic transducer 200. The ultrasonic transducer 200 may be a microelectromechanical device. In particular, the ultrasonic transducer 200 may be a Piezoelectric Micromachined Ultrasonic Transducer (PMUT). The ultrasonic transducer 200 includes the piezoelectric device 100 as described above. The piezoelectric device 100 is formed on a carrier substrate 290 such as a silicon substrate.

[0033] A recess (opening) 295 is formed in the dielectric material 140 such that a portion of the dielectric material 140 forms a diaphragm 205 in which the piezoelectric layer 110 (together with the electrodes 120 and 130) is embedded. In particular, a portion of the dielectric material 140 above the recess 295 forms the diaphragm 205. The recess 295 is formed below the piezoelectric layer 110 and the first electrode 120. In other words, the recess 295 is formed to be away from the first electrode 120. The first electrode 120 is disposed between the piezoelectric layer 110 and the recess 295. The recess 295 is formed laterally between the first interconnect 150 and the second interconnect 160. The recess 295 may be filled with air or any other suitable gas. Alternatively, the recess 295 may be kept under vacuum.

[0034] As described above, for the piezoelectric device 100, the first interconnect 150 and the second interconnect 160 allow electrical contact with the electrodes 120 and 130 from the outside (i.e., from outside the piezoelectric device 100) and thus electrical contact with the piezoelectric layer 110. Therefore, the piezoelectric layer 110 can be used to generate ultrasonic waves based on an externally provided drive signal and / or to generate a measurement signal based on the received (measured) ultrasonic waves. For example, the piezoelectric device 110 may be configured to deform the diaphragm 205 based on electrical signals received at the first interconnect 150 and the second interconnect 160 to emit ultrasonic waves. Alternatively or additionally, the piezoelectric device 110 may be configured to output a corresponding measurement signal at the first interconnect 150 and the second interconnect 160 based on the deformation of the diaphragm 205 caused by the received ultrasonic waves.

[0035] The ultrasonic transducer 200 may be configured to emit and / or detect ultrasonic waves at least between 20 kHz and 1 GHz and / or any sub-range thereof. In particular, the ultrasonic transducer 200 may be configured to emit and / or detect low-frequency ultrasonic waves (e.g., about 50 kHz) for applications such as proximity detection in air (e.g., for parking sensors in vehicles) or high-frequency ultrasonic waves (e.g., about 2 to 10 MHz) for diagnostic applications (e.g., medical ultrasound).

[0036] Figure 3 FIG. shows a cross-sectional view of an exemplary microelectromechanical device 300.

[0037] The microelectromechanical device 300 includes a micromirror 305. The size of the micromirror 305 can be, for example, on the order of micrometers. A spring structure 310 of the microelectromechanical device 300 supports the micromirror 305. As Figure 1 shown, the spring structure 310 includes an independent actuator region and a bottom electrode (first electrode) contact region. The micromirror 305 can be moved relative to the remainder of the microelectromechanical device 300 via the spring structure 310. As Figure 3 shown, the spring structure 310 includes a piezoelectric device according to the proposed technique. Optionally, the spring structure 310 can include a plurality of piezoelectric devices according to the proposed technique.

[0038] As described above, for the piezoelectric device 100, the first interconnect 150 and the second interconnect 160 allow electrical contact with the electrodes 120 and 130 from the outside (i.e., from outside the piezoelectric device 100) and thus electrical contact with the piezoelectric layer 110. Accordingly, the piezoelectric layer 110 can be used to move the micromirror 305 based on an externally provided drive signal, and / or to generate a measurement signal based on the movement and / or position of the micromirror 305 (since the movement / position of the micromirror 305 causes deformation of the spring structure 310, which deformation is measurable via the piezoelectric layer 110). For example, the piezoelectric device 110 can be configured to deform the spring structure 310 based on an electrical signal received at the first interconnect 150 and the second interconnect 160 for deforming the spring structure 310, thereby deflecting the micromirror 305. Alternatively or additionally, the piezoelectric device 110 can be configured to output a corresponding measurement signal at the first interconnect 150 and the second interconnect 160 based on the deflection of the micromirror 305.

[0039] The microelectromechanical device 300 includes a carrier substrate 390 for holding the remaining elements of the microelectromechanical device 300, such as a silicon substrate. One or more layers or elements (such as a buried oxide layer 395) can be additionally formed in the carrier substrate 390.

[0040] The above description focuses on the proposed piezoelectric device and its applications. The following description section will focus on the fabrication of the proposed piezoelectric device.

[0041] Figure 4 A flowchart of an exemplary method 400 for forming a piezoelectric device is illustrated.

[0042] Method 400 includes forming 402 a piezoelectric layer including a first surface and a second surface opposite to each other. For example, forming 402 the piezoelectric layer may include depositing a doped piezoelectric material. For a highly doped piezoelectric material, the atomic ratio of dopants in the doped piezoelectric material may be at least 20%, as described above for piezoelectric device 100. In addition, method 400 includes forming 404 a first electrode on the first surface and forming 406 a second electrode on the second surface. Method 400 includes forming 408 a dielectric material surrounding the piezoelectric layer. In addition, method 400 includes forming 410 a first interconnect electrically coupled to the first electrode and forming 412 a second interconnect electrically coupled to the second electrode. The first electrode is disposed between the piezoelectric layer and each of the first interconnect and the second interconnect. The first interconnect and the second interconnect are arranged away from the first electrode.

[0043] Method 400 allows for providing a piezoelectric device as described above. Additional details and aspects of method 400 are explained in conjunction with the proposed techniques or one or more examples described above or below. Method 400 may include one or more additional optional features corresponding to one or more aspects of the proposed techniques or one or more examples described above or below.

[0044] For example, method 400 may further include forming 414 a first conductive path in the dielectric material between the first electrode and the first interconnect for electrically coupling the first interconnect to the first electrode. Similarly, method 400 may further include forming 416 a second conductive path in the dielectric material between the second electrode and the second interconnect for electrically coupling the second interconnect to the second electrode. Forming the first conductive path and the second conductive path in the dielectric material allows coupling the first interconnect and the second interconnect to the corresponding electrodes of the first electrode and the second electrode.

[0045] Alternatively or additionally, method 400 may further include forming 418 a first opening in the dielectric material. The first opening extends from the surface of the dielectric material to the first interconnect. Similarly, method 400 may further include forming 420 a second opening in the dielectric material. The second opening extends from the surface of the dielectric material to the second interconnect. The second electrode is disposed between the second surface of the piezoelectric layer and the surface of the dielectric material, as described above for piezoelectric device 100. The first opening and the second opening allow external access to the first interconnect and the second interconnect for electrical contact with the piezoelectric layer.

[0046] Other details of method 400 will be clear from the Figures 5(a) to 5(p) following description of Figures 5(a) to 5(p) FIG. 100 illustrates the piezoelectric device 100 during various steps of its manufacture.

[0047] Figure 5(a) illustrates that initially, a layer of dielectric material 140 (e.g., SiO2 or Si3N4) is deposited on a semiconductor substrate 500 (e.g., a silicon substrate).

[0048] Figure 5(b) illustrates that subsequently, a first interconnect 150 and a second interconnect 160 are formed on the layer of dielectric material 140. For example, materials for the first interconnect 150 and the second interconnect 160 can be deposited on the layer of dielectric material 140, a photosensitive chemical substance (such as a photoresist) can be coated on the materials and structured according to the desired geometries of the first interconnect 150 and the second interconnect 160 by lithography techniques. Unwanted material portions are removed by etching according to the lithographic structure to form the first interconnect 150 and the second interconnect 160. Residues of the materials and the photosensitive chemical substance can then be removed during a cleaning process.

[0049] Then, as shown in Figure 5(c), more dielectric material 140 is deposited. The surface of the dielectric material 140 is planarized by chemical mechanical polishing (CMP).

[0050] An opening (recess) 510 is etched into the dielectric material 140 for a first conductive path 180 between the first electrode 120 and the first interconnect 150 (see Figure 5(d)). The opening 510 is filled with a conductive material to form a via as the first conductive path 180 (see Figure 5(e)). As shown in Figure 5(f), subsequently, the first electrode 120 is formed on the planar surface of the dielectric material 140 by depositing and structuring a corresponding conductive material (such as (one or more) metals).

[0051] Then, as shown in Figure 5(g), a material for the piezoelectric layer 110 is deposited. For example, a thin film can be deposited for the piezoelectric layer 110. In particular, the deposited material for the piezoelectric layer 110 can include (e.g., highly) doped piezoelectric materials, such as Sc-doped AlN. Subsequently, a second electrode 130 is formed on the piezoelectric layer 110 (see Figure 5(h)). The second electrode 130 can be formed similar to the first electrode 120. After forming the second electrode 130, the material for the piezoelectric layer 110 is etched to obtain the desired geometry of the piezoelectric layer 110 (see Figure 5(i)). Dry etching and / or wet etching processes can be used to remove unwanted portions of the deposited material of the piezoelectric layer 110. Unwanted portions of the material of the piezoelectric layer 110 can be removed, for example, by etching according to a lithographic structure coated on the material of the piezoelectric layer 110 (and the second electrode 130) to form the piezoelectric layer 110.

[0052] Then, as shown in Figure 5(j), more dielectric material 140 is deposited. The surface of the dielectric material 140 is planarized by CMP.

[0053] Openings (recesses) 520 and 530 extending to the second electrode 130 and the second interconnect 160 are etched into the dielectric material 140 for a second conductive path 185 between the second electrode 130 and the second interconnect 160 (see FIGS. 5(k) and 5(l)). When forming the openings 520 and 530, the dielectric material 140 serves as an etch stop layer to prevent the etch from reaching the piezoelectric layer 110 at the expense of some loss of the dielectric material. The openings 520 and 530 are filled with a conductive material (see FIG. 5(m)) to form vias. Another conductive material connecting the vias is deposited on the dielectric material 140 to form the second conductive path 185 (see FIG. 5(n)). The structuring of the conductive material connecting the vias can be carried out similar to forming the first interconnect 150 and the second interconnect 160.

[0054] Then, as shown in FIG. 5(o), more dielectric material 140 is deposited. The surface of the dielectric material 140 is planarized by CMP.

[0055] Finally, as shown in FIG. 5(p), openings 170 and 175 for accessing the first interconnect 150 and the second interconnect 160 are formed by etching a portion of the dielectric material 140. Thus, the first interconnect 150 and the second interconnect 160 can be electrically contacted via bonding wires or the like.

[0056] It should be noted that the process flow described above with reference to Figures 5(a) to 5(p) for manufacturing the piezoelectric device 100 is merely an example. In alternative examples, other or different process steps may be used to manufacture the piezoelectric device 100.

[0057] The examples described herein can be summarized as follows:

[0058] One example (e.g., Example 1) relates to a piezoelectric device including: a piezoelectric layer having a first surface and a second surface opposite to each other, a first electrode formed on the first surface, a second electrode formed on the second surface, a dielectric material surrounding the piezoelectric layer, a first interconnect electrically coupled to the first electrode, and a second interconnect electrically coupled to the second electrode, wherein the first electrode is disposed between the piezoelectric layer and each of the first interconnect and the second interconnect, and wherein the first interconnect and the second interconnect are arranged away from the first electrode.

[0059] Another example (e.g., Example 2) relates to the previous example (e.g., Example 1) or any other example, and further includes: the piezoelectric layer is a thin film.

[0060] Another example (e.g., Example 3) relates to the previous example (e.g., one of Example 1 or 2) or any other example, and further includes: the thickness of the piezoelectric layer is at least 0.5 μm, and / or the thickness of the piezoelectric layer is at most 3 μm.

[0061] Another example (e.g., Example 4) relates to a previous example (e.g., one of Examples 1 to 3) or any other example, and further includes: the piezoelectric layer includes a doped piezoelectric material.

[0062] Another example (e.g., Example 5) relates to a previous example (e.g., Example 4) or any other example, and further includes: the atomic ratio of the dopant in the doped piezoelectric material is at least 20%.

[0063] Another example (e.g., Example 6) relates to a previous example (e.g., one of Examples 4 or 5) or any other example, and further includes: the doped piezoelectric material is scandium-doped aluminum nitride.

[0064] Another example (e.g., Example 7) relates to a previous example (e.g., one of Examples 1 to 6) or any other example, and further includes: a first conductive path formed in the dielectric material between the first electrode and the first interconnect for electrically coupling the first interconnect to the first electrode, and a second conductive path formed in the dielectric material between the second electrode and the second interconnect for electrically coupling the second interconnect to the second electrode.

[0065] Another example (e.g., Example 8) relates to a previous example (e.g., one of Examples 1 to 7) or any other example, and further includes: a first opening extends from the surface of the dielectric material to the first interconnect, and a second opening extends from the surface of the dielectric material to the second interconnect, wherein the second electrode is disposed between the second surface of the piezoelectric layer and the surface of the dielectric material.

[0066] Another example (e.g., Example 9) relates to a previous example (e.g., Example 8) or any other example, and further includes: the first opening and the second opening extend with a lateral offset with respect to the dielectric layer.

[0067] Another example (e.g., Example 10) relates to a previous example (e.g., one of Examples 8 or 9) or any other example, and further includes: the first interconnect is accessible via the first opening, and wherein the second interconnect is accessible via the second opening.

[0068] Another example (e.g., Example 11) relates to a previous example (e.g., one of Examples 1 to 10) or any other example, and further includes: the vertical distance from the first interconnect to the first electrode is less than the vertical distance from the first interconnect to the second electrode, and the vertical distance from the second interconnect to the first electrode is less than the vertical distance from the second interconnect to the second electrode.

[0069] Another example (e.g., Example 12) relates to an ultrasonic transducer, the ultrasonic transducer includes a piezoelectric device according to a previous example (e.g., any one of Examples 1 to 11) or any other example, wherein a recess is formed in the dielectric material such that a portion of the dielectric material forms a diaphragm embedding the piezoelectric layer.

[0070] Another example (e.g., Example 13) relates to a previous example (e.g., Example 12) or any other example, and further includes: a recess is formed to be away from the first electrode, where the first electrode is disposed between the piezoelectric layer and the recess, and where the recess is formed laterally between the first interconnect and the second interconnect.

[0071] Another example (e.g., Example 14) relates to a previous example (e.g., one of Examples 12 or 13) or any other example, and further includes: the piezoelectric device is configured to deform the diaphragm to emit ultrasonic waves based on electrical signals received at the first interconnect and the second interconnect, and / or output corresponding measurement signals at the first interconnect and the second interconnect based on the deformation of the diaphragm caused by the received ultrasonic waves.

[0072] One example (e.g., Example 15) relates to a microelectromechanical device that includes a micromirror and a spring structure that supports the micromirror, where the spring structure includes at least one piezoelectric device according to a previous example (e.g., any one of Examples 1 to 11) or any other example.

[0073] Another example (e.g., Example 16) relates to a previous example (e.g., Example 15) or any other example, and further includes: deforming the spring structure based on electrical signals received at the first interconnect and the second interconnect for deforming the spring structure, thereby deflecting the micromirror, and / or outputting corresponding measurement signals at the first interconnect and the second interconnect based on the deflection of the micromirror.

[0074] One example (e.g., Example 17) relates to a method of forming a piezoelectric device, the method including: forming a piezoelectric layer including a first surface and a second surface opposite to each other, forming a first electrode on the first surface, forming a second electrode on the second surface, forming a dielectric material surrounding the piezoelectric layer, forming a first interconnect electrically coupled to the first electrode, and forming a second interconnect electrically coupled to the second electrode, where the first electrode is disposed between the piezoelectric layer and each of the first interconnect and the second interconnect, and where the first interconnect and the second interconnect are disposed to be away from the first electrode.

[0075] Another example (e.g., Example 18) relates to a previous example (e.g., Example 17) or any other example, and further includes: forming a first conductive path in the dielectric material between the first electrode and the first interconnect for electrically coupling the first interconnect to the first electrode, and forming a second conductive path in the dielectric material between the second electrode and the second interconnect for electrically coupling the second interconnect to the second electrode.

[0076] Another example (e.g., Example 19) relates to a previous example (e.g., one of Examples 17 or 18) or any other example, and further includes: forming a first opening in a dielectric material that extends from the surface of the dielectric material to a first interconnect, and forming a second opening in the dielectric material that extends from the surface of the dielectric material to a second interconnect, wherein a second electrode is disposed between a second surface of the piezoelectric layer and the surface of the dielectric material.

[0077] Another example (e.g., Example 20) relates to a previous example (e.g., one of Examples 17 to 19) or any other example, and further includes: forming a piezoelectric layer includes depositing a doped piezoelectric material, and wherein an atomic ratio of dopants in the doped piezoelectric material is at least 20%.

[0078] Aspects and features described with respect to a particular example among the foregoing examples may also be combined with one or more other examples to replace the same or similar features of the other example, or to additionally introduce such features into the other example.

[0079] It is further understood that the disclosure of several steps, processes, operations, or functions in the specification or claims should not be construed as implying that these operations necessarily depend on the described order, unless explicitly stated in individual cases or necessary for technical reasons. Thus, the foregoing description does not limit the execution of several steps or functions to a certain order. Additionally, in other examples, a single step, function, process, or operation may include and / or be decomposed into several sub-steps, sub-functions, sub-processes, or sub-operations.

[0080] If some aspects have been described in connection with a device or system, these aspects should also be understood as a description of the corresponding method. For example, block, device, or functional aspects of a device or system may correspond to features of the corresponding method, such as method steps. Thus, aspects described with respect to a method should also be understood as a description of the corresponding block, corresponding element, property, or functional feature of the corresponding device or corresponding system.

[0081] The following claims are hereby incorporated into the detailed description, where each claim can exist independently as a separate example. It should also be noted that although in the claims, dependent claims refer to specific combinations with one or more other claims, other examples may also include combinations of dependent claims with the subject matter of any other dependent or independent claim. Such combinations are hereby explicitly proposed, unless it is stated in individual cases that a specific combination is not intended. Additionally, the features of one claim should also be included in any other independent claim, even if the claim is not directly defined as being dependent on the other independent claim.

Claims

1. A piezoelectric device (100) comprising: A piezoelectric layer (110) including a first surface (111) and a second surface (112) opposite to each other; A first electrode (120) formed on the first surface (111); A second electrode (130) formed on the second surface (112); A dielectric material (140) surrounding the piezoelectric layer (110); A first interconnect (150) electrically coupled to the first electrode (120); And A second interconnect (160) electrically coupled to the second electrode (130), Wherein the first electrode (120) is disposed between the piezoelectric layer (110) and each of the first interconnect (150) and the second interconnect (160), and wherein the first interconnect (150) and the second interconnect (160) are arranged away from the first electrode (120).

2. The piezoelectric device (100) according to claim 1, wherein the piezoelectric layer (110) is a thin film.

3. The piezoelectric device (100) according to claim 1 or 2, wherein the thickness of the piezoelectric layer (110) is at least 0.5 μm, and / or wherein the thickness of the piezoelectric layer (110) is at most 3 μm.

4. The piezoelectric device (100) according to any one of claims 1 to 3, wherein the piezoelectric layer (110) comprises a doped piezoelectric material.

5. The piezoelectric device (100) according to claim 4, wherein the atomic ratio of the dopant in the doped piezoelectric material is at least 20%.

6. The piezoelectric device (100) according to claim 4 or 5, wherein the doped piezoelectric material is scandium-doped aluminum nitride.

7. The piezoelectric device (100) according to any one of claims 1 to 6, further comprising: A first conductive path (180) formed in the dielectric material (140) between the first electrode (120) and the first interconnect (150) for electrically coupling the first interconnect (150) to the first electrode (120); and A second conductive path (185) formed in the dielectric material (140) between the second electrode (130) and the second interconnect (160) for electrically coupling the second interconnect (160) to the second electrode (130).

8. The piezoelectric device (100) according to any one of claims 1 to 7, wherein a first opening (170) extends from the surface of the dielectric material (140) to the first interconnect (150), wherein a second opening (175) extends from the surface of the dielectric material (140) to the second interconnect (160), and wherein the second electrode (130) is disposed between the second surface (112) of the piezoelectric layer (110) and the surface of the dielectric material (140).

9. The piezoelectric device (100) according to claim 8, wherein the first opening (170) and the second opening (175) extend laterally offset with respect to the dielectric layer.

10. The piezoelectric device (100) according to claim 8 or 9, wherein the first interconnect (150) is accessible via the first opening (170), and wherein the second interconnect (160) is accessible via the second opening (175).

11. The piezoelectric device (100) according to any one of claims 1 to 10, wherein a vertical distance from the first interconnect (150) to the first electrode (120) is less than a vertical distance from the first interconnect (150) to the second electrode (130), and wherein a vertical distance from the second interconnect (160) to the first electrode (120) is less than a vertical distance from the second interconnect (160) to the second electrode (130).

12. An ultrasonic transducer (200) comprising the piezoelectric device according to any one of claims 1 to 11, wherein a recess (295) is formed in the dielectric material (140) such that a portion of the dielectric material (140) forms a diaphragm (205) in which the piezoelectric layer (110) is embedded.

13. The ultrasonic transducer according to claim 12, wherein the recess (295) is formed to be away from the first electrode (120), wherein the first electrode (120) is disposed between the piezoelectric layer (110) and the recess (295), and wherein the recess (295) is formed laterally between the first interconnect (150) and the second interconnect (160).

14. The ultrasonic transducer according to claim 12 or 13, wherein the piezoelectric device is configured to: deform the diaphragm (205) based on electrical signals received at the first interconnect (150) and the second interconnect (160) to emit ultrasonic waves; and / or output corresponding measurement signals at the first interconnect (150) and the second interconnect (160) based on deformation of the diaphragm (205) caused by the received ultrasonic waves.

15. A microelectromechanical device (300) comprising: a micromirror (305); and a spring structure (310) supporting the micromirror (305), wherein the spring structure (310) includes at least one piezoelectric device according to any one of claims 1 to 11.

16. The microelectromechanical device (300) according to claim 15, wherein the at least one piezoelectric device is configured to: deform the spring structure (310) based on electrical signals received at the first interconnect (150) and the second interconnect (160) for deforming the spring structure (310), thereby deflecting the micromirror (305); and / or output corresponding measurement signals at the first interconnect (150) and the second interconnect (160) based on deflection of the micromirror (305).

17. A method (400) of forming a piezoelectric device, comprising: forming (402) a piezoelectric layer including a first surface and a second surface opposite to each other; forming (404) a first electrode on the first surface; Form (406) a second electrode on the second surface; Form (408) a dielectric material surrounding the piezoelectric layer; Form (410) a first interconnect electrically coupled to the first electrode; And Form (412) a second interconnect electrically coupled to the second electrode, wherein the first electrode is disposed between the piezoelectric layer and each of the first and second interconnects, and wherein the first and second interconnects are arranged away from the first electrode.

18. The method of claim 17, further comprising: Form (414) a first conductive path in the dielectric material between the first electrode and the first interconnect for electrically coupling the first interconnect to the first electrode; And Form (416) a second conductive path in the dielectric material between the second electrode and the second interconnect for electrically coupling the second interconnect to the second electrode.

19. The method of claim 17 or 18, further comprising: Form (418) a first opening in the dielectric material, the first opening extending from a surface of the dielectric material to the first interconnect; And Form (420) a second opening in the dielectric material, the second opening extending from the surface of the dielectric material to the second interconnect, wherein the second electrode is disposed between the second surface of the piezoelectric layer and the surface of the dielectric material.

20. The method of any one of claims 17 to 19, wherein forming (402) the piezoelectric layer comprises depositing a doped piezoelectric material, and wherein an atomic ratio of dopants in the doped piezoelectric material is at least 20%.

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