Gas chromatography integrated chip as well as preparation method and application thereof

Abstract

According to the gas chromatography integrated chip, the preparation method and the application of the gas chromatography integrated chip, the Wheatstone bridge and the micro-chromatographic column are integrated, the gas chromatography integrated chip with separation detection and flow velocity detection functions can be provided, dead volume caused by connection of discrete devices can be effectively reduced, miniaturization of a gas chromatography system is facilitated, and the cost is reduced. The measurement sensitivity is improved; and the flow velocity of the carrier gas flowing through the gas chromatography integrated chip can be accurately measured.

Description

Technical Field

[0001] The present invention belongs to the field of microelectromechanical systems, and relates to a gas chromatography integrated chip, a preparation method thereof, and an application thereof. Background Art

[0002] As a mature method for qualitative and quantitative analysis of mixed gases, gas chromatography is applied in the fields of scientific research, environmental protection, climate change, industrial production, safety protection, and medical diagnosis. However, the traditional gas chromatography system is large in volume and high in power consumption, and cannot meet the application requirements of rapid, portable, and in-situ detection. Therefore, it is of great significance to develop a portable gas chromatography system with small volume, low power consumption, and high sensitivity.

[0003] The key to the miniaturization of the gas chromatography system is the miniaturization of its core components. That is, the rapid development of micro-electro-mechanical-systems (MEMS) provides a reliable technical means for the miniaturization of the core components of gas chromatography.

[0004] The miniaturization of the gas chromatography column is of great significance to the field of gas chromatography. The miniaturized chromatography column can reduce the size and power consumption of the gas chromatography system, reduce the sample consumption, and accelerate the sample analysis speed. Since the gas chromatography column needs to work in a temperature-controlled environment, the miniaturized chromatography column requires lower power consumption. In addition, it occupies less volume in the instrument, which helps to improve the portability of the gas chromatography system and is suitable for real-time on-site analysis.

[0005] The thermal conductivity detector (TCD) detects different gas components based on the different thermal conductivities of the components in the sample. The detector internally contains a thermosensitive element whose resistance is sensitive to temperature, and the thermosensitive element is maintained at a certain temperature by means of electric heating. When the sample passes through the detector, the thermal conductivity of the gas around the thermosensitive element changes, affecting the temperature of the thermosensitive element and thus causing a change in resistance. This change in resistance is converted into an electrical signal, and the detection of the gas can be achieved by observing the change in the electrical signal. The TCD has a simple structure, responds to elemental substances, inorganic substances, and organic substances, and is a universal detector. Moreover, the TCD is sensitive to gas concentration, and the reduction of the device size will not cause a decrease in sensitivity. Therefore, it is often used in miniaturized gas chromatography systems.

[0006] Currently, the integration of micro gas chromatography systems mainly relies on the connection of different discrete devices. However, when discrete devices are used in series, they need to be connected through pipes and connectors, and the existence of these pipes and connectors brings a large dead volume. This results in a low sensitivity of the thermal conductivity detector in current micro gas chromatography systems, which is not conducive to the miniaturization of the gas chromatography system. At the same time, the evaluation of the performance of micro gas chromatography columns requires accurate measurement of the flow rate of the carrier gas passing through the chromatographic column. However, the existing measurement of the flow rate of the carrier gas passing through the chromatographic column mostly calculates the flow rate by measuring the flow rate with an external flow meter. Due to factors such as the complex cross-section of the microchannel, it will inevitably lead to a large error when calculating the flow rate using the measured flow rate value.

[0007] Therefore, it is necessary to provide a gas chromatography integrated chip, a preparation method thereof, and an application thereof. Summary of the Invention

[0008] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a gas chromatography integrated chip, a preparation method thereof, and an application thereof, which are used to solve the problems of large dead volume caused by the integration of gas chromatography systems in the prior art, resulting in low detector sensitivity and inaccurate flow rate detection.

[0009] To achieve the above object and other related objects, the present invention provides a preparation method of a gas chromatography integrated chip, including the following steps:

[0010] Provide a substrate;

[0011] Pattern the substrate from the front of the substrate to form a substrate groove;

[0012] Form a thermistor, a conductive connection member, and a support structure in the substrate groove. The thermistor includes a first thermistor, a second thermistor, a third thermistor, and a fourth thermistor. Among them, the conductive connection member connects the thermistors and forms a Wheatstone bridge after being connected through an external circuit;

[0013] Provide an upper cover plate and bond the upper cover plate to the front of the substrate;

[0014] Pattern the substrate from the back of the substrate to form a microchannel, a microcolumn array, an inlet end microchannel, and an outlet end microchannel. The microcolumn array is located in the microchannel. The inlet end microchannel is connected to the microchannel and is arranged at the inlet end of the microchannel. The outlet end microchannel is connected to the microchannel and is arranged at the outlet end of the microchannel. Moreover, the first thermistor and the fourth thermistor are suspended in the inlet end microchannel through the support structure, and the second thermistor and the third thermistor are suspended in the outlet end microchannel through the support structure;

[0015] Provide a lower cover plate, bond the lower cover plate to the back surface of the substrate, and combine the upper cover plate and the lower cover plate to cover the microchannel, the inlet end microchannel, and the outlet end microchannel, forming a closed microchannel, a closed inlet end microchannel, and a closed outlet end microchannel.

[0016] Optionally, the steps of forming a thermistor, a conductive connection member, and a support structure in the substrate groove include:

[0017] Form a first dielectric layer;

[0018] Form a metal layer on the first dielectric layer and pattern the metal layer to prepare the thermistor and the conductive connection member;

[0019] Form a second dielectric layer that covers the patterned metal layer;

[0020] Pattern the second dielectric layer and the first dielectric layer to form the support structure that wraps and supports the thermistor, and expose the pads in the conductive connection member.

[0021] Optionally, the bonding method between the substrate and the upper cover plate includes anodic bonding; the bonding method between the substrate and the lower cover plate includes anodic bonding.

[0022] The present invention also provides a gas chromatography integrated chip, which includes:

[0023] A substrate, in which a thermistor, a conductive connection member, and a support structure are provided. The thermistor includes a first thermistor, a second thermistor, a third thermistor, and a fourth thermistor. Among them, the conductive connection member connects the thermistors and forms a Wheatstone bridge after being connected through an external circuit. And a microchannel, a microcolumn array, an inlet end microchannel, and an outlet end microchannel are provided in the substrate. The microcolumn array is located in the microchannel. The inlet end microchannel communicates with the microchannel and is provided at the inlet end of the microchannel. The outlet end microchannel communicates with the microchannel and is provided at the outlet end of the microchannel. And the first thermistor and the fourth thermistor are suspended in the inlet end microchannel through the support structure, and the second thermistor and the third thermistor are suspended in the outlet end microchannel through the support structure;

[0024] An upper cover plate, which is bonded to the front surface of the substrate;

[0025] A lower cover plate, which is bonded to the back surface of the substrate, and combines the upper cover plate and the lower cover plate to cover the microchannel, the inlet end microchannel, and the outlet end microchannel, forming a closed microchannel, a closed inlet end microchannel, and a closed outlet end microchannel.

[0026] Optionally, the included angle between the inlet end microchannel and the microchannel is 0° to 90°; and / or the included angle between the outlet end microchannel and the microchannel is 0° to 90°.

[0027] Optionally, the first thermistor and the fourth thermistor respectively independently correspond to one of the inlet end microchannels and are axially symmetrically distributed; the second thermistor and the third thermistor respectively independently correspond to one of the outlet end microchannels and are axially symmetrically distributed.

[0028] Optionally, the microcolumn array includes a circular microcolumn array composed of a combination of circular microcolumns, and along the extending direction of the microchannel, two adjacent columns of the circular microcolumns are staggered.

[0029] Optionally, the microcolumn array includes an elliptical microcolumn array composed of a combination of elliptical microcolumns, and along the extending direction of the microchannel, two adjacent columns of the elliptical microcolumns are staggered.

[0030] Optionally, the substrate includes an SOI substrate or an Si substrate; the upper cover plate includes a glass cover plate or an Si cover plate; the lower cover plate includes a glass cover plate or an Si cover plate.

[0031] The present invention also provides an application of a gas chromatography integrated chip, including the following steps:

[0032] Provide the gas chromatography integrated chip as described in any one of claims 4 to 9, wherein the distance between the closed inlet end microchannel at A1 and the closed outlet end microchannel at A2 through the closed microchannel is denoted as L;

[0033] Introduce carrier gas and sample into the gas chromatography integrated chip, and record the time t1 when the first peak appears and the time t2 when the second peak appears through the Wheatstone bridge;

[0034] Obtain the time difference Δt = t2 - t1, and the flow rate V of the carrier gas in the gas chromatography integrated chip is V = L / Δt. It should be noted that calculating Δt based on the starting moments of the above two peaks can avoid the error caused by chromatographic separation to the calculation of Δt.

[0035] As described above, the gas chromatography integrated chip, preparation method and application thereof of the present invention integrate the Wheatstone bridge and the microchromatographic column, can provide a gas chromatography integrated chip with both separation detection and flow rate detection functions, and can effectively reduce the dead volume caused by the connection of discrete devices, facilitate the miniaturization of the gas chromatography system, and improve the measurement sensitivity; can accurately measure the flow rate of the carrier gas flowing through the gas chromatography integrated chip. Description of the Drawings

[0036] Figure 1It shows a schematic process flow diagram for the preparation of the gas chromatography integrated chip in the embodiment of the present invention.

[0037] Figure 2a and Figure 2b It shows two partial three-dimensional structure schematic diagrams of the gas chromatography integrated chip in the embodiment of the present invention.

[0038] Figure 3 It shows a layout schematic diagram of the Wheatstone bridge in the embodiment of the present invention.

[0039] Figure 4 It shows the characteristic peak spectrum obtained by the gas chromatography integrated chip in the embodiment of the present invention.

[0040] Figures 5(a) to 5(i) It shows the structure schematic diagrams presented in each step when preparing the gas chromatography integrated chip in the first embodiment of the present invention.

[0041] Figures 6(a) to 6(i) It shows the structure schematic diagrams presented in each step when preparing the gas chromatography integrated chip in the second embodiment of the present invention.

[0042] Explanation of reference numerals

[0043] 101 Inlet end

[0044] 102 Microchannel

[0045] 103 Outlet end

[0046] 104 First inlet end microchannel

[0047] 105 Second inlet end microchannel

[0048] 106 First outlet end microchannel

[0049] 107 Second outlet end microchannel

[0050] 108 Microcolumn array

[0051] 109 Thermistor

[0052] 110 SOI substrate

[0053] 111 Bottom silicon

[0054] 112 Buried oxide layer

[0055] 113 Top silicon

[0056] 114 SOI substrate groove

[0057] 211 Silicon oxide layer

[0058] 212 Silicon nitride support layer

[0059] 213 Pt / Ti metal layer

[0060] 214 silicon nitride protective layer

[0061] 310 upper glass cover plate

[0062] 410 lower glass cover plate

[0063] 120 Si substrate

[0064] 121 Si substrate groove

[0065] 221 silicon oxide layer

[0066] 222 silicon nitride support layer

[0067] 223 Pt / Ti metal layer

[0068] 224 silicon nitride protective layer

[0069] 320 upper glass cover plate

[0070] 420 lower glass cover plate Detailed implementation manners

[0071] The following describes the implementation manners of the present invention through specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0072] When detailing the embodiments of the present invention, for the convenience of description, the cross-sectional views showing the device structure will be enlarged locally out of the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention here. In addition, in actual production, three-dimensional spatial dimensions including length, width and depth should be included.

[0073] For the convenience of description, spatial relationship terms such as "under", "below", "lower than", "beneath", "above", "on" etc. may be used herein to describe the relationship between one element or feature shown in the drawings and other elements or features. It will be understood that these spatial relationship terms are intended to include other directions of the device in use or operation in addition to the directions depicted in the drawings. Embodiments where the first and second features are formed in direct contact can be included, and embodiments where additional features are formed between the first and second features such that the first and second features may not be in direct contact can also be included. Additionally, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there can also be one or more intervening layers.

[0074] It should be noted that the illustrations provided in this embodiment only schematically illustrate the basic concept of the present invention. Therefore, only the components related to the present invention are shown in the illustrations, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0075] Refer to Figure 1 , this embodiment provides a method for preparing a gas chromatography integrated chip, including the following steps:

[0076] S1: Provide a substrate;

[0077] S2: Pattern the substrate from the front of the substrate to form a substrate groove;

[0078] S3: Form a thermistor, a conductive connection member, and a support structure in the substrate groove. The thermistor includes a first thermistor, a second thermistor, a third thermistor, and a fourth thermistor. Among them, the conductive connection member connects the thermistors and forms a Wheatstone bridge after being connected through an external circuit;

[0079] S4: Provide an upper cover plate and bond the upper cover plate to the front of the substrate;

[0080] S5: Pattern the substrate from the back of the substrate to form a microchannel, a microcolumn array, an inlet end microchannel, and an outlet end microchannel. The microcolumn array is located in the microchannel. The inlet end microchannel is connected to the microchannel and is arranged at the inlet end of the microchannel. The outlet end microchannel is connected to the microchannel and is arranged at the outlet end of the microchannel. Moreover, the first thermistor and the fourth thermistor are suspended in the inlet end microchannel through the support structure, and the second thermistor and the third thermistor are suspended in the outlet end microchannel through the support structure;

[0081] S6: Provide a lower cover plate, bond the lower cover plate to the back of the substrate, and combine the upper cover plate and the lower cover plate to cover the microchannel, the inlet end microchannel, and the outlet end microchannel to form a closed microchannel, a closed inlet end microchannel, and a closed outlet end microchannel.

[0082] As an example, the substrate may include an SOI substrate or a Si substrate; the upper cover plate may include a glass cover plate or a Si cover plate; the lower cover plate may include a glass cover plate or a Si cover plate.

[0083] Among them, when the substrate uses the SOI substrate or the Si substrate, and the upper cover plate uses a glass cover plate, the bonding method between the substrate and the upper cover plate is preferably anodic bonding. Similarly, when the substrate uses the SOI substrate or the Si substrate, and the lower cover plate uses a glass cover plate, the bonding method between the substrate and the lower cover plate is preferably anodic bonding. However, the materials and bonding methods of the substrate, the upper cover plate, and the lower cover plate are not limited thereto. For example, the substrate, the upper cover plate, and the lower cover plate can all be made of silicon or all be made of glass, etc.

[0084] As an example, the steps of forming the thermistor, the conductive connection member, and the support structure in the substrate groove may include:

[0085] Form a first dielectric layer;

[0086] Form a metal layer on the first dielectric layer and pattern the metal layer to prepare the thermistor and the conductive connection member;

[0087] Form a second dielectric layer that covers the patterned metal layer;

[0088] Pattern the second dielectric layer and the first dielectric layer to form the support structure that covers and supports the thermistor, and expose the pads in the conductive connection member.

[0089] Among them, the first dielectric layer may include a silicon nitride (Si3N4) support layer, but the material of the first dielectric layer is not limited thereto. The metal layer can be selected as a Pt / Ti metal layer, but the material of the metal layer is not limited thereto. The main function of the second dielectric layer is to protect the metal layer. Therefore, the material of the second dielectric layer may include a silicon nitride (Si3N4) protection layer, but the material of the second dielectric layer is not limited thereto.

[0090] Refer to Figure 2a 、 Figure 2b and Figure 3 , this embodiment also provides a gas chromatography integrated chip, and the gas chromatography integrated chip includes:

[0091] A substrate, in which a thermistor 109, a conductive connection member, and a support structure are provided. The thermistor includes a first thermistor R1, a second thermistor R2, a third thermistor R3, and a fourth thermistor R4. Among them, the conductive connection member connects the thermistors and forms a Wheatstone bridge after being connected through an external circuit, as Figure 3, and micro-channels 102, a micro-column array 108, an inlet-end micro-channel and an outlet-end micro-channel are arranged in the substrate. The micro-column array 108 is located within the micro-channel 102. The inlet-end micro-channel communicates with the micro-channel 102 and is arranged at the inlet end 101 of the micro-channel. The outlet-end micro-channel communicates with the micro-channel 102 and is arranged at the outlet end 103 of the micro-channel. The first thermistor R1 and the fourth thermistor R4 are suspended in the inlet-end micro-channel through the support structure, and the second thermistor R2 and the third thermistor R3 are suspended in the outlet-end micro-channel through the support structure;

[0092] An upper cover plate, which is bonded to the front surface of the substrate;

[0093] A lower cover plate, which is bonded to the back surface of the substrate, and in combination with the upper cover plate and the lower cover plate, covers the micro-channel 102, the inlet-end micro-channel and the outlet-end micro-channel, forming a closed micro-channel, a closed inlet-end micro-channel and a closed outlet-end micro-channel.

[0094] As an example, the included angle between the inlet-end micro-channel and the micro-channel 102 can be 0° to 90°, such as 0°, 30°, 60°, 90°, etc.; and / or the included angle between the outlet-end micro-channel and the micro-channel can be 0° to 90°, such as 0°, 30°, 60°, 90°, etc.

[0095] As an example, the first thermistor R1 and the fourth thermistor R4 each independently correspond to one of the inlet-end micro-channels, and the inlet-end micro-channels corresponding to the first thermistor R1 and the fourth thermistor R4 are axially symmetrically distributed, so as to improve the accuracy of subsequent detection data; similarly, preferably, the second thermistor R2 and the third thermistor R3 each independently correspond to one of the outlet-end micro-channels, and the outlet-end micro-channels corresponding to the second thermistor R2 and the third thermistor R3 are axially symmetrically distributed.

[0096] Specifically, Figure 2a and Figure 2bThe structure shown schematically is such that the first thermistor R1 corresponds to the first inlet microchannel 104, the fourth thermistor R4 corresponds to the second inlet microchannel 105, the second thermistor R2 corresponds to the first outlet microchannel 106, the third thermistor R3 corresponds to the second outlet microchannel 107, and the angles between the first inlet microchannel 104, the second inlet microchannel 105 and the microchannel 102 at the inlet end 101 are 90°, and the angles between the first outlet microchannel 106, the second outlet microchannel 107 and the microchannel 102 at the outlet end 103 are 90°. However, the settings of the inlet microchannels and the outlet microchannels are not limited to this. For example, the inlet microchannels and the outlet microchannels can also be part of the microchannel 102, that is, the first thermistor R1 and the fourth thermistor R4 can also be directly suspended at the inlet end 101 of the microchannel 102, and the second thermistor R2 and the third thermistor R3 can also be directly suspended at the outlet end 103 of the microchannel 102. That is, the angle between the inlet microchannel and the microchannel 102 is 0°, and the angle between the outlet microchannel and the microchannel 102 is 0°. The number, distribution, etc. of the inlet microchannels and the outlet microchannels are not limited to this and can be set as needed.

[0097] Optionally, the inlet microchannels and the outlet microchannels can be freely selected according to the usage requirements, that is Figure 2a and Figure 2b the positions of the inlet microchannels and the outlet microchannels in

[0098] As an example, the microcolumn array 108 can include a circular microcolumn array composed of a combination of circular microcolumns, and further preferably, along the extension direction of the microchannel 102, two adjacent columns of the circular microcolumns are staggered to improve the uniformity of the stationary phase coating, make the flow rate distribution more uniform, suppress the broadening of the chromatographic peak shape, and facilitate detection.

[0099] As an example, the microcolumn array 108 can also include an elliptical microcolumn array composed of a combination of elliptical microcolumns, and along the extension direction of the microchannel 102, two adjacent columns of the elliptical microcolumns are staggered.

[0100] Such as Figure 2a and Figure 2b In, the major axis direction of the elliptical microcolumns is preferably consistent with the extension direction of the microchannel 102 to improve the uniformity of the stationary phase coating, make the flow rate distribution more uniform, suppress the broadening of the chromatographic peak shape, and facilitate detection.

[0101] As an example, the substrate may include, for example, an SOI substrate or a Si substrate; the upper cover plate may include, for example, a glass cover plate or a Si cover plate; the lower cover plate may include, for example, a glass cover plate or a Si cover plate.

[0102] There is no excessive limitation on the selection of the materials of the substrate, the upper cover plate and the lower cover plate here.

[0103] Referring to Figure 4 , this embodiment also provides an application of the gas chromatography integrated chip, including the following steps:

[0104] First, provide any one of the above-mentioned gas chromatography integrated chips, where, for example, Figure 2a , denote the distance from the closed inlet end microchannel A1 through the closed microchannel to the closed outlet end microchannel A2 as L. Further, to provide the accuracy of the test, it is preferred that the first inlet end microchannel 104 and the second inlet end microchannel 105 are symmetrically arranged along the inlet end 101 of the microchannel 102, and the first outlet end microchannel 106 and the second outlet end microchannel 107 are symmetrically arranged along the outlet end 103 of the microchannel 102. Thus, the symmetry center of the first inlet end microchannel 104 and the second inlet end microchannel 105 can be used as the starting point of L, and the symmetry center of the first outlet end microchannel 106 and the second outlet end microchannel 107 can be used as the ending point of L.

[0105] Next, introduce carrier gas and sample into the gas chromatography integrated chip, and record the time t1 when the first peak appears and the time t2 when the second peak appears through the Wheatstone bridge.

[0106] Specifically, referring to Figure 3 and Figure 4, when the carrier gas carries the sample and flows through the first thermistor R1 and the fourth thermistor R4 at the inlet end 101, at this time, the pure carrier gas flows through the second thermistor R2 and the third thermistor R3 at the outlet end 103, resulting in a negative peak. At this time, the starting time of the peak is recorded as t1. At this time, the sample has not flowed into the microchromatography column and has not been separated. When the carrier gas carries the sample into the microchromatography column, the sample is separated in the microchromatography column. At this time, the pure carrier gas flows through the first thermistor R1 and the fourth thermistor R4 at the inlet end 101 of the microchromatography column and the second thermistor R2 and the third thermistor R3 at the outlet end 103, so no peak appears. When the microchromatography column completes the separation, the sample that is not retained by the microchromatography column and is first carried by the carrier gas to the second thermistor R2 and the third thermistor R3 at the outlet end 103 of the microchromatography column. At this time, the pure carrier gas flows through the first thermistor R1 and the fourth thermistor R4 at the inlet end 101 of the microchromatography column, so a positive peak appears. At this time, the starting time of the peak is recorded as t2.

[0107] Next, obtain the time difference Δt = t2 - t1, and the flow rate V of the carrier gas in the gas chromatography integrated chip is V = L / Δt. It should be noted that calculating Δt based on the starting times of the above two peaks can avoid the error caused by chromatographic separation to the calculation of Δt.

[0108] Among them, Δt is the time for the gas that is not retained by the microchromatography column, that is, the carrier gas to flow through the microchromatography column. Its calculation formula is: Δt = t2 - t1. Since the length L of the microchromatography column has been determined during design, the flow rate of the gas in the microchromatography column can be accurately calculated, that is, V = L / Δt.

[0109] The following combines specific embodiments to further introduce the gas chromatography integrated chip and its preparation. However, the structure, material, and preparation method of the gas chromatography integrated chip are not limited to the following specific embodiments.

[0110] Example 1

[0111] In this embodiment, refer to Figures 5(a) to 5(i) , taking the SOI substrate 110 as an example for the substrate, and the glass upper cover 310 and the glass lower cover 410 as examples for the upper cover and the lower cover, respectively, to introduce the gas chromatography integrated chip and its preparation.

[0112] Step 1-1) Mask layer preparation: Referring to Fig. 5(a), provide the SOI substrate 110, wherein the SOI substrate 110 includes a bottom silicon layer 111, a buried oxide layer 112, and a top silicon layer 113. Clean the surface of the SOI substrate 110 using a concentrated sulfuric acid solution, and then prepare a silicon oxide layer 211 on the surface of the SOI substrate 110 through a thermal oxidation process as the mask layer.

[0113] Step 1-2) Substrate groove preparation: Referring to Fig. 5(b), pattern the photoresist through a photolithography process, then etch the silicon oxide layer 211 not protected by the photoresist using a BOE etchant, and then etch the top silicon layer 113 using a KOH solution to form the SOI substrate groove 114 in the top silicon layer 113. Finally, use the BOE etchant again to remove the remaining silicon oxide layer 211.

[0114] Step 1-3) Film preparation: Referring to Fig. 5(c), deposit a silicon nitride (Si3N4) support layer 212 on the top silicon layer 113 through PECVD technology, and then sputter a Pt / Ti metal layer 213 on the silicon nitride support layer 212 through magnetron sputtering.

[0115] Step 1-4) Thermistor preparation: Referring to Fig. 5(d), spin-coat a layer of photoresist, pattern the photoresist through a photolithography process, and then etch the exposed Pt / Ti metal layer 213 through an ion beam etching technique to form a thermistor, leads, and pads.

[0116] Step 1-5) Protective layer preparation: Referring to Fig. 5(e), in order to prevent the thermistor from coming into direct contact with the sample to be measured, which may cause a decrease in the lifespan of the thermistor, a silicon nitride (Si3N4) protective layer 214 is deposited on the surface of the thermistor through PECVD technology.

[0117] Step 1-6) Support structure preparation: Referring to Fig. 5(f), after spin-coating the photoresist, pattern the photoresist using a photolithography process, pattern the silicon nitride protective layer 214 and the silicon nitride support layer 212 through RIE technology, and then continue to etch the top silicon layer 113 using DRIE technology until the buried oxide layer 112. Finally, use RIE technology again to remove the exposed buried oxide layer 112 to complete the preparation of the support structure.

[0118] Step 1-7) Bonding the upper cover plate: Referring to Fig. 5(g), bond the glass upper cover plate 310 with microchannel grooves to the top silicon layer 113 in the SOI substrate 110 through anodic bonding. Of course, according to requirements, the glass upper cover plate 310 may not be provided with the microchannel grooves.

[0119] Step 1-8) Release of the support structure: Referring to Fig. 5(h), a layer of photoresist is spin-coated on the underlying silicon 111, and the photoresist is patterned through a photolithography process. Then, the underlying silicon 111 is patterned by DRIE technology until the buried oxide layer 112 is reached, realizing the release of the support structure and the preparation of the microcolumn array 108, the microchannel 102, the inlet-end microchannel, and the outlet-end microchannel.

[0120] Step 1-9) Bonding of the lower cover plate: Referring to Fig. 5(i), again through anodic bonding, the glass lower cover plate 410 is bonded to the underlying silicon 111 to combine the glass upper cover plate 310 and the glass lower cover plate 410 to cover the microchannel 102, the inlet-end microchannel, and the outlet-end microchannel, forming a closed microchannel, a closed inlet-end microchannel, and a closed outlet-end microchannel.

[0121] As needed, it may further include steps of performing cutting and separation and / or installing and fixing capillary tubes at the inlet end 101 and the outlet end 103.

[0122] Embodiment 2

[0123] Referring to [[ID=…]] Figures 6(a) to 6(i) In order to further reduce the cost of the gas chromatography integrated chip, a Si substrate 120 with a lower cost can be selected for the preparation of the gas chromatography integrated chip, and the preparation method may include the following steps:

[0124] Step 2-1) Preparation of the mask layer: Referring to Fig. 6(a), the Si substrate 120 is provided, the surface of the Si substrate 120 is cleaned with a concentrated sulfuric acid solution, and then a silicon oxide layer 221 is prepared on the surface of the Si substrate 120 through a thermal oxidation process as the mask layer.

[0125] Step 2-2) Preparation of the substrate groove: Referring to Fig. 6(b), the photoresist is patterned through a photolithography process, and then the unprotected silicon oxide layer 221 is etched with a BOE etching solution, and the Si substrate 120 is etched with a KOH solution to form a Si substrate groove 121 on the front surface of the Si substrate 120. Finally, the remaining silicon oxide layer 221 is removed again with a BOE etching solution.

[0126] Step 2-3) Film preparation: Referring to Fig. 6(c), a silicon nitride (Si3N4) support layer 222 is deposited on the front surface of the Si substrate 120 by PECVD technology, and then a Pt / Ti metal layer 223 is sputtered on the silicon nitride support layer 222 by magnetron sputtering.

[0127] Step 2-4) Preparation of thermistor: Referring to Fig. 6(d), spin-coat a layer of photoresist, pattern the photoresist through photolithography, and then etch the exposed Pt / Ti metal layer 223 through ion beam etching technology to form a thermistor, leads, and pads.

[0128] Step 2-5) Preparation of protective layer: Referring to Fig. 6(e), in order to prevent the thermosensitive element from directly contacting the sample to be measured, resulting in a decrease in the lifespan of the thermistor, a silicon nitride (Si3N4) protective layer 224 is deposited on the surface of the thermistor through PECVD technology.

[0129] Step 2-6) Preparation of support structure: Referring to Fig. 6(f), after spin-coating photoresist, pattern the photoresist using photolithography, and pattern the silicon nitride protective layer 224 and the silicon nitride support layer 222 through RIE technology to complete the preparation of the support structure.

[0130] Step 2-7) Bonding of upper cover plate: Referring to Fig. 6(g), through anodic bonding, bond the glass upper cover plate 320 with microchannel grooves to the surface of the Si substrate 120. Of course, according to requirements, the glass upper cover plate 320 may not be provided with the microchannel grooves.

[0131] Step 2-8) Release of support structure: Referring to Fig. 6(h), spin-coat a layer of photoresist on the back of the Si substrate 120 and pattern the photoresist through photolithography. Then etch the Si substrate 120 through DRIE technology to achieve the release of the support structure and the preparation of the microcolumn array 108, microchannel 102, inlet-end microchannel, and outlet-end microchannel.

[0132] Step 2-9) Bonding of lower cover plate: Referring to Fig. 6(i), through anodic bonding again, bond the glass lower cover plate 420 to the back of the Si substrate 120 to combine the glass upper cover plate 320 and the glass lower cover plate 420 to cover the microchannel 102, the inlet-end microchannel, and the outlet-end microchannel, forming a closed microchannel, a closed inlet-end microchannel, and a closed outlet-end microchannel.

[0133] According to requirements, it may also include steps of cutting and separating and / or installing and fixing capillary tubes at the inlet end 101 and the outlet end 103.

[0134] In summary, for the gas chromatography integrated chip, preparation method, and its application of the present invention, the Wheatstone bridge and the microchromatography column are integrated, which can provide a gas chromatography integrated chip with both separation detection and flow rate detection functions, and can effectively reduce the dead volume caused by the connection of discrete devices, facilitate the miniaturization of the gas chromatography system, and improve the measurement sensitivity; it can achieve accurate measurement of the carrier gas flow rate flowing through the gas chromatography integrated chip.

[0135] The above embodiments are only illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. A preparation method of a gas chromatography integrated chip, characterized in that It includes the following steps: Provide a substrate; Pattern the substrate from the front of the substrate to form a substrate groove; Form a thermistor, a conductive connection member, and a support structure in the substrate groove. The thermistor includes a first thermistor, a second thermistor, a third thermistor, and a fourth thermistor. Wherein, the conductive connection member connects the thermistors and forms a Wheatstone bridge after being connected through an external circuit; Provide an upper cover plate and bond the upper cover plate to the front of the substrate; Pattern the substrate from the back of the substrate to form a microchannel, a microcolumn array, an inlet-end microchannel, and an outlet-end microchannel. The microcolumn array is located in the microchannel. The inlet-end microchannel communicates with the microchannel and is arranged at the inlet end of the microchannel. The outlet-end microchannel communicates with the microchannel and is arranged at the outlet end of the microchannel. And the first thermistor and the fourth thermistor are suspended in the inlet-end microchannel through the support structure, and the second thermistor and the third thermistor are suspended in the outlet-end microchannel through the support structure; Provide a lower cover plate, bond the lower cover plate to the back of the substrate, and combine the upper cover plate and the lower cover plate to cover the microchannel, the inlet-end microchannel, and the outlet-end microchannel to form a closed microchannel, a closed inlet-end microchannel, and a closed outlet-end microchannel.

2. The preparation method of the gas chromatography integrated chip according to claim 1, characterized in that, The step of forming a thermistor, a conductive connection member, and a support structure in the substrate groove includes: Form a first dielectric layer; Form a metal layer on the first dielectric layer and pattern the metal layer to prepare the thermistor and the conductive connection member; Form a second dielectric layer, and the second dielectric layer covers the patterned metal layer; Pattern the second dielectric layer and the first dielectric layer to form the support structure that wraps and supports the thermistor, and expose the pads in the conductive connection member.

3. The preparation method of the gas chromatography integrated chip according to claim 1, characterized in that: The bonding method of the substrate and the upper cover plate includes anodic bonding; the bonding method of the substrate and the lower cover plate includes anodic bonding.

4. A gas chromatography integrated chip, characterized in that, The gas chromatography integrated chip includes: A substrate, in which a thermistor, a conductive connection member, and a support structure are provided. The thermistor includes a first thermistor, a second thermistor, a third thermistor, and a fourth thermistor. Wherein, the conductive connection member connects the thermistors and forms a Wheatstone bridge after being connected through an external circuit. And a microchannel, a microcolumn array, an inlet-end microchannel, and an outlet-end microchannel are provided in the substrate. The microcolumn array is located in the microchannel. The inlet-end microchannel communicates with the microchannel and is arranged at the inlet end of the microchannel. The outlet-end microchannel communicates with the microchannel and is arranged at the outlet end of the microchannel. And the first thermistor and the fourth thermistor are suspended in the inlet-end microchannel through the support structure, and the second thermistor and the third thermistor are suspended in the outlet-end microchannel through the support structure; An upper cover plate, and the upper cover plate is bonded to the front of the substrate; A lower cover plate, which is bonded to the back surface of the substrate, and together with the upper cover plate, covers the microchannel, the inlet-end microchannel and the outlet-end microchannel to form a closed microchannel, a closed inlet-end microchannel and a closed outlet-end microchannel.

5. The gas chromatography integrated chip according to claim 4, wherein: The included angle between the inlet-end microchannel and the microchannel is 0° to 90°; and / or the included angle between the outlet-end microchannel and the microchannel is 0° to 90°.

6. The gas chromatography integrated chip according to claim 4, characterized in that: The first thermistor and the fourth thermistor respectively independently correspond to one of the inlet-end microchannels and are axially symmetrically distributed; the second thermistor and the third thermistor respectively independently correspond to one of the outlet-end microchannels and are axially symmetrically distributed.

7. The gas chromatography integrated chip according to claim 4, wherein: The micro-pillar array includes a circular micro-pillar array composed of a combination of circular micro-pillars, and along the extension direction of the microchannel, two adjacent columns of the circular micro-pillars are staggeredly arranged.

8. The gas chromatography integrated chip according to claim 4, characterized in that: The micro-pillar array includes an elliptical micro-pillar array composed of a combination of elliptical micro-pillars, and along the extension direction of the microchannel, two adjacent columns of the elliptical micro-pillars are staggeredly arranged.

9. The gas chromatography integrated chip according to claim 4, characterized in that: The substrate includes an SOI substrate or a Si substrate; the upper cover plate includes a glass cover plate or a Si cover plate; the lower cover plate includes a glass cover plate or a Si cover plate.

10. Application of a gas chromatography integrated chip, characterized in that, Comprising the following steps: Providing a gas chromatography integrated chip as described in any one of claims 4 to 9, wherein the distance between the A1 position of the closed inlet-end microchannel and the A2 position of the closed outlet-end microchannel through the closed microchannel is denoted as L; Introducing a carrier gas and a sample into the gas chromatography integrated chip, and recording the time t1 when the first peak appears and the time t2 when the second peak appears through the Wheatstone bridge; Obtaining the time difference Δt = t2 - t1, and the flow rate V of the carrier gas in the gas chromatography integrated chip is V = L / Δt.

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