Frequency acquisition self-detection circuit applied to airborne electromechanical management system

By designing the frequency acquisition self-detection circuit, the problem of lack of self-detection of frequency acquisition function in the on-board electromechanical management system is solved, and periodic monitoring of the frequency acquisition function is realized, fault positioning is simplified, and product testing is improved.

CN120405544APending Publication Date: 2025-08-01TIANJIN JINHANG COMP TECH RES INST
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Patent Information

Application Number
CN202510594861.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-09
Publication Date
2025-08-01

AI Technical Summary

Technical Problem

The frequency acquisition function in the on-board electromechanical management system lacks self-detection capabilities, which leads to difficulty in troubleshooting of external fields.

Method used

A frequency acquisition self-detection circuit is designed, including frequency signal generation, relay driving and switching circuit, and frequency signal acquisition circuit. The transistor and MOS tube are controlled by FPGA to achieve frequency signal generation and switching, and the comparator is used to facilitate FPGA detection and realize the self-detection function.

Benefits of technology

It realizes self-detection of frequency acquisition function, improves product testability, simplifies fault positioning, and improves field maintenance efficiency.

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Abstract

The invention relates to a frequency acquisition self-detection circuit applied to an airborne electromechanical management system, and belongs to the technical field of airborne electromechanical management systems. The invention provides a frequency acquisition function self-detection circuit applied to an airborne electromechanical management system, and aims to solve the problem that a fault source is difficult to position quickly during outfield troubleshooting because self-detection of a frequency acquisition function is not realized in a conventional aviation airborne electromechanical management system. According to the invention, self-detection of the frequency acquisition function of the airborne electromechanical management system is realized, periodic monitoring of the frequency acquisition function is realized, the testability index of a product is improved, and rapid fault positioning of a product outfield is greatly facilitated.
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Description

Technical Field

[0001] The present invention belongs to the technical field of airborne electromechanical management systems, and particularly relates to a frequency acquisition self-detection circuit applied to an airborne electromechanical management system. Background Art

[0002] With the increasing complexity of the functions and performances of airborne products, it has become more difficult to detect product failures. In order to quickly locate product failures and quickly repair products to improve product supportability, the airborne electromechanical system has higher and higher requirements for product testability. In the past, the frequency acquisition function in products usually did not implement self-detection, and it was difficult to quickly locate the fault source during on-site troubleshooting. Summary of the Invention

[0003] (1) Technical Problems to be Solved

[0004] The technical problems to be solved by the present invention are: to achieve self-detection of the frequency acquisition function of the airborne electromechanical management system and periodic monitoring of the frequency acquisition function.

[0005] (2) Technical Solutions

[0006] To solve the above technical problems, the present invention provides a frequency acquisition self-detection circuit applied to an airborne electromechanical management system, including a frequency signal generation circuit, a relay drive circuit, a relay signal switching circuit, and a frequency signal acquisition circuit;

[0007] The frequency signal generation circuit includes an FPGA and a triode. Among them, the FPGA outputs a control signal. When the output control signal is a high-valid signal, the collector and emitter of the triode are conducted. When the output control signal is a low-invalid signal, the collector and emitter of the triode are cut off. The FPGA makes the collector and emitter of the triode conduct and cut off according to different periods and duty ratios by outputting control signals with different periods and duty ratios, generating frequency signals with different periods and duty ratios;

[0008] The relay drive circuit includes an MOS tube and a first relay. Among them, when the control signal output by the FPGA is a high-valid signal, the drain and source of the MOS tube are conducted, a 5V voltage difference is formed across the control coil of the first relay, the normally open contact of the first relay is closed, and the normally closed contact is opened. When the output control signal is a low-invalid signal, the drain and source of the MOS tube are disconnected, the control coil of the first relay is open-circuited, the normally open contact of the first relay is opened, and the normally closed contact is closed;

[0009] The relay signal switching circuit includes Relay 2. Among them, the normally-closed contact of Relay 2 is connected to the external frequency signal input terminal, and the normally-open contact is connected to the frequency signal output by the frequency signal generation circuit. When the relay drive circuit outputs an invalid control, the output terminal of Relay 2 is connected to the normally-closed contact to output the external frequency signal. When the relay drive circuit outputs a valid control, the output terminal of Relay 2 is connected to the normally-open contact to output the frequency signal output by the frequency signal generation circuit, realizing the switching between the external frequency signal and the frequency signal output by the frequency signal generation circuit;

[0010] In the frequency signal acquisition circuit, the frequency signal is conditioned into high and low levels suitable for the input voltage range of the FPGA through a comparator. The non-inverting input terminal of the comparator inputs a +2.5V reference voltage, and the inverting input terminal of the comparator inputs the frequency signal. When the voltage of the input frequency signal is higher than +2.5V, the output terminal of the comparator outputs a low level. When the voltage of the input frequency signal is lower than +2.5V, the output terminal of the comparator outputs a high level. The signal output by the comparator enters the input pin of the FPGA.

[0011] Preferably, the FPGA acquires and calculates the period and duty cycle of the signal output by the comparator. The FPGA compares the period of the frequency signal generated by the frequency signal generation circuit with the period of the frequency signal measured by the frequency signal acquisition circuit. When the comparison result is within a certain error range, it is determined that the frequency signal acquisition circuit functions normally. When the comparison result exceeds a certain error range, it is determined that the frequency signal acquisition circuit functions abnormally, thereby realizing the self-detection function of the frequency signal acquisition circuit.

[0012] Preferably, the relay signal switching circuit can prevent the self-detection circuit from affecting the normal frequency signal acquisition circuit.

[0013] Preferably, one end of the comparator is grounded.

[0014] Preferably, one end of the comparator is connected to the +5V power supply.

[0015] Preferably, this circuit is applied in an airborne electromechanical management system.

[0016] The present invention also provides an airborne electromechanical management system designed based on the above circuit.

[0017] The present invention also provides a usage method of the above circuit.

[0018] The present invention also provides an operation method of the above circuit.

[0019] The present invention also provides an operation method of the above airborne electromechanical management system.

[0020] (III) Beneficial effects

[0021] In view of the problem that the frequency acquisition function in the previous airborne electromechanical management system usually did not implement self-detection, making it difficult to quickly locate the fault source during on-site troubleshooting, the present invention provides a self-detection circuit for the frequency acquisition function applied to the airborne electromechanical management system, which realizes the self-detection of the frequency acquisition function of the airborne electromechanical management system, monitors the frequency acquisition function periodically, improves the testability index of the product, and greatly facilitates the rapid fault location of the product in the field. Brief Description of the Drawings

[0022] Figure 1 The circuit diagram of the present invention. Detailed Embodiment

[0023] To make the objectives, contents, and advantages of the present invention clearer, the following further describes the detailed embodiments of the present invention in conjunction with the drawings and embodiments.

[0024] Referring to Figure 1 , the present invention provides a self-detection circuit for frequency acquisition applied to an airborne electromechanical management system, including a frequency signal generation circuit, a relay drive circuit, a relay signal switching circuit, and a frequency signal acquisition circuit;

[0025] In the frequency signal generation circuit, the FPGA outputs a control signal. When the output control signal is a high-valid signal, the collector and emitter of the triode are conducting. When the output control signal is a low-invalid signal, the collector and emitter of the triode are cut off. The FPGA generates frequency signals with different periods and duty cycles by outputting control signals with different periods and duty cycles, causing the collector and emitter of the triode to conduct and cut off according to different periods and duty cycles.

[0026] In the relay drive circuit, the FPGA outputs a control signal. When the output control signal is a high-valid signal, the drain and source of the MOS tube are conducting, a 5V voltage difference is formed across the control coil of the relay, the normally open contact of the relay is closed, and the normally closed contact is opened. When the output control signal is a low-invalid signal, the drain and source of the MOS tube are disconnected, the control coil of the relay is open, the normally open contact of the relay is opened, and the normally closed contact is closed.

[0027] In the relay signal switching circuit, the normally closed contact of the relay is connected to the external frequency signal input terminal, and the normally open contact is connected to the frequency signal output by the frequency signal generation circuit. When the relay drive circuit outputs an invalid control, the output terminal of the relay is connected to the normally closed contact, outputting the external frequency signal. When the relay drive circuit outputs a valid control, the output terminal of the relay is connected to the normally open contact, outputting the frequency signal output by the frequency signal generation circuit, realizing the switching between the external frequency signal and the frequency signal output by the frequency signal generation circuit, and preventing the self-detection circuit from affecting the normal frequency signal acquisition circuit.

[0028] In the frequency signal acquisition circuit, the frequency signal is conditioned into high and low levels suitable for the input voltage range of the FPGA through a comparator. The non-inverting input terminal of the comparator inputs a +2.5V reference voltage, and the inverting input terminal of the comparator inputs the frequency signal. When the voltage of the input frequency signal is higher than +2.5V, the output terminal of the comparator outputs a low level. When the voltage of the input frequency signal is lower than +2.5V, the output terminal of the comparator outputs a high level. The signal output by the comparator enters the input pin of the FPGA.

[0029] The FPGA acquires and calculates the period and duty cycle of the signal output by the comparator. The FPGA compares the period of the frequency signal generated by the frequency signal generation circuit with the period of the frequency signal measured by the frequency signal acquisition circuit. When the comparison result is within a certain error range, it is determined that the frequency signal acquisition circuit functions normally. When the comparison result exceeds a certain error range, it is determined that the frequency signal acquisition circuit functions abnormally, thereby realizing the self-detection function of the frequency signal acquisition circuit.

[0030] In the aviation airborne electromechanical management system, aiming at the problem that the frequency acquisition function in previous products usually did not have self-detection and it was difficult to quickly locate the fault source during outfield troubleshooting, the present invention provides a self-detection circuit for the frequency acquisition function applied to the airborne electromechanical management system, which realizes the self-detection of the frequency acquisition function of the airborne electromechanical management system, monitors the period of the frequency acquisition function, improves the testability index of the product, and greatly facilitates the rapid fault location of the product in the outfield.

[0031] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and modifications can be made, and these improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A frequency acquisition self-detection circuit applied to an airborne electromechanical management system, characterized in that It includes a frequency signal generation circuit, a relay drive circuit, a relay signal switching circuit, and a frequency signal acquisition circuit; The frequency signal generation circuit includes an FPGA and a triode. Among them, the FPGA outputs a control signal. When the output control signal is a high-effective signal, the collector and emitter of the triode are conducting. When the output control signal is a low-invalid signal, the collector and emitter of the triode are cut off. The FPGA makes the collector and emitter of the triode conduct and cut off according to different periods and duty cycles by outputting control signals with different periods and duty cycles, generating frequency signals with different periods and duty cycles; The relay drive circuit includes a MOS tube and Relay 1. Among them, when the control signal output by the FPGA is a high-effective signal, the drain and source of the MOS tube are conducting, a 5V voltage difference is formed across the control coil of Relay 1, the normally open contact of Relay 1 is closed, and the normally closed contact is opened. When the output control signal is a low-invalid signal, the drain and source of the MOS tube are disconnected, the control coil of Relay 1 is open-circuited, the normally open contact of Relay 1 is opened, and the normally closed contact is closed; The relay signal switching circuit includes Relay 2. Among them, the normally closed contact of Relay 2 is connected to the external frequency signal input terminal, and the normally open contact is connected to the frequency signal output by the frequency signal generation circuit. When the relay drive circuit outputs an invalid control, the output terminal of Relay 2 is connected to the normally closed contact, outputting the external frequency signal. When the relay drive circuit outputs an effective control, the output terminal of Relay 2 is connected to the normally open contact, outputting the frequency signal output by the frequency signal generation circuit, realizing the switching between the external frequency signal and the frequency signal output by the frequency signal generation circuit; In the frequency signal acquisition circuit, the frequency signal is conditioned into high and low levels suitable for the input voltage range of the FPGA by a comparator. The non-inverting input terminal of the comparator inputs a +2.5V reference voltage, and the inverting input terminal of the comparator inputs the frequency signal. When the voltage of the input frequency signal is higher than +2.5V, the output terminal of the comparator outputs a low level. When the voltage of the input frequency signal is lower than +2.5V, the output terminal of the comparator outputs a high level. The signal output by the comparator enters the input pin of the FPGA.

2. The circuit according to claim 1, wherein The FPGA acquires and calculates the period and duty cycle of the signal output by the comparator. The FPGA compares the period of the frequency signal generated by the frequency signal generation circuit with the period of the frequency signal measured by the frequency signal acquisition circuit. When the comparison result is within a certain error range, it is determined that the frequency signal acquisition circuit functions normally. When the comparison result exceeds a certain error range, it is determined that the frequency signal acquisition circuit functions abnormally, thereby realizing the self-detection function of the frequency signal acquisition circuit.

3. The circuit according to claim 1, characterized in that The relay signal switching circuit can prevent the self-detection circuit from affecting the normal frequency signal acquisition circuit.

4. The circuit according to claim 1, wherein One end of the comparator is grounded.

5. The circuit according to claim 1, characterized in that, One end of the comparator is connected to the +5V power supply.

6. The circuit according to any one of claims 1 to 5, characterized in that, This circuit is applied in an airborne electromechanical management system.

7. An airborne electromechanical management system based on the circuit design described in any one of claims 1 to 6.

8. A method of using the circuit described in any one of claims 1 to 6.

9. A working method of the circuit according to any one of claims 1 to 6.

10. A working method of the airborne electromechanical management system according to claim 7.