Method and device for quickly searching for new-old relationship of data in multiple memory banks

Abstract

The embodiment of the invention provides a method and device for quickly searching a new-old relationship of data for multiple memory banks, and the method comprises the steps: constructing an overall data relationship matrix according to a memory access request number, a memory bank number and memory access time, taking the memory access request numbers of the same memory bank number and the corresponding memory access time as a group of data relation matrixes to obtain two groups of data relation matrixes; determining the overall data relation matrix and the memory access request number with the latest memory access time in each group of data relation matrix in parallel, and respectively taking the memory access request numbers as a first memory access request number, a second memory access request number and a third memory access request number; determining a first new data relationship according to the first memory access request number and the memory bank number corresponding to the first memory access request number; and excluding the second target memory bank number or the third target memory bank number, taking the memory access request number obtained after exclusion as a second new memory access request number, and taking the memory bank number corresponding to the second new memory access request number as a second new data relationship, thereby solving the time sequence problem.

Description

Technical Field

[0001] This application relates to the technical field of microprocessor architectures. Specifically, it relates to a method and apparatus for quickly finding the new-old relationship of data in multiple memory banks. Background Art

[0002] In existing microprocessor architectures, the memory access unit is a part of the microprocessor and is responsible for handling memory read and write operations. A multi-memory bank memory system usually refers to the internal organization of dynamic random access memory, where the memory is divided into multiple memory banks, and each memory bank can perform read and write operations independently. In a multi-memory bank access scenario, the memory access unit needs to coordinate access to different memory banks to achieve higher memory bandwidth and lower latency. For example: In the memory bank interleaving technique, by interleaving access to different memory banks for consecutive addresses, multiple memory bank read and write operations can be initiated simultaneously, thereby improving the parallelism of memory access.

[0003] In memory bank conflict resolution, when the target addresses of multiple memory requests are in the same memory bank, the memory access unit needs to adopt a certain scheduling strategy to avoid memory bank conflicts, ensure the orderliness of memory access, and at the same time minimize the time waiting for the memory bank to be ready.

[0004] In the prefetching and caching strategy, the memory access unit may cooperate with the caching system to predictively access data in different memory banks and pre-fill the cache in advance to reduce possible future memory bank conflicts and improve memory access performance.

[0005] In a multi-memory bank memory system, when the memory access unit accesses memory, it also needs to consider the new-old relationship of data. Scenarios that require considering the new-old relationship of data between multiple memory banks generally occur in the following situations: First, cache coherence: In a multi-core processor system, each core has its own memory access unit and caching system. When multiple cores simultaneously access a shared memory area and this memory is distributed in different memory banks, to maintain cache coherence, the memory access unit needs to participate in the cache coherence protocol to judge and update the new-old relationship of data in the cache, ensuring that the data seen by all cores is the latest.

[0006] Second, memory bank conflict and access scheduling: When the target addresses of multiple memory requests fall in the same memory bank while there are earlier memory requests in other memory banks waiting to be served, the memory access unit needs to make a judgment and scheduling to ensure compliance with the first-in-first-out principle or other optimized scheduling strategies to avoid errors caused by the disruption of the new-old data access order.

[0007] Third, prefetching and replacement strategies: In the multi-memory-bank memory prefetching strategy, the memory access unit may need to analyze the memory access pattern to prefetch data from different memory banks in advance. At this time, the memory access unit needs to evaluate the freshness of the data and the expected access order, and reasonably arrange the prefetch operations to avoid replacing the "young" data that will be used again unnecessarily.

[0008] Fourth, multi-channel memory access: If the processor supports multi-channel memory access, when the memory access unit performs multi-memory-bank access, it also needs to consider the access timing between different channels, ensure data consistency between channels, and optimize the utilization rate of memory banks and channels, so that the access of new and old data can proceed orderly and improve system performance.

[0009] Therefore, for the combined scenarios where the memory access unit needs to maintain a new-old relationship when accessing multiple memory banks, the problems to be solved are as follows: Now, there is a memory access unit that needs to find the relationship of the 1st "youngest" and the 2nd "youngest" data from N memory access requests. And each memory access request may belong to memory bank 0 or memory bank 1. And it is assumed that if the 1st "youngest" data is found from memory bank 0, then the 2nd "youngest" data cannot be found from memory bank 0 again, and memory bank 0 (M memory access requests) needs to be excluded and then searched from the remaining N - M memory access requests. In the related technology, as Figure 1 shown, for the combined scenarios where the memory access unit needs to maintain a new-old relationship when accessing multiple memory banks, Figure 1 The combinational logic delay spent on finding the relationship of the 2nd "youngest" data is roughly divided into the following 3 steps: First step, input a data relationship matrix from N memory access requests with memory bank 0 / memory bank 1 identifiers, and find the relationship of the 1st "youngest" data through an age matrix algorithm. Second step, after obtaining the result of the first step, a comparison logic is needed to exclude the interval (memory bank 0 / memory bank 1) where the found 1st "youngest" memory access request is located, and a new data relationship matrix sequence is obtained. Third step, from the new data relationship matrix sequence obtained in the second step, among the N - M memory access requests, through the age matrix algorithm again, the relationship of the 2nd "youngest" data is obtained.

[0010] Therefore, the related technology results in that finding the relationship of the 2nd "youngest" data requires two age matrix algorithms and a comparison logic to be calculated completely, which leads to a too long combinational path and very poor timing. Summary of the Invention

[0011] Embodiments of the present application provide a method, apparatus, computer device, and storage medium for quickly finding the new-old relationship of data in multiple memory banks.

[0012] In the first aspect of the embodiments of the present application, a method for quickly finding the new and old relationships of data in multiple memory banks is provided, including: Construct an overall data relationship matrix according to the correspondence between the memory access request number, the memory bank number, and the memory access time. Take the memory access request number with the same memory bank number and its corresponding memory access time as a set of data relationship matrices. When the number of types of memory bank numbers is two, two sets of data relationship matrices are obtained; Parallelly determine the memory access request number with the latest memory access time in the overall data relationship matrix and each set of data relationship matrices, and respectively use them as the first memory access request number, the second memory access request number, and the third memory access request number; Take the first memory access request number as the first new memory access request number, and determine the first new data relationship according to the first new memory access request number and its corresponding memory bank number; Based on a multiplexer, exclude one of the second target memory bank number and the third target memory bank number according to the first memory access request number, and output the second memory access request number or the third memory access request number obtained after exclusion as the second new memory access request number. Take the second new memory access request number and its corresponding memory bank number as the second new data relationship.

[0013] In an optional embodiment of the present application, constructing an overall data relationship matrix according to the correspondence between the memory access request number, the memory bank number, and the memory access time includes: Take the same memory access request number and its corresponding memory bank number and memory access time as a row of the overall data relationship matrix. All memory access request numbers and their corresponding memory bank numbers and memory access times form the overall data relationship matrix.

[0014] In an optional embodiment of the present application, taking the memory access request number with the same memory bank number and its corresponding memory access time as a set of data relationship matrices, and when the number of types of memory bank numbers is two, two sets of data relationship matrices are obtained, including: According to the types of memory bank numbers, take the memory access request number with the same memory bank number and its corresponding memory bank number and memory access time in the overall data relationship matrix as a set of data relationship matrices; When the number of types of memory bank numbers is two, divide the overall data relationship matrix into two sets of data relationship matrices.

[0015] In an alternative embodiment of the present application, determining the overall data relationship matrix and the memory access request numbers with the latest memory access time in each group of data relationship matrices in parallel, and respectively using them as the first memory access request number, the second memory access request number, and the third memory access request number, includes: Input the overall data relationship matrix into the first processing module, and output the memory access request number with the latest memory access time in the overall data relationship matrix as the first memory access request number; Input two groups of data relationship matrices into the second processing module to the (N + 1)th processing module, and output the memory access request numbers with the latest memory access time in the first group of data relationship matrix and the second group of data relationship matrix as the second memory access request number and the third memory access request number respectively, where the second processing module to the (N + 1)th processing module respectively correspond to N memory access request numbers.

[0016] In an alternative embodiment of the present application, inputting two groups of data relationship matrices into the second processing module to the (N + 1)th processing module, and outputting the memory access request numbers with the latest memory access time in the first group of data relationship matrix and the second group of data relationship matrix as the second memory access request number and the third memory access request number respectively, includes: Store the first memory access request number to the Nth memory access request number in the second processing module to the (N + 1)th processing module respectively; In each processing module from the second processing module to the (N + 1)th processing module, determine whether the data relationship matrix corresponding to the current memory access request number stored in the current processing module is the first group of data relationship matrix or the second group of data relationship matrix; When the data relationship matrix corresponding to the current memory access request number is the first group of data relationship matrix or the second group of data relationship matrix, determine whether the current memory access request number is the memory access request number with the latest memory access time in the first group of data relationship matrix or the second group of data relationship matrix according to the memory access time corresponding to the current memory access request number; When the current memory access request number is the memory access request number with the latest memory access time in the first group of data relationship matrix or the second group of data relationship matrix, use the current memory access request number as the second memory access request number or the third memory access request number.

[0017] In an alternative embodiment of the present application, excluding one of the second target memory bank number and the third target memory bank number according to the first memory access request number, includes: Exclude the target memory bank number that is the same as the first memory access request number among the second target memory bank number and the third target memory bank number.

[0018] In an optional embodiment of the present application, using the second memory access request number or the third memory access request number obtained after excluding the multiplexer output as the second new memory access request number includes: When excluding the second target memory bank number, using the third memory access request number as the second new memory access request number; When excluding the third target memory bank number, using the second memory access request number as the second new memory access request number.

[0019] The second aspect of the embodiments of the present application provides a device for quickly finding the new and old relationship of data in multiple memory banks, including: A construction module, configured to construct an overall data relationship matrix according to the correspondence relationship among the memory access request number, the memory bank number, and the memory access time, use the memory access request number with the same memory bank number and its corresponding memory access time as a set of data relationship matrices, and obtain two sets of data relationship matrices when the number of types of memory bank numbers is two; A first determination module, configured to parallelly determine the memory access request number with the latest memory access time in the overall data relationship matrix and each set of data relationship matrices, and use them as the first memory access request number, the second memory access request number, and the third memory access request number respectively; A second determination module, configured to use the first memory access request number as the first new memory access request number, and determine the first new data relationship according to the first new memory access request number and its corresponding memory bank number; A multiplexer, configured to exclude one of the second target memory bank number and the third target memory bank number according to the first memory access request number, and output the obtained second memory access request number or the third memory access request number after exclusion as the second new memory access request number, and use the second new memory access request number and its corresponding memory bank number as the second new data relationship.

[0020] The third aspect of the embodiments of the present application provides a computer device, including: a memory and a processor, the memory stores a computer program, and when the processor executes the computer program, it implements the steps of any one of the methods for quickly finding the new and old relationship of data in multiple memory banks as described above.

[0021] The fourth aspect of the embodiments of the present application provides a computer-readable storage medium, on which a computer program is stored, characterized in that when the computer program is executed by a processor, it implements the steps of any one of the methods for quickly finding the new and old relationship of data in multiple memory banks as described above.

[0022] The above technical solutions provided by the embodiments of the present application compared with the prior art have at least some or all of the following advantages: The method for quickly finding the new-old relationship of data in multiple memory banks according to the embodiments of the present application constructs an overall data relationship matrix based on the correspondence relationship among the memory access request number, the memory bank number, and the memory access time. The memory access request number with the same memory bank number and its corresponding memory access time are used as a set of data relationship matrices. When the number of types of memory bank numbers is two, two sets of data relationship matrices are obtained; parallelly determine the memory access request number with the latest memory access time in the overall data relationship matrix and each set of data relationship matrices, and respectively use them as the first memory access request number, the second memory access request number, and the third memory access request number; use the first memory access request number as the first new memory access request number, and determine the first new data relationship according to the first new memory access request number and its corresponding memory bank number; based on the multiplexer, exclude one of the second target memory bank number and the third target memory bank number according to the first memory access request number, and output the second memory access request number or the third memory access request number obtained after exclusion as the second new memory access request number. Use the second new memory access request number and its corresponding memory bank number as the second new data relationship. When finding the first new data relationship and the second new data relationship, only one agematrix algorithm is required. Compared with the related technology, the combined logic delay of one age matrix algorithm and one comparison logic is reduced, and the timing problem in the related technology is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The drawings described herein are used to provide a further understanding of the present application, and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application, and do not constitute an improper limitation to the present application. In the drawings: Figure 1 FIG. 8 is a flowchart of a method for quickly finding the new-old relationship of data in multiple memory banks provided for an embodiment of the related technology; Figure 2 FIG. 11 is a flowchart of a method for quickly finding the new-old relationship of data in multiple memory banks provided for an embodiment of the present application; Figure 3 FIG. 14 is a flowchart of a method for quickly finding the new-old relationship of data in multiple memory banks provided for another embodiment of the present application; Figure 4 FIG. 17 is a schematic structural diagram of an apparatus for quickly finding the new-old relationship of data in multiple memory banks provided for an embodiment of the present application; Figure 5 FIG. 20 is a schematic structural diagram of a computer device provided for an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0024] In order to make the technical solutions and advantages in the embodiments of the present application clearer and more understandable, the following further details the exemplary embodiments of the present application with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than an exhaustive list of all embodiments. It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0025] Please refer to Figure 2 , the method for quickly finding the new and old relationships of data in multiple memory banks provided by the embodiments of the present application includes the following steps S100 to S400: S100. Construct an overall data relationship matrix according to the correspondence relationship among the memory access request number, the memory bank number, and the memory access time. Take the memory access request number with the same memory bank number and its corresponding memory access time as a set of data relationship matrices. When the number of types of memory bank numbers is two, two sets of data relationship matrices are obtained; S200. Parallelly determine the memory access request numbers with the latest memory access time in the overall data relationship matrix and each set of data relationship matrices, and respectively use them as the first memory access request number, the second memory access request number, and the third memory access request number; S300. Take the first memory access request number as the first new memory access request number, and determine the first new data relationship according to the first new memory access request number and its corresponding memory bank number; S400. Based on the multiplexer, exclude one of the second target memory bank number and the third target memory bank number according to the first memory access request number, and output the second memory access request number or the third memory access request number obtained after exclusion as the second new memory access request number. Take the second new memory access request number and its corresponding memory bank number as the second new data relationship.

[0026] In an optional embodiment of the present application, in step S100, constructing the overall data relationship matrix according to the correspondence relationship among the memory access request number, the memory bank number, and the memory access time includes: Take the same memory access request number and its corresponding memory bank number and memory access time as a row of the overall data relationship matrix. All memory access request numbers and their corresponding memory bank numbers and memory access times form the overall data relationship matrix. Among them, the overall data relationship matrix is shown in Table 1 below, where entry1 to entryN represent the first to the Nth memory access request numbers, bank0 and bank1 represent two types of memory bank numbers, and Time1 to TimeN represent the memory access times.

[0027] Table 1

[0028] In an alternative embodiment of the present application, in step S100, the memory access request numbers with the same memory bank number and their corresponding memory access times are used as a set of data relationship matrices. When the number of types of memory bank numbers is two, two sets of data relationship matrices are obtained, including: According to the types of memory bank numbers, the memory access request numbers with the same memory bank number in the overall data relationship matrix and their corresponding memory bank numbers and memory access times are used as a set of data relationship matrices; When the number of types of memory bank numbers is two, the overall data relationship matrix is divided into two sets of data relationship matrices, where the two sets of data relationship matrices are shown in Table 2 and Table 3 below, respectively.

[0029] Table 2

[0030] Table 3

[0031] In an alternative embodiment of the present application, in step S200, refer to Figure 3 , and the memory access request numbers with the latest memory access times in the overall data relationship matrix and each set of data relationship matrices are determined in parallel, and are used as the first memory access request number, the second memory access request number, and the third memory access request number, respectively, including: Input the overall data relationship matrix into the first processing module, and output the memory access request number with the latest memory access time in the overall data relationship matrix as the first memory access request number; Input the two sets of data relationship matrices into the second processing module to the (N + 1)th processing module, and output the memory access request numbers with the latest memory access times in the first set of data relationship matrix and the second set of data relationship matrix as the second memory access request number and the third memory access request number, respectively, where the second processing module to the (N + 1)th processing module correspond to N memory access request numbers respectively.

[0032] In an alternative embodiment of the present application, input the two sets of data relationship matrices into the second processing module to the (N + 1)th processing module, and output the memory access request numbers with the latest memory access times in the first set of data relationship matrix and the second set of data relationship matrix as the second memory access request number and the third memory access request number, respectively, including: The first memory access request number to the Nth memory access request number are respectively stored correspondingly in the second processing module to the (N + 1)th processing module; In each of the second processing module to the (N + 1)-th processing module, determine whether the data relationship matrix corresponding to the current memory access request number stored in the current processing module is the first set of data relationship matrices or the second set of data relationship matrices; When the data relationship matrix corresponding to the current memory access request number is the first set of data relationship matrices or the second set of data relationship matrices, determine whether the current memory access request number is the memory access request number with the latest memory access time in the first set of data relationship matrices or the second set of data relationship matrices according to the memory access time corresponding to the current memory access request number; When the current memory access request number is the memory access request number with the latest memory access time in the first set of data relationship matrices or the second set of data relationship matrices, use the current memory access request number as the second memory access request number or the third memory access request number.

[0033] In an optional embodiment of the present application, when the current memory access request number is the memory access request number with the latest memory access time in the first set of data relationship matrices or the second set of data relationship matrices, the processing module corresponding to the current memory access request number outputs 1, and when the current memory access request number is not the memory access request number with the latest memory access time in the first set of data relationship matrices or the second set of data relationship matrices, the processing module corresponding to the current memory access request number outputs 0, and use the memory access request number before the processing module outputs 1 as the second memory access request number or the third memory access request number.

[0034] In an optional embodiment of the present application, in step S400, excluding one of the second target memory bank numbers and the third target memory bank numbers according to the first memory access request number includes: Exclude the target memory bank number that is the same as the first memory access request number among the second target memory bank number and the third target memory bank number.

[0035] In an optional embodiment of the present application, based on the second memory access request number or the third memory access request number obtained after exclusion output by the multiplexer, as the second new memory access request number, includes: When excluding the second target memory bank number, use the third memory access request number as the second new memory access request number; When excluding the third target memory bank number, use the second memory access request number as the second new memory access request number.

[0036] See Figure 3For a combined scenario where the memory access module needs to maintain a new-old relationship when accessing multiple memory banks, the method for quickly finding the new-old relationship of data in multiple memory banks according to the present application is as follows: Input the overall data relationship matrix from N entries with Bank0 / Bank1 identifiers, and find the 1st "youngest" data relationship in the overall data relationship matrix through the age matrix algorithm; At the same time, when finding the 2nd "youngest" data relationship from N entries, input two groups of data relationship matrices into each entry simultaneously, and through the age matrix algorithm, find whether the current entry is the 1st "youngest" data relationship in the first group or the second group of data relationship matrices, and obtain the 1st "youngest" data relationship in the first group and the second group of data relationship matrices; Exclude the 1st "youngest" data relationship in the overall data relationship matrix from the 1st "youngest" data relationships in the first group and the second group of data relationship matrices, and the 2nd "youngest" entry can be directly selected through a multiplexer.

[0037] In Figure 3 when finding the 1st "youngest" data relationship and the 2nd "youngest" data relationship, through an age matrix algorithm at the same time, compared with the related technology, the combined logic delay of an age matrix algorithm and a comparison logic is reduced.

[0038] It should be understood that although the steps in the flowchart are sequentially shown according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise clearly stated in this article, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in the figure may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same moment, but can be executed at different moments. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least a part of other steps or sub-steps or stages of other steps.

[0039] Please refer to Figure 4 An embodiment of the present application provides a device 400 for quickly finding the new-old relationship of data in multiple memory banks, including: A construction module 410, configured to construct an overall data relationship matrix according to the correspondence relationship between the memory access request number, the memory bank number, and the memory access time, and use the memory access request number with the same memory bank number and its corresponding memory access time as a group of data relationship matrices. When the number of types of memory bank numbers is two, two groups of data relationship matrices are obtained; The first determination module 420 is configured to determine the overall data relationship matrix and the memory access request numbers with the latest memory access time in each group of data relationship matrices in parallel, and use them as the first memory access request number, the second memory access request number, and the third memory access request number respectively; The second determination module 430 is configured to use the first memory access request number as the first new memory access request number, and determine the first new data relationship according to the first new memory access request number and its corresponding memory bank number; The multiplexer 440 is configured to exclude one of the second target memory bank number and the third target memory bank number according to the first memory access request number, and output the second memory access request number or the third memory access request number obtained after exclusion as the second new memory access request number, and use the second new memory access request number and its corresponding memory bank number as the second new data relationship.

[0040] For the specific limitations of the above device 400, reference can be made to the limitations of the method for quickly finding the new and old relationships of data for multiple memory banks in the above text, which will not be elaborated here. Each module in the above device 400 can be implemented in whole or in part by software, hardware, and their combination. The above modules can be embedded in the processor in the computer device in hardware form or independent of the processor, or stored in the memory in the computer device in software form, so that the processor can call and execute the operations corresponding to the above modules.

[0041] In one embodiment, a computer device is provided. The internal structure diagram of the computer device can be as Figure 5 shown. The computer device includes a processor, a memory, a network interface, and a database connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store data. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, it implements a method for quickly finding the new and old relationships of data for multiple memory banks as described above. It includes: including a memory and a processor, the memory stores a computer program, and when the processor executes the computer program, it implements any step in the method for quickly finding the new and old relationships of data for multiple memory banks as described above.

[0042] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by the processor, it can implement any step in the method for quickly finding the new and old relationships of data for multiple memory banks as described above.

[0043] Those skilled in the art should understand that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0044] The present application is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram, as well as the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing devices generate means for implementing the functions specified in Figure 1 one or more of the flows Figure 1 or a plurality of flows and / or blocks

[0045] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the computer-readable memory generate a manufactured article including instruction means that implement the functions specified in Figure 1 one or more of the flows Figure 1 or a plurality of flows and / or blocks

[0046] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operation steps are performed on the computer or other programmable device to generate a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in Figure 1 one or more of the flows Figure 1 or a plurality of flows and / or blocks

[0047] Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concepts. Therefore, the appended claims are intended to be construed as including the preferred embodiments as well as all changes and modifications falling within the scope of the present application.

[0048] Obviously, those skilled in the art can make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalent technologies, this application is also intended to cover these changes and modifications.

Claims

1. A method for quickly finding the new-old relationship of data in multiple memory banks, characterized in that, Including: Construct an overall data relationship matrix according to the correspondence between the memory access request number, memory bank number, and memory access time. Take the memory access request number with the same memory bank number and its corresponding memory access time as a set of data relationship matrices. When the number of types of memory bank numbers is two, two sets of data relationship matrices are obtained; Parallelly determine the memory access request number with the latest memory access time in the overall data relationship matrix and each set of data relationship matrices, and respectively use them as the first memory access request number, the second memory access request number, and the third memory access request number; Take the first memory access request number as the first new memory access request number, and determine the first new data relationship according to the first new memory access request number and its corresponding memory bank number; Based on the multiplexer, exclude one of the second target memory bank number and the third target memory bank number according to the first memory access request number, and output the second memory access request number or the third memory access request number obtained after exclusion as the second new memory access request number. Take the second new memory access request number and its corresponding memory bank number as the second new data relationship.

2. The method according to claim 1, characterized in that Construct an overall data relationship matrix according to the correspondence between the memory access request number, memory bank number, and memory access time, including: Take the same memory access request number and its corresponding memory bank number and memory access time as a row of the overall data relationship matrix. All memory access request numbers and their corresponding memory bank numbers and memory access times form the overall data relationship matrix.

3. The method according to claim 1, wherein Take the memory access request number with the same memory bank number and its corresponding memory access time as a set of data relationship matrices. When the number of types of memory bank numbers is two, two sets of data relationship matrices are obtained, including: According to the types of memory bank numbers, take the memory access request numbers with the same memory bank number in the overall data relationship matrix and their corresponding memory bank numbers and memory access times as a set of data relationship matrices; When the number of types of memory bank numbers is two, divide the overall data relationship matrix into two sets of data relationship matrices.

4. The method according to claim 1, wherein Parallelly determine the memory access request number with the latest memory access time in the overall data relationship matrix and each set of data relationship matrices, and respectively use them as the first memory access request number, the second memory access request number, and the third memory access request number, including: Input the overall data relationship matrix into the first processing module, and output the memory access request number with the latest memory access time in the overall data relationship matrix as the first memory access request number; Input the two sets of data relationship matrices into the second processing module to the N+1 processing module, and output the memory access request numbers with the latest memory access time in the first set of data relationship matrix and the second set of data relationship matrices as the second memory access request number and the third memory access request number respectively, where the second processing module to the N+1 processing module respectively correspond to N memory access request numbers.

5. The method according to claim 4, characterized in that, Input the two groups of data relationship matrices into the second processing module to the (N + 1)-th processing module, and output the memory access request numbers with the latest memory access time in the first group of data relationship matrix and the second group of data relationship matrix, as the second memory access request number and the third memory access request number respectively, including: In the second processing module to the (N + 1)-th processing module, store the first memory access request number to the N-th memory access request number respectively; In each processing module from the second processing module to the (N + 1)-th processing module, determine whether the data relationship matrix corresponding to the current memory access request number stored in the current processing module is the first group of data relationship matrix or the second group of data relationship matrix; When the data relationship matrix corresponding to the current memory access request number is the first group of data relationship matrix or the second group of data relationship matrix, determine whether the current memory access request number is the memory access request number with the latest memory access time in the first group of data relationship matrix or the second group of data relationship matrix according to the memory access time corresponding to the current memory access request number; When the current memory access request number is the memory access request number with the latest memory access time in the first group of data relationship matrix or the second group of data relationship matrix, use the current memory access request number as the second memory access request number or the third memory access request number.

6. The method according to claim 1, characterized in that Exclude one of the second target memory bank numbers and the third target memory bank numbers according to the first memory access request number, including: Exclude the target memory bank number that is the same as the first memory access request number among the second target memory bank number and the third target memory bank number.

7. The method according to claim 6, wherein Based on the second memory access request number or the third memory access request number obtained after exclusion output by the multiplexer, as the second new memory access request number, including: When excluding the second target memory bank number, use the third memory access request number as the second new memory access request number; When excluding the third target memory bank number, use the second memory access request number as the second new memory access request number.

8. An apparatus for quickly finding the new-old relationship of data in multiple memory banks, characterized in that, Include: A construction module, used to construct an overall data relationship matrix according to the corresponding relationship between the memory access request number, the memory bank number and the memory access time, take the memory access request number with the same memory bank number and its corresponding memory access time as a group of data relationship matrix, and obtain two groups of data relationship matrices when the number of types of memory bank numbers is two; A first determination module, used to determine the memory access request numbers with the latest memory access time in the overall data relationship matrix and each group of data relationship matrices in parallel, as the first memory access request number, the second memory access request number and the third memory access request number respectively; A second determination module, used to use the first memory access request number as the first new memory access request number, and determine the first new data relationship according to the first new memory access request number and its corresponding memory bank number; A multiplexer is used to exclude one of the second target memory bank numbers and the third target memory bank numbers according to the first memory access request number, and output the obtained second memory access request number or the third memory access request number after exclusion as the second new memory access request number, and use the second new memory access request number and its corresponding memory bank number as the second new data relationship.

9. A computer device, comprising: It includes a memory and a processor, and the memory stores a computer program. It is characterized in that when the processor executes the computer program, it implements the steps of the method for quickly finding the new and old data relationships of multiple memory banks described in any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the method for quickly finding the new and old data relationships of multiple memory banks described in any one of claims 1 to 7.

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