Regular expression search circuit, implementation method thereof, equipment and storage medium

By designing a regular expression search circuit and optimizing the FTL search of flash memory products using hardware circuitry, the problem of low performance in existing technologies was solved, achieving efficient memory search and improving the FTL search performance of flash memory products.

CN120407868APending Publication Date: 2025-08-01XIANG XINLI (SUZHOU) MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202510478572.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-16
Publication Date
2025-08-01

AI Technical Summary

Technical Problem

In existing technologies, flash translation layer (FTL) searches are typically performed by software, resulting in low performance, limited efficiency when the CPU accesses non-cache space, and inability to achieve continuous burst access.

Method used

Design a regular expression search circuit to implement memory search through hardware circuitry, including an APB register, a state machine, and a content comparison circuit. Utilize the AXI main interface for data reading and writing, and configure custom search rules through registers. Support multiple comparison modes and optimize data transmission to improve efficiency.

Benefits of technology

It improves the FTL search performance of flash memory products, enhances the efficiency of random read and write over a wide range, increasing efficiency by tens or even hundreds of times, and reduces CPU resource consumption.

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Abstract

The invention provides a regular expression search circuit. The regular expression search circuit comprises an APB register slave interface, a state machine, a content comparison circuit and an AXI main interface. According to the method, a self-defined search rule is issued to a search circuit through register configuration, a hardware circuit performs search matching in a specified range, if a regular expression is matched, a matched address is returned, a result is marked to be effective, search is continued, 16 groups of matched addresses can be stored at most, and if a complete address space is not searched at the moment, the search is completed. The search can be ended in advance to improve efficiency. The method can be applied to flash memory products, such as a USB controller, an SATA SSD controller, a PC I e SSD controller, a UFS controller, an eMMC controller and the like. The method is used for accelerating a flash translation layer (FTL) search table item and improving the large-range random read-write performance.
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Description

Technical Field

[0001] The present invention relates to the technical field of regular expression search circuits, and in particular to a regular expression search circuit, an implementation method thereof, a device, and a storage medium. Background Art

[0002] In existing storage products, the search of the Flash Translation Layer (FTL) is usually completed by software. The software reads out the data of a memory space in sequence and compares it with a specified test vector. If the comparison result is consistent, the memory address where the test vector is located is recorded for further processing.

[0003] The most serious defect of this method is its low performance. Taking the ARM Cortex-R5 CPU as an example, it usually takes 20 CPU cycles to access the memory once using the AXI interface. Assuming that 1 CPU cycle is 500 MHz, that is, 2 ns, it takes 160 us to traverse a 16 KB space (4096 double bytes). The CPU usually accesses this space as a non-cache space and can only access it single time, not continuously in a burst manner. Therefore, the performance is extremely limited.

[0004] Therefore, it is necessary to provide a new method to solve the above technical problems. Summary of the Invention

[0005] To achieve the above objects and other advantages of the present invention, a first object of the present invention is to provide an implementation method of a regular expression search circuit, including the following steps:

[0006] The CPU configures the register from the interface through the APB register;

[0007] When the hardware circuit detects that the rising edge of the search start register is valid, it triggers the internal state machine to work;

[0008] The state machine issues a read command to the bus through the AXI master interface, then receives the read data, compares the read data with the pattern register, stores the matching result in the result register according to the comparison result or increments the address, and continues to read the next data;

[0009] Judge whether the AXI burst operation exceeds the threshold to perform a truncation operation;

[0010] According to the start and end addresses, split the transmission to meet the requirements of the AXI protocol;

[0011] After the search process ends, the CPU reads the completion status and search result from the interface through the APB register.

[0012] Further, the configuration information of the register includes the memory start address, memory end address, search mode, search pattern, whether the search pattern is valid, and search start control.

[0013] Further, the search mode is configured as the comparison mode of the mode register, including greater than comparison mode, greater than or equal to comparison mode, less than comparison mode, less than or equal to comparison mode, full equality comparison mode with mask, and the full equality comparison mode with mask includes full equality comparison mode and full equality comparison mode with mask.

[0014] Further, the read address corresponding to the read command initiated by the state machine to the bus through the AXI master interface is the set memory start address.

[0015] Further, the comparison mode between the read data and the pattern register is determined by the mode register configured by the CPU.

[0016] Further, the step of storing the matching result in the result register or incrementing the address according to the comparison result and continuing to read the next data includes:

[0017] If there is a match, store the matching result in the result register;

[0018] If there is no match, increment the address and continue to read the next data.

[0019] Further, the judgment of whether the AXI burst operation exceeds the threshold is configured to judge whether the AXI burst operation exceeds 4KB. If it exceeds 4KB, truncation is required.

[0020] Further, the step of splitting the transmission into steps that meet the AXI protocol according to the start and end addresses includes:

[0021] According to the start and end addresses, split the transmission into 256 bytes specified by the AXI4 protocol;

[0022] If it is less than 256 bytes, split it into 128 bytes;

[0023] If it is less than 128 bytes, split it into 64 bytes;

[0024] And so on until the entire configured address space range is searched.

[0025] Further, after the step of splitting the transmission into steps that meet the AXI protocol according to the start and end addresses and before the step that the CPU reads the completion status and search result through the APB register slave interface during the search process, there is also included:

[0026] If 16 matching results are collected before the entire memory space is searched, the search is terminated early.

[0027] The second object of the present invention is to provide a regular expression search circuit, which applies the above method and includes an APB register slave interface, a state machine, a content comparison circuit, and an AXI master interface. Among them,

[0028] The APB register slave interface is used to receive register configuration information from the CPU; when the hardware circuit detects that the rising edge of the search start register is valid, it triggers the internal state machine to work; after the search process ends, it provides the CPU to read the completion status and search results;

[0029] The state machine is used to initiate a read command to the bus through the AXI master interface and then receive the read data;

[0030] The content comparison circuit is used to compare the read data with the pattern register, store the matching result in the result register or increment the address according to the comparison result, and continue to read the next data; determine whether the AXI burst operation exceeds the threshold to perform a truncation operation; according to the start and end addresses, split the transmission into specifications that meet the AXI protocol.

[0031] The third object of the present invention is to provide a computer device, which includes a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, it implements the steps of the above method.

[0032] The fourth object of the present invention is to provide a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements the steps of the above method.

[0033] Compared with the prior art, the beneficial effects of the present invention are:

[0034] The present invention proposes a regular expression search circuit, which can customize the search rules and send them to the search circuit through register configuration. The hardware circuit searches and matches within the specified range. If the regular expression is matched, the matching address is returned and the result is marked as valid and the search continues. Up to 16 groups of matching addresses can be stored. At this time, if the entire address space has not been searched yet, the search can be terminated early to improve efficiency.

[0035] The present invention can be applied to flash products, such as USB controllers, SATA SSD controllers, PCIe SSD controllers, UFS controllers, eMMC controllers, etc. It is used to accelerate the search for table entries in the flash translation layer (FTL) and improve the performance of large-range random read and write.

[0036] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention and to implement it according to the contents of the description, the following preferred embodiments of the present invention are described in detail with reference to the accompanying drawings. The specific implementation methods of the present invention are given in detail by the following embodiments and the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0038] Figure 1 Search circuit diagrams for regular expressions;

[0039] Figure 2 This is the block diagram of the content comparison circuit;

[0040] Figure 3 A flow chart of a method for implementing a regular expression search circuit;

[0041] Figure 4 A schematic diagram of a computer device;

[0042] Figure 5 A schematic diagram of a computer-readable storage medium. DETAILED DESCRIPTION

[0043] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. It should be noted that, without conflict, the embodiments or technical features described below can be arbitrarily combined to form new embodiments.

[0044] Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative work shall fall within the scope of protection of the present invention.

[0045] The figure numbers in this application are only used to distinguish the various steps in the scheme and are not used to limit the execution order of the various steps. The specific execution order is subject to the description in the specification.

[0046] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0047] The present invention first performs regular expression feature extraction, mainly analyzing the following types of regular expressions, abstracting hardware matching rules from these regular expressions, and implementing them with appropriate circuits.

[0048] 1. Regular expression for searching numbers less than a specific value:

[0049] For example, to match numbers less than 32, the following regular expression can be used:

[0050] ^(0|[1-9]|1[0-9]|2[0-9]|3[0-1])$

[0051] The meaning of this regular expression is as follows:

[0052] ^ and $ represent the start and end of the string respectively;

[0053] 0 matches a single 0;

[0054] [1-9] matches any single digit between 1 and 9;

[0055] 1[0-9] matches any number between 10 and 19;

[0056] 2[0-9] matches any number between 20 and 29;

[0057] 3[0-1] matches 30 and 31.

[0058] Hardware abstraction: In Verilog language, this function can be achieved using the operator <. 2. Regular expression for searching numbers less than or equal to a specific value:

[0059] For example, to match numbers less than or equal to 32, the following regular expression can be used: ^(0|[1-9]|1[0-9]|2[0-9]|3[0-2])$

[0060] The meaning of this regular expression is as follows:

[0061] ^ and $ represent the start and end of the string respectively;

[0062] 0 matches a single 0;

[0063] [1-9] matches any single digit between 1 and 9;

[0064] 1[0-9] matches any number between 10 and 19;

[0065] 2[0-9] matches any number between 20 and 29;

[0066] 3[0-2] matches 30, 31, 32.

[0067] Hardware abstraction: In Verilog language, this function can be achieved using the operator <=. 3. Regular expression for searching numbers greater than a specific value:

[0068] For example, to match numbers greater than 10, the following regular expression can be used:

[0069] ^(1[1-9]|[2-9]\d+)$

[0070] The meaning of this regular expression is as follows:

[0071] ^ and $ represent the start and end of the string respectively;

[0072] 1[1-9] matches numbers between 11 and 19;

[0073] [2-9]\d+ matches numbers from 20 to 99 and larger numbers.

[0074] Hardware abstraction: In the Verilog language, this function can be completed using the operator >. 4. Regular expression for searching numbers greater than or equal to a specific value:

[0075] For example, to match numbers greater than or equal to 10, the following regular expression can be used: ^(1[0-9]|[2-9]\d+)$

[0076] The meaning of this regular expression is as follows:

[0077] ^ and $ represent the start and end of the string respectively;

[0078] 1[0-9] matches numbers between 10 and 19;

[0079] [2-9]\d+ matches numbers from 20 to 99 and larger numbers.

[0080] Hardware abstraction: In the Verilog language, this function can be completed using the operator >=.

[0081] 5. Regular expression for searching numbers equal to a specific value:

[0082] For example, to match the number equal to 55, the following regular expression can be used:

[0083] ^55$

[0084] The meaning of this regular expression is as follows:

[0085] ^ and $ represent the start and end of the string respectively;

[0086] 55 matches the number 55.

[0087] Hardware abstraction: In the Verilog language, this function can be completed using the operator >=.

[0088] 6. Regular expression for searching specific values with a mask:

[0089] For example, to match a number equal to 5x5 (where x can be any value), the following regular expression can be used:

[0090] ^5[0-9]5$

[0091] The meaning of this regular expression is as follows:

[0092] ^ and $ represent the start and end of the string respectively;

[0093] 55 matches the number 55;

[0094] [0-9] matches numbers between 0 and 9.

[0095] Hardware abstraction: In the Verilog language, this function can be completed by using masked register control in combination with the operator ==.

[0096] Generally, the search of regular expressions can be summarized as a combination of the above several formats. Therefore, the present invention proposes to define 8 states for the search pattern [2:0], which can cover the above 6 search types, and respectively describe 5 circuits of <, <=, >, >=, and masked comparison (== is included in this circuit) in a hardware description language. The following is the specific description of the circuit functions:

[0097] Embodiment 1

[0098] A regular expression search circuit, as Figure 1 shown, includes an APB register slave interface, a state machine, a content comparison circuit, and an AXI master interface, where

[0099] The APB register slave interface is used to receive register configuration information from the CPU; when the hardware circuit detects that the rising edge of the search start register is valid, it triggers the internal state machine to work; after the search process ends, it provides the CPU to read the completion status and search results;

[0100] The state machine is used to initiate a read command to the bus through the AXI master interface, and then receive the read data;

[0101] As Figure 2 shown, the content comparison circuit is used to compare the read data with the pattern register, store the matching result in the result register or increment the address according to the comparison result, and continue to read the next data; determine whether the AXI burst operation exceeds the threshold to perform a truncation operation; according to the start and end addresses, split the transmission into compliance with the AXI protocol regulations.

[0102] In this embodiment, the register configurable information is all 32 bits, and the detailed description is shown in Table 1.

[0103] Table 1 Register Configurable Information

[0104]

[0105] As Figure 1 - Figure 2 shown, the specific matching process of this regular expression search circuit is as follows:

[0106] The CPU configures registers through the APB interface. The main configurations include the starting address of the memory, the ending address of the memory, the search mode, the search pattern, whether the search pattern is valid, and the search start control;

[0107] Once the hardware circuit detects that the rising edge of the search start register is valid, it starts to trigger the internal state machine to work;

[0108] The state machine issues a read command to the bus through the AXI interface. The read address is the set starting address of the memory. Then it receives the read data and compares the read data with the pattern register. The comparison mode is determined by the mode register configured by the CPU before. If there is a match, the match result is stored in the result register; if there is no match, the address is incremented and the next data is read.

[0109] Judge whether the AXI burst operation exceeds 4KB. If it exceeds 4KB, it needs to be truncated because according to the AMBA protocol, the AXI burst transfer cannot cross the 4KB boundary.

[0110] According to the starting and ending addresses, the transfer needs to be split into 256 beats specified by the AXI4 protocol. If it is less than 256 beats, it is split into 128 beats; if it is less than 128 beats, it is split into 64 beats; and so on until the entire configured address space range is searched.

[0111] If 16 match results are collected before the entire memory space is searched, the search is ended in advance to save bus bandwidth and power consumption.

[0112] After the search process ends, the CPU can read the completion status and search results through the APB.

[0113] This embodiment improves performance from three dimensions. First, the DMA hardware replaces the access of the traditional CPU to solve the access from single to continuous burst. Second, the bandwidth from DMA to the bus and from the bus to the search engine is increased from 32 bits to 128 bits, that is, 4 double bytes can be searched in parallel at a time. Third, the search test vectors are diversified. For example, 4 groups of test vectors are configured to achieve multiple result outputs in a single search.

[0114] Using the method provided by the present invention improves the efficiency by dozens or even hundreds of times compared with the pure software search method, and unloads the CPU resources, greatly improving the search efficiency.

[0115] Embodiment 2

[0116] A method for implementing a regular expression search circuit, which implements the regular expression search circuit provided in Embodiment 1. For a detailed description of the regular expression search circuit, reference can be made to the corresponding description in the above regular expression search circuit embodiment, which will not be elaborated here. As Figure 1 - Figure 3 shown, the method includes the following steps:

[0117] S100. The CPU configures the register from the interface configuration register through the APB register;

[0118] Further, the configuration information of the register includes the memory start address, memory end address, search mode, search pattern, whether the search pattern is valid, and search start control. Among them, the search mode is configured as the comparison mode of the mode register, including greater than comparison mode, greater than or equal to comparison mode, less than comparison mode, less than or equal to comparison mode, full equality comparison mode with mask, and the full equality comparison mode with mask includes the full equality comparison mode and the full equality comparison mode with mask.

[0119] In this embodiment, the configurable information of the register is all 32 bits, and the detailed description is shown in Table 1.

[0120] S110. When the hardware circuit detects that the rising edge of the search start register is valid, trigger the internal state machine to work;

[0121] S120. The state machine issues a read command to the bus through the AXI interface, and the read address is the set memory start address. Then, read the data and compare the read data with the pattern register. The comparison mode is determined by the mode register configured by the CPU before. If there is a match, store the match result in the result register; if there is no match, increment the address and continue to read the next data.

[0122] S130. Determine whether the AXI burst operation exceeds the threshold to perform a truncation operation;

[0123] In this embodiment, determining whether the AXI burst operation exceeds the threshold is configured to determine whether the AXI burst operation exceeds 4KB. If it exceeds 4KB, truncation is required. Because according to the AMBA protocol, the AXI burst transmission cannot cross the 4KB boundary.

[0124] S140. According to the start and end addresses, split the transmission to meet the requirements of the AXI protocol;

[0125] In this embodiment, the step of splitting the transmission to meet the requirements of the AXI protocol according to the start and end addresses includes:

[0126] According to the start and end addresses, the transmission needs to be split into 256 bytes as specified by the AXI4 protocol;

[0127] If it is less than 256 bytes, it is split into 128 bytes;

[0128] If it is less than 128 bytes, it is split into 64 bytes;

[0129] And so on until the entire address space range of the configuration is searched.

[0130] If 16 matching results are collected before the entire memory space is searched, the search is terminated in advance to save bus bandwidth and power consumption.

[0131] S150. After the search process ends, the CPU reads the completion status and search results from the interface through the APB register.

[0132] This embodiment improves performance from three dimensions. First, the DMA hardware replaces the access of the traditional CPU to solve the access from single to continuous burst. Second, the bandwidth from DMA to the bus and from the bus to the search engine is increased from 32bit to 128bit, that is, 4 double bytes can be searched in parallel at a time. Third, the search test vectors are diversified. For example, 4 groups of test vectors are configured to achieve multi-result output in a single search.

[0133] Using the method provided by the present invention improves the efficiency by dozens or even hundreds of times compared with the pure software search method, unloads the CPU resources, and greatly improves the search efficiency.

[0134] Embodiment 3

[0135] A computer device 200, as Figure 4 shown, includes a memory 210, a processor 220, and a computer program 230 stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of a method for implementing a regular expression search circuit. For a detailed description of the method, reference can be made to the corresponding description in the above method embodiment, which will not be repeated here.

[0136] Embodiment 4

[0137] A computer-readable storage medium, as Figure 5 shown, stores a computer program thereon. When the computer program is executed by a processor, it implements the steps of a method for implementing a regular expression search circuit. For a detailed description of the method, reference can be made to the corresponding description in the above method embodiment, which will not be repeated here.

[0138] The number of devices and the processing scale described here are used to simplify the description of the present invention. Applications, modifications, and variations of the present invention will be apparent to those skilled in the art.

[0139] Although the embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and embodiments. It can be fully applied to various fields suitable for the present invention. For those familiar with the art, additional modifications can be easily made. Therefore, without departing from the general concept defined by the claims and their equivalents, the present invention is not limited to specific details and the illustrated and described examples here.

[0140] The devices, computer devices, non-volatile computer storage media, and methods provided in the embodiments of this specification are corresponding. Therefore, the devices, computer devices, and non-volatile computer storage media also have beneficial technical effects similar to the corresponding methods. Since the beneficial technical effects of the methods have been described in detail above, the beneficial technical effects of the corresponding devices, computer devices, and non-volatile computer storage media will not be elaborated here.

[0141] Those skilled in the art also know that in addition to implementing the controller in the form of pure computer-readable program code, the method steps can be logically programmed to enable the controller to be implemented in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, embedded microcontrollers, etc. to achieve the same function. Therefore, such a controller can be regarded as a hardware component, and the devices included therein for implementing various functions can also be regarded as the structures within the hardware component. Or even, the devices for implementing various functions can be regarded as both software units for implementing the method and the structures within the hardware component.

[0142] The systems, devices, or units illustrated in the above embodiments can be specifically implemented by computer chips or entities, or by products with certain functions. For the convenience of description, when describing the above devices, they are described as various units according to their functions. Of course, when implementing one or more embodiments of this specification, the functions of each unit can be implemented in the same or multiple software and / or hardware.

[0143] Those skilled in the art should understand that the embodiments of this specification can be provided as methods, systems, or computer program products. Therefore, the embodiments of this specification can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the embodiments of this specification can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memories, CD-ROMs, optical memories, etc.) containing computer-usable program code.

[0144] This specification is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to embodiments of the specification. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing device generate means for implementing the functions specified in the Figure 1 one or more flows and / or blocks Figure 1 one or more blocks.

[0145] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the computer-readable memory generate a manufactured article including instruction means that implement the functions specified in the Figure 1 one or more flows and / or blocks Figure 1 one or more blocks.

[0146] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operational steps are executed on the computer or other programmable device to generate a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in the Figure 1 one or more flows and / or blocks Figure 1 one or more blocks.

[0147] It should also be noted that the term "comprising", "including", or any other variation thereof is intended to cover non-exclusive inclusion, such that a process, method, commodity, or device including a series of elements not only includes those elements but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, commodity, or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, commodity, or device including the said element.

[0148] This specification may be described in the general context of computer-executable instructions executed by a computer, such as program units. Generally, program units include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The specification may also be practiced in a distributed computing environment where tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program units may be located in local and remote computer storage media including storage devices.

[0149] Each embodiment in this specification is described in a progressive manner. For the same or similar parts among the embodiments, reference can be made to each other. Each embodiment focuses on the differences from other embodiments. In particular, for system embodiments, since they are basically similar to method embodiments, the description is relatively simple, and reference can be made to the corresponding parts of the method embodiments for related content.

[0150] The above description is only for the embodiments of this specification and is not intended to limit one or more embodiments of this specification. For those skilled in the art, one or more embodiments of this specification may have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of one or more embodiments of this specification shall be included within the scope of the claims of one or more embodiments of this specification.

Claims

1. A method for implementing a regular expression search circuit, characterized in that, It includes the following steps: The CPU configures registers from the interface through the APB register; When the hardware circuit detects that the rising edge of the search start register is valid, it triggers the internal state machine to work; The state machine issues a read command to the bus through the AXI master interface, then receives the read data, compares the read data with the pattern register, stores the matching result in the result register according to the comparison result or increments the address, and continues to read the next data item; Judge whether the AXI burst operation exceeds the threshold to perform a truncation operation; According to the start and end addresses, split the transmission to meet the provisions of the AXI protocol; After the search process ends, the CPU reads the completion status and search results from the interface through the APB register.

2. The implementation method of a regular expression search circuit as described in claim 1, characterized in that: The configuration information of the register includes the memory start address, memory end address, search mode, search pattern, whether the search pattern is valid, and search start control.

3. The implementation method of a regular expression search circuit according to claim 2, characterized in that: The search mode is configured as the comparison mode of the mode register, including greater than comparison mode, greater than or equal to comparison mode, less than comparison mode, less than or equal to comparison mode, full equality comparison mode with mask, and the full equality comparison mode with mask includes the full equality comparison mode and the full equality comparison mode with mask.

4. The implementation method of a regular expression search circuit according to claim 2, characterized in that: The read address corresponding to the read command issued by the state machine to the bus through the AXI master interface is the set memory start address.

5. The implementation method of a regular expression search circuit according to claim 3, characterized in that: The comparison mode between the read data and the pattern register is determined by the mode register configured by the CPU.

6. The implementation method of a regular expression search circuit as described in claim 5, wherein, The step of storing the matching result in the result register or incrementing the address according to the comparison result and continuing to read the next data item includes: If there is a match, store the matching result in the result register; If there is no match, increment the address and continue to read the next data item.

7. The implementation method of a regular expression search circuit according to claim 1, characterized in that: The judgment of whether the AXI burst operation exceeds the threshold is configured to judge whether the AXI burst operation exceeds 4KB. If it exceeds 4KB, truncation is required.

8. The implementation method of a regular expression search circuit as claimed in claim 7, characterized in that The step of splitting the transmission into requirements that meet the AXI protocol according to the start and end addresses includes: According to the start and end addresses, split the transmission into 256-byte units as specified by the AXI4 protocol; If it is less than 256 bytes, split it into 128 bytes; If it is less than 128 bytes, split it into 64 bytes; And so on until the entire configured address space range is searched.

9. The implementation method of a regular expression search circuit according to claim 8, characterized in that, Between the step of splitting the transmission into requirements that meet the AXI protocol according to the start and end addresses and the step that after the search process ends, the CPU reads the completion status and search results from the interface through the APB register, there is also included: If 16 matching results are collected before the entire memory space is searched, the search ends prematurely.

10. A regular expression search circuit, applying the method according to any one of claims 1 to 9, characterized in that: It includes an APB register slave interface, a state machine, a content comparison circuit, and an AXI master interface, where [[ID= ​ The content comparison circuit is used to compare the read data with the pattern register, store the matching result in the result register or increment the address according to the comparison result, and continue to read the next data item; determine whether the AXI burst operation exceeds the threshold to perform a truncation operation; and split the transmission into specifications that meet the AXI protocol according to the start and end addresses.

11. A computer device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims and 9.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the method according to any one of claims 1 to 9.