DC series arc fault detection method for photovoltaic system

Abstract

The invention provides a DC series arc fault detection method for a photovoltaic system. The method comprises the following steps: analyzing the influence of impedance on fault detection; analyzing the influence of switching noise; designing a resonant filter; and designing an arc fault detection algorithm. The resonant filter designed by the invention can effectively amplify an arc fault signal, so that the FFT amplitude change of the fault signal is more obvious, the normal signal and the fault signal are easier to distinguish, and the detection precision of the direct-current series arc fault is improved; and meanwhile, the arc fault and the normal condition can still be distinguished under the condition of large impedance, and the influence of the impedance of the inverter and the converter on the fault detection capability is reduced. The designed fault detection algorithm can effectively work in a system comprising a direct current optimizer and different commercial inverters, can stably realize a fault detection function, is not obviously influenced by system configuration and working condition change, and realizes the universality of the detection method.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and particularly to a method for detecting DC series arc faults in a photovoltaic system. Background Art

[0002] The detection of DC series arc faults is crucial for ensuring the safe and reliable operation of a photovoltaic system. There have been various detection algorithms previously, including time-domain analysis methods, frequency-domain analysis methods, detection methods based on modulation algorithms, etc. However, previous detection methods mostly focused on signal and power processing technologies, determining faults by passively measuring the photovoltaic current, and their detection performance was significantly affected by the impedances of various components in the photovoltaic system. Therefore, there is an urgent need for a new detection method to improve the performance of DC arc fault detection.

[0003] The prior art not only has difficulty in distinguishing between normal operation and arc fault states when the current change is small, but also the detection accuracy is restricted by the impedances of the converter and the inverter. In addition, some methods in the prior art rely on specific hardware conditions and are difficult to apply to existing photovoltaic systems, unable to fundamentally solve the actual detection problems. Summary of the Invention

[0004] In order to solve the problems existing in the prior art, the present invention proposes a method for detecting DC series arc faults in a photovoltaic system.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] A method for detecting DC series arc faults in a photovoltaic system, comprising the following steps:

[0007] S1. Analyze the influence of impedance on fault detection;

[0008] S2. Analyze the influence of switching noise;

[0009] S3. Design a resonant filter;

[0010] S4. Design an arc fault detection algorithm.

[0011] Preferably, in the step S1, the AC current amplitude is derived as follows:

[0012] i ac (ω) = v / z(ω)

[0013] where v is the photovoltaic voltage and z(ω) is the sum of the line impedance and the converter input impedance;

[0014] The photovoltaic dynamic impedance is derived as follows:

[0015]

[0016] where R s and L s are the series resistance and series inductance, C p is related to the diffusion capacitance and transition capacitance, and R p is related to the dynamic resistance and shunt resistance;

[0017] The impedance value is determined by the bias photovoltaic voltage and the AC frequency. A buck converter is used as the DC optimizer, and it is used to analyze the input impedance. The closed-loop input impedance includes the open-loop input impedance and the loop gain, and the derivation is as follows:

[0018]

[0019] where T loop is the loop gain, D is the duty cycle, Z c,ol is the open-loop input impedance, V i is the input voltage, and I L is the inductor current;

[0020] The open-loop input impedance can be derived as follows considering the power stage design, duty cycle, and load resistance:

[0021]

[0022] where R is the load resistance, L is the inductor, and C is the output capacitance;

[0023] The loop gain can be derived from the transfer function of the output voltage with respect to the duty cycle and the feedback compensator:

[0024]

[0025] where K p , K i are the proportional and integral gains, Z f is the input capacitance impedance of the converter, and Z n , Z D are the input impedances at zero output voltage and zero duty cycle, respectively;

[0026] From the above equations, it can be seen that the input impedance of the power converter varies with the operating frequency. As the operating frequency increases, an increase in the inductor value can increase the input impedance, and a high input impedance will result in a smaller AC current amplitude.

[0027] Preferably, in step S3, a resonant filter composed of a resistor R a , an inductor L a and a capacitor C a is designed. The impedance and resonant frequency of the resonant filter are as follows:

[0028] Z a = 1 / jωCa +jωL a +R a

[0029]

[0030] Wherein, L a , C a and R a are passive components of the resonance module, Z a is the impedance of the resonance module. At the resonance frequency f r , Z a is the minimum, which can increase the variation of the fault signal amplitude and helps to detect the arc fault more accurately. The direct current is blocked by the capacitor C a to avoid the interference of the direct current component to the fault detection;

[0031] The current flowing through Z a is as follows:

[0032] i a (ω) = v z (ω) / Z a

[0033] Wherein, v z (ω) is the voltage across Z a varying with frequency, which can be described by the power supply voltage and the arc fault voltage:

[0034] v z = v in - v arc (ω)

[0035] The amplification factor (AR) of the direct current series arc fault signal is:

[0036] AR = i a,arc (f r ) / i a,nor (f r )

[0037] Wherein, i a,arc and i a,nor are the currents of the resonance filter under the arc fault condition and the normal condition, respectively.

[0038] Preferably, the resonance frequency f r is designed between the power grid frequency f g and the switching frequency f sw , that is, f g < f r < f sw , and the power loss in Z a is caused by the power grid frequency f g and the switching frequency f swThe impedance determination at P Ra = i a (ω) 2 R a , Z a At f g and f sw is higher than the desired minimum impedance, i.e., Z a (f g ), Z a (f sw ) ≥ Z min , where Z min is the minimum impedance value, selected according to the desired power loss at Z a . The desired Z min is derived as follows:

[0039]

[0040] The designed Z min will increase with the increase of the estimated ΔV in order to obtain the desired power loss in Z a ;

[0041] By designing i a (f g ) and i a (f sw ) to meet the power loss requirement, and then determining the value of the capacitor C a . C a needs to satisfy:

[0042]

[0043] In the formula, ω g , ω sw , ω r are the grid, switch, and resonance angular frequencies respectively;

[0044] After determining the value of the capacitor C a , calculate the value of the inductor L according to a ;

[0045] Preferably, in step S4, the digital signal processor is used to calculate the discrete Fourier transform of the measured current, and the derivation is as follows:

[0046]

[0047] In the formula, N is the number of sampling points. In the experiment, N = 512, the sampling frequency is 250 kHz, and the moving average value μ Ia and the standard deviation σ Ia are calculated to determine the threshold for arc fault detection:

[0048] Ith [u] = μ Ia [u] + α·σ Ia [u]

[0049] Where α is a controllable value.

[0050] Preferably, when the calculated magnitude of the discrete Fourier transform is higher than the threshold, an arc fault can be detected in the frequency domain analysis. Considering the voltage relationship at both ends of C in Z a where C a Under normal conditions, the voltage at both ends of C a is equal to the power supply voltage. During an arc fault, it is V in -V arc , calculate the moving average μV a and the standard deviation σV ca of the voltage at both ends of C ca to determine the threshold:

[0051] V th [n] = μV ca [n] + β·σV ca [n]

[0052] Where β is a controllable value. When the measured V ca is lower than the threshold, an arc fault can be detected in the time domain analysis.

[0053] Compared with the prior art, the present invention has the following beneficial effects:

[0054] The resonant filter designed by the present invention can effectively amplify the arc fault signal, making the change in the FFT amplitude of the fault signal more significant, making it easier to distinguish between normal and fault signals, and improving the detection accuracy of DC series arc faults; at the same time, it realizes the ability to distinguish arc faults from normal conditions even under large impedance, reducing the influence of the impedance of inverters and converters on the fault detection ability. The designed fault detection algorithm can work effectively in systems with DC optimizers and different commercial inverters, and can stably implement the fault detection function, without being significantly affected by changes in system configuration and working conditions, realizing the universality of the detection method.

[0055] By considering the grid frequency, switching frequency, power loss requirements, and the influence of parasitic resistance, the parameters of the resonant filter are determined to achieve the amplification of the fault signal. By combining the frequency domain analysis calculated by the discrete Fourier transform and the time domain analysis using the voltage relationship at both ends of C a , a fault detection algorithm is formed, and then a specific formula is used to calculate the threshold to judge the fault, improving the accuracy and stability of fault detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 is the arc fault detection flow chart of the present invention;

[0057] Figure 2 Schematic diagram of a resonant filter

[0058] Figure 3 Flow chart of the arc fault detection algorithm steps Specific implementation manners

[0059] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Apparently, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments.

[0060] As Figure 1 shown, this embodiment proposes a DC series arc fault detection method for a photovoltaic system, including the following steps:

[0061] S1. Analyze the influence of impedance on fault detection.

[0062] Considering the change of arc impedance, the AC current amplitude can be deduced as follows:

[0063] i ac (ω) = v / z(ω)

[0064] In the formula, v is the photovoltaic voltage, and z(ω) is the sum of the line impedance and the converter input impedance.

[0065] The photovoltaic dynamic impedance can be deduced as follows:

[0066]

[0067] In the formula, R s and L s are the series resistance and series inductance, C p is related to the diffusion capacitance and transition capacitance, and R p is related to the dynamic resistance and shunt resistance.

[0068] The impedance value is determined by the bias photovoltaic voltage and the AC frequency. A buck converter is used as the DC optimizer, and it is used to analyze the input impedance. The closed-loop input impedance includes the open-loop input impedance and the loop gain, and can be deduced as follows:

[0069]

[0070] In the formula, T loop is the loop gain, D is the duty cycle, Z c,ol is the open-loop input impedance, V i is the input voltage, and I L is the inductor current. The open-loop input impedance can be deduced as follows considering the power stage design, duty cycle, and load resistance:

[0071]

[0072] Where R is the load resistance, L is the inductance, and C is the output capacitance. The loop gain can be derived from the transfer function of the output voltage with respect to the duty cycle and the feedback compensator:

[0073]

[0074] Where K p and K i are the proportional and integral gains, Z f is the input capacitance impedance of the converter, and Z n , Z D are the input impedances at zero output voltage and zero duty cycle, respectively. From the above equations, it can be seen that the input impedance of the power converter varies with the operating frequency. As the operating frequency increases, an increase in the inductance value can raise the input impedance. A high input impedance results in a smaller amplitude of the alternating current. A smaller change in the current amplitude makes it difficult to accurately identify the fault signal, especially when the current changes are small between the normal and fault states, making it even more difficult to distinguish, thereby reducing the detection accuracy. Therefore, the fault detection accuracy of general arc fault detection devices (AFDDs) is limited.

[0075] S2. Analyze the influence of switching noise.

[0076] The power converter generates switching noise during switching operations. The switching frequencies of the DC optimizer and the inverter exceed several kilohertz, making it difficult to distinguish between fault and normal conditions. Therefore, the frequency selection for arc fault detection should avoid the switching frequency and its harmonics to reduce the influence of noise on detection.

[0077] S3. Design a resonant filter.

[0078] Design a resonant filter composed of a resistor R a , an inductor L a and a capacitor C a . Its structure is as shown in Figure 2 . The impedance and resonant frequency of this resonant filter are as follows:

[0079] Z a = 1 / jωC a + jωL a + R a

[0080]

[0081] Where L a , C a and R a are the passive components of the resonant module, and Z a is the impedance of the resonant module. At the resonant frequency f r , Z aThe minimum value can increase the change in the amplitude of the fault signal, which helps to more accurately detect arc faults. It can also block the DC current through capacitor C a to avoid the interference of the DC component on fault detection. The current flowing through Z a is as follows:

[0082] i a (ω) = v z (ω) / Z a

[0083] where v z (ω) is the voltage across Z a that varies with frequency. It can be described by the power supply voltage and the arc fault voltage:

[0084] v z = v in - v arc (ω)

[0085] The amplification ratio (AR) of the DC series arc fault signal is:

[0086] AR = i a,arc (f r ) / i a,nor (f r )

[0087] where i a,arc and i a,nor are the currents of the resonant filter under arc fault conditions and normal conditions, respectively. Therefore, the designed Z a value can enhance the fault signal to distinguish normal conditions. It can be decoupled from the converter impedance used in general arc fault detection devices (AFDDs). To reduce the influence of switching noise generated by the power converter's switching operation on detection, the resonant frequency f r is designed between the power grid frequency f g and the switching frequency f sw , that is, f g < f r < f sw . The power loss in Z a is determined by the impedance at the power grid frequency f g and the switching frequency f sw : P Ra = i a (ω) 2 R a . Therefore, Z a is higher than the expected minimum impedance at f g and f sw , that is, Z a (f g ), Z a (fsw ) ≥ Z min . Wherein, Z min is the minimum impedance value, which is selected according to the expected power loss at Z a . The expected Z min can be derived as follows:

[0088]

[0089] The designed Z min will increase with the increase of the estimated ΔV in order to obtain the expected power loss at Z a . By designing i a (f g ) and i a (f sw ) to meet the power loss requirement, and then determine the value of the capacitor C a . C a should satisfy:

[0090]

[0091] In the formula, ω g , ω sw , ω r are the power grid, switch, and resonance angular frequencies respectively. After determining the value of the capacitor C a , calculate the value of the inductor L a according to. The design purpose of the resistor R a is to amplify the fault signal. A smaller resistor is suitable for measuring a higher fault current amplitude. However, there are inevitably parasitic resistances at L a and C a , which actually determines the value of R a . For example, in the actual design, when the set resonance frequency f r is 5 kHz, through calculation and experimental verification, it is determined that the AC resistance of L a at f r is 0.538 Ω and the inductance value is 4.7 mH; the AC resistance of C a at f r is 0.47 Ω and the capacitance value is 0.2 μF; R a is the sum of the AC resistances of L a and C a , which is 1.08 Ω.

[0092] S4. Design the arc fault detection algorithm.

[0093] Figure 3 is the arc fault detection flow chart. Use a digital signal processor (DSP) to calculate the discrete Fourier transform (DFT) of the measured current, which can be derived as follows:

[0094]

[0095] Where N is the number of sampling points, and in the experiment, N = 512, and the sampling frequency is 250 kHz. Calculate the moving average value μ Ia and the standard deviation σ Ia to determine the threshold for arc fault detection:

[0096] I th [u] = μ Ia [u] + α·σ Ia [u]

[0097] Where α is a controllable value. When the amplitude of the calculated discrete Fourier transform (DFT) is higher than this threshold, an arc fault can be detected in the frequency domain analysis. Considering the voltage relationship at both ends of C in Z a in C a When normal, the voltage at both ends of C a is equal to the power supply voltage, and during an arc fault, it is V in -V arc , calculate the moving average value μV of the voltage at both ends of C a and the standard deviation σV ca to determine the threshold: ca

[0098] V th [n] = μV ca [n] + β·σV ca [n]

[0099] Where β is a controllable value. When the measured V ca is lower than this threshold, an arc fault can be detected in the time domain analysis. Therefore, the proposed DC series arc fault detection method can be realized by using the designed resonant filter through frequency domain and time domain analysis.

[0100] As described above, it is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution and inventive concept of the present invention, makes equivalent substitutions or changes, and all should be covered within the protection scope of the present invention.​

Claims

1. A DC series arc fault detection method for a photovoltaic system, characterized in that, It includes the following steps: S1. Analyze the influence of impedance on fault detection; S2. Analyze the influence of switching noise; S3. Design a resonant filter; S4. Design an arc fault detection algorithm.

2. The DC series arc fault detection method for a photovoltaic system according to claim 1, wherein In the step S1, the derivation of the AC current amplitude is as follows: i ac (ω) = v / z(ω) In the formula, v is the photovoltaic voltage, and z(ω) is the sum of the line impedance and the converter input impedance; The derivation of the photovoltaic dynamic impedance is as follows: where R s and L s are the series resistance and series inductance, C p is related to the diffusion capacitance and transition capacitance, and R p is related to the dynamic resistance and shunt resistance; The impedance value is determined by the bias photovoltaic voltage and the AC frequency. A buck converter is used as the DC optimizer, and it is used to analyze the input impedance. The closed-loop input impedance includes the open-loop input impedance and the loop gain, and the derivation is as follows: where T loop is the loop gain, D is the duty cycle, Z c,ol is the open-loop input impedance, V i is the input voltage, I L is the inductor current; The open-loop input impedance can be derived as follows considering the power stage design, duty cycle, and load resistance: In the formula, R is the load resistance, L is the inductor, and C is the output capacitor; The loop gain can be derived from the transfer function of the output voltage with respect to the duty cycle and the feedback compensator: where K p and K i are the proportional and integral gains, Z f is the input capacitance impedance of the converter, and Z n , Z D are the input impedances at zero output voltage and zero duty cycle, respectively; From the above formulas, it can be seen that the input impedance of the power converter changes with the operating frequency. As the operating frequency increases, the increase in the inductor value can increase the input impedance, and a high input impedance will cause the AC current amplitude to become smaller.

3. A DC series arc fault detection method for a photovoltaic system according to claim 1, characterized in that, In the step S3, a resonant filter composed of a resistor R a , an inductor L a , and a capacitor C a is designed. The impedance and resonant frequency of the resonant filter are as follows: Z a = 1 / jωC a + jωL a + R a Wherein, L a , C a and R a are passive components of the resonant module, Z a is the impedance of the resonant module. At the resonant frequency f r , Z a is minimized, which can increase the change in the amplitude of the fault signal and help detect the arc fault more accurately. The capacitor C a blocks the direct current and avoids the interference of the direct current component on the fault detection; The current flowing through Z a is as follows: i a v(ω) = v z v(ω) / Z a where v z (ω) is the voltage across Z a at both ends, which can be described by the power supply voltage and the arc fault voltage: v z = v in -v arc (ω) The amplification factor (AR) of the DC series arc fault signal is: AR = i a,arc (f r ) / i a,nor (f r ) Where, i a,arc and i a,nor are the currents of the resonant filter under arc fault condition and normal condition, respectively.

4. A DC series arc fault detection method for a photovoltaic system according to claim 3, characterized in that The resonant frequency f r is designed to be between the grid frequency f g and the switching frequency f sw , i.e., f g < f r < f sw . The power loss in Z a is determined by the impedances at the grid frequency f g and the switching frequency f sw : P Ra = i a (ω) 2 R a , where Z a is higher than the desired minimum impedance at f g and f sw , i.e., Z a (f g ), Z a (f sw ) ≥ Z min , where Z min is the minimum impedance value, selected according to the desired power loss at Z a . The desired Z min is derived as follows: The designed Z min will increase as the estimated ΔV increases, so as to obtain the desired power loss in Z a ; By designing i a (f g ) and i a (f sw ) to meet the power loss requirements, and then determining the value of capacitor C a , C a shall satisfy: where ω g , ω sw , and ω r are the grid, switch, and resonance angular frequencies, respectively; Determine the value of capacitor C a After determining the value of calculate the value of inductor L a .

5. A DC series arc fault detection method for a photovoltaic system according to claim 1, characterized in that, In the step S4, the discrete Fourier transform of the measured current is calculated using a digital signal processor, and the derivation is as follows: Where N is the number of sampling points. In the experiment, N = 512, the sampling frequency is 250 kHz, and the moving average value μ is calculated Ia and the standard deviation σ Ia to determine the threshold for arc fault detection: I th [u] = μ Ia [u] + α·σ Ia [u] In the formula, α is a controllable value.

6. A DC series arc fault detection method for a photovoltaic system according to claim 5, characterized in that, When the calculated discrete Fourier transform amplitude is higher than the threshold, an arc fault can be detected in the frequency domain analysis. Considering the voltage relationship between the two ends of Z a in C a the voltage relationship between the two ends is normal, and the voltage between the two ends of C a is equal to the power supply voltage. During an arc fault, it is V in -V arc . Calculate the moving average μV a and the standard deviation σV ca of the voltage between the two ends of C ca to determine the threshold: V th [n] = μV ca [n] + β·σV ca [n] where β is a controllable value, when the measured V ca is lower than this threshold, an arc fault can be detected in the time-domain analysis.

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