Design and optimization method of improved E-type inverter circuit based on gallium nitride
The parameters of the improved E-class inverter circuit of GaN are optimized through non-dominant genetic algorithms and neural network models, and the problems of high harmonics and voltage stress in traditional circuit designs are solved, achieving efficient and accurate circuit optimization.
Patent Information
- Application Number
- CN202510326603.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-19
- Publication Date
- 2025-08-01
AI Technical Summary
Traditional Class E inverter circuits limit the maximum power at high frequency and high quality factor limits the working bandwidth, resulting in increased high harmonics, high voltage stress, and complex circuit design, so circuit simulation cannot effectively optimize circuit performance.
The non-dominant genetic algorithm is used to combine the neural network model, and the neural network is trained through simulation data, the parameter combination of gallium nitride improved Class E inverter circuit is optimized, and a multi-layer perceptron model is constructed to predict conversion efficiency and output power, and the device parameters are optimized in combination with the NSGA-II algorithm.
It realizes efficient optimization of device parameter combination at different powers, reduces circuit design complexity, improves conversion efficiency, accuracy and efficiency, and overcomes the shortcomings of traditional methods.
Smart Images
Figure CN120409394A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of power switching devices in power electronics technology, and particularly relates to a design and optimization method for an improved class-E inverter circuit based on gallium nitride. Background Art
[0002] With the rapid development of the third-generation new wide-bandgap semiconductor materials such as silicon carbide (SiC) and gallium nitride (GaN), power devices based on these materials can work stably at higher frequencies and voltages, making them more and more widely used in many fields. Although the traditional class-E inverter circuit has been widely used in fields such as wireless power transfer (WPT), induction heating, industrial ultrasonic waves, renewable energy systems, and commercial electronics industry, the class-E inverter consists of a power switching device (such as a MOSFET), two inductors, and two capacitors. Due to its advantages of compact structure, few components, and strong driving ability, its shunt capacitance limits its maximum power, and the high quality factor limits its operating bandwidth. If the quality factor is reduced, it will cause an increase in high-order harmonics and reduce the quality of the output waveform. Adding a parallel filter to the traditional class-E inverter circuit has the following advantages: 1) It is difficult for the traditional class-E inverter circuit to achieve broadband and high efficiency at the same time. Adding a parallel filter reduces the requirement for the quality factor, making it possible to achieve both at the same time. 2) The class-E inverter circuit has the disadvantage of high voltage stress. The voltage stress that the switching tube needs to bear is about 4 times the input voltage, which greatly limits the application of the class-E inverter circuit in high-power applications. The improved inverter circuit adds a parallel filter to filter out the second harmonic of the current, thereby greatly reducing the voltage stress of the switching tube. 3) In the actual application process, due to the influence of the parasitic parameters of the device itself, high-order harmonics will be generated to affect the waveform quality. Adding a parallel filter can effectively suppress the second harmonic and make the waveform output smoother. However, adding a parallel filter is not without disadvantages: 1) The added device further increases the complexity of the circuit design, and the subtle changes in the device parameters have a huge impact on the class-E circuit, making the circuit design more difficult. 2) In actual applications, due to the existence of parasitic parameters, the theoretically calculated optimal parameters are not the actual optimal parameters, and the class-E circuit cannot calculate the circuit performance through the device parameters like the traditional circuit. Therefore, how to design an efficient and effective circuit has become an urgent problem to be solved.
[0003] In circuit design, due to the increasing complexity of circuit structures, traditional manual calculation and experimental verification methods are difficult to solve the problems faced by modern electronic design. To design circuits more efficiently and accurately, circuit simulation technology has emerged. It verifies the feasibility of the circuit by simulating the working conditions of the circuit in the actual environment through computer software, thus avoiding the problems of complex manual calculation and the need to consume a large amount of manpower, material resources and time in experimental verification. To a certain extent, it solves the circuit design problem, but in dealing with the optimization problem of the improved class-E inverter circuit of gallium nitride, it can only verify the performance of the designed circuit and cannot effectively optimize the circuit performance. Therefore, in the actual circuit design optimization, the design of the class-E inverter circuit still requires a lot of empirical exploration to adjust the parameter design of the circuit, and circuit simulation can only play an auxiliary verification role. Summary of the Invention
[0004] Object of the Invention: Aiming at the shortcomings of the improved class-E inverter circuit based on gallium nitride and the problems encountered in the process of using circuit simulation, an effective multi-objective optimization method for the improved class-E inverter circuit of gallium nitride is provided, which overcomes the problem that the traditional circuit design optimization method cannot effectively optimize the performance of the class-E inverter circuit. Through the non-dominated genetic algorithm, the characteristics of high-performance parameters are learned, and then a series of better parameter combinations are solved, as well as the performance prediction of the improved class-E inverter circuit of gallium nitride, which plays a supplementary and optimizing role in the traditional circuit simulation design.
[0005] Technical Solution: A design and optimization method for an improved class-E inverter circuit based on gallium nitride of the present invention includes the following steps:
[0006] Step 1: Determine the theoretical device parameter values included in the improved class-E inverter circuit;
[0007] Step 2: Select circuit devices with parameters close to the theoretical device parameters, obtain the equivalent parameters of the circuit devices in the same series of the device, fit the equivalent parameters and generate a function curve correspondingly;
[0008] Step 3: Set the tolerance of each device to generate N groups of random parameters, substitute the random parameters in the combination into the corresponding fitted function to obtain the corresponding equivalent parameters, and substitute the generated equivalent parameters of each group of devices into the circuit for simulation to obtain the input and output powers and conversion efficiency of this group of data;
[0009] Step 4: Construct a neural network model adapted to the circuit and train the neural network model using the sample data after simulation;
[0010] Step 5: Use the sample data after simulation as the initial population and solve the conversion efficiency and output power models based on the NSGA-II algorithm;
[0011] Step 6: Substitute the desired solution into the simulation for calibration and verification.
[0012] Furthermore, step 1 is specifically as follows: a gallium nitride-based class E inverter circuit includes a choke inductor, a bypass capacitor, a resonant element, a GaN power switch device, a secondary filter circuit and a resistor R, wherein the parameter values of the secondary filter circuit are set to:
[0013]
[0014] Among them, L3 represents the inductance of the filter circuit, C3 represents the capacitance of the filter circuit, Q L Expressed as the quality factor of the filter circuit.
[0015] Furthermore, step 2 is specifically as follows: selecting circuit components with parameter values close to the ideal ones, obtaining equivalent parameter values of components in the same series of the corresponding components, and fitting the equivalent parameter values using a polynomial function to obtain a fitting function. For equivalent parameters in a negative proportional relationship in the capacitance, the reciprocal is taken and then polynomial fitting is performed;
[0016]
[0017] Among them, y represents the parasitic parameters of the actual device, a i represents the constant of the polynomial fitting, and x represents the ideal device parameter.
[0018] Furthermore, step 4 is specifically as follows: build a multi-layer perceptron using the Keras framework, use the simulation data as the data set, and build two neural network models SELU I and SELU II to predict conversion efficiency and output power. The structure includes: 1 input layer with 6 input feature channels, and a second-order polynomial expansion of the original 6 features; 4 hidden layers, containing 64, 32, 16, and 8 neurons respectively; 1 output layer, containing 1 neuron, for regression tasks; in terms of the selection of activation functions for the input layer and hidden layer, the SELU function is selected, which can smoothly handle negative inputs;
[0019] The accuracy of this model is measured by the mean square error (MSE) and the mean absolute percentage error (MAPE). The mean square error (MSE) is used as the loss function of this model. The formula is as follows:
[0020]
[0021] Where n represents the number of predicted values, y i represents the true value, Denote the predicted value. The smaller the value of MSE, the closer the predicted value of the model is to the true value, and the higher the accuracy of the model; MAPE is an indicator used to measure the prediction of the regression model. The smaller this indicator, the higher the prediction accuracy of the model. The formula is:
[0022]
[0023] Furthermore, step 5 specifically includes the following steps:
[0024] S5.1: Set the maximum number of iterations I of the multi-objective optimization deep learning algorithm max , the population size N pop , set the iteration counter I = 0; the device parameter combination S = {C1, C2, C3, L1, L2, L3};
[0025] S5.2: Initialize the population, that is, based on N groups of samples obtained by simulation, use each device parameter combination in the samples as the initial population, and use the output power and conversion efficiency obtained by sample simulation as the two objective functions for parameter optimization;
[0026] S5.3: Use the objective function to perform non-dominated sorting and crowding degree calculation on the population;
[0027] S5.4: Divide the solutions of the population according to non-dominated sorting and crowding degree calculation. Randomly select two solutions from the population and perform crossover and mutation operations in sequence to generate new offspring individuals; repeat N pop times to obtain N pop offspring solutions;
[0028] S5.5: Use the prediction model to obtain the output power and conversion efficiency of each offspring solution;
[0029] S5.6: Merge the newly generated N pop offspring solutions with the current population to form a population with a size of 2N pop ;
[0030] S5.7: For the merged population, use the fast non-dominated sorting method and crowding degree calculation of NSGA-II to divide the 2N pop solutions into different Pareto fronts; secondly, starting from the best first Pareto front, select solutions from each front in sequence to generate the next generation population;
[0031] S5.8: Set the iteration number I = I + 1; if I ≥ I max , output the first echelon of Pareto front; otherwise, return to S5.4.
[0032] Further, S5.4 is specifically as follows: The solutions of the population are divided according to non-dominated sorting and crowding degree calculation. Two solutions are randomly selected from the population, and crossover and mutation are performed in sequence for more detailed operation descriptions:
[0033] Divide the M Pareto fronts obtained by non-dominated sorting, calculate the crowding degree of each Pareto front, divide the part with a relatively high crowding degree in the first M / 5 Pareto fronts into Group I, and divide the part with a relatively low crowding degree into Group II. Randomly select two samples from Group II, and randomly select the encoding corresponding to one of the device parameters to perform crossover, for a total of N / 2 times. Randomly select one sample from Group I, and randomly select the encoding corresponding to one of the device parameters to perform mutation according to the formula, for a total of N / 2 times;
[0034] x r,new = x r,old + u * (x r,old - x r+1, o ld) #(6)
[0035] Wherein, x r,new is the individual parameter after mutation, x r,old is the selected individual parameter, u is the mutation amount, and x r+1,old is a random sample from the next Pareto front of the samples it dominates.
[0036] The present invention also discloses a computer device, including a memory, a processor, and a computer program stored on the memory. The processor executes the computer program to implement the steps of the method of the present invention.
[0037] The present invention also discloses a computer-readable storage medium, on which a computer program / instructions are stored. When the computer program / instructions are executed by a processor, the steps of the method of the present invention are implemented.
[0038] The present invention also discloses a computer program product, including a computer program / instructions. When the computer program / instructions are executed by a processor, the steps of the method of the present invention are implemented.
[0039] Beneficial effects: Compared with the prior art, the present invention has the following remarkable advantages: The multi-objective optimization method of the improved class-E inverter circuit based on gallium nitride proposed by the present invention overcomes the problems of complex parameter optimization and the need for a large amount of time-consuming simulation verification in the traditional improved class-E circuit design method, reduces the requirements for engineers' experience, and can more accurately optimize the device parameter combinations with high conversion efficiency at different powers while improving efficiency, providing a brand-new and efficient solution for the parameter optimization of the improved class-E inverter circuit. Description of the Drawings
[0040] Figure 1 Schematic diagram of the multi-objective optimization method for an improved Class-E inverter circuit of gallium nitride according to the present invention.
[0041] Figure 2 Schematic diagram of the structure of the improved Class-E inverter circuit.
[0042] Figure 3 Fitting graph of the equivalent resistance R1 of the inductor L2.
[0043] Figure 4 Schematic diagram of the NSGA-II algorithm process according to the embodiment of the present invention.
[0044] Figure 5 Percentage error comparison graph of the neural network model predicting the conversion efficiency.
[0045] Figure 6 Percentage error comparison graph of the neural network model predicting the output power.
[0046] Figure 7 Sample comparison graph before and after optimization using NSGA-II. Detailed implementation manners
[0047] The technical solution of the present invention will be further described below with reference to the accompanying drawings.
[0048] S1: Set the input voltage V of the circuit in to be 50V, the operating frequency f to be 1 MHz, the duty cycle D to be 0.5, and the required output power P to be 70W. Then, calculate the initial parameter values of the load resistance R as 20.60 Ω, the initial parameter values of the inductor L1 as 35.71 uH, the initial parameter values of the capacitor C1 as 8.91 nF, the initial parameter values of the inductor L2 as 3.70 uH, the initial parameter values of the capacitor C2 as 8.30 nF, the initial parameter values of the parallel inductor L3 as 2.06 uH, and the initial parameter values of the capacitor C3 as 121.36 nF in sequence through the formulas (1)-(6) in the principle introduction part.
[0049] S2: Select circuit devices approximate to the above parameter values, find the equivalent circuits of the devices according to the device models, replace the ideal devices in the circuit with the equivalent devices, obtain a conversion efficiency of 88.5%, obtain the equivalent parameters of the same series of devices, and fit the equivalent curves with polynomial functions. For example, the device name approximate to L2 is SPM5020T-3R3M-LR, and the parameter value is 3.3 uH. The fitting graph line of the equivalent resistance of the inductor L2 is as Figure 3 .
[0050] S3: Set tolerances for the ideal parameter values determined in S1. For example, set a 10% tolerance for L2, and take 10,000 sets of random numbers within the tolerance range. Use the fitting functions of each device determined in S2 to calculate the corresponding equivalent parameters, and obtain the output power and input power of the simulation, and calculate the conversion efficiency.
[0051] S4: Use the simulation data as a data set, and standardize it as the input features of the neural network. Build suitable neural network models SELUⅠ and SELUⅡ to predict the input power and output power.
[0052] Use Keras to build an MLP model. Its topological structure includes an input layer with six input channels, corresponding to six input features C1, C2, C3, L1, L2, L3, five hidden layers with 64, 32, 32, 16, and 8 neurons respectively, and an output layer. The SELU activation function is used for the input layer and hidden layers, and the linear activation function is used for the output layer. Other hyperparameters of the model are set as follows: Adam optimizer, learning rate 0.001, batch size 200, and the data set is divided into a training set and a test set in a ratio of 8:2.
[0053] Use MSE and mean absolute percentage error (MAPE) to measure the model accuracy. Figure 5 For the percentage error distribution diagram of the conversion efficiency of each sample predicted by the neural network model SELUⅠ, it can be observed that the percentage error distribution of the conversion efficiency is between -1% and -0.5%. Figure 6 For the percentage error diagram of the sample output power predicted by the neural network model SELUⅡ, it can be observed that the percentage error distribution of the conversion efficiency is between -3% and 4%. After calculation, the mean absolute percentage errors (MAPE) of the conversion efficiency and output power are 0.342% and 1.765% respectively. This represents that the error between the predicted value and the simulation value of the neural network prediction model is extremely low, and the prediction model can be used as a substitute for the simulation.
[0054] S5: Solve the conversion efficiency and output power models based on the NSGA-II algorithm.
[0055] S5.1: Set the maximum number of iterations I of the multi-objective optimization deep learning algorithm max = 10, population size 10,000, set the iteration counter I = 0; the device parameter combination S = {C1, C2, C3, L1, L2, L3}.
[0056] S5.2: Initialize the population, that is, based on the 10,000 sets of samples obtained from the simulation, use each device parameter combination in the samples as the initial population, and use the output power and conversion efficiency obtained from the sample simulation as the two objective functions for parameter optimization.
[0057] S5.3: Use the objective function to perform non-dominated sorting and crowding degree calculation on the population.
[0058] S5.4: Divide the solutions of the population according to non-dominated sorting and crowding degree calculation. Randomly select two solutions from the population and perform crossover and mutation operations in sequence to generate new offspring individuals; repeat 10,000 times to obtain 10,000 offspring solutions.
[0059] Twelve Pareto fronts are divided according to non-dominated sorting, and the crowding degree of each Pareto front is calculated. The part with the top 50% of the crowding degree in the first three Pareto fronts is divided into Group I, and the part with the bottom 50% of the crowding degree is divided into Group II.
[0060] Randomly select two samples from Group II, and randomly select the encoding corresponding to one of the device parameters to perform crossover, a total of 5,000 times. Randomly select one sample from Group I, and randomly select the encoding corresponding to one of the device parameters to perform mutation according to the formula, a total of 5,000 times.
[0061] x r,new = x r,old + u * (x r,old - x r+1,old ) #(6)
[0062] where x r,new is the individual parameter after mutation, x r,old is the selected individual parameter, u is the mutation amount set to 0.5, and x r+1,old is a random sample from the next Pareto front of the samples it dominates.
[0063] S5.5: Use the prediction model to predict the output power and conversion efficiency of each offspring solution.
[0064] S5.6: Combine the newly generated 10,000 offspring solutions with the current population to form a population with a size of 20,000.
[0065] S5.7: For the combined population, use the fast non-dominated sorting method and crowding degree calculation of NSGA-II to divide the 20,000 solutions into different Pareto fronts; secondly, starting from the best first Pareto front, select solutions from each front in sequence to generate the next generation population.
[0066] S5.8: Set the iteration number I = I + 1; if I ≥ 10, output the Pareto front of the first echelon,; otherwise, return to S5.4.
[0067] S6: Substitute the solved population back into the original circuit for verification through simulation calibration. Figure 7It is a comparison chart of the conversion efficiency and output power of the population before and after optimization using the NSGA-II algorithm. After optimization, the conversion efficiency of the population has increased to 92%-95%.
[0068] In the specific embodiments described above, the purpose, technical solutions, and beneficial effects of the present invention have been further described in detail. It should be understood that the above are only specific embodiments of the present invention and are not used to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.
Claims
1. A design and optimization method for an improved class-E inverter circuit based on gallium nitride, characterized in that, It includes the following steps: Step 1: Determine the theoretical device parameter values included in the improved Class-E inverter circuit; Step 2: Select circuit devices with parameters close to the theoretical device parameters, obtain the equivalent parameters of the circuit devices in the same series as the device, fit the equivalent parameters and generate a function curve accordingly; Step 3: Set the tolerances of each device to generate N sets of random parameters, substitute the random parameters in the combination into the corresponding fitted function to obtain the corresponding equivalent parameters, substitute the generated equivalent parameters of each set of devices into the circuit for simulation, and obtain the input and output powers and conversion efficiency of this set of data; Step 4: Build a neural network model adapted to this circuit and use the simulated sample data to train the neural network model; Step 5: Use the simulated sample data as the initial population and solve the conversion efficiency and output power models based on the NSGA-II algorithm; Step 6: Substitute the obtained solutions into the simulation for calibration and verification.
2. The design and optimization method of an improved class-E inverter circuit based on gallium nitride according to claim 1, characterized in that, Specifically, Step 1 is as follows: The Class-E inverter circuit based on gallium nitride includes a choke inductor, a bypass capacitor, a resonant element, a GaN power switch device, a secondary filter circuit, and a resistor R. Among them, the parameter values of the secondary filter circuit are set as: Among them, L3 represents the inductor of the filter circuit, C3 represents the capacitor of the filter circuit, and Q L represents the quality factor of the filter circuit.
3. The design and optimization method of an improved class-E inverter circuit based on gallium nitride according to claim 1, characterized in that, Specifically, Step 2 is as follows: Select circuit devices close to the ideal parameter values, obtain the equivalent parameter values of the devices in the same series as the corresponding devices, and use a polynomial function to fit the equivalent parameter values to obtain a fitting function. For the equivalent parameters with a negative proportional relationship in the capacitor, take the reciprocal and then perform polynomial fitting; Among them, y represents the parasitic parameters of the actual device, and a i represents the constant of polynomial fitting, and x represents the ideal device parameters.
4. A design and optimization method for an improved class-E inverter circuit based on gallium nitride, characterized in that, Specifically, Step 4 is as follows: Build a multi-layer perceptron using the Keras framework, use the simulation data as the data set, and build two neural network models SELUⅠ and SELUⅡ to predict the conversion efficiency and output power. The structure includes: 1 input layer with 6 input feature channels, performing second-order polynomial expansion on the original 6 features; 4 hidden layers, containing 64, 32, 16, and 8 neurons respectively; 1 output layer, containing 1 neuron for regression tasks; In terms of the selection of activation functions for the input layer and hidden layers, select the SELU function, which can smoothly handle negative inputs; The mean squared error MSE and the mean absolute percentage error MAPE are used to measure the accuracy of this model. The mean squared error MSE is used as the loss function of this model, and the formula is as follows: where n represents the number of predicted values, and y i represents the true value, represents the predicted value. The smaller the value of MSE, the closer the predicted value of the model is to the true value, and the higher the accuracy of the model; MAPE is an indicator used to measure the prediction of a regression model. The smaller this indicator, the higher the prediction accuracy of the model. The formula is:
5. The design and optimization method of an improved class-E inverter circuit based on gallium nitride according to claim 1, characterized in that, Specifically, Step 5 includes the following steps: S5.1: Set the maximum number of iterations I of the multi-objective optimization deep learning algorithm max and the population size N pop , set the iteration number counter I = 0; the device parameter combination S = {C1, C2, C3, L1, L2, L3}; S5.2: Initialize the population, that is, based on the N sets of samples obtained from the simulation, use the parameter combinations of each device in the samples as the initial population, and use the output power and conversion efficiency obtained from the sample simulation as the two objective functions for parameter optimization; S5.3: Use the objective functions to perform non-dominated sorting and crowding degree calculation on the population; S5.4: Divide the solutions of the population according to non-dominated sorting and crowding degree calculation. Randomly select two solutions from the population and perform crossover and mutation operations in sequence to generate new offspring individuals; repeat N pop times to obtain N pop offspring solutions; S5.5: Use the prediction model to obtain the output power and conversion efficiency of each offspring solution; S5.6: Merge the newly generated N pop offspring solutions with the current population to form a population of size 2N pop ; S5.7: For the merged population, use the fast non-dominated sorting method and crowding degree calculation of NSGA-II to divide the 2N pop solutions into different Pareto fronts; secondly, starting from the best first Pareto front, select solutions from each front in turn to generate the next generation of population; S5.8: Set the iteration count I = I + 1; if I ≥ I max , output the Pareto front of the first echelon; otherwise, return to S5.
4.
6. The design and optimization method of an improved class-E inverter circuit based on gallium nitride according to claim 5, characterized in that Specifically, S5.4 is as follows: Divide the solutions of the population according to non-dominated sorting and crowding degree calculation, randomly select two solutions from the population, and perform crossover and mutation in sequence for more detailed operation descriptions: Divide the M Pareto fronts according to non-dominated sorting, calculate the crowding degree of each Pareto front, divide the part with a relatively high crowding degree in the first M / 5 Pareto fronts into group I, and divide the part with a relatively low crowding degree into group II. Randomly select two samples in group II, and randomly select the encoding corresponding to one of the device parameters to perform crossover, for a total of N / 2 times. Randomly select one sample in group I, and randomly select the encoding corresponding to one of the device parameters to perform mutation according to the formula, for a total of N / 2 times; x r,new = x r,old + u * (x r,old - x r+1,old ) #(6) Among them, x r,new is the individual parameter after mutation, x r,old is the selected individual parameter, u is the mutation amount, and x r+1,old is a random sample on the next Pareto front of the samples it dominates.
7. A computer device, comprising a memory, a processor, and a computer program stored on the memory, characterized in that, The processor executes the computer program to implement the steps of the method described in claim 1.
8. A computer-readable storage medium having computer programs / instructions stored thereon, characterized in that, When the computer program / instructions are executed by the processor, the steps of the method described in claim 1 are implemented.
9. A computer program product, comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, the steps of the method described in claim 1 are implemented.