Encapsulation file generation method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a method and a device for generating a packaging file, electronic equipment and a storage medium. The method comprises the following steps: determining type information of a component; and determining auxiliary information of the component based on the type information, and generating a target packaging file of the component through the auxiliary information, thereby effectively solving the problems of low efficiency, incomplete information, easy error and the like encountered by manual creation of the packaging file, and remarkably improving the efficiency and quality of electronic design.

Description

Technical Field

[0001] The present invention relates to the technical field of generating encapsulated files, and in particular, to a method for generating an encapsulated file, an apparatus for generating an encapsulated file, an electronic device, and a computer-readable storage medium. Background Art

[0002] In modern electronic design, Electronic Design Automation (EDA) software plays a crucial role, and the creation and management of component encapsulated files are one of the core tasks of electronic engineers. PADS, as a widely recognized professional EDA tool in the industry, its encapsulated file format has been widely used in the field of circuit board design due to its clarity, ease of use, and high scalability.

[0003] However, the specifications and drawings provided by current component manufacturers often only include basic encapsulated information, such as the exact position, size, and shape of pads. To meet the specific needs of different organizations or users, engineers must supplement the auxiliary information of components during the production of encapsulated files. These auxiliary information are crucial for ensuring the precise manufacturing, efficient assembly, and convenient maintenance of circuit boards. They not only help operators accurately identify components and quickly obtain necessary information but also significantly improve manufacturing accuracy and assembly consistency. However, the process of manually adding these detailed information is time-consuming and error-prone, especially when dealing with a large number of components, resulting in low efficiency and difficulty in ensuring overall consistency. Summary of the Invention

[0004] Embodiments of the present invention provide a method, an apparatus, an electronic device, and a computer-readable storage medium for generating an encapsulated file to overcome or at least partially solve the above problems.

[0005] Embodiments of the present invention disclose a method for generating an encapsulated file, including:

[0006] Determine the type information of the component;

[0007] Based on the type information, determine the auxiliary information of the component, and generate a target encapsulated file of the component through the auxiliary information.

[0008] Optionally, the step of determining the type information of the component includes:

[0009] Obtain the original encapsulated file of the component;

[0010] Extract the file name of the original encapsulated file;

[0011] Based on the file name, determine the type information of the component.

[0012] Optionally, the step of determining the type information of the component includes:

[0013] Obtain the original package file of the component;

[0014] Determine the target attribute field of the package file;

[0015] Determine the type information of the component based on the target attribute field.

[0016] Optionally, the step of determining the type information of the component includes:

[0017] Obtain the configuration file of the component;

[0018] Determine the type information of the component based on the configuration file.

[0019] Optionally, the step of determining the auxiliary information of the component based on the type information and generating the target package file of the component by the auxiliary information includes:

[0020] Obtain the assembly layer geometric information of the component through the original package file of the component;

[0021] Construct the assembly layer profile of the component through the assembly layer geometric information;

[0022] Determine the silk screen frame generation strategy for the component through the type information;

[0023] Based on the silk screen frame generation strategy, determine the graphic area of the silk screen layer for the assembly layer profile;

[0024] Generate the preliminary content of the silk screen frame based on the graphic area;

[0025] Exclude the pad interference area from the preliminary content of the silk screen frame to generate the target silk screen frame information;

[0026] Generate the target package file of the component through the target silk screen frame information.

[0027] Optionally, the step of determining the auxiliary information of the component based on the type information and generating the target package file of the component by the auxiliary information includes:

[0028] Determine the first processing strategy for the solder mask layer and the stencil layer of the component based on the type information;

[0029] Adopt the first processing strategy to determine the inner shrinkage dimension or outer expansion dimension for the solder mask layer;

[0030] Adopt the first processing strategy to determine the stencil area or block size for the stencil layer;

[0031] Generate a target package file for the component based on the inner shrinkage dimension, the outer expansion dimension, the stencil area, and the block size.

[0032] Optionally, the step of determining auxiliary information for the component based on the type information and generating a target package file for the component through the auxiliary information includes:

[0033] Determine a second processing strategy for the measurement annotation of the component based on the type information;

[0034] Perform measurement and geometric calculations according to the second processing strategy to generate an initial size measurement annotation;

[0035] Obtain a text drawing instruction and determine a first avoidance area based on the text drawing instruction;

[0036] Determine a second avoidance area through the outer border areas of the assembly layer and the silk screen layer of the component;

[0037] Perform a translation operation on the annotation content based on the initial size measurement annotation; the annotation content after performing the translation operation does not overlap with the first avoidance area and the second avoidance area;

[0038] Generate a target package file for the component through the annotation content after performing the translation operation

[0039] An embodiment of the present invention also discloses a device for generating a package file, including:

[0040] A type information determination module, configured to determine the type information of a component;

[0041] A target package file generation module, configured to determine auxiliary information for the component based on the type information and generate a target package file for the component through the auxiliary information.

[0042] An embodiment of the present invention also discloses an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory complete communication with each other through the communication bus;

[0043] The memory is used to store a computer program;

[0044] When the processor is used to execute the program stored on the memory, the method described in the embodiment of the present invention is implemented.

[0045] An embodiment of the present invention also discloses a computer-readable storage medium, on which instructions are stored, and when executed by one or more processors, cause the processors to execute the method described in the embodiment of the present invention.

[0046] The embodiments of the present invention have the following advantages:

[0047] In the embodiments of the present invention, by determining the type information of components; determining the auxiliary information of the components based on the type information, and generating the target package file of the components through the auxiliary information, the problems of low efficiency, incomplete information, and easy errors encountered when manually creating package files are effectively solved, and the efficiency and quality of electronic design are significantly improved. Description of the Drawings

[0048] Figure 1 is a flowchart of the steps of a method for generating a package file provided in an embodiment of the present invention;

[0049] Figure 2 is a flowchart of the steps of a method for determining the type information and model information of components provided in an embodiment of the present invention;

[0050] Figure 3 is a flowchart of the steps of a method for determining auxiliary information provided in an embodiment of the present invention;

[0051] Figure 4 is a flowchart of the steps of another method for determining auxiliary information provided in an embodiment of the present invention;

[0052] Figure 5 is a flowchart of the steps of yet another method for determining auxiliary information provided in an embodiment of the present invention;

[0053] Figure 6 is a block diagram of the structure of a device for generating a package file provided in an embodiment of the present invention;

[0054] Figure 7 is a block diagram of the hardware structure of an electronic device provided in an embodiment of the present invention;

[0055] Figure 8 is a schematic diagram of a computer-readable medium provided in an embodiment of the present invention. Detailed Embodiments

[0056] To make the above objects, features, and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0057] PADS is a powerful electronic design automation (EDA) software, mainly used for the design of printed circuit boards (PCBs). It provides a complete set of solutions from schematic design, PCB layout and wiring to production and manufacturing, and is widely used in the electronics industry.

[0058] In modern electronic design, Electronic Design Automation (EDA) software plays a crucial role, and the creation and management of component packaging files are one of the core tasks of electronic engineers. PADS, as a widely recognized professional EDA tool in the industry, its packaging file format is widely used in the field of circuit board design due to its clarity, ease of use, and high scalability.

[0059] However, the specifications and drawings provided by current component manufacturers often only cover basic packaging information, such as the exact position, size, and shape of the pads. To meet the specific needs of different organizations or users, engineers must supplement the component with auxiliary information during the production of the packaging file, such as key details like silk screen, solder mask, stencil layer information, model identification, and detailed dimension measurement markings. These auxiliary information is crucial for ensuring the precise manufacturing, efficient assembly, and convenient repair of the circuit board. They not only help operators accurately identify components and quickly obtain necessary information but also significantly improve manufacturing accuracy and assembly consistency. However, the process of manually adding this detailed information is both time-consuming and error-prone, especially when dealing with a large number of components, resulting in low efficiency and difficulty in ensuring overall consistency.

[0060] In addition, when faced with multiple projects or the need for frequent design updates, the manual operation method is particularly inconvenient. Each update requires cumbersome manual adjustments, which not only increases the workload but also may lead to data consistency and accuracy issues. Therefore, the existing technical means have obvious deficiencies in improving the efficiency of generating packaging files. To overcome these defects, there is an urgent need for a method that can automatically identify the component type and automatically generate the required auxiliary information according to preset rules to reduce the workload of designers and improve the design quality and speed. The present invention precisely addresses the above deficiencies in the existing technology and proposes a method and system for automatically adding auxiliary information based on PADS packaging files, aiming to optimize the entire packaging file design process through an automated process.

[0061] Refer to Figure 1 , which shows the step flowchart of a method for generating a packaging file provided in an embodiment of the present invention, and specifically may include the following steps:

[0062] Step 101, determine the type information of the component;

[0063] Step 102, determine the auxiliary information of the component based on the type information, and generate the target packaging file of the component through the auxiliary information.

[0064] The embodiment of the present invention can be applied to a system for modifying PADS packaging files, hereinafter simply referred to as the system.

[0065] In practical applications, accurate type and model information is crucial for correctly applying preset rules and strategies in subsequent steps. In the embodiments of the present invention, the type information and model information of components can be determined to accurately obtain the identity identifier of the component to be processed, providing a basis for automatically generating auxiliary information in the subsequent steps.

[0066] Exemplarily, in the embodiments of the present invention, the type information and model information of components can be determined in various ways, including but not limited to:

[0067] Determine the type information and model information of components by means of file name parsing, attribute value reading, external database query, etc. of the original package file of the component. Or, without being limited to the original package file, the type information and model information can be obtained by manually inputting the type information and model information by the user, or by reading the type information and model information of the component through the default configuration file of the component, thereby increasing the diversity of information acquisition.

[0068] By determining the type information and model information of components, the embodiments of the present invention can provide accurate component data for subsequent automated processes, ensuring the accuracy of subsequent steps. Further, through various information acquisition methods, the adaptability and robustness of the system can be improved.

[0069] The embodiments of the present invention can also determine the auxiliary information of the component based on the type information to determine various auxiliary information that needs to be added to the package file according to the known component type and model.

[0070] Exemplarily, the auxiliary information can include but not be limited to silk screen frame information, solder mask / stencil layer information, dimension annotation information, etc., which are crucial for the manufacturing, assembly, and repair of circuit boards.

[0071] Optionally, the model information in the embodiments of the present invention can be used to express the model of the component, and the model information can be used to further refine the type information of the component. For example, although it has been determined through the type information that the target component is a resistor, this resistor belongs to a specific model, such as ABC001-ABC999, which is a resistor with separate characteristics. Therefore, the model information can be used to further refine the type of the component.

[0072] The system can determine the generation strategy of the auxiliary information according to the type information and automatically generate or extract the corresponding auxiliary information. In practical applications, the generation strategy can be customized and adjusted according to actual needs.

[0073] Exemplarily:

[0074] Assume that the system has successfully obtained the type information and model information of the component:

[0075] Type information: Resistor devices;

[0076] Model information: 0805 package, 10 kΩ, ±1% accuracy;

[0077] The auxiliary information of the component can be determined in the following way:

[0078] Scheme reading: The system identifies that the component is a resistor device. Therefore, from the preset scheme library, it reads the scheme applicable to resistor devices, and this scheme contains the generation rules for the auxiliary information of resistor devices.

[0079] Regarding the generation of the silk screen frame, the silk screen frame generation strategy stipulates that:

[0080] It is necessary to expand the silk screen frame externally, and the expansion amount is 0.2 mm.

[0081] The drawing spacing is 0.1 mm.

[0082] The drawing style is a rectangular frame.

[0083] According to this silk screen frame generation strategy, the system obtains the size information of the 0805 package from the original package file of this resistor through the model information, and automatically generates a silk screen frame that meets the requirements.

[0084] The strategies for solder mask / stencil layer processing include:

[0085] The solder mask layer is expanded externally by 0.1 mm.

[0086] The stencil layer is shrunk internally by 0.05 mm.

[0087] According to this strategy, the system combines the pad information and automatically generates or adjusts the solder mask layer and the stencil layer.

[0088] The strategies for dimension annotation automation include:

[0089] It is necessary to annotate the length and width of the device.

[0090] It is necessary to annotate the pin pitch.

[0091] According to these rules, the system combines the size information of the 0805 package and automatically generates the corresponding dimension annotations.

[0092] Moreover, the system places the dimension annotations outside the silk screen outer frame through calculation to prevent the text from obscuring the silk screen information.

[0093] At this time, the auxiliary information for the silk screen frame, solder mask / stencil layer, and dimension annotation can be obtained.

[0094] In the embodiment of the present invention, by determining the auxiliary information of the component based on the type information, the following beneficial effects can be achieved:

[0095] Automatically generates auxiliary information, greatly improving the design efficiency.

[0096] Reduces human errors and ensures the consistency and accuracy of auxiliary information.

[0097] Generates auxiliary information that meets the requirements according to the characteristics of the components, improving the quality of the package file.

[0098] In an embodiment of the present invention, the target package file of the component can be generated through the auxiliary information, so as to integrate the generated auxiliary information into the original package file to form the final target package file.

[0099] In practical applications, the target package file contains complete package information and can be directly used for the manufacture of circuit boards.

[0100] In a specific implementation, the system of the embodiment of the present invention can write the generated auxiliary information to the corresponding position in the format of the PADS package file. At the same time, the system will also verify and check the package file to ensure that it meets the standards and specifications.

[0101] In the embodiment of the present invention, the target package file of the component is generated through the auxiliary information, and the following beneficial effects can be achieved:

[0102] Generates a complete and high-quality package file that can be directly used for production.

[0103] The automated generation and verification process improves the reliability and stability of the package file.

[0104] Through the automated generation of file names and paths, it is convenient for users to manage package files.

[0105] In the embodiment of the present invention, by determining the type information and model information of the component; determining the auxiliary information of the component based on the type information, and generating the target package file of the component through the auxiliary information, thereby effectively solving the problems of low efficiency, incomplete information, and easy errors encountered when manually creating package files, and significantly improving the efficiency and quality of electronic design.

[0106] On the basis of the above embodiment, a variant embodiment of the above embodiment is proposed. Here, it should be noted that for the sake of brevity of description, only the differences from the above embodiment are described in the variant embodiment.

[0107] In an optional embodiment of the present invention, the step of determining the type information of the component includes:

[0108] Obtain the original package file of the component;

[0109] Extract the file name of the original package file;

[0110] Determine the type information of the component based on the file name.

[0111] An embodiment of the present invention can obtain the original package file of the component as the starting point for information extraction, and the original package file contains the data required for subsequent analysis.

[0112] Reference Figure 2 , Figure 2 is a flowchart of the steps of a method for determining the type information and model information of a component provided in an embodiment of the present invention;

[0113] By obtaining the original package file of the component, it can be ensured that the system can process the actual package file, rather than relying only on preset information, which provides a data basis for subsequent file name extraction and ensures the accuracy and reliability of information extraction.

[0114] An embodiment of the present invention can extract the file name of the original package file and use the extracted file name as the basis for subsequent parsing.

[0115] In practical applications, the file name usually contains the type, model, or other identification information of the component.

[0116] Extracting the file name of the original package file can provide key data for subsequent determination of component information, simplify the subsequent parsing process, and improve efficiency.

[0117] An embodiment of the present invention can determine the type information of the component based on the file name, use preset rules to parse the file name, extract the type and model information of the component, thereby converting the information in the file name into data recognizable by the system, and achieving the following beneficial effects:

[0118] Automatically extract component information and improve efficiency.

[0119] Reduce human errors and ensure information accuracy.

[0120] As one of the multiple information acquisition modes, file name parsing can improve the diversity of information acquisition.

[0121] Such as Figure 2 shown, based on the input file name, at least two methods can be used to determine the type and model information of the component. Among them, in the part of "calling the file name parsing subroutine", the process of this step includes:

[0122] 1. File name parsing: Parse the file name based on preset rules;

[0123] Detailed description:

[0124] File name parsing refers to the system analyzing the file name of a packaged file according to preset rules to extract the type, model number, or other relevant information of the component.

[0125] The premise of this method is that the file naming follows certain specifications, and the file name contains information that can be parsed.

[0126] For example, the file name may contain the following information:

[0127] Model series code: such as "RES" represents resistor, and "CAP" represents capacitor.

[0128] Package size: such as "0805", "1206", "SOIC-8".

[0129] Specific parameters: such as "10K", "10uF".

[0130] Manufacturer code: used to identify the manufacturer of the component.

[0131] The system extracts this information from the file name according to preset rules through techniques such as regular expressions and string splitting, and converts it into data recognizable by the system.

[0132] The preset rules can be customized and modified according to actual needs to adapt to different file naming specifications.

[0133] Example:

[0134] Suppose the file name is "RES_0805_10K_1%_ABC.d", and the preset rules are as follows:

[0135] The first three characters are the component type code.

[0136] The fourth to seventh characters are the package size.

[0137] The eighth to tenth characters are the resistance value.

[0138] The eleventh character is the precision.

[0139] "ABC" is the manufacturer code.

[0140] The system parses the file name according to these rules and obtains the following information:

[0141] Type: Resistor (RES)

[0142] Package size: 0805

[0143] Resistance value: 10K

[0144] Precision: 1%

[0145] Manufacturer: ABC

[0146] Advantages:

[0147] High degree of automation and high efficiency.

[0148] Applicable to the situation where the file naming specifications are unified.

[0149] Does not require accessing an external database and is fast.

[0150] 2. For the part of "calling the external query subroutine", the process of this step includes:

[0151] External query: Use an external database or a relational mapping file to match component data;

[0152] Detailed description:

[0153] External query means that the system queries and matches the component data according to the relevant information of the package file by accessing an external database or a relational mapping file.

[0154] This method can obtain more detailed and accurate component information, but it requires pre - establishing or accessing an external database.

[0155] The external database or relational mapping file may contain the following information:

[0156] Detailed parameters of the component.

[0157] Manufacturer information.

[0158] Package size and pin layout.

[0159] Electrical characteristics and application guidelines.

[0160] The system can query in the database according to the file name, attribute value or other identification information to obtain the matching component data.

[0161] Example:

[0162] Suppose the system extracts the file name "RES_0805_10K_1%_ABC.d" and extracts the manufacturer code "ABC" from the file.

[0163] The system uses the manufacturer code "ABC" and the model "RES_0805_10K_1%" as query conditions to query in the external database.

[0164] The database returns the matching component data, including detailed electrical parameters, package size, manufacturer information, etc.

[0165] Advantages:

[0166] Can obtain more detailed and accurate component information.

[0167] Applicable to the situation where the file naming specifications are not unified.

[0168] It can handle complex situations, such as multiple packages or parameters for the same model.

[0169] By using the above two methods to determine the type information and model information of components, the following beneficial effects are achieved:

[0170] File name parsing is applicable to scenarios where the file naming specifications are unified and the information is simple, and it has the advantage of fast speed.

[0171] External query is applicable to scenarios where detailed information needs to be obtained and the file naming specifications are not unified, and it has the advantage of high accuracy.

[0172] The two methods can be combined to improve the efficiency and accuracy of obtaining component information.

[0173] In an optional embodiment of the present invention, the step of determining the type information of the component includes:

[0174] Obtain the original package file of the component;

[0175] Determine the target attribute field of the package file;

[0176] Determine the type information of the component based on the target attribute field.

[0177] In the embodiment of the present invention, the original package file of the component can be obtained; as the starting point of information extraction, the original package file contains the data required for subsequent analysis.

[0178] By obtaining the original package file of the component, it can be ensured that the system can process the actual package file, rather than relying only on preset information, and the following beneficial effects are achieved:

[0179] It provides a data basis for the subsequent determination of the target attribute field.

[0180] Ensures the accuracy and reliability of information extraction.

[0181] In the embodiment of the present invention, the target attribute field of the information in the original package file can be viewed to determine the attribute information of the component that needs to be read. The target attribute field usually contains the type, model or other identification information of the component, providing a clear target for the subsequent reading of the attribute value, thereby improving the efficiency and accuracy of the attribute value reading, enhancing the flexibility of the system, and being able to adapt to different package file formats.

[0182] In the embodiments of the present invention, the type information of the component can be determined based on the target attribute field, the value of the target attribute field can be read, and the type and model information of the component can be determined according to the preset rules or mapping relationships.

[0183] By determining the type information of the component based on the target attribute field, the information in the attribute value can be converted into data recognizable by the system, and the following beneficial effects are achieved:

[0184] Automated extraction of component information is realized, improving efficiency.

[0185] Human errors are reduced, ensuring the accuracy of information.

[0186] As one of the multiple information acquisition modes, attribute value reading can improve the diversity of information acquisition.

[0187] Exemplarily, the type information and model information of the component can be determined in the following manner.

[0188] 1. Obtain the original package file of the component;

[0189] The system receives a PADS package file, such as "RES_0805_10K.d".

[0190] The system reads the content of the file for subsequent extraction of attribute fields.

[0191] 2. Determine the target attribute field of the package file;

[0192] By analyzing multiple package files, it is found that:

[0193] The "name" parameter in the file header of all package files contains the model information of the component.

[0194] The custom attribute "Device.Type" of some package files contains the type information of the component.

[0195] The custom attribute "Geometry.Height" of the package file contains the height information of the component.

[0196] Therefore, we determine the following target attribute fields:

[0197] name (file header parameter)

[0198] Device.Type (custom attribute)

[0199] Geometry.Height (custom attribute)

[0200] 3. Determine the type information of the component based on the target attribute field.

[0201] The system parses the "RES_0805_10K.d" file and extracts the values of the target attribute fields:

[0202] name = "RES_0805_10K"

[0203] Device.Type = "Resistor"

[0204] Geometry.Height = "0.5mm"

[0205] Based on the extracted attribute values, the system performs the following processing:

[0206] By analyzing the value of name, the model information is extracted: "RES_0805_10K".

[0207] By reading the value of Device.Type, the component type is determined: "Resistor".

[0208] Extract the value of Geometry.Height to obtain the height information: "0.5mm".

[0209] Finally, the system determines the component information of the package file:

[0210] Type: Resistor

[0211] Model: RES_0805_10K

[0212] Height: 0.5mm

[0213] In an alternative embodiment of the present invention, the steps of determining the type information and model information of the component include:

[0214] Obtain the configuration file of the component;

[0215] Determine the type information of the component based on the configuration file.

[0216] In an embodiment of the present invention, the configuration file of the component can be obtained;

[0217] Purpose:

[0218] Read the preset component information from the configuration file as the system default value or alternative. Provide a flexible way to allow users to pre-define common component information.

[0219] By obtaining the configuration file of the component, it provides a data basis for subsequent determination of component information, improves the flexibility and customizability of the system, and provides a reliable default solution when there is no other information source.

[0220] The embodiments of the present invention can also determine the type information of components based on the configuration file.

[0221] Purpose: Parse the configuration file, extract the preset component types and model information, and convert the information in the configuration file into data recognizable by the system.

[0222] Determining the type information of components based on the configuration file realizes the automatic extraction of component information, improves efficiency, reduces human errors, and ensures the accuracy of information.

[0223] In practical applications, as one of the multiple information acquisition modes, the configuration file can improve the diversity of information acquisition.

[0224] Reference Figure 2 , Figure 2 is the flowchart of the steps of a method for determining the type information and model information of components provided in the embodiments of the present invention;

[0225] The part of "calling the read default value subroutine" describes in detail the process of this step:

[0226] The user operates to specify or input parameters to specify that the information acquisition mode is "reading default value"

[0227] Read the configuration file or parameters.

[0228] Obtain various required information.

[0229] Exemplarily, the configuration file may not be a file in the package file format, and the configuration file may include but is not limited to the following content:

[0230] The configuration file can adopt multiple formats, such as XML, JSON, INI, etc.

[0231] The configuration file can contain information such as the type, model, package size, and electrical parameters of components.

[0232] The configuration file can be grouped and classified as needed to facilitate management and use.

[0233] Usage scenarios of the configuration file:

[0234] For commonly used components, their information can be pre-configured in the file to improve efficiency.

[0235] For special components, the configuration file can be customized as needed to meet specific design requirements.

[0236] When there is no other information source, provide a reliable default solution.

[0237] Advantages of the configuration file:

[0238] High flexibility, can be customized and modified according to needs.

[0239] Strong maintainability, convenient for managing and updating component information.

[0240] Strong portability, the configuration file can be easily shared among different systems and environments.

[0241] Through the above method, the system can utilize the information in the configuration file to automatically determine the type and model of the components, improving the efficiency and flexibility of information acquisition.

[0242] In an optional embodiment of the present invention, the step of determining the auxiliary information of the component based on the type information and generating the target package file of the component through the auxiliary information includes:

[0243] Obtain the assembly layer geometric information of the component through the original package file of the component;

[0244] Construct the assembly layer contour of the component through the assembly layer geometric information;

[0245] Determine the silk screen frame generation strategy for the component through the type information;

[0246] Based on the silk screen frame generation strategy, determine the graphic area of the silk screen layer for the assembly layer contour;

[0247] Generate the preliminary content of the silk screen frame based on the graphic area;

[0248] Eliminate the pad interference area in the preliminary content of the silk screen frame to generate the target silk screen frame information;

[0249] Generate the target package file of the component through the target silk screen frame information.

[0250] 1. Obtain the assembly layer geometric information of the component through the original package file of the component;

[0251] The system reads the PADS package file (.d file) of the resistor component.

[0252] Parse the graphic drawing instructions in the file. For example, the following instructions are found to describe the assembly layer contour of the resistor:

[0253] OPEN 1,2 (The straight line starts from the point (1,2));

[0254] CLOSE 3,2 (The straight line reaches the point (3,2));

[0255] CLOSE 3,4 (Line to point (3, 4));

[0256] CLOSE 1,4 (Line to point (1, 4));

[0257] CLOSE (Close polygon);

[0258] The system extracts the vertex coordinates (1, 2), (3, 2), (3, 4), (1, 4), etc. from these instructions.

[0259] 2. Construct the assembly layer contour of the component through the geometric information of the assembly layer;

[0260] Based on the vertex coordinates and connection relationships obtained above, the system reconstructed the assembly layer contour of the resistor component, which is a rectangle.

[0261] If there are overlapping or adjacent graphics, the system will perform geometric Boolean operations to merge them into a whole.

[0262] Of course, it should be noted that the assembly layer contour being a rectangle is only an example, and its contour can also be any other shape, such as a circle or other polygons. In this regard, the embodiments of the present invention are not limited.

[0263] 3. Determine the silk screen frame generation strategy for the component through the type information;

[0264] Based on the type of the resistor component, the system locates the preset silk screen frame generation strategy.

[0265] This strategy may specify that the silk screen frame needs to be expanded by 0.2 mm outside the assembly layer contour.

[0266] 4. Based on the silk screen frame generation strategy, determine the graphic area of the silk screen layer for the assembly layer contour;

[0267] According to the expansion strategy determined by the silk screen frame generation strategy, the system expands the above - constructed rectangular assembly layer contour outward by 0.2 mm.

[0268] A new graphic area of the silk screen layer is generated, which is still a rectangle but slightly larger in size than the assembly layer.

[0269] 5. Generate the preliminary content of the silk screen frame based on the graphic area;

[0270] The system extracts the boundary information of the silk screen layer graphic area generated above.

[0271] The preliminary content of the silk screen frame is this expanded rectangular border.

[0272] 6. Eliminate the pad interference area in the preliminary content of the silk screen frame to generate the target silk screen frame information;

[0273] The system reads the pad information in the original package file of the resistor component to determine the position and size of the pads.

[0274] Through geometric Boolean operations, subtract the areas that overlap with the pads and a certain range around the pads from the preliminary silk screen frame generated above.

[0275] For example, if the silk screen frame overlaps with the pads or is very close to the pads, the system will remove this part of the silk screen line segments.

[0276] Generate the final target silk screen frame information, which avoids the pad area and ensures that it will not affect soldering.

[0277] 7. Generate the target package file of the component through the target silk screen frame information.

[0278] The system converts the above-generated target silk screen frame information into graphic drawing instructions that can be recognized by PADS software, such as OPEN and CLOSE instructions.

[0279] Write these instructions into the PADS package file (.d file) of the resistor component to update the information of the silk screen layer.

[0280] Finally, generate the target package file of the resistor component containing the correct silk screen frame.

[0281] In the embodiment of the present invention, the geometric information of the assembly layer of the component is obtained through the original package file of the component; the assembly layer contour of the component is constructed through the geometric information of the assembly layer; the silk screen frame generation strategy for the component is determined through the type information; based on the silk screen frame generation strategy, the graphic area of the silk screen layer for the assembly layer contour is determined; the preliminary content of the silk screen frame is generated based on the graphic area; the pad interference area is removed from the preliminary content of the silk screen frame to generate the target silk screen frame information; the target package file of the component is generated through the target silk screen frame information, enabling the system to automatically generate the required silk screen frame auxiliary information according to the information of the assembly layer and pads, and the preset silk screen frame generation strategy, and integrate it into the target package file, thus achieving the following beneficial effects:

[0282] Improve design efficiency:

[0283] Automatically generate the silk screen frame, reducing the time and workload of manual drawing.

[0284] Batch process components, significantly improving the efficiency of large projects.

[0285] Improve design quality:

[0286] Generate a standard silk screen frame based on accurate geometric information and preset strategies.

[0287] Eliminate pad interference and ensure that the silk screen frame meets the manufacturing requirements.

[0288] Reduce human errors:

[0289] Automated processing reduces the risk of errors caused by manual operations.

[0290] Ensure the consistency of the silk screen frame and avoid problems caused by human negligence.

[0291] Enhance customizability:

[0292] The silk screen frame generation strategy can be adjusted according to the component characteristics and design requirements.

[0293] Adapt to different types and models of components and improve the flexibility of the design.

[0294] Optimize the manufacturing process:

[0295] An accurate silk screen frame helps operators quickly identify components.

[0296] Avoid the silk screen marks from affecting the welding quality and improve the reliability of manufacturing.

[0297] Improve the quality of the package file:

[0298] Generate the target package file through the target silk screen frame information, improving the quality and standardization degree of the package file.

[0299] In an optional embodiment of the present invention, the step of determining the auxiliary information of the component based on the type information and generating the target package file of the component through the auxiliary information includes:

[0300] Determine the first processing strategy for the solder mask layer and the stencil layer of the component based on the type information;

[0301] Adopt the first processing strategy to determine the inner shrinkage size or outer expansion size for the solder mask layer;

[0302] Adopt the first processing strategy to determine the stencil area or block size for the stencil layer;

[0303] Generate the target package file of the component through the inner shrinkage size, the outer expansion size, the stencil area and the block size.

[0304] Exemplarily:

[0305] Suppose there is an original package file of an IC component, and the system identifies its type as "QFP".

[0306] 1. Determine the first processing strategy for the solder mask layer and the stencil layer of the component based on the type information;

[0307] Based on the type "QFP" of the IC component, the system finds the preset solder mask and stencil layer processing strategies.

[0308] This strategy may specify:

[0309] The solder mask layer needs to expand 0.1 mm beyond the pads.

[0310] The stencil layer needs to shrink 0.05 mm inside the pads, and for pins with larger pad sizes, splitting is required.

[0311] 2. Determine the shrinkage size or expansion size for the solder mask layer using the first processing strategy;

[0312] The system reads the PADS package file (.d file) of the IC component and parses all pad definition instructions (PAD).

[0313] For each pad, the system applies the solder mask layer strategy: expand 0.1 mm.

[0314] Since it is a simple expansion, the system determines that no shrinkage is required and the expansion size is 0.1 mm.

[0315] Determine the stencil area or split size for the stencil layer using the first processing strategy;

[0316] 3. The system continues to process each pad and applies the stencil layer strategy: shrink 0.05 mm.

[0317] Meanwhile, the system checks the size of the pads. Assume that there are some pins with larger pad sizes in this QFP component.

[0318] For these large pads, the strategy requires splitting. The system calculates the stencil area after splitting.

[0319] For small pads, the system determines that the stencil area is the shape of the pad after shrinking 0.05 mm.

[0320] For large pads, the system determines the split size and the stencil area.

[0321] 4. Generate the target package file of the component through the shrinkage size, the expansion size, the stencil area, and the split size.

[0322] Solder mask layer processing:

[0323] The system finds the definition of each pad in the PADS package file (.d file) according to the determined expansion size above.

[0324] For each pad, the system sets the size parameters of layer 21 (SOLDERMASK_TOP) and layer 28 (SOLDERMASK_BOTTOM) to be 0.1 mm larger than the pad.

[0325] Stencil layer processing:

[0326] For small pads, the system sets the size parameters of layer 23 (PASTEMASK_TOP) and layer 22 (PASTEMASK_BOTTOM) according to the inner shrinkage size determined above, making them 0.05 mm smaller than the pads.

[0327] For large pads, the system uses drawing instructions (such as CLOSE or CIRCLE) to draw the divided stencil area on the stencil layer according to the divided block size and stencil area determined above, or achieves the division by increasing the pad definition.

[0328] The system saves the above settings of the solder mask layer and the stencil layer into the PADS package file (.d file) of the IC component, and finally generates the target package file of the IC component with the correct solder mask layer and stencil layer.

[0329] In the embodiment of the present invention, a first processing strategy for the solder mask layer and the stencil layer of the component is determined based on the type information; the inner shrinkage size or outer expansion size for the solder mask layer is determined using the first processing strategy; the stencil area or divided block size for the stencil layer is determined using the first processing strategy; the target package file of the component is generated through the inner shrinkage size, the outer expansion size, the stencil area, and the divided block size, achieving the following beneficial effects, Beneficial effects:

[0330] Automated processing: Through an automated process, the time and workload of manually editing the solder mask and stencil layers are reduced.

[0331] Improve efficiency: Process components in batches, significantly improving the efficiency of large projects.

[0332] Reduce errors: Automated processing reduces the risk of errors caused by manual operations.

[0333] Customizability: The first processing strategy can be adjusted according to component characteristics and design requirements.

[0334] Optimize manufacturing: Accurate solder mask and stencil layers help improve the reliability and quality of manufacturing.

[0335] In an optional embodiment of the present invention, the step of determining the auxiliary information of the component based on the type information and generating the target package file of the component through the auxiliary information includes:

[0336] Determine the second processing strategy for the measurement annotation of the component based on the type information;

[0337] Execute measurement and geometric calculations according to the second processing strategy to generate initial dimension measurement annotations;

[0338] Obtain the text drawing instruction and determine the first avoidance area based on the text drawing instruction;

[0339] Determine the second avoidance area through the outer border area of the assembly layer and the silk screen layer of the component;

[0340] Perform a translation operation on the annotation content based on the initial dimension measurement annotation; the annotation content after performing the translation operation does not overlap with the first avoidance area and the second avoidance area;

[0341] Generate the target package file of the component through the annotation content after performing the translation operation.

[0342] Suppose I have the original package file of a connector component, and the system identifies its type as "connector".

[0343] 1. Determine the second processing strategy for the measurement annotation of the component based on the type information;

[0344] According to the type of the connector component, the system finds the preset measurement annotation processing strategy, that is, the second processing strategy.

[0345] This strategy may specify that the pin pitch, the total length and width of the device need to be marked.

[0346] 2. Execute measurement and geometric calculations according to the second processing strategy to generate initial dimension measurement annotations; the preliminary dimension measurement annotations refer to the original dimension annotation data calculated and generated by the system during the automatic dimension annotation process according to the type and model information of the component and the geometric information in the package file.

[0347] The system reads the PADS package file (.d file) of the connector component.

[0348] According to the second processing strategy, the system performs the following operations:

[0349] Calculate the distance between adjacent pins to generate the annotation of the pin pitch;

[0350] Calculate the maximum length and width of the device assembly layer to generate the annotations of the total length and width.

[0351] Generate preliminary dimension measurement annotations, including annotation lines, arrows and numerical values.

[0352] 3. Obtain the text drawing instructions and determine the first avoidance area based on the text drawing instructions;

[0353] The system reads all the text drawing instructions in the PADS package file.

[0354] Analyze these instructions to determine the areas occupied by the existing text in the package file.

[0355] These areas are determined as the first avoidance areas to prevent new markings from overlapping with the existing text.

[0356] 4. Determine the second avoidance area through the outer border areas of the assembly layer and the silkscreen layer of the component;

[0357] The system calculates the outer border areas of the assembly layer and the silkscreen layer.

[0358] Select the larger area of the two as the second avoidance area.

[0359] This is to ensure that the markings do not get too close to or exceed the boundaries of the device, which may affect readability.

[0360] In printed circuit board (PCB) design, the assembly layer and the silkscreen layer are two important concepts, and they play different roles in the PCB manufacturing and assembly processes.

[0361] Assembly Layer:

[0362] Definition: The assembly layer is mainly used to represent the physical size and outer contour of the component. It provides the actual size block diagram of the component, which helps in the positioning and inspection of components during the PCB assembly process.

[0363] Usage: Component positioning: The graphics on the assembly layer can help the assembler accurately place the components on the PCB.

[0364] Assembly inspection: After the components are assembled, the assembly layer can be used to check whether the positions and orientations of the components are correct.

[0365] Automated assembly: For automated assembly equipment (such as pick-and-place machines), the data on the assembly layer can be used to guide the precise operation of the equipment.

[0366] Features: The assembly layer usually contains the outer contour of the component, the pin positions, and some important reference marks.

[0367] In some cases, the assembly layer may also contain the nominal values of the components or other relevant information.

[0368] Silkscreen Layer:

[0369] Definition: The silk screen layer is a layer for printing text, symbols, and patterns on the surface of the PCB. It is mainly used to identify components, indicate component directions, and provide other necessary information.

[0370] Usage: Component Identification: The text and symbols on the silk screen layer can help identify each component on the PCB.

[0371] Polarity Indication: For polarized components (such as electrolytic capacitors, diodes), the silk screen layer can indicate their correct installation directions.

[0372] Test Point Identification: The silk screen layer can identify the test points on the PCB, facilitating circuit testing and troubleshooting.

[0373] Company Identification and Version Information: The silk screen layer usually contains the identification and version information of the PCB manufacturer or design company.

[0374] Features: The silk screen layer is usually printed with white or yellow ink to be clearly visible on the PCB surface. The text and symbols on the silk screen layer need to be clear enough for easy reading and identification.

[0375] 5. Perform a translation operation on the marked content based on the initial dimension measurement markings; the marked content after performing the translation operation does not overlap with the first avoidance area and the second avoidance area;

[0376] The system checks the positions of the initial dimension measurement markings generated in the above steps.

[0377] For each marking, the system determines whether it overlaps with the first avoidance area (existing text) or the second avoidance area (device outer border).

[0378] If there is an overlap, the system will adjust the position of the marking according to the preset translation rules.

[0379] The purpose of translation is to move the marking to a blank area, ensuring that the marked content is clearly visible, not blocked, and does not exceed the device boundary.

[0380] For example, if the marking of the pin pitch overlaps with the existing model text, the system may translate the marking slightly up or down.

[0381] The system translates the initially generated dimension marking content to avoid overlapping with the first avoidance area and the second avoidance area. This ensures that the marked content does not block other information and improves the file display effect.

[0382] Suppose we have a package file of a resistor, and the system automatically generates the following initial dimension measurement markings according to the preset marking strategy:

[0383] Marking 1:

[0384] Type: Pin pitch annotation;

[0385] Value: 1.27 mm;

[0386] Position: Directly between two pins,

[0387] Annotation 2:

[0388] Type: Device width annotation;

[0389] Value: 2.0 mm;

[0390] Position: Directly covering the graphic of the device body.

[0391] Annotation 3:

[0392] Type: Device height annotation;

[0393] Value: 0.8 mm;

[0394] Position: Overlapping with a text label in the package file.

[0395] Translation process:

[0396] Identify avoidance areas:

[0397] The system reads the package file and identifies the existing text label area (the first avoidance area).

[0398] The system calculates the outer border areas of the device's assembly layer and silkscreen layer (the second avoidance area).

[0399] Translation annotation:

[0400] Annotation 1: Since it is directly between the pins and does not overlap with any avoidance areas, no translation is required.

[0401] Annotation 2: Since it is directly covering the device body graphic and overlaps with avoidance area 2, the system translates it to the blank area outside the device.

[0402] Annotation 3: Since it overlaps with the text label and overlaps with avoidance area 1, the system translates it to the blank area next to the text label.

[0403] 6. Generate the target package file of the component through the annotation content after performing the translation operation.

[0404] The system converts the size measurement annotation information after translation adjustment into annotation elements that can be recognized by PADS software.

[0405] Add these annotation elements to the PADS package file (.d file) of the connector component.

[0406] Finally, generate a target package file for the connector component with clear and non-overlapping dimension annotations.

[0407] In the embodiment of the present invention, a second processing strategy for measuring and annotating the component is determined based on the type information; measurement and geometric calculations are performed according to the second processing strategy to generate initial dimension measurements; a text drawing instruction is obtained, and a first avoidance area is determined based on the text drawing instruction; a second avoidance area is determined through the outer frame areas of the assembly layer and the silk screen layer of the component; a translation operation is performed on the annotation content based on the initial dimension measurements; the annotation content after performing the translation operation does not overlap with the first avoidance area and the second avoidance area; the target package file of the component is generated through the annotation content after performing the translation operation, achieving the following beneficial effects:

[0408] Automated annotation: Automatically generate dimension annotations, reducing the time and workload of manual annotation.

[0409] Information avoidance: Through an avoidance algorithm, avoid overlapping of annotation content with other information, improving readability.

[0410] Enhanced aesthetics: Avoidance and translation result in a reasonable layout of annotation content, enhancing the aesthetics of the file display effect.

[0411] Improved efficiency: Batch process components, significantly enhancing the efficiency of large projects.

[0412] Error reduction: Automated processing reduces the risk of errors caused by manual annotation.

[0413] Customizability: The measurement and annotation strategy can be adjusted according to component characteristics and design requirements.

[0414] To enable those skilled in the art to better understand the embodiments of the present invention, a complete example is used to illustrate the embodiments of the present invention below.

[0415] (1) Input and parsing of the package file;

[0416] First, the system receives a PADS package file as input. This file contains basic package information of the component, such as pad numbers, positions, sizes, shapes, and necessary information such as device assembly dimensions. After receiving the file, the system starts a parsing program to perform preliminary processing on the file to ensure that the file conforms to the standard format of PADS packages and has the necessary basic package information.

[0417] (2) Obtain component type and model information;

[0418] Once the file format is confirmed to be correct, the next step is to identify the type information, model information, and other relevant information of the specific component to which the encapsulated file belongs.

[0419] Reference Figure 2 , Figure 2 is a flowchart of the steps for determining the type information and model information of a component provided in an embodiment of the present invention; it can be implemented in various ways, including but not limited to:

[0420] File name parsing: Parse component information from the file name based on preset rules. At this time, the file should contain one or more information such as model series codes, classification names, etc.

[0421] Attribute value reading: Directly read one or more target attribute fields inside the encapsulated file. Specifically, the content of the name parameter and other custom parameters (such as "Geometry.Height", etc.) included in the file header of the.d file can be read.

[0422] External query: Use an external database or relational mapping file to match the component data corresponding to the current file.

[0423] User input: Allow the user to manually input or select the correct component information through the interface.

[0424] Default configuration file or parameters: The device information defaultly selected by the system can be input into the system in the form of a configuration file, etc.

[0425] These above methods can be specified by the user when operating the software system of the present invention, or determined in the form of software operation parameters, etc.

[0426] (3) Information processing and writing;

[0427] After obtaining the accurate type information, model information, and other relevant information of the component, the next step is to perform necessary adjustments on this information to ensure that they meet the data requirements of the PADS software and any additional organizational specifications. For example, removing illegal characters, standardizing the string format, etc. The adjusted information will be written into the encapsulated file, and at the same time, it will also be added to the silk screen layer, mechanical layer, or other specified layers in the file according to the requirements.

[0428] 4) Automatically add auxiliary information;

[0429] Subsequently, according to the determined component classification, the system will automatically add various auxiliary information to the encapsulated file.

[0430] Reference Figure 3 , Figure 3 is a flowchart of the steps for determining a method of auxiliary information provided in an embodiment of the present invention;

[0431] a) Solder mask frame generation: Calculate a suitable solder mask outer frame using the geometric information (vertex coordinates, graphic type, and its parameters) in the assembly layer. This process may involve offset processing of the boundaries to adapt to different pin layouts.

[0432] Specifically, the system first reads all graphic drawing instructions in the.d file, including OPEN (line), CLOSE (closed polygon), CIRCLE (circle), etc. These instructions specify the key parameters of the corresponding graphics according to their respective grammars, such as vertex coordinates, center position of the circle, etc. The collected graphic data is used to restore the actual graphics represented by each instruction.

[0433] Subsequently, these graphics are processed through geometric Boolean operations to merge overlapping or adjacent regions into a whole.

[0434] In addition, for the closed regions surrounded by lines and other graphics, they are also regarded as part of the whole graphics, thus constructing the overall geometric contour of the component assembly layer. On this basis, the contour is expanded or shrunk (or may remain unchanged) as a whole to obtain the graphic area of the solder mask layer, and this expansion amount can be adjusted according to specific requirements or configuration strategies.

[0435] Obtain the preliminary content of the solder mask layer by taking the outer border of the graphic area of the solder mask layer. The preliminary solder mask content is processed through geometric Boolean operations to remove the parts interfered by the pads and a certain range of adjacent areas around the pads, obtaining the finally optimized solder mask content. This is done to avoid the solder mask marks affecting the welding quality. Subsequently, use graphic drawing instructions such as OPEN (line) and CIRCLE (circle) to describe the finally optimized solder mask content and store it in the.d file.

[0436] Reference Figure 4 , Figure 4 is the flowchart of the steps of another method for determining auxiliary information provided in the embodiments of the present invention;

[0437] b) Solder Mask / Stencil Layer Processing: Determine the generation strategies for the solder mask and stencil layer based on the pad characteristics and component types. Different strategies can be preset during the system design and programming stage or obtained in the form of importing configuration files. Some strategies may simply copy the pad shape, while others will be applied to the solder mask layer and stencil layer after certain size adjustments and shape transformations. Specifically, the system will first find the part corresponding to each pad definition instruction PAD in the.d file. For each pad, parse various information contained therein, such as: obtain the shape through the shape parameter, obtain the size and position information through the coordinate parameter, and obtain the drilling information through the parameter representing the drilling position. Then, comprehensively judge in combination with the component type to determine the offset amount of the solder mask layer for expansion or contraction, the offset amount of the stencil layer for contraction, and the segmentation strategy. For simple expansion or contraction, the solder mask layer can directly set the size parameters in the PAD for the 21st and 28th layers (corresponding to the top solder mask layer SOLDERMASK_TOP and the bottom solder mask layer SOLDERMASK_BOTTOM respectively), and the stencil layer can set the size parameters for the 23rd and 22nd layers (corresponding to the top paste mask layer PASTEMASK_TOP and the bottom paste mask layer PASTEMASK_BOTTOM respectively); for the stencil layer that needs to be segmented, it is defined by using the drawing instructions CLOSE (closed polygon), CIRCLE (circle) in the stencil layer alone or adding pads using the PAD pad definition instruction. Finally, save the above processing to the.d file.

[0438] Reference Figure 5 , Figure 5 is the flowchart of the steps of another method for determining auxiliary information provided in the embodiment of the present invention;

[0439] c) Automatic Dimension Annotation: The system will also automatically generate a series of important dimension measurement annotations according to the strategies corresponding to the component types, which may but are not limited to covering key indicators such as pin pitch, distance from the pin to the edge, and the outer frame size of the device assembly area. This link requires precise geometric operation support. In addition, the system will use the outer frame areas of the component assembly layer and the silk screen layer that have been calculated in step a), take the larger one as the avoidance area where the measurement annotation values need to be automatically translated outside the frame, and at the same time read each text drawing instruction in the.d file, evaluate the area where there is originally text and avoid it. Perform automatic translation and avoidance of the annotation content and then save the annotation content. The above avoidance and translation can avoid information occlusion and effectively improve the aesthetics and human readability of the file display effect.

[0440] (5) Output Result Inspection and Saving;

[0441] After adding all the auxiliary information, the system will perform a final verification on the entire encapsulated file to ensure that the newly added content does not violate the PADS standard and will not cause conflicts. After successful verification, the updated encapsulated file will be saved. When saving, the storage file name and output path will be automatically generated according to information such as the input file name, component classification, and model. Folders that do not exist will be automatically created. The above operations can avoid file duplication conflicts and facilitate users to search for and manage encapsulated files.

[0442] It should be noted that for the method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the embodiments of the present invention are not limited by the described action sequences, because according to the embodiments of the present invention, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily essential for the embodiments of the present invention.

[0443] Refer to Figure 6 , which shows a structural block diagram of a device for generating an encapsulated file provided in an embodiment of the present invention. Specifically, it may include the following modules:

[0444] The type information determination module 601 is used to determine the type information of the component;

[0445] The target encapsulated file generation module 602 is used to determine the auxiliary information of the component based on the type information and generate the target encapsulated file of the component through the auxiliary information.

[0446] For the device embodiments, since they are basically similar to the method embodiments, the description is relatively simple. For the relevant parts, refer to the partial description of the method embodiments.

[0447] In addition, an embodiment of the present invention also provides an electronic device, as Figure 7 shown, including a processor 701, a communication interface 702, a memory 703, and a communication bus 704. Among them, the processor 701, the communication interface 702, and the memory 703 complete communication with each other through the communication bus 704.

[0448] The memory 703 is used to store a computer program;

[0449] When the processor 701 is used to execute the program stored in the memory 703, it implements the method for generating an encapsulated file described in any one of the above embodiments:

[0450] The communication bus mentioned in the above terminal may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For the sake of convenience in representation, only a thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.

[0451] The communication interface is used for communication between the above terminal and other devices.

[0452] The memory may include a Random Access Memory (RAM), or may also include a non-volatile memory, such as at least one disk memory. Optionally, the memory may also be at least one storage device located far from the aforementioned processor.

[0453] The above-mentioned processor may be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0454] As Figure 8 shown, in another embodiment provided by the present invention, there is also provided a computer-readable storage medium 801. Instructions are stored in the computer-readable storage medium. When it runs on a computer, it causes the computer to execute the method for generating the encapsulated file described in the above embodiment.

[0455] The embodiments of the present invention have been described above in conjunction with the accompanying drawings. However, the present invention is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present invention, those of ordinary skill in the art can also make many forms without departing from the spirit and scope protected by the claims of the present invention, and all of them fall within the protection scope of the present invention.

[0456] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed in the embodiments of the present invention can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0457] Those skilled in the art can clearly understand that for the convenience and conciseness of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0458] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other can be through some interfaces. The indirect couplings or communication connections of devices or units can be electrical, mechanical, or other forms.

[0459] The units described as separate components may or may not be physically separated. The components displayed as units may or may not be physical units, that is, they can be located in one place, or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0460] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit.

[0461] When the above-mentioned functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, ROM, RAM, magnetic disks, or optical discs that can store program codes.

[0462] As described above, the above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A method for generating a packaged file, characterized in that, Including: Determine the type information of the component; Determine the auxiliary information of the component based on the type information, and generate the target package file of the component through the auxiliary information.

2. The method according to claim 1, characterized in that, The step of determining the type information of the component includes: Obtain the original package file of the component; Extract the file name of the original package file; Determine the type information of the component based on the file name.

3. The method according to claim 1, wherein The step of determining the type information of the component includes: Obtain the original package file of the component; Determine the target attribute field of the package file; Determine the type information of the component based on the target attribute field.

4. The method according to claim 1, wherein The step of determining the type information of the component includes: Obtain the configuration file of the component; Determine the type information of the component based on the configuration file.

5. The method according to any one of claims 1 to 4, characterized in that, The step of determining the auxiliary information of the component based on the type information, and generating the target package file of the component through the auxiliary information includes: Obtain the assembly layer geometric information of the component through the original package file of the component; Construct the assembly layer profile of the component through the assembly layer geometric information; Determine the silk screen frame generation strategy for the component through the type information; Based on the silk screen frame generation strategy, determine the graphic area of the silk screen layer for the assembly layer profile; Generate the preliminary content of the silk screen frame based on the graphic area; Eliminate the pad interference area in the preliminary content of the silk screen frame to generate the target silk screen frame information; Generate the target package file of the component through the target silk screen frame information.

6. The method according to any one of claims 1 to 4, characterized in that, The step of determining the auxiliary information of the component based on the type information, and generating the target package file of the component through the auxiliary information includes: Determine the first processing strategy for the solder mask layer and the stencil layer of the component based on the type information; Adopt the first processing strategy to determine the inner shrinkage size or outer expansion size for the solder mask layer; Adopt the first processing strategy to determine the stencil area or block size for the stencil layer; Generate the target package file of the component through the inner shrinkage size, the outer expansion size, the stencil area and the block size.

7. The method according to any one of claims 1-4, characterized in that The step of determining the auxiliary information of the component based on the type information, and generating the target package file of the component through the auxiliary information includes: Determine the second processing strategy for the measurement annotation of the component based on the type information; Execute measurement and geometric calculation according to the second processing strategy to generate the initial size measurement annotation; Obtain the text drawing instruction, and determine the first avoidance area based on the text drawing instruction; Determine the second avoidance area through the outer border area of the assembly layer and the silk screen layer of the component; Perform a translation operation on the annotation content based on the initial size measurement annotation; the annotation content after performing the translation operation does not overlap with the first avoidance area and the second avoidance area; Generate the target package file of the component through the annotation content after performing the translation operation.

8. An apparatus for generating a packaged file, characterized in that, Including: [[ID=3⑤]]A type information determination module for determining the type information of the component; A target package file generation module is configured to determine auxiliary information of the component based on the type information, and generate a target package file of the component through the auxiliary information.

9. An electronic device, characterized in that, It includes a processor, a communication interface, a memory, and a communication bus. Among them, the processor, the communication interface, and the memory complete communication with each other through the communication bus; The memory is used to store computer programs; When the processor is configured to execute the programs stored on the memory, it implements the method according to any one of claims 1-7.

10. A computer-readable storage medium, on which instructions are stored. When executed by one or more processors, the instructions cause the processors to execute the method according to any one of claims 1-7.

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