Power supply architecture, electronic equipment, management method, device, medium and program product

Abstract

The present application discloses a power supply architecture, electronic equipment, management method, device, medium and program product, which relate to the field of power supply technology. The power supply module and the supercapacitor module are both electrically connected to the computing node through a bus, so that the supercapacitor module is independent of the power supply module and the computing node, avoiding the defect of increasing the capacitance at the computing node end to occupy space, and can also achieve fault isolation between the computing nodes; polling the output current of the power supply module, determining the operation mode, and then dynamically adjusting the working state of each part, so that the supercapacitor module discharges and bears dynamic current when the computing node is highly loaded, reducing the pressure of the power supply module, and charging and storing energy when the load is low. It is possible to regulate current fluctuations from the source without modifying the power distribution infrastructure, solving the technical problems of the lack of fault isolation of capacitors and the impact of dynamic current on the power grid in the related technology, and achieving the technical effects of stabilizing the distribution of bus current, reducing the impact of the power grid, isolating and optimizing the utilization of computing node space.

Description

Technical Field

[0001] The present application relates to the field of power supply technology, and in particular to a power supply architecture, electronic equipment, management method, device, medium and program product. Background Art

[0002] High-power rack-mount servers are high-performance computing solutions designed to support large-scale artificial intelligence computing tasks. Their core architecture integrates multiple high-power computing nodes to meet the demanding computing requirements of deep learning training and inference. However, during operation, the simultaneous operation of multiple high-performance computing nodes in these servers generates enormous dynamic currents, which can severely impact the power grid and seriously threaten the stability of the power supply system.

[0003] To meet dynamic current demands and mitigate grid shocks, two main solutions are currently in use: one is to add capacitors to the power rack or compute node end of the entire cabinet to absorb dynamic current through passive energy storage; the other is to deploy active power filters at the data center's power distribution end to actively compensate for grid fluctuations. Regarding the first solution: If capacitors are integrated into the power rack, there is a lack of fault isolation mechanism, and short-circuit faults can cause the power supply of the entire cabinet to be paralyzed; if capacitors are added to the compute node end, it will seriously squeeze the hardware layout space, and the surge current generated by the charging and discharging of capacitors during hot plugging can easily damage electronic devices. Regarding the second solution: The power distribution infrastructure needs to be modified and cannot be adapted to old or leased data centers. Moreover, this solution is a passive compensation strategy on the grid side and cannot eliminate the dynamic current generation mechanism at the root, so the optimization space is limited. Summary of the Invention

[0004] The present application provides a power supply architecture, electronic equipment, management method, device, medium and program product, which at least solves the technical problems of lack of fault isolation of capacitors and impact of dynamic current on the power grid in related technologies, and achieves the technical effects of stabilizing bus current distribution, reducing power grid impact, isolating and optimizing the utilization of computing node space.

[0005] The present application provides a power supply architecture, including: a power supply module, a supercapacitor module, a bus and a computing node; the supercapacitor module includes multiple parallel capacitor strings, and the capacitor string group includes multiple series capacitors; the bus electrically connects the power supply module, the supercapacitor module and the computing node.

[0006] The present application provides an electronic device, comprising the above-mentioned power supply architecture.

[0007] The present application provides a current management method, which is applied to the above-mentioned power supply architecture. The current management method includes: polling the output current of the power supply module, determining the current operating mode of the computing node based on the output current and a preset current range; and dynamically adjusting the working status of the power supply module and the supercapacitor module according to the current operating mode to adjust the distribution status of the bus current.

[0008] The present application also provides a current management device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned current management methods when executing the computer program.

[0009] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned current management methods are implemented.

[0010] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned current management methods when executed by a processor.

[0011] Through this application, since the power supply module and the supercapacitor module are both electrically connected to the computing node through the bus, the supercapacitor module is independent of the power supply module and the computing node, avoiding the defect of adding capacitors at the computing node end to occupy space, and can also achieve fault isolation between the computing nodes; polling the output current of the power supply module, determining the operating mode, and then dynamically adjusting the working status of each part, so that the supercapacitor module discharges and bears dynamic current when the computing node is highly loaded, reducing the pressure on the power supply module, and charges and stores energy when the load is low. There is no need to modify the distribution infrastructure to regulate current fluctuations from the source, solving the technical problems of lack of fault isolation of capacitors and impact of dynamic current on the power grid in related technologies, and achieving the technical effects of stabilizing the distribution of bus current, reducing power grid impact, isolating and optimizing the utilization of computing node space. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0013] Figure 1 An overall schematic diagram of an electronic device provided in an embodiment of the present application;

[0014] Figure 2 A schematic diagram of a supercapacitor module during discharge provided in an embodiment of the present application;

[0015] Figure 3A schematic diagram of a supercapacitor module during charging provided in an embodiment of the present application;

[0016] Figure 4 This is a block diagram of the architecture of a supercapacitor module provided in an embodiment of the present application;

[0017] Figure 5 A flow chart of a current management method provided in an embodiment of the present application;

[0018] Figure 6 A schematic diagram of a charge and discharge circuit provided in an embodiment of the present application;

[0019] Figure 7 A specific flow chart of a current management method provided in an embodiment of the present application;

[0020] Figure 8 A schematic diagram of a supercapacitor module provided in an embodiment of the present application;

[0021] Figure 9 A schematic diagram of a current management device provided in an embodiment of the present application;

[0022] Figure 10 A schematic diagram of a computer-readable storage medium provided in an embodiment of the present application. DETAILED DESCRIPTION

[0023] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0024] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0025] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0026] like Figure 1The present application provides a power supply architecture, including: a power supply module 11, a supercapacitor module 12, a bus and a computing node 13; the supercapacitor module 12 includes multiple parallel capacitor strings, and the capacitor string group includes multiple series capacitors; the bus electrically connects the power supply module 11, the supercapacitor module 12 and the computing node 13.

[0027] Power supply module 11, serving as the primary power supply unit, connects to the external power grid or power supply infrastructure. It converts input power (e.g., via AC-DC and DC-DC converters) to a stable voltage suitable for system operation (e.g., a 54V bus voltage) and provides basic power support to compute nodes 13 via the bus. Its function, in conjunction with supercapacitor module 12, is to provide flexible power supply to dynamic loads, avoiding grid shocks caused by solely shouldering instantaneous high current demands. The bus voltage can be, but is not limited to, 54V.

[0028] The supercapacitor module 12 adopts a multi-stage series-parallel modular architecture. First, multiple lithium-ion capacitors are connected in series to form a capacitor string group to increase the output voltage level of a single capacitor string group to meet the rated voltage requirements of the busbar; then multiple capacitor strings are connected in parallel to form a complete supercapacitor module 12, which significantly expands the energy storage capacity while ensuring voltage. The supercapacitor module 12 can be connected in parallel to the busbar through an independent charging and discharging circuit and has hot-swappable and redundant design features. That is, when a single capacitor string group or module fails, it can be replaced independently without affecting the overall operation of the system, and supports maintenance during equipment operation. Its function is to act as a dynamic energy storage buffer unit, quickly releasing electrical energy (discharge mode) when the computing node 13 is running at high load, sharing the instantaneous current pressure of the power module 11; absorbing excess electrical energy from the power module 11 at low load (charging mode) to maintain a stable balance of busbar current.

[0029] Computing node 13, as the main power consumer, typically integrates high-power computing devices (such as a GPU (Graphics Processing Unit) and a CPU (Central Processing Unit)). Its operation generates periodically fluctuating dynamic current demands. Electrically connected to power module 11 and supercapacitor module 12 via a busbar, it dynamically draws power based on its load. When computing node 13 is operating at high load, it is powered by both power module 11 and supercapacitor module 12, with the supercapacitor module 12 absorbing some of the dynamic current to reduce the instantaneous output pressure of power module 11. Under low load, power module 11 primarily provides power, while also charging and storing energy for supercapacitor module 12.

[0030] The three form a collaborative power supply network through the busbar, with the power supply module 11 as the main supply and the supercapacitor module 12 as the dynamic compensation. The series-parallel architecture of the supercapacitor module 12 takes into account the voltage level, capacity requirements and hardware reliability, and the busbar connection method realizes the flexible allocation of the power supply path. Finally, through the dynamic coordination of the power supply module 11 and the supercapacitor module 12, the current fluctuation problem during the operation of the computing node 13 is effectively solved, ensuring the stable operation of the system and reducing the impact on the power grid.

[0031] This power supply architecture realizes a stable power supply system with dynamic buffering capability by connecting the power module 11, the supercapacitor module 12 and the computing node 13 to the busbar. The supercapacitor module 12 is composed of multiple capacitor strings connected in parallel, and each capacitor string includes multiple capacitors connected in series, thereby having both high voltage tolerance and large capacity characteristics. In this architecture, the busbar serves as the core electrical pathway, forming an electrical connection with the power module 11, the supercapacitor module 12 and the computing node 13, so that the power module 11 can directly supply power to the computing node 13, while the supercapacitor module 12 can also participate in the energy flow, providing energy buffering or absorbing instantaneous power when the load fluctuates or the output of the power module 11 is unstable, realizing short-term storage and release of electric energy, and effectively improving the stability and reliability of the power supply system.

[0032] like Figure 1 In an exemplary embodiment, it also includes: a charging and discharging circuit arranged between the supercapacitor module 12 and the bus, configured to switch the current transmission path between the supercapacitor module 12 and the bus according to the output current of the power supply module 11.

[0033] Specifically, the power supply architecture further includes a charge-discharge circuit disposed between the supercapacitor module 12 and the busbar. The charge-discharge circuit is configured to switch the current transmission path between the supercapacitor module 12 and the busbar according to the output current of the power module 11. When the output current of the power module 11 reaches a high load level, the charge-discharge circuit allows the supercapacitor module 12 to release current to the busbar to assist the power module 11 in supplying power to the computing node 13 (e.g., Figure 2 When the output current of the power module 11 is in a low load state, it switches to the charging path, so that the power module 11 supplements the energy of the supercapacitor module 12 through the busbar through the charge and discharge circuit (such as Figure 3 ), thereby realizing dynamic distribution of bus current and bidirectional energy regulation.

[0034] Specifically, in this power supply architecture, the power supply module 11 can receive AC input power from the outside, convert the AC power into stable DC power through the internal integrated AC-DC conversion module (AC-DC), and then further adjust the voltage level through the subsequent DC-DC conversion module (DC-DC), and finally output a 54V DC voltage to the bus to provide the main power supply capacity for the entire system; at the same time, the supercapacitor module 12 serves as an energy buffer unit, which contains a number of capacitor arrays with fast charging and discharging capabilities. The positive and negative poles of the capacitor are connected to the bus through the laid charging and discharging circuit. The charging and discharging circuit constitutes the current path between the supercapacitor module 12 and the bus, which can achieve bidirectional energy regulation when the system load changes or the main power current fluctuates (such as Figure 1 ): When the load suddenly increases or the power supply is insufficient, the stored energy current is quickly released and injected into the bus, effectively improving the power supply stability and dynamic response capability of the system, ensuring that the computing node 13 continues to obtain stable and reliable power supply (such as Figure 2 When the load is light or the power supply is sufficient, the super capacitor module 12 absorbs part of the electrical energy through the circuit to charge and store energy (such as Figure 3 ).

[0035] like Figure 4 , an independent charging and discharging circuit can be set up for each capacitor string group, and the positive and negative poles of the charging and discharging circuit are respectively connected to the positive and negative poles of the corresponding capacitor string group, thereby forming multiple independent and controllable energy paths; during the operation of the system, by detecting the output current of the power supply module 11, it is possible to judge in real time whether the current power supply is insufficient, and calculate the required compensation current accordingly; according to the size of the compensation current, one or more capacitor string groups and their corresponding charging and discharging circuits can be selected to enable, so that the selected capacitor string groups participate in the bus power supply process, and inject the required current into the bus by parallel discharge to assist the power supply module 11 to meet the load requirements of the computing node 13; this structure not only improves the adjustment accuracy and response speed of the supercapacitor module 12, but also can realize strategic group scheduling according to factors such as the health status and remaining power of the capacitor string group, further enhancing the energy management flexibility and power supply security of the system.

[0036] like Figure 5, the voltage across the busbar is Vbasbar, and the voltage across the supercapacitor module 12 is Vcap. In an exemplary embodiment, the charge and discharge circuit includes a first capacitor C1, a second capacitor C2, a first inductor L1, a first switch tube Q1, a second switch tube Q2, a first diode D1, and a second diode D2; the first end of the first capacitor C1 is respectively connected to the positive electrode of the busbar and the first end of the first inductor L1, the second end of the first inductor L1 is respectively connected to the first end of the first switch tube Q1, the anode of the first diode D1, the second end of the second switch tube Q2, and the cathode of the second diode D2, the second end of the first switch tube Q1 is respectively connected to the cathode of the first diode D1, the first end of the second capacitor C2, and the positive electrode of the supercapacitor module 12, and the second end of the first capacitor C1 is respectively connected to the second end of the second capacitor C2, the first end of the second switch tube Q2, the anode of the second diode D2, the negative electrode of the busbar, and the negative electrode of the supercapacitor module 12. An energy conversion path based on inductor-capacitor coupling and dual-switch bidirectional control is constructed to provide a current path basis for the charging and discharging of the supercapacitor module 12. It has good energy regulation capability and topological flexibility and is suitable for bidirectional energy transmission between the busbar and the supercapacitor.

[0037] like Figure 6 As shown, an embodiment of the present application provides a current management method, which is applied to the above power supply architecture. The current management method includes:

[0038] S11: Polling the output current of the power module, and determining the current operation mode of the computing node according to the output current and a preset current range.

[0039] Specifically, by real-time monitoring of the output current of the power module and comparing it with a preset current range, dynamic identification and classification of the computing node operation mode can be achieved.

[0040] First, current sensors (such as Hall sensors or shunt resistors) are deployed in the bus circuit to collect the power module output current in real time, generating a high-frequency sampled data stream (the sampling frequency must cover the fluctuation period of the compute node's dynamic current, typically in the millisecond range). Current characteristic ranges for different operating modes are pre-calibrated. For example, the current range I1 (e.g., 0-50A) for low-load mode corresponds to the compute node's standby or light-load state (e.g., GPU memory preheating); the current range I2 (e.g., 50-150A) for medium-load mode corresponds to routine computing tasks (e.g., image classification inference); and the current range I3 (e.g., >150A) for peak-load mode corresponds to high-intensity computing (e.g., neural network training). These threshold ranges are calibrated based on the compute node's hardware specifications (e.g., GPU power consumption curves) and measured current data from typical application scenarios. These thresholds are dynamically adjusted using an adaptive algorithm (e.g., optimizing threshold boundaries based on historical operating data). The real-time current values ​​are then mapped to a pre-set threshold system, and pattern recognition is achieved through multi-dimensional feature matching. For example, if the current value remains stable in the I1 range for t1, it is determined to be in low-load mode; if the current jumps from I2 to I3 within t2 and the fluctuation amplitude is greater than ΔI (such as 30A), it is determined to be in peak load mode; the current change rate dI / dt is calculated through the sliding window algorithm, and the current trend of the next n sampling points is predicted by combining Kalman filtering to predict the mode switching critical point in advance (for example, when dI / dt>threshold and I(t+n)∈I3, the peak response strategy is triggered in advance).

[0041] Through closed-loop monitoring, comparison, and classification, continuous current data is converted into discrete operating mode labels, providing a basis for subsequent control strategy decisions. For example, when peak load mode is identified, the supercapacitor module's rapid discharge response is immediately activated, ensuring that current sharing is completed in a short period of time, effectively smoothing bus voltage fluctuations and meeting the uninterrupted operation requirements of data centers.

[0042] S12: According to the current operation mode, dynamically adjust the working status of the power module and the supercapacitor module to adjust the distribution status of the bus current.

[0043] Specifically, based on the determined operating mode of the computing node, the control strategy of the power module and the supercapacitor module is determined, and the dynamic redistribution of the bus current is achieved through bidirectional energy flow regulation. Its logic is a control architecture of mode drive-strategy matching-closed-loop regulation.

[0044] When it is determined that the computing node is in low load mode (such as the current is in the preset low threshold range), the control strategy prioritizes activating the constant voltage charging mode of the power module, and transmits a stable current to the supercapacitor module through the bus, so that the supercapacitor module enters the energy storage state. At this time, the bus current is mainly provided by the power module and the reserved capacity margin ensures that the supercapacitor module reserves energy for subsequent high-load scenarios; if it is identified as a medium load mode (the current is in the middle threshold range), the power module main supply + supercapacitor module floating compensation mechanism can be started. The power module bears the first preset proportion of steady-state current, and the supercapacitor The module dynamically releases or absorbs tiny currents according to the amplitude of current fluctuations, forming a collaborative power supply mode of baseload power supply + dynamic buffering; when a peak load mode is detected (the current exceeds the high threshold), the control strategy immediately triggers the supercapacitor module's rapid discharge response, providing discharge current, and forming a parallel power supply architecture with the power module to jointly bear the instantaneous high current demand of the computing node (the current distribution ratio between the power module and the supercapacitor module is dynamically adjusted according to the real-time load rate), thereby limiting the output current peak of the power module to within a preset proportion of the rated continuous current, avoiding voltage drops due to overload.

[0045] In an exemplary embodiment, the current power usage status of the computing node is determined based on the output current and the preset current range, including: judging whether the output current is less than the maximum value of the preset current range; if the output current is greater than or equal to the maximum value, determining that the current operating mode of the computing node is the dynamic mode, and the power module outputs dynamic current in the dynamic mode.

[0046] Specifically, the power supply architecture also includes a charging and discharging circuit arranged between the supercapacitor module and the bus, which dynamically adjusts the working status of the power module and the supercapacitor module according to the current operating mode to adjust the distribution status of the bus current, including: in the dynamic mode, controlling the charging and discharging circuit to operate in the discharge mode, so that the supercapacitor module outputs the discharge current to the bus through the charging and discharging circuit; the bus current includes the output current of the power module and the discharge current output by the supercapacitor module.

[0047] Specifically, based on the compute node's rated power and typical operating conditions, a maximum value within a preset current range (e.g., 150% of the rated current) is set. This threshold takes into account both hardware safety margins (avoiding long-term overload) and dynamic load characteristics (allowing short-term peak current). For example, when the compute node's rated current is 100A, 150A is set as the dynamic mode trigger threshold to reserve buffer space for sudden high power consumption in devices such as GPUs. The real-time monitoring module continuously collects the output current of the power module and compares it with the threshold in real time. If the output current of the power module is ≥150A, it indicates that the compute node may be in a high-load operating scenario (such as deep learning model training or large-scale data parallel computing). At this time, the dynamic current demand increases significantly, triggering the dynamic mode decision logic.

[0048] In dynamic mode, the power module's dynamic current output characteristics are activated (e.g., relaxing the instantaneous current output limit), while the supercapacitor module is simultaneously awakened and put into a discharge state. The two are connected in parallel via the busbar to power the compute node. The power module provides a base constant current (e.g., a 100A rated current), while the supercapacitor module dynamically compensates for any excess current (e.g., a 50A peak current), thereby keeping the power module's actual output current within a safe range. This prevents sudden output voltage drops or grid-side current surges caused by a single power module carrying the entire dynamic current.

[0049] This judgment mechanism achieves rapid identification of the high-dynamic load status of computing nodes through a single threshold comparison + mode trigger design, providing an immediate decision-making basis for the subsequent coordinated discharge control of supercapacitor modules. While ensuring hardware safety, it effectively smoothes bus current fluctuations and forms a closed-loop control link of monitoring-judgment-response.

[0050] In an exemplary embodiment, before controlling the charge and discharge circuit to operate in the discharge mode, the process further includes: obtaining the capacitor voltage of the supercapacitor module and determining whether the capacitor voltage is greater than a minimum voltage value; if the capacitor voltage is greater than the minimum voltage value, entering the step of controlling the charge and discharge circuit to operate in the discharge mode until the capacitor voltage is less than or equal to the minimum voltage value or the output current of the power module is less than the maximum value.

[0051] Specifically, by establishing a safe boundary and exit mechanism for supercapacitor module discharge, the energy storage unit is ensured to participate in dynamic current regulation efficiently and reliably. First, a voltage sensor deployed at the supercapacitor module end collects the capacitor voltage in real time. This voltage value directly reflects the energy storage status. The preset minimum voltage value (such as 30% of the rated voltage) is a critical threshold determined based on the capacitor discharge characteristics and system safety requirements; below this value, the internal resistance of the capacitor increases sharply, causing a sharp drop in discharge efficiency and possibly triggering the risk of voltage collapse (such as the bus voltage dropping below 48V, affecting the stability of the computing node).

[0052] When the capacitor voltage is detected to be greater than the minimum voltage, the system determines that effective discharge conditions have been met, triggering the switch in the charge-discharge circuit to open the discharge loop, allowing the supercapacitor module to release electrical energy in a controlled manner (e.g., constant current discharge mode). During the discharge process, dual-condition monitoring is continuously performed. First, when the capacitor voltage drops to the minimum voltage, the discharge loop is immediately disconnected to prevent excessive discharge from damaging the capacitor lifespan. Second, if the power module output current falls below the maximum value (e.g., the 150A threshold) due to a decrease in the computing node load, indicating that the dynamic current demand has subsided, discharge is terminated early to preserve energy reserve to ensure it can cope with the next load peak.

[0053] This embodiment ensures that the supercapacitor module participates in current regulation within the effective energy storage range, and avoids frequent charge and discharge cycles by predicting load changes in advance. While improving the system's dynamic response capability, it also extends the service life of the supercapacitor module and achieves a balanced optimization of energy storage efficiency and hardware reliability.

[0054] In an exemplary embodiment, the current power usage state of a computing node is determined based on the output current and a preset current range, including: determining whether the output current is greater than the minimum value of the preset current range; if the output current is less than or equal to the minimum value, determining that the current operating mode of the computing node is light load mode. The power supply architecture also includes a charge-discharge circuit disposed between the supercapacitor module and the bus, which dynamically adjusts the operating state of the power module and the supercapacitor module based on the current operating mode to regulate the distribution state of the bus current, including: in light load mode, controlling the charge-discharge circuit to operate in charging mode, so that the power module supplies power to the computing node via the bus and charges the supercapacitor module via the bus and the charge-discharge circuit.

[0055] Specifically, light-load conditions are identified through current thresholds, and an intelligent charging control loop is constructed to dynamically optimize energy distribution. First, the minimum value of a preset current range (e.g., 50% of the rated current) is calibrated based on the compute node's basic power consumption characteristics (e.g., GPU standby current). When the power module output current is monitored in real time and is ≤ this threshold (e.g., 50A), the compute node is determined to be in light-load mode (e.g., during a model inference interval), where dynamic current demand is extremely low. After the light-load mode is triggered, the control logic immediately switches the charge and discharge circuit to the charging mode. That is, the bus voltage (such as 54V) is stepped down to the safe charging voltage of the supercapacitor module (such as 48V), and the constant current-constant voltage charging algorithm is activated at the same time. Initially, energy is stored rapidly at the maximum charging current (constant current stage, the power is 0%-80%). When the capacitor voltage approaches the rated value, it automatically switches to the constant voltage mode (constant voltage stage, such as 48V voltage limit). The charging current is dynamically adjusted through the adaptive PID (Proportional-Integral-Derivative) controller to ensure that the capacitor is fully charged within the safe voltage range (≤50V).

[0056] In this embodiment, the power module performs dual power supply tasks: on the one hand, it provides a stable base current for the computing nodes, and on the other hand, it efficiently converts the remaining electrical energy into capacitor energy storage. By strategically storing energy during light-load periods, the pre-charged energy is released during subsequent peak loads, effectively smoothing bus current fluctuations. The entire control loop establishes a closed-loop energy scheduling mechanism for light-load energy storage and peak energy release through current threshold triggering, multi-mode charging management (supporting hot-swappable online maintenance), and bidirectional energy flow. Without increasing additional hardware costs, it significantly improves the system's adaptability to dynamic loads and realizes intelligent spatiotemporal redistribution of power resources.

[0057] In an exemplary embodiment, before controlling the charge and discharge circuit to operate in the charging mode, the process further includes: obtaining the capacitor voltage of the supercapacitor module and determining whether the capacitor voltage is less than the maximum voltage value; if it is less than the maximum voltage value, entering the step of controlling the charge and discharge circuit to operate in the charging mode until the capacitor voltage is greater than or equal to the maximum voltage value or the output current of the power module is greater than the minimum value.

[0058] Specifically, a safe access mechanism and dynamic termination strategy for charging the supercapacitor module are set to achieve efficient management of the energy storage unit and reasonable distribution of electrical energy. First, the capacitor voltage of the supercapacitor module is obtained in real time and compared with the preset maximum voltage value. The maximum voltage value is determined by the rated working voltage and safety margin of the supercapacitor to ensure that the capacitor does not exceed its withstand voltage limit during the charging process, thereby avoiding performance degradation or safety risks caused by overcharging. When it is detected that the capacitor voltage is less than the maximum voltage value, it indicates that the supercapacitor module still has energy storage space, and the charge and discharge circuit is then controlled to enter the charging mode, so that the power supply module can provide basic power supply to the computing node while transmitting electrical energy to the supercapacitor module through the bus.

[0059] During the charging process, two key conditions are continuously monitored. The first is whether the capacitor voltage reaches or exceeds the maximum voltage value. If it does, it means that the supercapacitor module is fully charged and charging needs to be terminated immediately to protect the capacitor life. The second is whether the output current of the power module is greater than the preset minimum value. This minimum value corresponds to the basic current requirement when the computing node is running under light load. If the output current exceeds this value, it means that the computing node load may increase and the dynamic current demand increases. At this time, it is necessary to exit the charging mode in advance so that the supercapacitor module is ready to enter the discharge state at any time to cope with potential current fluctuations.

[0060] In this embodiment, this dual-condition monitoring mechanism ensures that the supercapacitor module can safely and effectively store energy during light-load periods, and can also respond quickly when the load state changes, avoiding the problem of the energy storage unit being unable to participate in dynamic current regulation in a timely manner due to continuous charging. Therefore, while ensuring hardware safety, it achieves energy flow optimization between the power module and the supercapacitor module, ensures that the bus current distribution can be flexibly adjusted according to the actual load requirements of the computing node, and improves the stability and responsiveness of the entire power supply system.

[0061] In an exemplary embodiment, the power supply architecture also includes a charging and discharging circuit arranged between the supercapacitor module and the bus, and the current management method also includes: when the supercapacitor module is in a static state, controlling the charging and discharging circuit to adjust the capacitor voltage of the supercapacitor module from a normal voltage to a maximum voltage, and recording the adjustment time; wherein the static state is a state where no charging or discharging is performed; and calculating the current capacity of the supercapacitor module based on the normal voltage, the maximum voltage and the adjustment time.

[0062] Specifically, a real-time capacity measurement mechanism for the supercapacitor module is constructed through active voltage regulation and time parameter collection. When the supercapacitor module is in a static state (i.e., not participating in charging and discharging operations and with a stable charge distribution), the charge and discharge circuit is controlled to enter a special test mode, gradually increasing the capacitor voltage from the current stable normal voltage to the maximum voltage within a safe range. This process ensures the controllability and linearity of the voltage change through a constant current source or constant power control. During the adjustment process, the adjustment time required for the voltage to rise from the normal voltage to the maximum voltage is recorded. This time parameter directly reflects the energy storage capacity of the supercapacitor module within a specific voltage range. By substituting the real-time collected normal voltage, maximum voltage, and adjustment time into the preset algorithm, the current capacity of the supercapacitor module can be dynamically calculated.

[0063] This embodiment achieves non-intrusive online measurement of the actual capacity of energy storage units by actively creating voltage variation conditions and capturing process parameters. This avoids the disruption to system operation caused by traditional offline testing and provides a key basis for adaptive adjustment of subsequent charge and discharge control strategies. For example, when capacity decay exceeding a threshold is detected, the system can automatically switch to a redundant module or adjust the upper limit of charge and discharge current, ensuring that the supercapacitor module always participates in bus current regulation in a reliable state, thereby improving the stability and fault tolerance of the entire power supply system.

[0064] In an exemplary embodiment, the current capacity of the supercapacitor module is calculated according to the normal voltage, the maximum voltage and the adjustment time, including: Calculate the current capacity of the supercapacitor module; where: is the current capacity, Pin is the input power of the supercapacitor module, T is the adjustment time, is the highest voltage, It is normal voltage.

[0065] Specifically, the capacity calculation model of the supercapacitor module is constructed based on the law of conservation of energy, and the real-time capacity evaluation is achieved through the coupled calculation of the controllable voltage regulation process and the power time parameter. When the supercapacitor module is in a static state, the charge and discharge circuit is controlled to regulate its voltage with a constant input power Pin, so that the capacitor voltage changes from a stable normal voltage to a high voltage. Gradually increase to the highest voltage within the safe range , and accurately record the adjustment time T of this process. The current capacity of the supercapacitor module can be calculated based on the above formula.

[0066] It can be seen that this embodiment realizes the quantitative evaluation of the actual energy storage capacity of the supercapacitor module by converting the voltage variation amplitude, input power and adjustment time into a mathematical expression of capacitance. This online measurement mechanism does not need to interrupt system operation or rely on additional detection equipment. It can capture the dynamic changes of capacitor capacitance (such as capacity decay caused by aging) in real time, providing key parameter support for subsequent charge and discharge control strategies. For example, when the measured capacity is lower than the design threshold, the discharge current upper limit can be automatically adjusted to avoid overuse, or the redundant module can be triggered to be put into operation, ensuring that the supercapacitor module always maintains reliable energy storage performance in dynamic current regulation, thereby improving the stability and adaptability of the entire power supply system.

[0067] In an exemplary embodiment, after calculating the current capacity of the supercapacitor module based on the normal voltage, the maximum voltage and the adjustment time, it also includes: determining the life of the supercapacitor module based on the deviation between the current capacity and the rated capacity; if the life of the supercapacitor module is less than a preset life threshold, issuing a life warning.

[0068] Specifically, the life evaluation mechanism of the supercapacitor module is constructed by capacity attenuation, and a quantitative correlation is established between the physical parameter changes and functional reliability. Then compare it with the rated capacity of the supercapacitor module when it leaves the factory. Compare and use the deviation formula (such as decay rate = ) quantifies the degree of capacity degradation. When the degradation rate reaches or exceeds 70% (i.e., current capacity ≤ 30% of rated capacity), the module is considered to have reached the end of its life. It is important to understand that this threshold is set based on the supercapacitor aging characteristic curve. At this point, the capacitor's internal resistance increases significantly, and the charge and discharge efficiency drops sharply, making it unable to meet the energy storage and responsiveness required for dynamic current control.

[0069] It's important to understand that the underlying mechanism of lifespan assessment logic is that supercapacitor capacity decay is a comprehensive reflection of aging processes, including reduced activity of the internal electrode material and decreased electrolyte ion mobility. When capacity decay reaches 30% of its rated value, the energy it can actually release is no longer sufficient to support the dynamic current compensation requirements of the compute node's peak load (e.g., insufficient depth of discharge causing excessive bus voltage fluctuations). Continued operation could also trigger cascading failures such as voltage sags. Therefore, a preventive maintenance mechanism is established by real-time monitoring of capacity deviations. When capacity decay exceeds a threshold, a redundancy strategy (such as switching to a backup module) or a replacement warning is issued to prevent power supply stability degradation caused by supercapacitor module failure. This approach, combining physical parameter measurement with functional reliability assessment, enables dynamic prediction of the supercapacitor module's lifespan, providing a critical guarantee for the long-term stable operation of electronic equipment and ensuring that the energy storage unit remains within its effective operating range during dynamic current regulation.

[0070] In an exemplary embodiment, during the static capacity test of the supercapacitor module, if the adjustment time exceeds the preset maximum allowable time (such as 100s), it is determined that the supercapacitor module has capacity attenuation or poor internal contact, and the redundant module switching is automatically triggered and the fault log is recorded.

[0071] In this embodiment, a diagnostic mechanism for the health of a supercapacitor module is established by quantifying the correlation between adjustment time and the physical properties of the capacitor. When the supercapacitor module is in a static state (not involved in charging or discharging), its voltage is adjusted (from normal voltage to maximum voltage) at a constant power level via the charge-discharge circuit. The theoretical adjustment time for this process is determined by the capacitor capacity, the voltage variation, and the input power. The preset maximum allowable time (e.g., 100s) is based on the module's rated capacity and the theoretical time under ideal operating conditions, reflecting the maximum time it takes for the module to complete voltage regulation under normal conditions.

[0072] If the actual regulation time exceeds this threshold, it indicates that the module's actual energy storage capacity or energy transmission efficiency has significantly decreased. The internal reasons for this are twofold: First, it may be capacity decay. When the internal capacitor of the module ages, resulting in a decrease in the active material of the plate or a decrease in the ion migration ability of the electrolyte, the actual capacitance is lower than the rated value. According to the formula, the time required to complete the same voltage regulation will be proportionally extended (for example, when the capacity decays by 50%, the time is extended to 2 times); Second, it may be poor internal contact. If the welding points of the capacitor string are loose, the conductive connectors are oxidized, or the internal circuit contact resistance increases, the equivalent internal resistance of the charge and discharge circuit will increase significantly. At this time, even if the capacity has not significantly decayed, the power transmission efficiency will be reduced due to the internal resistance voltage divider and heat generation, thereby extending the voltage regulation time.

[0073] Based on the aforementioned fault mechanism, the following logic can be used to implement an abnormal response. First, real-time monitoring and determination: During the voltage regulation process, a timer is started. If regulation is not completed within the preset maximum allowable time, the fault determination logic is triggered. This logic is then combined with historical capacity test data (e.g., whether the capacity decay rate exceeded 10% over the last three attempts) to distinguish the fault type. Second, a redundant switching mechanism is implemented. If capacity decay exceeds a threshold or poor contact is detected, a control signal is immediately sent to the redundant module's charge and discharge circuit, allowing it to seamlessly take over the energy storage task. This simultaneously disconnects the faulty module's electrical connection, preventing further expansion of the fault due to continued charging and discharging.

[0074] Subsequently, the system log module records the time of fault occurrence, the actual value of the adjustment time, historical capacity data and fault type identification, providing an accurate basis for subsequent maintenance (such as locating the poor contact point of a specific string group through contact resistance testing, or predicting the remaining life of the module through the capacity attenuation curve).

[0075] This embodiment achieves early identification and isolation of potential supercapacitor module failures through closed-loop control with time threshold warning, rapid redundant switching, and accurate fault recording, avoiding the decline in system power supply stability caused by the failure of a single module. At the same time, it provides data support for preventive maintenance, significantly improving the reliability and maintainability of electronic equipment.

[0076] In an exemplary embodiment, a capacity decay curve is fitted based on current capacity and historical capacity data to predict the remaining available charge and discharge cycles, and a maintenance reminder is triggered when the remaining number is lower than a preset number.

[0077] Specifically, historical data-driven capacity decay trend analysis is used to predict and manage the remaining life of supercapacitor modules. Static capacity tests are performed regularly on supercapacitor modules (e.g., after each charge in light-load mode), and the current capacity value is recorded to form a historical data sequence (e.g., the capacity change record for the last 100 charge and discharge cycles). This data reflects the gradual decrease in module capacity with increasing usage, which is due to the cumulative effects of physical processes such as the reduced activity of the capacitor's internal electrode materials and the degradation of electrolyte performance.

[0078] By analyzing the changing trends of historical data (such as whether the capacity decline rate is accelerating, whether it presents a stable attenuation rate, etc.), a capacity attenuation model is established. For example, if it is found that the capacity decreases linearly with the increase in the number of cycles (that is, the capacity reduction after each cycle is basically the same), the remaining available number of cycles is calculated based on the current capacity value and the historical average attenuation rate; if the attenuation rate accelerates over time (such as the capacity decline accelerates significantly in the later period), an exponential decay model can be used to predict the remaining life. The preset number threshold (such as 500 times) is set according to the module design life and safe operation requirements. When the predicted number of remaining cycles is lower than the threshold, it indicates that the supercapacitor module is approaching the end of its service life. At this time, a maintenance reminder is automatically triggered (such as displaying a warning sign on the management interface, sending a notification to the operation and maintenance personnel, etc.), prompting timely replacement of the module or adjustment of the operation strategy (such as reducing the discharge depth during peak load).

[0079] This embodiment achieves a forward-looking assessment of the health status of the supercapacitor module by continuously tracking capacity changes, analyzing attenuation patterns, and combining them with preset standards, thereby avoiding the impact of sudden module failure on system stability. At the same time, downtime is reduced by planning maintenance plans in advance. This synergizes with the capacity testing, charge and discharge control, and other technologies disclosed in the patent to build a complete reliability assurance system covering status monitoring, trend prediction, and proactive maintenance.

[0080] In an exemplary embodiment, the power supply architecture further includes a charge and discharge circuit arranged between the supercapacitor module and the bus. Before polling the output current of the power supply module, it also includes: controlling the charge and discharge circuit to operate in a charging mode, and adjusting the charging state of the charge and discharge circuit according to the target voltage of the supercapacitor module to pre-charge the supercapacitor module, and the target voltage gradually increases from an initial value to a pre-charging target value within a preset time.

[0081] Specifically, a controllable progressive charging strategy is used to achieve safe pre-activation of the supercapacitor module, avoiding transient power-on shocks and ensuring the effectiveness of subsequent dynamic regulation.

[0082] Before polling the power module's output current, the charge-discharge circuit is first controlled to enter charging mode, pre-charging the supercapacitor module and establishing an energy transfer channel between the power module and the supercapacitor module. At this point, the charging state is adjusted according to the voltage ramp control logic, setting the supercapacitor module's target voltage from an initial value (such as the current capacitor's static voltage) and gradually increasing it linearly or nonlinearly to the pre-charge target value (such as the bus rated voltage adaptation value) within a preset time. This gradual voltage boost mechanism, on the one hand, limits the voltage change rate per unit time, avoiding inrush current (i.e., high current shock at power-on) caused by a large difference between the capacitor's initial voltage and the bus voltage, thereby protecting the power module, power devices in the charge-discharge circuit (such as switches), and the supercapacitor itself from damage caused by excessive current stress. On the other hand, it ensures that the supercapacitor module reaches a suitable initial energy storage state before being officially connected to the system power supply network, enabling it to promptly respond to charging and discharging demands when the computing node load changes (such as rapid discharge to compensate for dynamic current). During the pre-charging process, the charge and discharge circuit dynamically adjusts the charging current or power through real-time feedback regulation (such as PID control algorithm) so that the target voltage climbs strictly according to the preset time-voltage curve until the pre-charging target value is reached.

[0083] The pre-charging mechanism provided in this embodiment constructs a buffer transition link during the system startup phase, which not only ensures the safe access of the hardware circuit, but also lays a stable energy storage foundation for the subsequent dynamic current management strategy based on the output current of the power module, ensuring that the entire power supply system can enter a controllable energy scheduling state at the initial startup stage, thereby improving the reliability and stability of the operation of electronic equipment.

[0084] like Figure 5As shown, in an exemplary embodiment, the charge and discharge circuit includes a first capacitor C1, a second capacitor C2, a first inductor L1, a first switch tube Q1, a second switch tube Q2, a first diode D1 and a second diode D2; the first end of the first capacitor C1 is connected to the positive electrode of the bus and the first end of the first inductor L1 respectively, the second end of the first inductor L1 is connected to the first end of the first switch tube Q1, the anode of the first diode D1, the second end of the second switch tube Q2, and the cathode of the second diode D2 respectively, the second end of the first switch tube Q1 is connected to the cathode of the first diode D1, the second capacitor C1 and the cathode of the second diode D2 respectively. The first end of C2 is connected to the positive electrode of the supercapacitor module 12, and the second end of the first capacitor C1 is respectively connected to the second end of the second capacitor C2, the first end of the second switch tube Q2, the anode of the second diode D2, the negative electrode of the bus, and the negative electrode of the supercapacitor module 12; the charge and discharge circuit is controlled to operate in a charging mode, and the charging state of the charge and discharge circuit is adjusted according to the target voltage of the supercapacitor module to pre-charge the supercapacitor module, including: controlling the first switch tube Q1 to turn off; determining a target duty cycle according to the bus voltage and the target voltage, and controlling the state of the second switch tube Q2 according to the target duty cycle.

[0085] Specifically, a controllable pre-charge mechanism for the supercapacitor module is constructed based on the charge-discharge circuit topology. Flexible matching of the bus voltage and capacitor voltage is achieved through switching timing and duty cycle control. During the pre-charge phase, the control logic first turns off the first switch Q1, placing it in the off state. This blocks the direct electrical connection between the supercapacitor module and the bus, ensuring that energy is transmitted only through a specific path. At this point, the charge-discharge circuit is configured in boost mode, with the second switch Q2 serving as the primary control element, modulating its on and off states via a PWM (Pulse Width Modulation) signal. The control algorithm dynamically calculates the target duty cycle based on the bus voltage and the target voltage of the supercapacitor module. This duty cycle determines the ratio of the second switch Q2's on-time to the switching period, thereby controlling the rate of energy transfer from the bus to the supercapacitor module. When the second switch tube Q2 is turned on, the current starts from the positive electrode of the bus, flows through the first inductor L1 to store energy, and then returns to the negative electrode of the bus through the second switch tube Q2. At this time, the inductor stores magnetic energy; when the second switch tube Q2 is turned off, the first inductor L1 releases magnetic energy, which is superimposed on the bus voltage and forms a freewheeling path through the first diode D1, transferring energy to the second capacitor C2 and the supercapacitor module to achieve voltage boost.

[0086] By dynamically adjusting the duty cycle, the charging current and voltage rise rate can be precisely controlled, allowing the supercapacitor module voltage to smoothly rise to the target value within a preset time. This prevents inrush current from impacting the circuit while achieving efficient energy transmission. This charging control strategy, leveraging inductive energy storage and switching timing, achieves flexible matching of bus voltage and supercapacitor module voltage without relying on additional voltage conversion equipment, laying a stable energy storage foundation for subsequent dynamic current regulation.

[0087] In an exemplary embodiment, determining the target duty cycle according to the bus voltage and the target voltage includes: determining the target duty cycle according to Vcap=Vbasbar / (1-A2), where Vcap is the target voltage of the supercapacitor module, Vbasbar is the bus voltage, and A2 is the target duty cycle.

[0088] This precise control of the target voltage based on the physical characteristics of the circuit is converted into a quantitative adjustment of the switching tube timing. Specifically, when the target voltage is higher than the bus voltage (meeting the Boost requirement), the energy transmission efficiency is improved by increasing A2; when the target voltage is close to the bus voltage, A2 is reduced to reduce the charging rate and avoid voltage overshoot. This mechanism uses the inherent characteristics of the circuit to establish a direct relationship between the control parameters and the target indicators. It can achieve a linear climb of the supercapacitor module voltage without the need for a complex feedback algorithm, ensuring that the voltage changes smoothly according to the preset rules during the pre-charging process. It not only guarantees the safety of the charging process (avoiding stress shocks caused by voltage mutations), but also achieves a balance between energy transmission efficiency and voltage control accuracy through real-time adjustment of the duty cycle, providing a stable initial condition for energy storage for subsequent dynamic current regulation.

[0089] When the charge and discharge circuit works in discharge mode, the circuit works in Buck mode, Q2 is turned off, and the current flows through D2. At this time, Vbasbar=Vcap×A1, where A1 is the duty cycle of Q1.

[0090] In one embodiment, both the first switching tube and the second switching tube are integrated with temperature sensors. When the junction temperature of the switching tube exceeds a threshold, the PWM duty cycle of the corresponding switching tube is adjusted to reduce the switching frequency to control the temperature rise.

[0091] Specifically, in the charge-discharge circuit, high-precision temperature sensors (such as thermocouples or semiconductor temperature sensors) are integrated within the first and second switching transistors to monitor the junction temperature of the switching transistors (i.e., the temperature of the PN junction within the chip, which directly reflects the heating status of the device) in real time. A preset junction temperature safety threshold is set based on the thermal resistance of the switching transistor material and the requirement for long-term reliable operation. When the sensor detects that the junction temperature exceeds the threshold, it indicates that the switching transistor is heating abnormally due to high-frequency switching losses or excessive load, and a thermal suppression strategy must be immediately implemented.

[0092] The specific control logic adjusts the PWM duty cycle signal parameters of the switch to simultaneously reduce the switching frequency and duty cycle. Lowering the switching frequency reduces the number of switches per unit time, thereby reducing switching losses (each switching action is accompanied by energy loss and heat generation). Reducing the duty cycle shortens the switch's single on-time, reducing conduction losses. These two factors work together to effectively reduce the switch's average power consumption and curb the temperature rise rate. For example, when the junction temperature reaches 130°C, reducing the switching frequency from 100kHz to 50kHz and the duty cycle from 60% to 40% reduces the switch's power consumption and gradually brings the junction temperature back to a safe range.

[0093] This embodiment achieves dynamic thermal balance of the switching transistor through a closed-loop chain of temperature sensing, parameter adjustment, and heat loss control, without relying on additional heat dissipation hardware. This approach avoids the risk of device failure due to excessive junction temperature (such as MOSFET (Metal Oxide Semiconductor Field Effect Transistor) breakdown and IGBT (Insulated Gate Bipolar Transistor) desaturation), while maintaining the basic functions of the charge and discharge circuit (such as continuously charging and discharging the supercapacitor module), ensuring stable operation of electronic devices under high load conditions. Furthermore, this control strategy can be linked to the supercapacitor module's charge and discharge mode (for example, automatically switching to low-power charging mode when the temperature exceeds the limit), further optimizing system-level thermal management efficiency.

[0094] like Figure 7 As shown, first determine the initial power-on. If it is the initial power-on, pre-charge the supercapacitor module; then determine whether Vcap> the pre-charge target value (Vcap is the capacitor voltage of the supercapacitor module). If Vcap> the pre-charge target value, it is determined that the pre-charging of the supercapacitor module is completed, otherwise the pre-charging cycle is repeated.

[0095] If this is not the initial power-up, the process proceeds to the step of obtaining the output current of the power module. Next, the output current is determined to be ≥150% of the rated current. If so, Vcap is further determined to be ≤Vmin (Vmin is the minimum voltage value). If Vcap>Vmin, the supercapacitor module is discharged and the charge-discharge circuit operates in discharge mode. The process then determines Vcap≤Vmin. If so, the charge-discharge circuit is turned off, and discharge ends. Otherwise, discharge continues. The process continues to discharge the supercapacitor module.

[0096] If the output current is less than 150% of the rated current, the output current is determined to be ≤50% of the rated current. If the output current is ≤50% of the rated current, Vcap is determined to be ≥Vmax (Vmax is the maximum voltage value). If Vcap is less than Vmax, the supercapacitor module is charged and the charge-discharge circuit operates in the charging mode. Vcap is then determined to be ≥Vmax. If Vcap is ≥Vmax, the charge-discharge circuit is turned off and charging is completed. Otherwise, the supercapacitor module charging steps are continued.

[0097] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0098] like Figure 9 An embodiment of the present application further provides a current management device, comprising: a memory 101 for storing a computer program; and a processor 102 for implementing the steps of any of the above-mentioned current management methods when executing the computer program.

[0099] For the description of the features in the embodiment corresponding to the current management device, please refer to the relevant description of the embodiment corresponding to the current management method, and no further details will be given here.

[0100] like Figure 10 An embodiment of the present application further provides a computer-readable storage medium 201, in which a computer program 202 is stored, wherein the computer program 202 is configured to execute the steps of any of the above-mentioned current management method embodiments when running.

[0101] In an exemplary embodiment, the computer-readable storage medium 201 may include, but is not limited to, various media that can store the computer program 202, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0102] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the computer program implements the steps of any of the above-mentioned current management method embodiments.

[0103] For the description of the features in the embodiment corresponding to the computer-readable storage medium, please refer to the relevant description of the embodiment corresponding to the current management method, which will not be repeated here.

[0104] An embodiment of the present application further provides another computer program product, comprising a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of any of the above-mentioned current management method embodiments are implemented.

[0105] For the description of the features in the embodiments corresponding to the computer program product, reference can be made to the relevant description of the embodiments corresponding to the current management method, which will not be repeated here.

[0106] The present application also provides an electronic device, comprising the power supply architecture as described above.

[0107] In an exemplary embodiment, an independent balancing circuit (the balancing circuit includes a balancing switch) is set between each capacitor string group of the supercapacitor module. The voltage difference between each capacitor string group is monitored in real time during the charging and discharging process. When the voltage difference exceeds the voltage difference threshold, the balancing switch is automatically turned on to achieve voltage balancing by discharging or supplementing the current across the capacitor string groups, thereby avoiding overcharging / over-discharging between the capacitor strings.

[0108] like Figure 8 In an exemplary embodiment, the supercapacitor module further includes a fan disposed on the rear window, and the fan is configured to dissipate heat from the supercapacitor module by adopting an internal exhaust method.

[0109] Specifically, through targeted heat dissipation structure design and airflow organization strategies, an efficient thermal management system is constructed for the supercapacitor module. A fan is installed on the rear window of the supercapacitor module and uses internal ventilation. Its function is to create directional forced convection within the module, accelerating heat exchange.

[0110] Specifically, when the fan is running, the heat generated by the charging and discharging of the lithium-ion supercapacitors inside the module is expelled toward the rear window through the airflow through the suction effect. At the same time, external cold air is naturally replenished from the air inlet on the front or side of the module, forming a front-in, back-out through-type heat dissipation channel. This internal exhaust design is compatible with the longitudinal welding layout of the supercapacitor module. The lithium-ion supercapacitors are arranged vertically on the board, with their heating surfaces perpendicular to the airflow direction, maximizing the air contact area and improving heat exchange efficiency. The modular structure that supports blind plug-in ensures that the fan and air duct design do not affect the rapid disassembly and assembly of the module, and maintenance does not require interruption of the overall cooling system. The air-cooled heat dissipation method dynamically adjusts the fan speed (for example, based on feedback from the capacitor temperature sensor), enhancing the exhaust force when the supercapacitor module is running at high load and reducing energy consumption at low load, forming an adaptive heat dissipation mechanism.

[0111] The advantage of internal exhaust over external blowing is that by controlling the direction of the airflow, it prevents external dust and debris from directly impacting the capacitor surface, reducing the impact of dust accumulation on heat dissipation efficiency. At the same time, the structural advantage of the rear window position is utilized to directly direct heat to the outside of the device, avoiding heat accumulation inside the chassis, thereby effectively controlling the operating temperature of the supercapacitor module, ensuring its operation within a safe temperature range, extending its service life and maintaining stable energy storage performance, and providing reliable thermal environment support for high-frequency charging and discharging operations during dynamic current regulation.

[0112] In an exemplary embodiment, a cabinet is further included, and the power supply structure is set in the cabinet.

[0113] In this embodiment, the cabinet serves as a physical carrier, integrating power supply architectures such as current management devices, power modules, supercapacitor modules, and computing nodes inside. Each component achieves electrical connection and signal interaction through busbars and control lines, forming an efficient and coordinated power supply and computing system.

[0114] For descriptions of features in the embodiments corresponding to the electronic device, reference can be made to the relevant descriptions of the embodiments corresponding to the current management method, which will not be repeated here.

[0115] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0116] The above is a detailed introduction to a power supply architecture, electronic equipment, management method, device, medium and program product provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A power supply architecture, characterized in that: include: Power modules, supercapacitor modules, busbars, and computing nodes; The supercapacitor module includes a plurality of capacitor strings connected in parallel, and the capacitor string includes a plurality of capacitors connected in series; the busbar electrically connects the power module, the supercapacitor module and the computing node; A charge-discharge circuit is provided between the supercapacitor module and the busbar, and is configured to switch the current transmission path between the supercapacitor module and the busbar according to the output current of the power module; each capacitor string group is provided with an independent charge-discharge circuit, and one or more capacitor strings and corresponding charge-discharge circuits are selected and enabled according to the magnitude of the compensation current; The compensation current is determined according to the output current of the power module; Poll the output current of the power module, and determine the current operating mode of the computing node based on the output current and the preset current range; dynamically adjust the working status of the power module and the supercapacitor module according to the current operating mode to adjust the distribution state of the bus current; when the supercapacitor module is in a static state, control the charge and discharge circuit to adjust the capacitor voltage of the supercapacitor module from the normal voltage to the maximum voltage, and record the adjustment time; wherein the static state is a state where no charging or discharging is performed; according to Calculating the current capacity of the supercapacitor module; wherein, is the current capacity, Pin is the input power of the supercapacitor module, T is the adjustment time, is the highest voltage, is the normal voltage.

2. The power supply architecture according to claim 1, wherein: The charging and discharging circuit includes a first capacitor, a second capacitor, a first inductor, a first switching tube, a second switching tube, a first diode and a second diode; The first end of the first capacitor is respectively connected to the positive electrode of the bus and the first end of the first inductor, the second end of the first inductor is respectively connected to the first end of the first switching tube, the anode of the first diode, the second end of the second switching tube, and the cathode of the second diode, the second end of the first switching tube is respectively connected to the cathode of the first diode, the first end of the second capacitor and the positive electrode of the supercapacitor module, and the second end of the first capacitor is respectively connected to the second end of the second capacitor, the first end of the second switching tube and the anode of the second diode, the negative electrode of the bus and the negative electrode of the supercapacitor module.

3. An electronic device, characterized in that: The invention comprises a power supply architecture as described in any one of claims 1 to 2.

4. The electronic device according to claim 3, wherein: It also includes a cabinet, in which the power supply structure is arranged.

5. A method for managing current, characterized in that: Applied to the power supply architecture according to any one of claims 1-2, the current management method includes: Polling the output current of the power module, and determining the current operating mode of the computing node according to the output current and a preset current range; According to the current operating mode, dynamically adjust the working state of the power module and the supercapacitor module to adjust the distribution state of the bus current; When the supercapacitor module is in a static state, controlling the charge and discharge circuit so that the capacitor voltage of the supercapacitor module is adjusted from a normal voltage to a maximum voltage, and recording the adjustment time; wherein the static state is a state in which no charging or discharging is performed; according to Calculating the current capacity of the supercapacitor module; in, is the current capacity, Pin is the input power of the supercapacitor module, T is the adjustment time, is the highest voltage, is the normal voltage.

6. The current management method according to claim 5, characterized in that: Determining a current operating mode of the computing node according to the output current and a preset current range includes: Determining whether the output current is less than a maximum value of the preset current range; If the output current is greater than or equal to the maximum value, it is determined that the current operation mode of the computing node is a dynamic mode, and the power module outputs a dynamic current in the dynamic mode.

7. The current management method according to claim 6, characterized in that: The power supply architecture further includes a charge-discharge circuit disposed between the supercapacitor module and the bus, which dynamically adjusts the operating states of the power module and the supercapacitor module according to the current operating mode to adjust the distribution state of the bus current, including: In the dynamic mode, the charge and discharge circuit is controlled to operate in the discharge mode, so that the supercapacitor module outputs a discharge current to the bus through the charge and discharge circuit; the bus current includes the output current of the power module and the discharge current output by the supercapacitor module.

8. The current management method according to claim 7, characterized in that: Before controlling the charge-discharge circuit to operate in the discharge mode, the method further includes: Obtaining the capacitor voltage of the supercapacitor module and determining whether the capacitor voltage is greater than a minimum voltage value; If it is greater than the minimum voltage value, the step of controlling the charge and discharge circuit to operate in the discharge mode is entered until the capacitor voltage is less than or equal to the minimum voltage value or the output current of the power module is less than the maximum value.

9. The current management method according to claim 5, characterized in that: Determining a current operating mode of the computing node according to the output current and a preset current range includes: Determining whether the output current is greater than a minimum value of the preset current range; If the output current is less than or equal to the minimum value, determining that the current operation mode of the computing node is a light load mode; The power supply architecture further includes a charge-discharge circuit disposed between the supercapacitor module and the bus; dynamically adjusting the operating states of the power supply module and the supercapacitor module according to the current operating mode to adjust the distribution state of the bus current, including: In the light load mode, the charge and discharge circuit is controlled to operate in the charging mode, so that the power supply module supplies power to the computing node through the bus, and charges the supercapacitor module through the bus and the charge and discharge circuit.

10. The current management method according to claim 9, characterized in that: Before controlling the charge and discharge circuit to operate in the charging mode, the method further includes: Obtaining the capacitor voltage of the supercapacitor module and determining whether the capacitor voltage is less than a maximum voltage value; If it is less than the maximum voltage value, the step of controlling the charge and discharge circuit to operate in the charging mode is entered until the capacitor voltage is greater than or equal to the maximum voltage value or the output current of the power module is greater than the minimum value.

11. The current management method according to claim 5, characterized in that: After calculating the current capacity of the supercapacitor module according to the normal voltage, the maximum voltage, and the adjustment time, the method further includes: Determining the life of the supercapacitor module based on a deviation between the current capacity and the rated capacity; If the life of the supercapacitor module is less than a preset life threshold, a life warning is issued.

12. The current management method according to claim 5, characterized in that: The power supply architecture further includes a charge-discharge circuit disposed between the supercapacitor module and the busbar, and before polling the output current of the power supply module, further includes: The charge-discharge circuit is controlled to operate in a charging mode, and the charging state of the charge-discharge circuit is adjusted according to the target voltage of the supercapacitor module to pre-charge the supercapacitor module; the target voltage is gradually increased from an initial value to a pre-charging target value within a preset time.

13. The current management method according to claim 12, characterized in that: The charge and discharge circuit includes a first capacitor, a second capacitor, a first inductor, a first switching tube, a second switching tube, a first diode, and a second diode. The first end of the first capacitor is respectively connected to the positive electrode of the busbar and the first end of the first inductor. The second end of the first inductor is respectively connected to the first end of the first switching tube, the anode of the first diode, the second end of the second switching tube, and the cathode of the second diode. The second end of the first switching tube is respectively connected to the cathode of the first diode, the first end of the second capacitor, and the positive electrode of the supercapacitor module. The second end of the first capacitor is respectively connected to the second end of the second capacitor, the first end of the second switching tube, the anode of the second diode, the negative electrode of the busbar, and the negative electrode of the supercapacitor module. Controlling the charge-discharge circuit to operate in a charging mode and adjusting the charging state of the charge-discharge circuit according to the target voltage of the supercapacitor module to pre-charge the supercapacitor module includes: Controlling the first switch to turn off; A target duty cycle is determined according to the bus voltage and the target voltage, and the state of the second switching tube is controlled according to the target duty cycle.

14. The current management method according to claim 13, characterized in that: Determining a target duty cycle according to the bus voltage and the target voltage includes: The target duty cycle is determined according to Vcap=Vbasbar / (1-A2), where Vcap is the target voltage of the supercapacitor module, Vbasbar is the bus voltage, and A2 is the target duty cycle.

15. A current management device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the current management method according to any one of claims 5 to 14 when executing the computer program.

16. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the current management method according to any one of claims 5 to 14.

17. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the current management method according to any one of claims 5 to 14 are implemented.

Images