A network message error injection system and method

Abstract

The application provides a network message error injection system and method. The system comprises a storage module, a master device and a slave device. The storage module is configured to store error injection configuration information. The error injection configuration information is configured to indicate an error injection party. The error injection party comprises the master device and the slave device. The master device is configured to read the error injection configuration information, and when the error injection configuration information indicates that the error injection party is the master device, the master device is configured to transmit the network message to be sent to the slave device after error injection, and when the error injection configuration information indicates that the error injection party is the slave device, the master device is configured to transmit the network message to be sent to the slave device. The slave device is configured to read the error injection configuration information, and when the error injection configuration information indicates that the error injection party is the slave device, the slave device is configured to inject an error into the received network message, and perform subsequent processing on the network message after error injection. When the error injection configuration information indicates that the error injection party is the master device, the slave device is configured to perform subsequent processing without injecting an error into the received network message.

Description

Technical Field

[0001] This application belongs to the field of chip testing technology, and specifically relates to a network message error annotation system and method. Background Technology

[0002] During chip development, lengthy chip prototype verification and cross-scenario stress testing are typically required to test the stability of the chip design, identify and fix potential problems, and ensure correct chip functionality and performance compliance. Prototype verification usually involves testing the chip's operation under various abnormal link environments, necessitating specific bug-injection methods.

[0003] After the chip is returned to the die, the system testing phase requires testing the chip's fault tolerance capabilities under various abnormal environments to verify the error recovery mechanism of the real chip under these conditions and improve the efficiency of system software development. Certain error injection methods also need to be employed during system testing.

[0004] To comprehensively cover various error scenarios that chips may encounter and ensure chip reliability and robustness, flexible and rich error injection methods are typically desired both before and after siliconization of network communication chips. Summary of the Invention

[0005] The purpose of this application is to provide a network message error annotation system and method, which aims to solve the problem that network message error annotation methods in related technologies cannot cover all error scenarios.

[0006] According to a first aspect of this application, a network packet error injection system is provided, comprising: a storage module, a master device, and a slave device;

[0007] The storage module is used to store error injection configuration information; the error injection configuration information is used to instruct the error injection party; the error injection party includes a master device and a slave device;

[0008] The master device is used to read the error injection configuration information, and when the error injection configuration information indicates that the error injection party is the master device, to inject errors into the network packet to be sent and then transmit it to the slave device, and when the error injection configuration information indicates that the error injection party is the slave device, to transmit the network packet to be sent to the slave device.

[0009] The slave device is configured to read the error injection configuration information, and when the error injection configuration information indicates that the error injection party is a slave device, to inject errors into the received network packets and perform subsequent processing on the network packets after the errors are injected; and when the error injection configuration information indicates that the error injection party is a master device, to perform subsequent processing on the received network packets without injecting errors.

[0010] In this embodiment, during the chip development stage, the simulated physical hardware anomaly message transmission can be directly applied to chip verification testing. By using the error injection configuration information, multiple error injection schemes can be set according to actual testing needs to cover more abnormal scenarios and boundary conditions, which helps to ensure the integrity of the test. At the same time, the network message error injection scheme of this application does not rely on external devices such as protocol analyzers, which can effectively reduce the hardware equipment cost of chip product development.

[0011] In some optional embodiments, the error injection configuration information is also used to indicate error injection methods; the error injection methods include error injection methods tested from the device link layer and error injection methods tested from internal modules of the device;

[0012] When the error injection method is a test error injection method at the device link layer, the subsequent processing of the network packet after error injection or the network packet without error injection by the slave device includes packet inspection and processing performed by the downstream module inside the slave device after packet inspection.

[0013] When the error injection method is tested from the internal module of the device, the subsequent processing of the network packet after error injection or the network packet without error injection includes processing performed by the downstream module inside the device after skipping the packet inspection.

[0014] In this embodiment, by configuring the error injection method and the error injection mechanism in the error injection configuration information, the testing of the link layer module and internal functional modules can be realized, which can meet the testing needs of different modules.

[0015] In some optional embodiments, the error injection configuration information, when instructing the error injection party to be the master device, is also used to instruct the error injection stage of the network packet, wherein the error injection stage includes error injection before the network packet error check code is calculated and error injection after the network packet error check code is calculated;

[0016] When the error injection stage is performed before the network packet error check code is calculated, the master device injects the network packet with errors, then calculates the error check code for the network packet with errors, and transmits the error check code to the slave device in the network packet with errors.

[0017] During the error injection phase, which occurs after the network packet error check code is calculated, the master device performs error injection on the network packet after calculating the error check code, and then transmits the error check code in the network packet after error injection to the slave device.

[0018] This embodiment can meet the testing requirements of the master device when injecting errors into network packets, whether or not CRC errors are introduced.

[0019] In some optional embodiments, when the error injection stage is performed after the network packet error check code is calculated, the error injection of the network packet includes one or more combinations of error injection of the packet header field, error injection of the packet payload data, and error injection of the packet error check.

[0020] When the error injection stage is performed before the network packet error check code is calculated, the error injection of the network packet includes one or more combinations of error injection of the packet header field and error injection of the packet payload data, but does not include error injection for packet error check.

[0021] This embodiment can configure error injection information according to testing requirements, thereby enabling testing of various error scenarios.

[0022] In some optional embodiments, the master device includes a link layer packet sending module, and the slave device includes a link layer packet receiving module; the downstream module inside the slave device is the downstream module of the packet receiving module outside the link layer of the slave device.

[0023] Error correction of the network packets by the master device is performed by the packet sending module, and error correction of the network packets by the slave device is performed by the packet receiving module.

[0024] This embodiment can meet the needs of testing slave device link layer modules and internal functional modules.

[0025] According to a second aspect of this application, a method for error annotation in network messages is provided, comprising:

[0026] The master device reads the error injection configuration information stored in the storage module; the error injection configuration information is used to instruct the error injection party; the error injection party includes the master device and the slave device;

[0027] When the error-adding configuration information indicates that the error-adding party is the master device, the master device adds an error to the network packet to be sent and then transmits it to the slave device.

[0028] When the error-injection configuration information indicates that the error-injecting party is a slave device, the master device will transmit the network packet to be sent to the slave device;

[0029] The error configuration information is read from the device;

[0030] When the error-adding configuration information indicates that the error-adding party is a slave device, the slave device adds errors to the received network packets and performs subsequent processing on the network packets after the errors are added.

[0031] When the error-addressing configuration information indicates that the error-addressing party is the master device, the slave device will not perform subsequent processing on the received network packets if it does not add error-addressing information.

[0032] In some optional embodiments, the error injection configuration information is also used to indicate error injection methods; the error injection methods include error injection methods tested from the device link layer and error injection methods tested from internal modules of the device;

[0033] When the error injection method is a test error injection method at the device link layer, the subsequent processing of the network packet after error injection or the network packet without error injection by the slave device includes packet inspection and processing performed by the downstream module inside the slave device after packet inspection.

[0034] When the error injection method is tested from the internal module of the device, the subsequent processing of the network packet after error injection or the network packet without error injection includes processing performed by the downstream module inside the device after skipping the packet inspection.

[0035] In some optional embodiments, the error injection configuration information, when instructing the error injection party to be the master device, is also used to instruct the error injection stage of the network packet, wherein the error injection stage includes error injection before the network packet error check code is calculated and error injection after the network packet error check code is calculated;

[0036] The master device sends the network packet to be sent after annotating it with errors to the slave device, including:

[0037] When the error injection stage is performed before the network packet error check code is calculated, the master device injects the network packet with errors, then calculates the error check code for the network packet with errors, and transmits the error check code to the slave device in the network packet with errors.

[0038] During the error injection phase, which occurs after the network packet error check code is calculated, the master device performs error injection on the network packet after calculating the error check code, and then transmits the error check code in the network packet after error injection to the slave device.

[0039] In some optional embodiments, when the error injection stage is performed after the network packet error check code is calculated, the error injection of the network packet includes one or more combinations of error injection of the packet header field, error injection of the packet payload data, and error injection of the packet error check.

[0040] When the error injection stage is performed before the network packet error check code is calculated, the error injection of the network packet includes one or more combinations of error injection of the packet header field and error injection of the packet payload data, but does not include error injection for packet error check.

[0041] In some optional embodiments, the master device includes a link layer packet sending module, and the slave device includes a link layer packet receiving module; the downstream module inside the slave device is the downstream module of the packet receiving module outside the link layer of the slave device.

[0042] Error correction of the network packets by the master device is performed by the packet sending module, and error correction of the network packets by the slave device is performed by the packet receiving module.

[0043] Other features and advantages of this application will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the application. The objectives and other advantages of this application may be realized and obtained by means of the structures and processes shown in the description and the accompanying drawings. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0045] Figure 1 This is a schematic diagram of the overall framework of the IB switching chip based on relevant technologies.

[0046] Figure 2 This is a structural block diagram of a network message error correction system according to an exemplary embodiment of this application.

[0047] Figure 3 This is a flowchart illustrating the network message error annotation and verification test process according to an exemplary embodiment of this application.

[0048] Figures 4A-4D This is a schematic diagram illustrating the effect of a network message error annotation method according to an exemplary embodiment of this application.

[0049] Figure 5 This is a flowchart illustrating a network message error annotation method according to an exemplary embodiment of this application. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0051] Chip testers typically use external devices for message annotation, with protocol analyzers being the most common. However, many protocol analyzers have limited annotation capabilities, failing to fully meet verification and testing needs, and powerful protocol analyzers are usually expensive. Taking the IB protocol as an example, the message header defines various functions, and the annotation requirements during testing are diverse, including VL (Virtual Lane), SL (Service Level), DLID (Destination Local), Lver (Link Version), PktLen (Parketlength), CRC (Cyclic Redundancy Check), etc. However, ordinary IB protocol analyzers cannot support all types of annotations or combinations thereof.

[0052] Furthermore, verifying the error handling capabilities of internal modules cannot rely on existing external devices; therefore, error message pass-through functionality needs to be added during the development phase. Taking the IB switch chip as an example, the overall chip framework is as follows: Figure 1 As shown, when testing the error handling of the internal switching routing module, the link layer needs to pass in the erroneous IB messages without marking them as errors. This process cannot be achieved with the help of external devices.

[0053] Therefore, implementing the chip's own message error correction function during the chip development stage is of great help to chip prototype verification and product system testing.

[0054] Based on the above analysis, see Figure 2 As shown, this application exemplarily proposes a network packet error annotation system, including: a storage module, a master device, and a slave device;

[0055] The storage module is used to store error injection configuration information; the error injection configuration information is used to instruct the error injector; the error injector includes master devices and slave devices;

[0056] The master device is used to read the error injection configuration information, and when the error injection configuration information indicates that the error injection party is the master device, it injects errors into the network packets to be sent and transmits them to the slave device, and when the error injection configuration information indicates that the error injection party is the slave device, it transmits the network packets to be sent to the slave device.

[0057] The device is used to read error injection configuration information, and when the error injection configuration information indicates that the error injection party is a slave device, it injects errors into the received network packets and performs subsequent processing on the network packets after the errors are injected; and when the error injection configuration information indicates that the error injection party is a master device, it performs subsequent processing on the received network packets without injecting errors.

[0058] For example, this network packet error injection system can be a test system built during the chip development phase to test chips used to implement slave devices. Network communication protocols can be divided from bottom to top into physical layer, link layer, network layer, transport layer, etc. Packet integrity and header checks are generally implemented at the link layer. Adding error injection functionality to the link layer can realistically simulate hardware errors in link transmission. This application provides a network communication packet error injection test system that can combine different error injection methods according to test requirements (testing the link layer or internal functional modules), and then analyze the behavior of each module after error injection, thereby achieving the test of the abnormal packet handling capabilities of different modules.

[0059] To simulate random errors that occur during network packet transmission, this application incorporates various error-injection functions in the early design phase without the aid of external devices. Network communication protocols can be divided into physical layer, link layer, network layer, and transport layer from bottom to top. Packet integrity and header checks are generally implemented at the link layer. Adding error-injection functions to the link layer can realistically simulate hardware errors in link transmission. According to the scheme provided in this application, different error-injection configuration information can be configured according to testing requirements (testing the link layer or internal functional modules), thereby injecting errors into network packets in different ways. Then, the behavior of the error-injected network packets as they pass through each module is analyzed, enabling testing of the abnormal packet handling capabilities of different modules.

[0060] For example, this application establishes a network packet error injection system during the early development stage of a chip. This system mainly includes a master device for sending network packets and a slave device for receiving network packets. To test the abnormal packet handling capabilities of the chip's internal modules, a device equipped with the chip under test can be used as a slave device. The chip under test then processes the network packets received by the slave device accordingly, such as link-layer processing and other post-link-layer processing. Error injection can be performed on the master device or after being received by the slave device, depending on the error injection configuration information configured according to actual testing requirements. Therefore, the error injection configuration information can be used to configure whether the error injector is the master or slave device. When the master device sends a network packet, it can first read the storage module to determine whether the error injector is the master device based on the error injection configuration information. If it is the master device, the network packet is error-injected before being transmitted to the slave device; otherwise, the network packet is not processed normally before being transmitted to the slave device. In some embodiments, the storage module can be a configuration register, a memory module, etc.

[0061] For example, how to specifically add errors to network packets depends on the error-adding requirements. Taking the IB protocol as an example, various functions can be defined in the header of a network packet, and the error-adding requirements during testing are diverse, which may include adding errors to header fields such as VL, SL, OP, DLID, Lver, PktLen, and CRC. Therefore, the error-adding configuration information can also include the current error-adding requirements, such as which header fields(s) need to be added. The master device can add errors to the header fields in the packet header according to the error-adding requirements.

[0062] For example, after receiving a network packet, the slave device also reads the storage module and determines whether the error-injecting party is a slave device based on the error-injection configuration information. If it is a slave device, it performs error injection on the network packet according to the error-injection requirements indicated in the configuration information. The error injection by the slave device is the same as that by the master device, which involves injecting errors into one or more header fields of the network packet according to the error-injection requirements. After the slave device has injected the network packet, it can send it to the downstream module for further processing. If the error-injecting party is not a slave device, the slave device processes the network packet normally and then sends it to the downstream module for further processing.

[0063] In this embodiment, during the chip development stage, the simulated physical hardware anomaly message transmission can be directly applied to chip verification testing. By using the error injection configuration information, multiple error injection schemes can be set according to actual testing needs to cover more abnormal scenarios and boundary conditions, which helps to ensure the integrity of the test. At the same time, the network message error injection scheme of this application does not rely on external devices such as protocol analyzers, which can effectively reduce the hardware equipment cost of chip product development.

[0064] In some optional embodiments, the error injection configuration information is also used to indicate error injection methods; the error injection methods include error injection methods tested from the device link layer and error injection methods tested from internal modules of the device;

[0065] Error injection methods refer to the subsequent processing of network packets after error injection or without error injection by the device when testing error injection methods at the device link layer. This includes packet inspection and processing performed by downstream modules within the device after packet inspection.

[0066] Error injection methods refer to the subsequent processing of network packets after error injection or without error injection when testing error injection methods from internal modules of the device. This includes processing performed by downstream modules from within the device after skipping packet checks.

[0067] For example, the error injection configuration information can also configure error injection methods, including error injection methods for device link layer testing and error injection methods for device internal module testing. Error injection methods for device link layer testing refer to testing the link layer module inside the device by injecting errors into network packets, while error injection methods for device internal module testing refer to testing the internal functional modules downstream of the link layer module by injecting errors into network packets.

[0068] For example, the link layer module typically inspects received network packets. If an error is detected, the network packet is marked as an abnormal packet, which may be discarded in subsequent processing instead of being processed according to the normal procedure. Therefore, if the error injection method is a link layer test method from the slave device, the link layer module of the slave device needs to identify the error in the network packet. However, if the error injection method is an internal module error injection method from the slave device, the error in the network packet is identified by the link layer module and marked as an abnormal packet. In this case, the erroneous network packet cannot be transmitted to the downstream module inside the slave device to test the downstream internal functional module. Therefore, the slave device needs to skip the packet inspection step at the link layer and pass the error-injected network packet to the downstream module without performing packet inspection.

[0069] In this embodiment, by configuring the error injection method and the error injection mechanism in the error injection configuration information, the testing of the link layer module and internal functional modules can be realized, which can meet the testing needs of different modules.

[0070] In some optional embodiments, when instructing the error-injecting party to be the master device, the error-injecting configuration information is also used to instruct a first error-injection stage for network packets, the first error-injection stage including error-injection before network packet error check code calculation and error-injection after network packet error check code calculation;

[0071] In the first error injection stage, which is before the network packet error check code is calculated, the master device injects errors into the network packet, then calculates the error check code in the injected network packet, and transmits the error check code to the slave device in the injected network packet.

[0072] In the first error injection stage, which is performed after the network packet error check code is calculated, the master device performs error injection on the network packet after calculating the error check code, and transmits the error check code in the network packet after error injection to the slave device.

[0073] For example, when the error-injecting party is the master device, error injection can be performed on network packets at different processing nodes in the master device's link layer to meet different testing needs. Therefore, the error injection configuration information can also configure the error injection stage when the error-injecting party is the master device. The error injection stage can include two stages: before and after the error check code calculation of the network packet.

[0074] For example, if the error is injected before the error check code calculation of the network packet, the master device, after injecting the error into the network packet, performs an error check code calculation (such as CRC code calculation) on the injected network packet and sends the error check code to the slave device. The slave device's link layer module or internal functional module then identifies the error. In this method, the slave device does not report an error check code verification error, i.e., it does not report a CRC code error. If the error is injected after the error check code calculation of the network packet, the master device first performs an error check code calculation on the network packet and then injects the error. The error check code is then sent to the slave device along with the injected network packet. The slave device's link layer module or internal functional module then identifies the error. In this method, the slave device identifies the error in the network packet and also reports an error check code verification error, i.e., it reports a CRC error.

[0075] This embodiment can meet the testing requirements of the master device when injecting errors into network packets, whether or not CRC errors are introduced.

[0076] In some optional embodiments, when the error injection stage is performed after the network packet error check code is calculated, the error injection of the network packet includes one or more combinations of error injection of the packet header field, error injection of the packet payload data, and error injection of the packet error check.

[0077] During the error injection phase, which involves injecting errors before calculating the network packet error check code, the error injection of the network packet includes one or more combinations of error injection in the packet header field and error injection in the packet payload data, but does not include error injection for packet error check.

[0078] For example, taking the IB protocol as an example, header field annotation includes VL annotation, SL annotation, DLID annotation, Lver annotation, and PktLen annotation, such as modifying or reversing the content of these header fields in the original network packet. Specific annotation requirements can be configured in the annotation configuration information, such as configuring which header fields need to be annotated, whether to annotate the packet payload data, CRC annotation, etc.

[0079] This embodiment can configure error injection information according to testing requirements, thereby enabling testing of various error scenarios.

[0080] In some optional embodiments, the master device includes a link layer message sending module, and the slave device includes a link layer message receiving module; the downstream module inside the slave device is the downstream module of the message receiving module outside the link layer of the slave device.

[0081] Error correction of network packets by the master device is performed by the packet sending module, while error correction of network packets by the slave device is performed by the packet receiving module.

[0082] In this optional embodiment, as the master device, the packet sending module (TX packet sending module) at the link layer is used to perform error verification on network packets. Therefore, error-injection hardware logic can be set in the packet sending module, so that the error-injection hardware logic can inject errors before or after the error check code calculation of the network packets according to the error-injection configuration information. As the slave device, the packet receiving module (TX packet receiving module) at the link layer is used to perform packet inspection on network packets. Therefore, error-injection hardware logic can be set in the packet sending module, so that the error-injection hardware logic can inject errors before the packet inspection, or skip the packet inspection and pass the network packets that have been error-injected by the master device or slave device through to the internal functional modules downstream of the link layer.

[0083] This embodiment can meet the needs of testing slave device link layer modules and internal functional modules.

[0084] The implementation details of this application will be illustrated below through a specific implementation method.

[0085] For example, network packets can be punctured in the following four ways:

[0086] Error injection method 1: Error injection in the link layer message receiving module; in this method, the message header field in the network message that matches the error injection field configured in the error injection configuration information is modified, thereby causing a network message error. This error injection method will introduce a message CRC error.

[0087] Error annotation method two: The link layer message receiving module does not check for network packet errors; that is, network packets with errors are still marked as correct packets, thus leaving them to be processed by downstream internal functional modules. This error annotation method can be used to test the internal functional modules' ability to handle erroneous packets.

[0088] Error Injection Method 3: The first error injection method in the link layer's message sending module. In this method, based on the error injection fields configured in the error injection configuration information, the header field in the network message that matches the error injection fields is modified after CRC verification, thus causing a network message error. This error injection method introduces message CRC errors.

[0089] Error Injection Method Four: The second error injection method for the link layer's message sending module. In this method, based on the error injection fields configured in the error injection configuration information, the header field in the network message that matches the error injection field is modified before CRC code calculation, thus causing a network message error. This error injection method introduces message CRC errors. However, this error injection method still ensures CRC correctness.

[0090] During prototype verification and system testing, based on the above error injection methods, different error injection methods can be combined according to the testing requirements to observe the processing results of abnormal messages by the link layer module and internal functional modules, thereby achieving the testing purpose of simulating link layer hardware errors.

[0091] Based on the above message error annotation methods, the overall verification test process is as follows: Figure 3 As shown. In a network system, connected devices are typically divided into master devices and slave devices, where the master device sends messages and the slave device receives messages. When performing verification testing on the devices, first clarify the test objective, and configure the error injection method according to the test requirements. This error injection method can be configured in the storage module in the form of error configuration information. Specifically, one or more of the four methods mentioned above can be selected depending on whether the test is for the link layer or for internal modules. After setting the error injection method, the master device sends messages, the slave device receives messages and processes abnormal messages, and the testers then analyze whether the processing results meet expectations based on the observed phenomena.

[0092] If the current testing requirement is to test the link layer, one or more of the following methods can be used: error injection method 1, error injection method 3, and error injection method 4. The link layer of the device will detect errors in the packets and discard or mark the packets as bad packets. The internal functional modules will not respond after receiving bad packets.

[0093] If the current testing requirement is to test internal functional modules, one or more of error injection methods one, three, or four can be combined with error injection method two. This will allow the device's link layer to still mark the network packet after error injection as a correct packet (since the packet inspection step is skipped, the network packet will not be marked as an abnormal packet). After receiving the network packet, the internal functional module will perform corresponding processing to produce an abnormal packet response.

[0094] If error injection configuration information includes error injection method three or four, the error injector is the master device; if error injection method one is configured, the error injector is the slave device. If error injection configuration information does not include error injection method two, the error injection method is the device link layer test error injection method; otherwise, it is the slave device internal module test error injection method. If error injection configuration information includes error injection method three, the error injection stage is after the network packet error check code is calculated; if error injection method four is configured, the error injection stage is before the network packet error check code is calculated.

[0095] The following will detail the four error correction methods mentioned above.

[0096] An example of error correction method one is as follows: Figure 4AAs shown. This error injection method is implemented by the packet receiving module (RX packet receiving module) of the link layer of the slave device. Taking the IB protocol as an example, the error injection requirements include one or more of the following: VL error injection, SL error injection, DLID error injection, Lver error injection, PktLen error injection in the IB packet header, error injection in the packet payload data, and CRC error injection in the packet. After the error-injected network packet is checked by the link layer, it should be identified as a bad packet and a CRC error should be reported.

[0097] An example of error correction method two is as follows: Figure 4B As shown. This second error injection method is implemented by the packet receiving module (RX packet receiving module) at the device's link layer. It achieves error packet pass-through, meaning that the network packet after error injection skips the packet inspection stage and is not marked as an abnormal packet. After being transmitted to the downstream internal functional module, it is processed by the functional module. This error injection method is used in conjunction with other error injection methods.

[0098] An example of error correction method three is as follows: Figure 4C As shown. This third error injection method is implemented by the message sending module (TX packet sending module) of the master device's link layer. It is performed after the CRC code is calculated and added to the network packet. Taking the IB protocol as an example, the error injection requirements include one or more of the following: VL, SL, DLID, Lver, PktLen error injection in the IB packet header, error injection in the packet payload data, and CRC error injection in the packet. After the error-injected network packet passes through the packet inspection stage of the slave device, it should be identified as a bad packet and a CRC error should be reported.

[0099] An example of error correction method four is as follows: Figure 4D As shown. This fourth error injection method is implemented in the message sending module (TX packet sending module) of the master device's link layer. It is performed before the network packet performs CRC code calculation and adds the CRC code. Taking the IB protocol as an example, the error injection requirements include one or more combinations of VL, SL, DLID, Lver, PktLen errors in the IB message header and error injection in the message payload data. After error injection, the network packet should be identified as a bad packet after being checked by the slave device, but no CRC error will be reported.

[0100] Regarding the four types of error annotation mentioned above...

[0101] During chip development, the storage module enables the four error injection methods mentioned above and controls the enabling of each error injection detail. During prototype verification and system testing, the storage module is used according to specific error injection requirements. After error injection is completed, the error handling results of the device's link layer message receiving module and internal functional modules can be viewed, including through interrupt checks and debug registers.

[0102] Although the above explanation uses the IB protocol as an example, the solution presented in this application is also applicable to other protocols, such as Ethernet, PCIe, and CXL. The solution presented in this application can meet the requirements for chip error injection functionality during both pre-silicon verification and post-silicon testing.

[0103] See Figure 5 The flowchart illustrates that this application also provides an exemplary method for network message error annotation, including:

[0104] Step S501: The master device reads the error injection configuration information stored in the storage module; the error injection configuration information is used to indicate the error injection party; the error injection party includes the master device and the slave device;

[0105] Step S502: When the error configuration information indicates that the error instigator is the master device, the master device instigates the error in the network packet to be sent and then transmits it to the slave device.

[0106] Step S503: When the error configuration information indicates that the error initiator is a slave device, the master device transmits the network packet to be sent to the slave device;

[0107] Step S504: Read error configuration information from the device;

[0108] Step S505: When the error-adding configuration information indicates that the error-adding party is a slave device, the slave device adds errors to the received network packets and performs subsequent processing on the network packets after the errors are added.

[0109] Step S506: When the error configuration information indicates that the error instigator is the master device, and the slave device does not instigate the received network packets, proceed with subsequent processing.

[0110] In some optional embodiments, the error injection configuration information is also used to indicate error injection methods; the error injection methods include error injection methods tested from the device link layer and error injection methods tested from internal modules of the device;

[0111] Error injection methods refer to the subsequent processing of network packets after error injection or without error injection by the device when testing error injection methods at the device link layer. This includes packet inspection and processing performed by downstream modules within the device after packet inspection.

[0112] Error injection methods refer to the subsequent processing of network packets after error injection or without error injection when testing error injection methods from internal modules of the device. This includes processing performed by downstream modules from within the device after skipping packet checks.

[0113] In some optional embodiments, the error-injection configuration information, when instructing the error-injector to be the master device, is also used to instruct the error-injection stage of the network packet, which includes error-injection before the network packet error check code is calculated and error-injection after the network packet error check code is calculated.

[0114] The master device sends the network packet to be sent after annotating it with errors, including:

[0115] During the error injection phase, before calculating the error check code of the network packet, the master device injects the error into the network packet, then calculates the error check code of the network packet after the error injection, and transmits the error check code to the slave device in the network packet after the error injection.

[0116] During the error injection phase, after the network packet error check code is calculated, the master device performs error injection on the network packet after calculating the error check code, and then transmits the error check code in the network packet after error injection to the slave device.

[0117] In some optional embodiments, when the error injection stage is performed after the network packet error check code is calculated, the error injection of the network packet includes one or more combinations of error injection of the packet header field, error injection of the packet payload data, and error injection of the packet error check.

[0118] During the error injection phase, which involves injecting errors before calculating the network packet error check code, the error injection of the network packet includes one or more combinations of error injection in the packet header field and error injection in the packet payload data, but does not include error injection for packet error check.

[0119] In some optional embodiments, the master device includes a link layer message sending module, and the slave device includes a link layer message receiving module; the downstream module inside the slave device is the downstream module of the message receiving module outside the link layer of the slave device.

[0120] Error correction of network packets by the master device is performed by the packet sending module, while error correction of network packets by the slave device is performed by the packet receiving module.

[0121] The above method can be implemented by the network packet error annotation device provided in the above embodiments. For the specific implementation method, please refer to the description of the network packet error annotation device in the above embodiments, which will not be repeated here.

[0122] It is understood that the circuit structures, names, and parameters described in the above embodiments are merely examples. Those skilled in the art can also make readily conceived combinations and adjustments to the structural features of the above embodiments according to their needs, and the concept of this application should not be limited to the specific details of the above examples.

[0123] Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A network message error annotation system, characterized in that, include: Storage modules, master devices, and slave devices; The storage module is used to store error correction configuration information; The error correction configuration information is used to instruct the error correction party; The error-injecting party includes a master device and a slave device; The master device is used to read the error injection configuration information, and when the error injection configuration information indicates that the error injection party is the master device, to inject errors into the network packet to be sent and then transmit it to the slave device, and when the error injection configuration information indicates that the error injection party is the slave device, to transmit the network packet to be sent to the slave device. The slave device is configured to read the error-adding configuration information, and when the error-adding configuration information indicates that the error-adding party is a slave device, to add errors to the received network packets and perform subsequent processing on the network packets after the errors are added; and when the error-adding configuration information indicates that the error-adding party is a master device, to perform subsequent processing on the received network packets without adding errors. If the error injection configuration information indicates that the error injector is a master device, then the error injection is performed by the message sending module of the master device's link layer. The error injection configuration information also configures the error injection stage when the error injector is a master device. The error injection stage includes two stages: before and after the error check code calculation of the network message. If the error injection configuration information indicates that the error injector is a slave device, then the error injection is performed by the message receiving module of the slave device's link layer. The error injection configuration information is also used to indicate error injection methods; the error injection methods include error injection methods for device link layer testing and error injection methods for device internal module testing; the error injection method for device link layer testing refers to testing the link layer module inside the device by injecting errors into network packets, and the error injection method for device internal module testing refers to testing the internal functional modules downstream of the link layer module by injecting errors into network packets.

2. The network message error annotation system according to claim 1, characterized in that, When the error injection method is a test error injection method at the device link layer, the subsequent processing of the network packet after error injection or the network packet without error injection by the slave device includes packet inspection and processing performed by the downstream module inside the slave device after packet inspection. When the error injection method is tested from the internal module of the device, the subsequent processing of the network packet after error injection or the network packet without error injection includes processing performed by the downstream module inside the device after skipping the packet inspection.

3. The network message error annotation system according to claim 1 or 2, characterized in that, When instructing the error-injecting party to be the master device, the error-injection configuration information is also used to indicate the error-injection stage of the network packet. The error-injection stage includes performing error-injection before the network packet error check code is calculated and performing error-injection after the network packet error check code is calculated. When the error injection stage is performed before the network packet error check code is calculated, the master device injects the network packet with errors, then calculates the error check code for the network packet with errors, and transmits the error check code to the slave device in the network packet with errors. During the error injection stage, which is performed after the network packet error check code is calculated, the master device performs error injection on the network packet after calculating the error check code, and transmits the error check code in the network packet after error injection to the slave device.

4. The network message error annotation system according to claim 3, characterized in that, When the error injection stage is performed after the network packet error check code is calculated, the error injection of the network packet includes one or more combinations of error injection of the packet header field, error injection of the packet payload data, and error injection of the packet error check. When the error injection stage is performed before the network packet error check code is calculated, the error injection of the network packet includes one or more combinations of error injection of the packet header field and error injection of the packet payload data, but does not include error injection for packet error check.

5. The network message error annotation system according to any one of claims 1-2 and 4, characterized in that, The master device includes a link layer message sending module, and the slave device includes a link layer message receiving module; the downstream module inside the slave device is the downstream module of the message receiving module outside the link layer of the slave device. Error annotation of the network packets by the master device is performed by the link layer packet sending module, and error annotation of the network packets by the slave device is performed by the link layer packet receiving module.

6. A method for error annotation in network packets, characterized in that, include: The main device reads the error correction configuration information stored in the storage module; The error correction configuration information is used to instruct the error correction party; The error-injecting party includes a master device and a slave device; When the error-adding configuration information indicates that the error-adding party is the master device, the master device adds an error to the network packet to be sent and then transmits it to the slave device. When the error-injection configuration information indicates that the error-injecting party is a slave device, the master device will transmit the network packet to be sent to the slave device; The error configuration information is read from the device; When the error-adding configuration information indicates that the error-adding party is a slave device, the slave device adds errors to the received network packets and performs subsequent processing on the network packets after the errors are added. When the error-injection configuration information indicates that the error-injector is the master device, the slave device will not perform subsequent processing on the received network packets if it does not inject errors into them. If the error injection configuration information indicates that the error injector is a master device, then the error injection is performed by the message sending module of the master device's link layer. The error injection configuration information also configures the error injection stage when the error injector is a master device. The error injection stage includes two stages: before and after the error check code calculation of the network message. If the error injection configuration information indicates that the error injector is a slave device, then the error injection is performed by the message receiving module of the slave device's link layer. The error injection configuration information is also used to indicate error injection methods; the error injection methods include error injection methods for device link layer testing and error injection methods for device internal module testing; the error injection method for device link layer testing refers to testing the link layer module inside the device by injecting errors into network packets, and the error injection method for device internal module testing refers to testing the internal functional modules downstream of the link layer module by injecting errors into network packets.

7. The network message error annotation method according to claim 6, characterized in that, When the error injection method is a test error injection method at the device link layer, the subsequent processing of the network packet after error injection or the network packet without error injection by the slave device includes packet inspection and processing performed by the downstream module inside the slave device after packet inspection. When the error injection method is tested from the internal module of the device, the subsequent processing of the network packet after error injection or the network packet without error injection includes processing performed by the downstream module inside the device after skipping the packet inspection.

8. The network message error annotation method according to claim 6 or 7, characterized in that, When instructing the error-injecting party to be the master device, the error-injection configuration information is also used to indicate the error-injection stage of the network packet. The error-injection stage includes performing error-injection before the network packet error check code is calculated and performing error-injection after the network packet error check code is calculated. The master device sends the network packet to be sent after annotating it with errors to the slave device, including: When the error injection stage is performed before the network packet error check code is calculated, the master device injects the network packet with errors, then calculates the error check code for the network packet with errors, and transmits the error check code to the slave device in the network packet with errors. During the error injection stage, which is performed after the network packet error check code is calculated, the master device performs error injection on the network packet after calculating the error check code, and transmits the error check code in the network packet after error injection to the slave device.

9. The network message error annotation method according to claim 8, characterized in that, When the error injection stage is performed after the network packet error check code is calculated, the error injection of the network packet includes one or more combinations of error injection of the packet header field, error injection of the packet payload data, and error injection of the packet error check. When the error injection stage is performed before the network packet error check code is calculated, the error injection of the network packet includes one or more combinations of error injection of the packet header field and error injection of the packet payload data, but does not include error injection for packet error check.

10. The network message error annotation method according to any one of claims 6-7 and 9, characterized in that, The master device includes a link layer message sending module, and the slave device includes a link layer message receiving module; the downstream module inside the slave device is the downstream module of the message receiving module outside the link layer of the slave device. Error correction of the network packets by the master device is performed by the packet sending module, and error correction of the network packets by the slave device is performed by the packet receiving module.

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