A method for controlling power consumption of a central processing unit, an electronic device and a medium
By setting the option of the central processing unit power consumption value on the device hardware component, the CPU power consumption value is obtained and controlled, which solves the problem of CPU specification mismatch, realizes meeting business needs without replacing CPU hardware, reduces costs and maintains system stability.
Patent Information
- Application Number
- CN202510929220.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-07
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2045-07-07
AI Technical Summary
In the existing technology, the CPU specifications required by the business do not match the specifications of the currently used CPU, resulting in the inability to meet the CPU core count and power consumption requirements. At the same time, replacing the CPU hardware will increase costs and bring compatibility issues.
By setting the central processing unit power consumption value option on the device hardware component, obtaining and sending the target power consumption value, and controlling the CPU power consumption value after the system restart, the number of CPU cores is not reduced, business needs are met, and the compatibility and stability of the hardware system are maintained.
It achieves the goal of meeting CPU core count and power consumption requirements without replacing CPU hardware, reducing upgrade costs and avoiding compatibility issues. It is suitable for multi-core CPUs to handle general computing tasks, avoiding thread priority inversion or resource contention caused by frequent adjustments to computing power, and improving the satisfaction rate of business needs.
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Figure CN120428843B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of servers, and in particular to a power consumption control method of a central processing unit, an electronic device, and a medium. Background Art
[0002] In the actual application of computer systems, different business scenarios have different requirements for Central Processing Unit (CPU) specifications. In practice, the CPU specifications required by the business are often different from those currently used. For example, the business requires a CPU with 24 CPU cores and a power consumption of 165W, while the current CPU used has 24 CPU cores and a power consumption of 205W, which makes it unable to meet the business needs.
[0003] Related technologies have attempted to meet business demands by shutting down some CPU cores. However, this approach reduces the number of available CPU cores, meaning it still fails to meet business demands for both CPU core count and power consumption. Related technologies have also attempted to meet business demands by replacing CPU hardware, but this increases costs and creates compatibility issues between the new CPU hardware and the existing system architecture.
[0004] It can be seen that how to make the CPU meet business needs without replacing the CPU hardware is a technical problem that people in this field urgently need to solve. Summary of the Invention
[0005] The present invention provides a power consumption control method, electronic device and medium for a central processing unit, so as to at least solve the problems in related technologies that the business requirements for the number of CPU cores and power consumption cannot be fundamentally met, as well as the problems of high cost and the need to consider compatibility.
[0006] The present invention provides a method for controlling power consumption of a central processing unit (CPU), which is applied to a hardware component of a device. The method comprises:
[0007] During the self-startup phase, obtaining a target power consumption value of the central processing unit required by the first user;
[0008] Sending the target power consumption value to the second user so that the second user can add the target power consumption value to an option for setting the power consumption value of the central processing unit of the component; wherein the option for setting the power consumption value of the central processing unit is set by the second user;
[0009] After the system is restarted, the second user's operation on the component is responded to so as to control the power consumption value of the central processing unit to be the target power consumption value.
[0010] The beneficial effects of the present invention are as follows: first, in this method, the second user (i.e., the R&D personnel) sets an option for setting the power consumption value of the central processing unit on the device hardware component. Then, during its own startup phase, the device hardware component obtains the target power consumption value of the central processing unit required by the first user (i.e., the customer), and sends the target power consumption value to the second user. The second user can add the target power consumption value to the option for setting the power consumption value of the central processing unit in this component. When the system restarts, the central processing unit with the power consumption value of the target power consumption value can be obtained, thereby realizing the control of the power consumption value of the central processing unit; second, the CPU core is not shut down in this method, so the number of available CPU cores is not reduced, and the target power consumption value of the CPU is the power consumption value required by the first user. It can be seen that the method provided by the present invention can still meet the business requirements for the number of CPU cores and power consumption; third, the CPU hardware is not replaced in this method, so the cost of purchasing a new CPU is saved. For enterprises or individual users, the upgrade cost is greatly reduced, and the original architecture and compatibility of the hardware system are maintained. For some systems with high hardware compatibility requirements, such as specific industrial control computers, server clusters, etc., compatibility issues that may be caused by replacing the CPU are avoided, ensuring that the system can run stably and normally. In addition, since the CPU power consumption is controlled by changing the power consumption value of the option for setting the central processing unit power consumption value on the device hardware component, the setting can be customized according to the customer's different application usage scenarios and needs to meet the setting requirements of different customers for the same CPU. In addition, in this method, the CPU power consumption is controlled by changing the power consumption value of the option for setting the central processing unit power consumption value on the device hardware component, rather than by avoiding redundancy in calculating non-calculating parts. The purpose of reducing power consumption is to reduce power consumption. Therefore, the method provided by the present invention is applicable to scenarios where there is no data redundancy, and can meet the needs of multi-core CPUs processing general computing tasks (such as database queries and scientific computing); moreover, the method does not reduce the core operating frequency by adjusting the computing power resource usage of the task to achieve the purpose of reducing power consumption. Therefore, there is no problem of frequent adjustment of computing power that may lead to thread priority inversion or resource contention, that is, it can meet business needs; moreover, the method does not reduce CPU power consumption by prefetching data from the cache. Therefore, there is no problem of prediction failure (such as random access mode) that increases power consumption, that is, the method provided by the present invention relatively improves the success rate of meeting business needs.
[0011] The present invention also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned methods for controlling power consumption of a central processing unit when executing the computer program.
[0012] The present invention also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned methods for controlling power consumption of a central processing unit are implemented. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In order to more clearly illustrate the embodiments of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0014] Figure 1 A schematic diagram of a power consumption control architecture of a central processing unit provided by an embodiment of the present invention;
[0015] Figure 2 A flowchart of a method for controlling power consumption of a central processing unit provided by an embodiment of the present invention;
[0016] Figure 3 A flowchart of a method for controlling CPU power limitation through hardware provided by an embodiment of the present invention;
[0017] Figure 4 A flowchart of a method for adapting multi-core CPU energy efficiency optimization based on power limit adjustment options set on device hardware components is provided in an embodiment of the present invention. DETAILED DESCRIPTION
[0018] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.
[0019] It should be noted that, in the description of the present invention, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. The terms "first," "second," etc., in the present invention are used to distinguish similar objects, and are not used to describe a particular order or precedence.
[0020] In order to enable those skilled in the art to better understand the solutions of the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific implementation methods. Figure 1A schematic diagram of a power consumption control architecture of a central processing unit provided by an embodiment of the present invention is shown as follows: Figure 1 As shown in FIG, the architecture includes: a motherboard memory, a management controller, a motherboard logic device, and a device hardware component connected in sequence. The motherboard memory can be a motherboard electrically erasable programmable read-only memory (EEPROM), the management controller can be a baseboard management controller (BMC), the motherboard logic device can be a complex programmable logic device (CPLD), and the device hardware component can be a basic input / output system (BIOS).
[0021] An embodiment of the present invention provides a method for controlling power consumption of a central processing unit (CPU), which is applied to a device hardware component (such as BIOS). Figure 2 A flowchart of a method for controlling power consumption of a central processing unit provided by an embodiment of the present invention is shown in FIG. Figure 2 As shown, the method includes:
[0022] S10: During the self-startup phase, obtaining a target power consumption value of the central processing unit required by the first user;
[0023] S11: sending the target power consumption value to the second user, so that the second user adds the target power consumption value to the option for setting the power consumption value of the central processing unit of the component; wherein the option for setting the power consumption value of the central processing unit is set by the second user;
[0024] S12: After the system is restarted, respond to the second user's operation on the component to control the power consumption value of the central processing unit to be the target power consumption value.
[0025] It should be noted that the first user described in this invention refers to a customer, and the second user refers to a R&D personnel. There is no limit on the target power consumption value of the CPU required by the first user, and it is determined based on actual circumstances. For example, if a 205W 24C CPU has 24 CPU cores and consumes 165W of power, and the business scenario requires a 165W 24C CPU, then the target power consumption value of the CPU required by the first user is 165W.
[0026] In practice, there are a large number of servers. In order to control the power consumption of CPUs of various types of servers, in some embodiments, obtaining the target power consumption value of the central processing unit required by the first user includes:
[0027] receiving, via a mainboard memory, a file containing a mapping relationship between configuration information of the server and a target power consumption value of a central processing unit;
[0028] Obtaining, through the management controller, configuration information of the target server customized by the first user, obtaining a target power consumption value of a central processing unit corresponding to the target server from a file stored in a mainboard memory according to the configuration information of the target server, and sending the target power consumption value to the logic device;
[0029] A target power consumption value of a central processing unit required by a first user is obtained from a logic device.
[0030] The server configuration information (i.e., the server package configuration) can include information such as the number of CPU models, number of memory models, DPU, GPU, and OCP network card. Server package information can be obtained from the Product Lifecycle Management (PLM) platform. The server package configuration that meets the customer's customized requirements is screened. After obtaining the server package configuration, a binary file (binary file) is created that maps the server configuration information to the target power consumption value of the CPU.
[0031] In some embodiments, establishing a file containing a mapping relationship between configuration information of the server and a target power consumption value of the central processing unit includes:
[0032] Obtaining the server's configuration information and determining the server's link topology relationship based on the configuration information;
[0033] Obtaining fields for characterizing power consumption limits; wherein the fields for characterizing power consumption limits include at least fields characterizing the number of central processing units configured in the server, fields characterizing power consumption value limit conditions, fields characterizing heat dissipation device conditions, and fields characterizing network card conditions;
[0034] A file is created based on the link topology relationship and the fields used to represent the power consumption limit.
[0035] Among them, the field representing the number of central processing units configured in the server can be expressed as: EEPROM_OFFSET_CPU_NUM_CONFIG; the field representing the power consumption value limit can be expressed as EEPROM_OFFSET_CPU_RAPL; the field representing the heat dissipation device situation can be expressed as: EEPROM_OFFSET_FAN_NUM_CONFIG; EEPROM_OFFSET_FAN_TYPE; EEPROM_OFFSET_COOLING_STRATEGY; the field representing the network card situation can be expressed as: EEPROM_OFFSET_DPU_MACHINE; EEPROM_OFFSET_DPU_TYPE; EEPROM_OFFSET_DPU_SLOT.
[0036] To better understand the process of establishing a file containing the mapping relationship between the server configuration information and the target power consumption value of the central processing unit, the following describes the process of creating a 24C BIN file, taking the customized server with a 205W 24C 6700P CPU and a 165W CPU as an example. The steps for creating a 24C BIN file are as follows:
[0037] (1) First, obtain the package information of the server required by the customer from the system, including all the information about the operation of the shipped machine, including the number of CPU models, number of memory models, DPU, GPU, OCP network card and other PCIE configuration topology;
[0038] (2) Select the package configuration machines with 205W 24C CPUs that meet the customer's customized requirements. Based on the topological links of these machines, a 24C BIN file is developed and saved as a 24C_EEPROM.xls document. This file defines the topological links of each machine. Table 1 is a package configuration table.
[0039] Table 1
[0040]
[0041] Each CPU has five PCIe Gen5 x16 root ports. Each root port can be configured in various configurations, including x16, x8, x4, and x2. CPU0 PE0 is divided into eight x2 configurations, including x4 for NVME hard drives, x8 for OCP network cards, and x16 for PCIe network cards. Each package configuration is organized according to the above format. For the 205W 24C CPU configuration, a new EEPROM Factory config= configuration file RAPL field is added to the EEPROM.xls file. Table 2 shows the memory field table. The RAPL field in the configuration file is used to differentiate configurations, maintain the same number of CPU cores, and limit power consumption.
[0042] Table 2
[0043]
[0044] The 24C BIN file is obtained through the above method.
[0045] After creating a file that contains the mapping between the server configuration information and the CPU's target power consumption, it is burned into the motherboard memory (such as the motherboard EEPROM). This means that the motherboard memory receives the file containing the mapping between the server configuration information and the CPU's target power consumption (i.e., the Runtime Adjustment Power Limit (RAPL) value). The management controller (such as the BMC) then retrieves the RAPL value from the motherboard's EEPROM through a command and sends it to the CPLD. The BIOS can then read the RAPL value from the CPLD.
[0046] In this method, the BIOS obtains the target power consumption value through the motherboard memory, BMC, and CPLD in sequence. By binding the machine model in the file with the target power consumption value, batch control of server CPU power consumption can be achieved.
[0047] The BIOS obtains the target power consumption value from the CPLD. To ensure that the target power consumption value obtained by the BIOS is correct, it is first necessary to ensure that the CPLD stores the latest target power consumption value. In some embodiments, the management controller and the logic device are connected via a first register and a second register. Before obtaining the target power consumption value of the central processing unit required by the first user from the logic device, the following steps are further included:
[0048] The target power consumption value sent to the logic device is stored in the first register by the management controller;
[0049] The logic device stores the received target power consumption value in its own storage space through the logic device, and transmits the target power consumption value stored in its own storage space back to the second register;
[0050] When the management controller detects that the target power consumption value stored in the first register is the same as the target power consumption value stored in the second register, the step of obtaining the target power consumption value of the central processing unit required by the first user from the logic device is entered.
[0051] In practice, some servers limit the CPU power consumption value, while some servers do not need to limit the CPU power consumption. In some embodiments, before sending the target power consumption value to the second user, the method further includes:
[0052] When it is detected that a field for configuring a power consumption value limit exists in the field representing the power consumption value limit, the model of the central processing unit is obtained, and the power consumption value is added after the model of the central processing unit;
[0053] When it is detected that a field for power consumption value limitation configuration exists in the field representing the power consumption value limitation situation, the model of the central processing unit is acquired and the model of the central processing unit is output.
[0054] To help those skilled in the art better understand the method by which the BIOS obtains the target power consumption value, and the operations performed on the BIOS after obtaining the target power consumption value, the following describes the process using the aforementioned 205W 24C 6700P CPU as an example. The process specifically includes the following steps:
[0055] (1) Burn the 24C.bin file to the EEPROM of the mainboard in the operating system environment through in-band or out-of-band methods;
[0056] (2) To ensure that this area does not conflict with other important data and to ensure storage stability and read / write efficiency, an EEPROM_RAPL storage space is established in the BMC FW. The BMC obtains the RAPL value in the motherboard's EEPROM through the ipmitool command. After obtaining the RAPL value, it is written into the EEPROM_RAPL. At the same time, two new registers are added between the motherboard CPLD and the BMC, respectively used to obtain the RAPL value issued by the BMC and to return the RAPL value in the UFM of the current motherboard CPLD. The UFM space of the CPLD is used to store the value of the new RAPL each time the BMC issues it.
[0057] (3) In the early stage of BIOS startup, the eSPI IO interface is initialized to ensure that the communication link between it and the CPLD is working properly. During the BIOS startup process, the RAPL power consumption setting value is read from the CPLD through the eSPI IO method. A new SOCKET RAPL Config third-level menu is added to the second-level menu of the BIOS Advanced Power Management Configuration to set the RAPL function. PL1 Power Limit is added to store the setting value of the RAPL power consumption read by the motherboard. At the same time, a logical judgment is added to the BIOS CMOS code to check whether the obtained EEPROM_OFFSET_CPU_RAPL is 0X00. If it is not 0X00, it is considered that there is a special RAPL configuration. When a special RAPL setting is detected, a suffix of -165W is added to the obtained CPU model. If the EEPROM_OFFSET_CPU_RAPL is 0X00, it is determined that the RAPL is not a special setting, and the suffix is not added, and only the current CPU model is displayed. In addition, to prevent ordinary users from modifying the RAPL value in the OS, a new Package RAPL Limit Lock action is added, which is enabled by default.
[0058] In this method, a first register and a second register are set between the management controller and the logic device. The first register is used to store the target power consumption value sent by the management controller to the logic device, and the second register is used to store the target power consumption value read from the logic device. By verifying the values stored in the first and second registers, it is possible to verify that the target power consumption value obtained by the logic device is the latest target power consumption value. When it is determined that the logic device has obtained the latest target power consumption value, it can be guaranteed that the management controller also obtains the latest target power consumption value from the logic device, thereby improving the accuracy of the server CPU power consumption value limit and meeting customer needs as much as possible. In addition, the EEPROM_OFFSET_CPU_RAPL field is checked to see if there are special restrictions on the power consumption value. If so, it is set. Otherwise, only the model number is output, so that only special power consumption configurations are displayed.
[0059] To ensure that the target power consumption value is correctly transmitted between the CPLD and the BIOS, in implementation, before sending the target power consumption value to the second user, the method further includes:
[0060] Acquire, from the logic device, a first verification value obtained after the logic device verifies the target power consumption value;
[0061] After obtaining the target power consumption value of the central processing unit required by the first user from the logic device, verifying the target power consumption value and obtaining a second verification value;
[0062] When it is detected that the first check value is equal to the second check value, entering the step of sending the target power consumption value to the second user;
[0063] When it is detected that the first verification value is not equal to the second verification value, a request for obtaining a target power consumption value is sent to the logic device.
[0064] Specifically, to ensure transmission reliability over the ESPI link, the motherboard's CPLD performs a cyclic redundancy check (CRC) on the RAPL data being transmitted and appends the resulting checksum to the data before sending it. Upon receiving the data, the BIOS performs another CRC calculation on the data and compares it with the received checksum. If the two values are equal, transmission is error-free. If not, an error has occurred, and the BIOS sends another request to the CPLD for the RAPL data.
[0065] In the method, the reliability of data transmission is ensured by verifying the consistency of the target power consumption value sent to the BIOS and the target power consumption value received by the BIOS.
[0066] In order to verify that the power consumption value of the CPU is set successfully, in some embodiments, the power consumption of the CPU is controlled at the hardware level. After the system restarts, in response to the second user's operation on this component to control the power consumption value of the central processor to the target power consumption value, the following is also included:
[0067] receiving a target power consumption value through a pulse width modulation controller in a voltage regulation module on the mainboard and obtaining a supply voltage of the voltage regulation module on the mainboard; determining a current threshold for supplying power to the central processing unit based on the target power consumption value and the supply voltage; and supplying power to the central processing unit according to the current threshold to control the power consumption of the central processing unit;
[0068] Alternatively, a voltage value collected by a voltage sensor and a current value collected by a current sensor inside the central processing unit are obtained through a logic unit inside the central processing unit; an actual power consumption value of the central processing unit is determined based on the voltage value and the current value; the actual power consumption value is compared with the target power consumption value and a comparison result is obtained;
[0069] When it is detected that the actual power consumption value is greater than the target power consumption value as a result of the comparison, the power management module inside the central processing unit sends information indicating that the actual power consumption value is greater than the target power consumption value to the clock generator and the voltage controller, and reduces the frequency of the central processing unit core through the frequency divider and reduces the voltage of the central processing unit core through the voltage controller, so as to reduce the power consumption of the central processing unit;
[0070] When it is detected that the actual power consumption value is less than the target power consumption value as a result of the comparison, and the difference between the target power consumption value and the actual power consumption value is less than a preset power consumption difference, the central processing unit turns off the power supply of the preset module to reduce the power consumption of the central processing unit; wherein the preset module includes a cache module or an input / output module;
[0071] When it is detected that the current value is greater than the current threshold, the load is reduced by the central processing unit or a prompt message indicating a reduction in power supply is sent to the voltage regulation module on the mainboard, so that the voltage regulation module on the mainboard controls the power supply of the central processing unit according to the prompt message to control the power consumption of the central processing unit.
[0072] There is no limit on the preset power consumption difference and current threshold, which are determined according to actual conditions. In addition, after the CPU power consumption is reduced to the target power consumption value, the CPU temperature is obtained and the fan speed is adjusted according to the temperature to limit the CPU power to the target power consumption value. In order to make those skilled in the art better understand the above-mentioned control of the CPU power limit through hardware, the following is combined with Figure 3 The above process is described with specific embodiments. Figure 3 A flowchart of a method for controlling CPU power limitation through hardware is provided in an embodiment of the present invention. Figure 3 As shown, the method includes:
[0073] S13: The device hardware component sets the central processing unit power consumption value to a target power consumption value;
[0074] S14: The CPU power management module receives the threshold value, and the motherboard voltage regulation module limits the supply current;
[0075] S15: The sensor calculates the actual power consumption value in real time;
[0076] S16: Determine whether the current actual power consumption value is greater than or equal to the target power consumption value; if so, proceed to step S17;
[0077] S17: performing power consumption reduction operation;
[0078] S18: Determine whether the power consumption drops below the target power consumption value;
[0079] S19: Temperature sensor monitoring ensures safety;
[0080] S20: The cooling system adjusts fan speed as needed.
[0081] Specifically, step S17 includes:
[0082] S170: Reduce frequency or voltage through dynamic voltage and frequency scaling technology;
[0083] S171: Power gating to shut down idle modules;
[0084] S172: Request the mainboard voltage regulation module to reduce the power supply.
[0085] At the hardware level, the power limit control mechanism involves the coordinated work of the CPU's power management module, sensors, and the motherboard's power supply system. The specific principles and implementation methods are as follows:
[0086] 1) The core mechanism of the CPU's internal power management module: The current CPU's internal core wafer integrates high-precision voltage V and current I sensors, which can monitor the power supply status of modules such as the core, cache, and memory controller in real time. Based on these sensor data, the CPU's internal logic unit calculates the actual power (P=V×I) in real time and compares it with the RAPL threshold (165W) set by the BIOS. When the power is detected to be close to the threshold, the limiting mechanism is triggered. The CPU's power consumption is proportional to the square of the voltage and the frequency, P dynamic = C×V 2 ×f, where C represents the load capacitance, V represents the supply voltage, and f represents the operating frequency.
[0087] When the power exceeds the threshold, the power management module will send signals to the clock generator and voltage regulator, reduce the CPU core frequency through the divider, reduce the computing power consumption per unit time, and reduce the core voltage through the internal voltage controller, reducing power consumption in a quadratic relationship. When the power approaches the threshold, the CPU will selectively shut down the cache or I / O module, cut off the power supply to these modules through "power gating", and reduce invalid power consumption.
[0088] 2) Coordinated Control of the Motherboard Power Supply System: The Pulse Width Modulation (PWM) controller in the motherboard voltage regulator module (VRM) limits the maximum current supplied to the CPU based on the RAPL parameters set in the BIOS. For example, when the RAPL is set to 165W, the VRM will limit the output current to a safe value at the corresponding voltage (for example, at 12V, the current limit is approximately 13.75A). When power limiting is in effect, the VRM adjusts the switching frequency and duty cycle of each phase to ensure that the total output power does not exceed the threshold and prevent overheating of a single power supply. The current sense resistors in the VRM provide real-time feedback to the CPU's power management module, forming a closed-loop control loop. If the current exceeds the 165W threshold, the CPU will actively reduce the load or request the VRM to reduce power. The VRM also has a hardware-level overcurrent protection mechanism that forcibly reduces output when current is abnormal to prevent damage to the CPU or motherboard, providing dual protection alongside the BIOS RAPL setting.
[0089] 3) Hardware coordination of the cooling system: The RAPL set in the BIOS also corresponds to a temperature safety range. A power consumption of 165W usually keeps the CPU temperature within the range that the cooling system can handle (such as 70-80°C under air cooling) to avoid triggering automatic protection due to overheating. The motherboard's PWM fan controller will adjust the cooling fan speed according to the CPU temperature (indirectly reflecting power). When the CPU power is limited to 165W, the temperature rise rate slows down, and the fan can maintain heat dissipation at a lower speed, forming a "power-temperature-heat dissipation" cycle.
[0090] Hardware-level power limiting is the result of a coordinated effort between the CPU's internal power management module, the motherboard's power supply system, temperature sensors, and cooling hardware. By real-time power monitoring, dynamic voltage and frequency adjustments, and supply current control, combined with thermal protection mechanisms, the CPU maintains stable operation at a set 165W, ensuring unleashing performance while preventing hardware overload.
[0091] Furthermore, a prediction model is deeply integrated into the BIOS, enabling real-time prediction of future CPU power requirements based on historical power consumption data, current task progress, and system status. When an impending power fluctuation is predicted, the CPU's internal power management module and the motherboard power supply system are used to control the CPU's power consumption to the target value.
[0092] This method predicts power consumption fluctuations in advance to achieve active and precise control of CPU power consumption. It can avoid frequency reduction and stalling caused by sudden high loads, and prevent energy waste at low loads, allowing the CPU to always run in an efficient state. In addition, through deep collaboration with hardware, the stability and reliability of the system are enhanced, reducing the risk of hardware failure caused by abnormal power consumption.
[0093] After completing the software and hardware interaction, immediately conduct a comprehensive system check. The most critical first step is to confirm that there are no bacc-related alarms in the System Event Log (SEL). The SEL is a crucial log repository for recording critical events and error messages. The appearance of bacc-related alarms may indicate potential issues with hardware component connectivity, power management, or other critical functional modules. This could potentially affect the proper implementation of RAPL settings and even threaten the stability of the entire system. The system health indicator is also a key indicator. The system health indicator uses different colors and flashing patterns to visually reflect the overall system health. Under normal circumstances, the system health indicator should display solid green or follow the pre-set indicator pattern for normal operation. If the health indicator displays solid red, flashes rapidly, or displays other abnormal indicators, it indicates a serious internal system failure and requires replacing the device and recreating the bin file.
[0094] To verify the success of the setup and check the stability of the CPU power consumption, after the system restarts and responds to the second user's operation on this component, the following steps are also included:
[0095] Obtain information including the correspondence between the CPU model and power consumption value;
[0096] When it is determined according to the information that the model of the central processing unit is the model of the target central processing unit and the power consumption value is the target power consumption value, the actual power consumption value of the central processing unit when the stress test is performed on the server under the operating system is obtained;
[0097] When it is detected that the actual power consumption value of the central processing unit remains at the target power consumption value, the power consumption control of the central processing unit is completed.
[0098] Specifically, log in to the server, enter the BIOS POST interface, check whether the CPU model is 6700P-165W, and at the same time perform PMax stress and pressure on the CPU and memory under the OS to monitor whether the CPU power consumption is always maintained at 165W. Continue to execute Sepcecpu under the OS to perform CPU performance testing to ensure that performance is not affected.
[0099] In order to prevent users from tampering with power consumption settings and simplify the BIOS interface, in implementation, before sending the target power consumption value to the second user, the method further includes:
[0100] When receiving information from a second user indicating that the server is currently in a research and development stage, displaying an option for setting a central processing unit power consumption value;
[0101] After the system is restarted, in response to the second user's operation on the component to control the power consumption value of the central processing unit to the target power consumption value, the method further includes:
[0102] When receiving information sent by a second user indicating that the server is currently in a grayscale stage or a mass production stage, the option for setting the power consumption value of the central processing unit is hidden.
[0103] That is, after the RAPL function is successfully adapted and the server reaches the grayscale and mass production stages, the product users are mostly ordinary users or enterprise operation and maintenance personnel. To prevent user tampering, the BIOS hides the RAPL function through the advanced menu of advance setup.
[0104] In order to make the whole process of the power consumption control method of the central processing unit described above, the following Figure 4 The above process is described with specific embodiments. Figure 4A flowchart of a method for adapting multi-core CPU energy efficiency optimization based on power limit adjustment options set on device hardware components is provided in an embodiment of the present invention, such as Figure 4 As shown, the method includes:
[0105] S21: Obtain server package information from the product lifecycle management platform;
[0106] S22: filtering the package information to include server package information customized by the customer;
[0107] S23: Create a binary file of a server customized according to customer needs;
[0108] S24: Use the memory tool to burn the binary file;
[0109] S25: Burn the binary file into the mainboard memory;
[0110] S26: The binary file in the motherboard memory is transmitted to the baseboard management controller;
[0111] S27: The target power consumption value in the binary file is transmitted to the mainboard logic device through a command, and the mainboard logic device stores the target power consumption value in its own storage space;
[0112] S28: transmitting the target power consumption value to the basic input and output system;
[0113] S29: Check whether the transfer is successful; if not, return to step S24; if so, go to step S30;
[0114] S30: Power on the machine and enter the system;
[0115] S31: Check whether there is any abnormal alarm in the management controller system event log and whether the machine is red lighted; if so, proceed to step S32; if not, proceed to step S34;
[0116] S32: Determine whether the machine is faulty; if not, return to step S23; if so, proceed to step S33;
[0117] S33: Replace the machine and return to step S21;
[0118] S34: Check whether the target power consumption value is set successfully; if so, proceed to step S35; if not, return to step S32;
[0119] S35: Confirm acceptance and use stress testing tools to test the performance and stress of the CPU;
[0120] S36: Check whether the performance result is greater than or equal to 85% of the theoretical value; if not, proceed to step S37; if so, proceed to step S38;
[0121] S37: Confirm the test failure and submit the error for analysis;
[0122] S38: Check whether there are any abnormal phenomena such as abnormality, downtime, black screen, etc. during the pressure execution; if not, return to step S37; if so, go to step S39;
[0123] S39: Confirm that the test passed.
[0124] The method provided by this invention eliminates the need to replace the CPU when handling diverse server business scenarios. Leveraging the RAPL (Rescaling Power Limit) function, the server can flexibly adjust the number of CPU cores, precisely adapting to diverse customer needs in different scenarios. For example, when a server's business operates in cloud computing or virtualization scenarios, cloud computing data centers need to support a large number of virtual machines and containers to meet the needs of different users and applications. Each virtual machine or container may require only a small amount of computing resources, but the overall number is large, necessitating a server with a large number of cores to handle multiple tasks simultaneously. Furthermore, when businesses perform big data processing and analysis, deploying Hadoop clusters to handle massive amounts of data typically requires a large number of computing cores to process data in parallel and improve processing efficiency. When servers perform artificial intelligence training and inference tasks, model training requires substantial computing resources to handle complex neural networks. CPU computing power is required, particularly during data preprocessing and model deployment. For computationally intensive tasks such as scientific computing and deep learning, high-core CPUs can process large amounts of data in parallel, accelerating the computational process. They can efficiently handle multiple tasks and enhance the processing capabilities of technology-intensive tasks.
[0125] At the same time, low-power operation helps maintain stable performance during long computing cycles, avoids frequency throttling due to overheating, and reduces electricity costs. High core count and low power requirements can be met without replacing the CPU, avoiding the high cost of purchasing a new, high-performance, low-power CPU. Retaining the CPU avoids compatibility issues and installation errors that can arise from hardware replacement, reducing the probability of hardware failure. As a core component of a server, the CPU can be damaged during replacement due to static electricity, improper installation, or incompatibility between the new CPU and other hardware, leading to system instability. Keeping the existing CPU running in the correct state ensures long-term stable system operation. In certain business scenarios, server software may have specific CPU requirements or compatibility restrictions. Retaining the CPU ensures that software runs in a familiar hardware environment, avoiding software anomalies or malfunctions caused by CPU replacement, reducing software debugging and reconfiguration efforts, and ensuring business continuity.
[0126] At the same time, phased management is implemented. Enabling the RAPL function in the BIOS during the R&D phase allows R&D personnel to observe and evaluate system performance under different workloads, as well as the relationship between power consumption and performance, helping to optimize system design. Hiding the power limit option in the BIOS during the grayscale or mass production phase prevents ordinary users from accidentally changing power settings, which could lead to unstable system performance or other issues. This also simplifies user operations in the BIOS interface, making it easier to use and maintain.
[0127] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.
[0128] An embodiment of the present invention further provides a power consumption control device for a central processing unit, comprising:
[0129] A first acquisition module is used to acquire a target power consumption value of a central processing unit required by a first user during its own startup phase;
[0130] a sending module, configured to send the target power consumption value to the second user, so that the second user can add the target power consumption value to an option for setting the power consumption value of the central processing unit of the component; wherein the option for setting the power consumption value of the central processing unit is set by the second user;
[0131] The response module is used to respond to the second user's operation on the component after the system is restarted, so as to control the power consumption value of the central processing unit to be the target power consumption value.
[0132] In some embodiments, the first acquisition module includes:
[0133] A receiving module is used to receive a file containing a mapping relationship between the configuration information of the server and the target power consumption value of the central processing unit through the mainboard memory;
[0134] A second acquisition module is configured to acquire, through the management controller, configuration information of the target server customized by the first user, obtain a target power consumption value of a central processing unit corresponding to the target server from a file stored in a mainboard memory according to the configuration information of the target server, and send the target power consumption value to the logic device;
[0135] The third acquisition module is configured to acquire the target power consumption value of the central processing unit required by the first user from the logic device.
[0136] In some embodiments, the power consumption control device of the central processing unit includes an establishment module for establishing a file containing a mapping relationship between the configuration information of the server and the target power consumption value of the central processing unit.
[0137] The establishment module specifically includes:
[0138] A fourth acquisition module, configured to acquire configuration information of the server and determine a link topology relationship of the server according to the configuration information;
[0139] a fifth acquisition module, configured to acquire fields for characterizing power consumption limits; wherein the fields for characterizing power consumption limits include at least a field characterizing the number of central processing units configured in the server, a field characterizing power consumption value limit conditions, a field characterizing heat dissipation device conditions, and a field characterizing network card conditions;
[0140] A submodule is established to establish a file according to a link topology relationship and a field for representing power consumption limit.
[0141] In some embodiments, the power consumption control device of the central processing unit further includes:
[0142] A first storage module, configured to store the target power consumption value sent to the logic device in a first register through the management controller;
[0143] A second storage module is configured to store the received target power consumption value in its own storage space through a logic device, and transmit the target power consumption value stored in its own storage space back to the second register;
[0144] The first detection module is configured to trigger the third acquisition module when the management controller detects that the target power consumption value stored in the first register is the same as the target power consumption value stored in the second register.
[0145] In some embodiments, the power consumption control device of the central processing unit further includes:
[0146] A first verification module is used to obtain, from the logic device, a first verification value obtained after the logic device verifies the target power consumption value;
[0147] A second verification module is configured to, after obtaining the target power consumption value of the central processing unit required by the first user from the logic device, verify the target power consumption value and obtain a second verification value;
[0148] A second detection module is configured to trigger the sending module when detecting that the first check value is equal to the second check value;
[0149] The third detection module is configured to send a request for acquiring a target power consumption value to the logic device when detecting that the first verification value is not equal to the second verification value.
[0150] In some embodiments, the power consumption control device of the central processing unit further includes:
[0151] An acquisition and addition module, configured to acquire the model of the central processing unit and add the power consumption value after the model of the central processing unit when detecting that a field for configuring power consumption value restriction exists in the field representing the power consumption value restriction situation;
[0152] The acquisition and output module is used to acquire the model of the central processing unit and output the model of the central processing unit when it is detected that a field for power consumption value limitation configuration exists in the field representing the power consumption value limitation situation.
[0153] In some embodiments, the power consumption control device of the central processing unit further includes:
[0154] a first control module configured to receive a target power consumption value through a pulse width modulation controller in a voltage regulation module on the mainboard, and obtain a supply voltage of the voltage regulation module on the mainboard; determine a current threshold for supplying power to the central processing unit based on the target power consumption value and the supply voltage; and supply power to the central processing unit based on the current threshold to control the power consumption of the central processing unit;
[0155] Alternatively, a comparison module is configured to obtain, through a logic unit within the central processing unit, a voltage value collected by a voltage sensor and a current value collected by a current sensor within the central processing unit; determine an actual power consumption value of the central processing unit based on the voltage value and the current value; compare the actual power consumption value with a target power consumption value and obtain a comparison result;
[0156] a second control module, configured to, when detecting that the comparison result shows that the actual power consumption value is greater than the target power consumption value, cause the power management module within the central processing unit to send information indicating that the actual power consumption value is greater than the target power consumption value to the clock generator and the voltage controller, and to reduce the frequency of the central processing unit core through the frequency divider and the voltage of the central processing unit core through the voltage controller, thereby reducing the power consumption of the central processing unit;
[0157] a third control module, configured to, when detecting that the actual power consumption value is less than the target power consumption value and the difference between the target power consumption value and the actual power consumption value is less than a preset power consumption difference, shut down power supply to a preset module via the central processing unit to reduce power consumption of the central processing unit; wherein the preset module includes a cache module or an input / output module;
[0158] The fourth control module is used to reduce the load through the central processing unit or send a prompt message indicating a reduction in power supply to the voltage regulation module on the mainboard when it detects that the current value is greater than the current threshold, so that the voltage regulation module on the mainboard controls the power supply of the central processing unit according to the prompt message to control the power consumption of the central processing unit.
[0159] In some embodiments, the power consumption control device of the central processing unit further includes:
[0160] a receiving and displaying module, configured to display an option for setting a central processing unit power consumption value when receiving information sent by a second user indicating that the server is currently in a research and development stage;
[0161] The power consumption control device of the central processing unit also includes:
[0162] The receiving and hiding module is used to hide the option for setting the power consumption value of the central processing unit when receiving information sent by a second user that indicates that the server is currently in the gray stage or the mass production stage.
[0163] For the description of the features in the embodiment corresponding to the power consumption control device of the central processing unit, reference can be made to the relevant description of the embodiment corresponding to the power consumption control method of the central processing unit, which will not be repeated here.
[0164] An embodiment of the present invention further provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps of any of the above-mentioned embodiments of the method for controlling power consumption of a central processing unit.
[0165] An embodiment of the present invention further provides a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps of any of the above-mentioned embodiments of the method for controlling power consumption of a central processing unit when running.
[0166] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.
[0167] An embodiment of the present invention further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps of any of the above-mentioned embodiments of the method for controlling power consumption of a central processing unit are implemented.
[0168] An embodiment of the present invention also provides another computer program product, including a non-volatile computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, it implements the steps of any of the above-mentioned central processing unit power consumption control method embodiments.
[0169] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.
[0170] The above is a detailed introduction to the power consumption control method, electronic device and medium of a central processing unit provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the present invention.
Claims
1. A method for controlling power consumption of a central processing unit, characterized in that: Applied to a device hardware component, the method includes: During the self-startup phase, obtaining a target power consumption value of the central processing unit required by the first user; Sending the target power consumption value to a second user so that the second user adds the target power consumption value to an option for setting a central processing unit power consumption value of the component; wherein the option for setting a central processing unit power consumption value is set by the second user; After the system is restarted, responding to the second user's operation on the component, to control the power consumption value of the central processing unit to the target power consumption value; After the system is restarted, responding to the second user's operation on the component to control the power consumption value of the central processing unit to the target power consumption value, the method further includes: Receiving the target power consumption value through a pulse width modulation controller in a voltage regulation module on the mainboard, and obtaining a supply voltage of the voltage regulation module on the mainboard; determining a current threshold for supplying power to the central processing unit based on the target power consumption value and the supply voltage; and supplying power to the central processing unit according to the current threshold to control the power consumption of the central processing unit; Alternatively, a voltage value collected by a voltage sensor and a current value collected by a current sensor inside the central processing unit are obtained through a logic unit inside the central processing unit; an actual power consumption value of the central processing unit is determined based on the voltage value and the current value; the actual power consumption value is compared with the target power consumption value and a comparison result is obtained; When it is detected that the comparison result shows that the actual power consumption value is greater than the target power consumption value, the power management module inside the central processing unit sends information indicating that the actual power consumption value is greater than the target power consumption value to the clock generator and the voltage controller, and reduces the frequency of the central processing unit core through the frequency divider and reduces the voltage of the central processing unit core through the voltage controller, so as to reduce the power consumption of the central processing unit; When it is detected that the comparison result shows that the actual power consumption value is less than the target power consumption value, and the difference between the target power consumption value and the actual power consumption value is less than a preset power consumption difference, the central processing unit turns off the power supply of a preset module to reduce the power consumption of the central processing unit; wherein the preset module includes a cache module or an input / output module; When it is detected that the current value is greater than the current threshold, the load is reduced by the central processing unit or a prompt message indicating a reduction in power supply is sent to the voltage regulation module on the mainboard, so that the voltage regulation module on the mainboard controls the power supply of the central processing unit according to the prompt message to control the power consumption of the central processing unit.
2. The method for controlling power consumption of a central processing unit according to claim 1, wherein: Obtaining the target power consumption value of the central processing unit required by the first user includes: receiving, via a mainboard memory, a file containing a mapping relationship between configuration information of the server and a target power consumption value of a central processing unit; Obtaining, through a management controller, configuration information of a target server according to the first user customization requirement, obtaining, from the file stored in a motherboard memory according to the configuration information of the target server, a target power consumption value of a central processing unit corresponding to the target server, and sending the target power consumption value to a logic device; The target power consumption value of the central processing unit required by the first user is obtained from the logic device.
3. The method for controlling power consumption of a central processing unit according to claim 2, wherein: The file for establishing the mapping relationship between the server configuration information and the target power consumption value of the central processing unit includes: Obtaining the server's configuration information and determining the server's link topology relationship based on the configuration information; Obtaining fields for characterizing power consumption limits; wherein the fields for characterizing power consumption limits include at least fields characterizing the number of central processing units configured in the server, fields characterizing power consumption value limit conditions, fields characterizing heat dissipation device conditions, and fields characterizing network card conditions; The file is created according to the link topology relationship and the field used to represent the power consumption limit.
4. The method for controlling power consumption of a central processing unit according to claim 2, wherein: The management controller and the logic device are connected via a first register and a second register; before obtaining the target power consumption value of the central processing unit required by the first user from the logic device, the method further includes: storing, by the management controller, the target power consumption value sent to the logic device in the first register; storing the received target power consumption value in its own storage space through the logic device, and transmitting the target power consumption value stored in its own storage space back to the second register; When the management controller detects that the target power consumption value stored in the first register is the same as the target power consumption value stored in the second register, the step of obtaining the target power consumption value of the central processing unit required by the first user from the logic device is entered.
5. The method for controlling power consumption of a central processing unit according to claim 4, wherein: Before sending the target power consumption value to the second user, the method further includes: Acquire, from the logic device, a first verification value obtained after the logic device verifies the target power consumption value; After obtaining the target power consumption value of the central processing unit required by the first user from the logic device, verifying the target power consumption value and obtaining a second verification value; When it is detected that the first check value is equal to the second check value, entering the step of sending the target power consumption value to the second user; When it is detected that the first verification value is not equal to the second verification value, a request for obtaining the target power consumption value is sent to the logic device.
6. The method for controlling power consumption of a central processing unit according to claim 3, wherein: Before sending the target power consumption value to the second user, the method further includes: When it is detected that a field for configuring a power consumption value limit exists in the field representing the power consumption value limit, the model of the central processing unit is obtained, and the power consumption value is added after the model of the central processing unit; When it is detected that a field for power consumption value limitation configuration exists in the field representing the power consumption value limitation situation, the model of the central processing unit is acquired and the model of the central processing unit is output.
7. The method for controlling power consumption of a central processing unit according to claim 1, wherein: Before sending the target power consumption value to the second user, the method further includes: When receiving information sent by the second user indicating that the server is currently in the research and development stage, displaying the option for setting the power consumption value of the central processing unit; After the system is restarted, responding to the second user's operation on the component to control the power consumption value of the central processing unit to the target power consumption value, the method further includes: When receiving the information sent by the second user indicating that the server is currently in the gray stage or the mass production stage, the option for setting the power consumption value of the central processing unit is hidden.
8. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the method for controlling power consumption of a central processing unit according to any one of claims 1 to 7 when executing the computer program.
9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, the steps of the method for controlling power consumption of a central processing unit according to any one of claims 1 to 7 are implemented.
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