Chip defect detection method and device
The image is acquired through the vision module and the color distribution range and standard packaging area comparison are compared to identify chip package and pin defects, solving the problems of low efficiency and insufficient accuracy of traditional detection methods, and achieving high-precision chip defect detection.
Patent Information
- Application Number
- CN202510801648.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-16
- Publication Date
- 2025-08-05
- Estimated Expiration
- 2045-06-16
AI Technical Summary
Traditional chip defect detection methods are inefficient and have high error rates, and cannot fully detect defects in the package and pin areas, especially in high-precision detection.
By acquiring the images collected by the vision module, extracting the chip image area and pin area, using the color distribution range to identify the package and pin area, and comparing it with the standard package area to identify package defects, pin defects and position distribution defects.
It realizes comprehensive and accurate detection of package defects, pin defects and position distribution defects, improves the quality control level of chip production, and reduces chip failure caused by position errors.
Smart Images

Figure CN120431083A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of image detection, and in particular relates to a chip defect detection method and device. Background Art
[0002] With the rapid development of the semiconductor industry, chips, as core components of modern electronic products, have a direct impact on their performance and stability. The chip's package and pinout are key components that determine its functionality and reliability. However, during the production process, due to technical, material, or operational issues, these areas are prone to various defects. These defects can affect the chip's proper function and even lead to product failure. Common defects include missing or damaged packages, abnormal printed patterns, and pinout deviations, unevenness, or missing pins. These defects are often difficult to detect but can seriously impact chip performance and reliability.
[0003] Traditional chip defect detection methods mostly rely on manual inspection or simple automated testing methods. These methods suffer from low efficiency, high error rates, and incomplete detection. Furthermore, with the continuous advancement of chip packaging technology and the increasing complexity of packaging, traditional detection technologies face significant challenges in handling large-scale, high-precision chip inspections. Therefore, improving the efficiency and accuracy of chip defect detection, especially in the package and pin areas, has become a pressing technical issue. Summary of the Invention
[0004] In view of this, an embodiment of the present invention provides a chip defect detection method and apparatus to solve the technical problem that traditional detection technology faces great challenges when handling large-scale, high-precision chip detection.
[0005] A first aspect of an embodiment of the present invention provides a chip defect detection method, the chip defect detection method comprising:
[0006] Obtain the image to be recognized collected by the visual module;
[0007] Extracting a chip image area in the image to be identified, and extracting a current package area and a plurality of current pin areas in the chip image area;
[0008] Obtaining a standard packaging area, and confirming whether the current packaging area has a packaging defect based on the standard packaging area and the current packaging area; the packaging defect includes packaging missing, packaging damage, or abnormal printing pattern;
[0009] When it is determined that the current packaging area does not have defects, determining whether pin defects occur in the plurality of current pin areas according to the current packaging area; the pin defects include pin offset defects, pin unevenness defects, and pin missing defects;
[0010] When it is determined that the current pin region does not have defects, it is determined whether there are position distribution defects between the packaging region and the pin regions based on the current packaging region and the multiple current pin regions.
[0011] Furthermore, the step of extracting a chip image area in the image to be identified, and extracting a current package area and a plurality of current pin areas in the chip image area includes:
[0012] Obtain a first color distribution range corresponding to the base and a second color distribution range corresponding to the pin;
[0013] Acquire a plurality of first pixel points corresponding to the first color distribution range in the image to be identified;
[0014] Eliminating a plurality of continuous first pixel points in the image to be identified to obtain the chip image area;
[0015] Acquire a plurality of second pixel points corresponding to the second color distribution range in the chip image area;
[0016] Acquire multiple image regions consisting of multiple consecutive second pixel points, and use the multiple image regions as multiple current pin regions;
[0017] A plurality of continuous second pixel points in the chip image area are eliminated to obtain the current packaging area.
[0018] Furthermore, the step of obtaining a standard packaging area and confirming whether there is a packaging defect in the current packaging area based on the standard packaging area and the current packaging area includes:
[0019] Obtain a third color distribution range corresponding to the packaging material;
[0020] Extracting a plurality of third pixel points corresponding to a third color distribution range in the current encapsulation area;
[0021] using an image area formed by a plurality of third pixel points as a first packaging material area;
[0022] Acquire a second packaging material area in the standard packaging area;
[0023] Aligning the first encapsulation material area with the second encapsulation material area, and calculating a pixel difference between each identical pixel position;
[0024] If the pixel difference corresponding to the plurality of consecutive pixel positions is greater than a first threshold, and the number of the plurality of consecutive pixel positions exceeds a second threshold, it is determined that there is package missing or package damage in the current package area;
[0025] If the pixel difference corresponding to the plurality of consecutive pixel positions is not greater than the first threshold or the number of the plurality of consecutive pixel positions does not exceed the second threshold, it is determined that there is no package missing or package damage in the current package area;
[0026] According to the distribution relationship between the four diagonal points corresponding to the current packaging area and the preset feature points, it is confirmed whether there is any printing pattern abnormality in the current packaging area.
[0027] Furthermore, the step of confirming whether there is a printing pattern abnormality in the current packaging area based on the distribution relationship between the four diagonal points corresponding to the current packaging area and the preset feature points includes:
[0028] Obtain the four diagonal points corresponding to the current packaging area;
[0029] Extracting two preset feature points corresponding to the printed pattern in the current packaging area;
[0030] Calculating a first distance between each preset feature point and the four diagonal points;
[0031] Acquire multiple second distances corresponding to the standard packaging area; the multiple second distances are distances between a preset feature point and four diagonal points in the standard packaging area;
[0032] Calculating a first difference between the first distance and the second distance corresponding to the same point;
[0033] If the first differences are all smaller than a third threshold, it is determined that there is no printing pattern abnormality in the current packaging area;
[0034] If the first difference is not smaller than a third threshold, it is determined that a printing pattern abnormality exists in the current packaging area.
[0035] Furthermore, the step of extracting two preset feature points corresponding to the printed pattern in the current packaging area includes:
[0036] Obtaining a standard feature matrix corresponding to the preset feature points;
[0037] Extracting a pixel matrix around each current pixel in the current encapsulation area, with the current pixel as the center; wherein the pixel matrix has the same matrix size as the standard feature matrix;
[0038] Calculating second differences between the pixel value of the current pixel and the pixel values of other pixels in the pixel matrix respectively;
[0039] Replacing the pixel values of other pixels in the pixel matrix with the second difference value to obtain a current feature matrix;
[0040] Calculating the similarity between each current feature matrix and the standard feature matrix;
[0041] The current pixel point corresponding to the current feature matrix corresponding to the maximum similarity is used as the preset feature point.
[0042] Furthermore, when it is determined that the current packaging area does not have defects, the step of determining whether pin defects occur in the plurality of current pin areas according to the current packaging area includes:
[0043] When it is determined that the current package area does not have defects, a preset first package pin ratio relationship and a second package pin ratio relationship are obtained; the first package pin ratio relationship refers to a ratio between a first length of the standard package area and a second length of the single standard pin area, and the second package pin ratio relationship refers to a ratio between the first length of the standard package area and a first width of the single standard pin area;
[0044] Obtaining a third length of the current encapsulation area;
[0045] Calculating a fourth length corresponding to the pin area according to the first package pin ratio relationship and the third length;
[0046] Calculating a third width corresponding to the pin area according to the second package pin ratio relationship and the third length;
[0047] It is determined whether pin defects occur in the plurality of current pin areas according to the third length, the fourth length, and the third width.
[0048] Furthermore, the step of determining whether pin defects occur in the plurality of current pin areas based on the third length, the fourth length, and the third width includes:
[0049] Obtaining a fifth length corresponding to each of the plurality of current pin regions;
[0050] calculating a third difference between the fourth length and the fifth length;
[0051] If the third difference is less than a fourth threshold, obtaining a second width of a plurality of sampling points in each of the current pin regions;
[0052] calculating a fourth difference between the third width and a plurality of the second widths;
[0053] If the fifth differences between the plurality of second widths in the same current pin region are all smaller than the fourth threshold, and the plurality of fourth differences are all smaller than the fifth threshold, then it is determined that the current pin region does not have a defect;
[0054] If the third difference is not less than a fourth threshold, it is determined that a pin shift defect exists in the current pin area;
[0055] If the fifth difference is less than the fourth threshold or the fourth difference is less than the fifth threshold, it is determined that there is a pin unevenness defect in the current pin area;
[0056] If the number of the current pin area is less than the preset number, it is determined that the current pin area has a pin missing defect.
[0057] Furthermore, when it is determined that the current pin region does not have defects, the step of determining whether there are position distribution defects between the package region and the pin region based on the current package region and the multiple current pin regions includes:
[0058] Obtaining an angle fluctuation range corresponding to a standard reference image; the angle fluctuation range is used to describe a distribution relationship between multiple pin regions;
[0059] Extracting a first center of the current package area and extracting second centers of a plurality of current pin areas;
[0060] Establishing a first coordinate system with the first center as the coordinate origin;
[0061] In the first coordinate system, obtaining first coordinate positions of a plurality of second centers;
[0062] Extracting a plurality of first line segments formed between a plurality of first coordinate positions and a first center;
[0063] Extracting a first minimum distance line segment corresponding to each first line segment from the plurality of first line segments; wherein the first minimum distance line segment refers to a line segment with the shortest distance from the first line segment;
[0064] respectively calculating first angles between the first line segment and the first minimum distance line segment;
[0065] If the plurality of first angles are all within the angle fluctuation range, it is determined that there is no position distribution defect between the packaging area and the pin area;
[0066] If the plurality of first angles are not all within the angle fluctuation range, it is determined that there is a position distribution defect between the packaging area and the pin area.
[0067] Furthermore, the step of obtaining the angle fluctuation range corresponding to the standard reference image includes:
[0068] Acquire a standard reference image, and extract a standard package area and a plurality of standard pin areas in the standard reference image;
[0069] Extracting a third center of the standard package area and extracting a fourth center of the plurality of standard pin areas;
[0070] Establishing a second coordinate system with the third center as the coordinate origin;
[0071] In the second coordinate system, obtaining second coordinate positions of the plurality of fourth centers;
[0072] extracting a plurality of second line segments formed between the plurality of second coordinate positions and the third center;
[0073] Extracting the second minimum distance line segment corresponding to each second line segment from the plurality of second line segments; wherein the second minimum distance line segment refers to the line segment with the shortest distance from the second line segment;
[0074] respectively calculating a second angle between the second line segment and the second minimum distance line segment;
[0075] Counting a first fluctuation range formed by a plurality of the second angles;
[0076] Based on a preset redundancy coefficient, the first fluctuation range is expanded to obtain the angle fluctuation range.
[0077] A second aspect of an embodiment of the present invention provides a chip defect detection device, including:
[0078] An acquisition unit, used to acquire the image to be recognized collected by the visual module;
[0079] an extraction unit, configured to extract a chip image region from the image to be identified, and extract a current package region and a plurality of current pin regions from the chip image region;
[0080] A first judgment unit is configured to obtain a standard packaging area and determine whether the current packaging area has a packaging defect based on the standard packaging area and the current packaging area; the packaging defect includes a missing package, a damaged package, or an abnormal printed pattern;
[0081] A second judgment unit is configured to determine, when it is determined that the current packaging area does not have defects, whether pin defects occur in the plurality of current pin areas according to the current packaging area; the pin defects include pin offset defects, pin unevenness defects, and pin missing defects;
[0082] The third judgment unit is configured to determine whether there is a position distribution defect between the packaging area and the pin area based on the current packaging area and the multiple current pin areas when it is determined that there is no defect in the current pin area.
[0083] A third aspect of an embodiment of the present invention provides a terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the steps in the chip defect detection method described in the first aspect are implemented.
[0084] A fourth aspect of an embodiment of the present invention provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, it implements the steps in the chip defect detection method described in the first aspect.
[0085] Compared to the prior art, the embodiments of the present invention offer the following advantages: by extracting the standard package area and comparing it with the current package area, package defects can be effectively identified. Package defects include missing packages, damaged packages, and abnormal printed patterns, all of which have a direct impact on chip functionality and reliability. Traditional detection methods often struggle to accurately distinguish different types of package defects. However, the present invention, through comparative analysis of the standard package area and the current package area, can precisely locate package defects, avoiding missed detections and false detections. Furthermore, if the package area is determined to be free of defects, the present invention can identify various pin defects, such as pin offset, pin unevenness, and missing pins, through a comprehensive analysis of the current package area and the current pin area. These pin defects often have a direct impact on the electrical performance of the chip, while traditional detection methods can typically only detect some defect types. The present method can comprehensively detect and accurately identify various defects in the pin area, improving the comprehensiveness and accuracy of detection. In addition to detecting defects in the package and pin areas, the present invention can further determine whether there are position distribution defects by analyzing the position distribution between the package and pin areas. Traditional detection methods usually only focus on local defects and ignore the relative position relationship between the package and the pin area, which may cause some small but serious defects to go undetected. By detecting position distribution defects, the detection accuracy of the overall chip quality can be improved and chip failures caused by position errors can be reduced. In summary, the chip defect detection method provided by the present invention provides a comprehensive and accurate detection solution in terms of package defects, pin defects, position distribution defects, etc., greatly improving the quality control level of chip production and solving many shortcomings in traditional detection methods. BRIEF DESCRIPTION OF THE DRAWINGS
[0086] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0087] Figure 1 A schematic flow chart of a chip defect detection method provided by the present invention is shown;
[0088] Figure 2 A schematic diagram of a chip defect detection device provided by an embodiment of the present invention is shown;
[0089] Figure 3 A schematic diagram of a terminal device provided by an embodiment of the present invention is shown. DETAILED DESCRIPTION
[0090] In the following description, specific details such as particular system structures and techniques are provided for purposes of illustration, not limitation, to facilitate a thorough understanding of the embodiments of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
[0091] The embodiments of the present invention provide a chip defect detection method and device to solve the technical problem that traditional detection technology faces great challenges when processing large-scale, high-precision chip detection.
[0092] First, the present invention provides a method for detecting chip defects. Figure 1 , Figure 1 FIG1 shows a schematic flow chart of a chip defect detection method provided by the present invention. Figure 1 As shown, the chip defect detection method may include the following steps:
[0093] Step 101: Obtain an image to be recognized collected by a visual module;
[0094] Use the visual inspection module to capture images of the chip and acquire image data. This captures images from multiple angles or fields of view. The images to be recognized contain every detail of the chip, including its appearance, package, pins, and other structural information.
[0095] Step 102: extracting a chip image region from the image to be identified, and extracting a current package region and a plurality of current pin regions from the chip image region;
[0096] The first step in acquiring an image is to process and analyze the image to locate the chip area. The "chip area" in the image is the target region, which includes the chip's package and pins. Image segmentation techniques (such as edge detection and region segmentation) can accurately extract the chip's package area and multiple pin regions. The package area refers to the chip's outer shell, while the pin region refers to the pins on the chip that connect to external circuits.
[0097] Specifically, step 102 includes steps 1021 to 1026:
[0098] Step 1021: Obtain a first color distribution range corresponding to the base and a second color distribution range corresponding to the pin;
[0099] At this stage, the predefined color ranges for different parts of the chip image (the base and pins) must be obtained. The "first color distribution range" for the base refers to the color range representing the base or background of the chip in the image. This is the color of the background or base outside the chip. The "second color distribution range" for the pins refers to the color range of the chip pins. This is a metallic color or other color that is distinct from the base area.
[0100] Obtaining these two color distribution ranges can be accomplished by applying a threshold to the color space. For example, the color of the abutment may contain a certain range of red or gray, and a specific threshold range can be used to identify the abutment portion of the image. The color of the pin area is usually distinguishable from the abutment and can be extracted using the corresponding color recognition range.
[0101] Step 1022: Acquire a plurality of first pixel points corresponding to the first color distribution range in the image to be recognized;
[0102] In this step, the system uses the defined "first color distribution range" to perform pixel analysis on the image to be identified, extracting all pixels that match the base color range. These pixels are distributed at the edge or background of the image and represent the base area of the chip.
[0103] Based on the threshold of the color space (such as RGB, HSV, etc.), each pixel in the image will be checked and determined to belong to the base area based on whether its color is within the "first color distribution range".
[0104] Step 1023: Eliminate a plurality of consecutive first pixel points in the image to be identified to obtain the chip image area;
[0105] The purpose of this operation is to filter out areas of the image that do not belong to the chip itself, especially those belonging to the base. By removing the first consecutive pixels in the image (that is, removing the pixels in the base area), the "chip image area" can be obtained. The chip image area includes the chip package area and pin area.
[0106] Step 1024: Acquire a plurality of second pixel points corresponding to the second color distribution range in the chip image area;
[0107] After obtaining the chip image area, the next step is to identify the pin area on the chip. To achieve this, the system uses a "second color distribution range" to extract pixels in the chip image area that match the color of the pin area. These second pixels are the color of the chip pins and can be identified by setting a color threshold.
[0108] This process is similar to the previous color recognition. The system detects the pixels in the image that belong to the pin color range and extracts the pixels in these pin areas.
[0109] Step 1025: Acquire multiple image regions consisting of multiple consecutive second pixel points, and use the multiple image regions as multiple current pin regions;
[0110] By analyzing multiple second pixels extracted from the second color distribution range, the system partitions these pixels based on their connectivity, resulting in multiple independent image regions, each representing a pin on the chip. "Continuous second pixels" here refer to pixels in the image that are connected by color similarity and form a complete pin region.
[0111] A pin region is usually composed of multiple consecutive pixels, which are classified as the same region based on position and shape features. Thus, each consecutive second pixel region is considered as a current pin region.
[0112] Step 1026: Eliminate a plurality of consecutive second pixel points in the chip image area to obtain the current packaging area.
[0113] Finally, to extract the package area, the system removes all identified pin areas from the chip image area. By removing these consecutive second pixels (i.e., the identified pin parts), the remaining area is the chip package area.
[0114] The elimination method is also based on connected region analysis, which removes all pixels belonging to the pin area from the chip image area, and finally obtains the part that only contains the chip package area.
[0115] In the embodiment corresponding to steps 1021 through 1026, the chip's base, package, and pin regions are effectively distinguished by color distribution ranges. The system first defines the color ranges for the base and pins, then extracts pixels matching these color ranges, eliminating irrelevant areas, and ultimately accurately extracts the chip's package and pin regions. This method efficiently and accurately identifies and segmentes key regions in chip images.
[0116] Step 103: Obtain a standard packaging area, and based on the standard packaging area and the current packaging area, determine whether the current packaging area has a packaging defect; the packaging defect includes packaging missing, packaging damage, or abnormal printing pattern;
[0117] In this step, a "standard package area" is used as a reference template. The standard package area is a chip package area that is known to be defect-free. By comparing the characteristics of the current package area with the standard package area, the system can detect whether the package area has defects. Package defects generally include the following types:
[0118] Package missing: The package part is missing or damaged;
[0119] Package damage: cracks, ruptures and other damage to the package;
[0120] Printing pattern anomaly: Errors or omissions in printed circuit or logo patterns.
[0121] Specifically, step 103 includes steps 1031 to 1038:
[0122] Step 1031: Obtain a third color distribution range corresponding to the packaging material;
[0123] A predefined color range for the packaging material—the so-called "third color distribution range"—is defined. The color of the packaging material is the color of the chip's outer covering or wrapping, which differs from the color of the chip's interior or pin area. This color range is defined by setting a threshold in the color space to ensure accurate identification of the packaging material. This color information helps the system locate the packaging area and further determine whether there are defects.
[0124] Step 1032: extracting a plurality of third pixel points corresponding to a third color distribution range in the current encapsulation area;
[0125] Next, the system uses a color recognition algorithm to extract pixels within the current packaging area that fall within the "third color distribution range." These pixels represent the packaging material within the chip packaging area. Using these matching pixels, the system can identify the area containing the packaging material and further analyze whether the packaging is missing or damaged.
[0126] Step 1033: using the image area formed by the plurality of third pixel points as the first packaging material area;
[0127] By connecting multiple third pixels that fall within the color range, the system constructs an image region where the packaging material is located. This region is called the "first packaging material region." This region represents the chip's packaging. These pixels can be used to analyze the quality of the packaging material and identify any defects.
[0128] Step 1034: Acquire a second packaging material area in the standard packaging area;
[0129] The standard packaging area provides a known defect-free reference packaging material region corresponding to the current packaging area. This region is referred to as the "second packaging material region." The standard packaging area is a predefined, ideal packaging material region that represents the normal appearance of a defect-free chip package. The extraction logic for the second packaging material region is identical to that for the first packaging material region and will not be further elaborated here. The second packaging material region is pre-stored data.
[0130] Step 1035: aligning the first packaging material area with the second packaging material area, and calculating the pixel difference between each identical pixel position;
[0131] In this step, the system aligns the "first packaging material area" (the packaging portion of the current packaging area) with the "second packaging material area" (the packaging portion of the standard packaging area) to ensure that the corresponding pixel positions in the two areas correspond one-to-one. After alignment, the system calculates the difference between each pixel position, that is, the difference in pixel value at the corresponding position between the current packaging area and the standard packaging area.
[0132] The purpose of this step is to quantify the differences in the package area and help determine whether the current package area is damaged, missing or otherwise abnormal.
[0133] Step 1036: If the pixel difference corresponding to the plurality of consecutive pixel positions is greater than the first threshold, and the number of the plurality of consecutive pixel positions exceeds the second threshold, it is determined that there is package missing or package damage in the current package area;
[0134] If, when comparing the pixel differences between the current package area and the standard package area, a large pixel difference is found in multiple consecutive pixel positions (i.e., the difference exceeds the preset "first threshold"), and the number of pixels with these differences exceeds a set number threshold (i.e., the "second threshold"), it can be determined that the package is missing or damaged. Specifically, a missing package is usually manifested as a complete absence of certain areas, while a damaged package is manifested as damaged or incomplete packaging materials. By detecting pixel differences and continuous areas, these defects can be accurately identified.
[0135] The first and second thresholds are determined based on a large amount of experimental data, engineering experience, or actual test results. Their values need to be optimized through a series of experiments so that defects can be accurately identified without misjudgment during detection. For example:
[0136] The first threshold can be set as a standard for a certain pixel difference value. For example, if the color difference between two pixels exceeds 10 (according to the definition of color space, such as RGB or Lab color difference), the two pixels are considered to have significant difference.
[0137] The second threshold can be set as the minimum continuous defect length. For example, if the number of consecutive pixel differences greater than the first threshold exceeds 5, a defect is considered to exist.
[0138] Step 1037: If the pixel difference corresponding to the plurality of consecutive pixel positions is not greater than the first threshold or the number of the plurality of consecutive pixel positions does not exceed the second threshold, it is determined that there is no package missing or package damage in the current package area;
[0139] On the contrary, if the pixel difference of multiple consecutive pixel positions is less than or equal to the first threshold during comparison, or even if the difference is large, the number of consecutive pixel positions is not enough to exceed the second threshold, then the system will consider the current packaging area to be normal and there is no packaging missing or damaged.
[0140] This process actually avoids misjudgment by setting reasonable thresholds, ensuring that defects are only judged as defects when they are severe enough and last for a period of time.
[0141] Step 1038: Determine whether there is any printing pattern abnormality in the current packaging area based on the distribution relationship between the four diagonal points corresponding to the current packaging area and the preset feature points.
[0142] Finally, the system analyzes the distribution relationship between the four diagonal points of the current package area and the preset feature points to determine whether there are any printing pattern anomalies. The package area often has printed patterns or logos, such as chip numbers, trademarks, and QR codes. If these printed patterns are irregularly distributed or deviated within the package area, a printing anomaly may exist. By analyzing the spatial relationship between the diagonal points and the feature points, such anomalies can be detected.
[0143] If the distribution relationship of these points does not match the standard template, the system can determine that there is an abnormality in the printed pattern.
[0144] In the embodiment corresponding to steps 1031 to 1038, precise color recognition, pixel difference calculation, and comparison of the package area with the standard package area can effectively detect defects such as missing or damaged packages, as well as abnormal printed patterns. This method can provide efficient and accurate quality control during the chip manufacturing process, ensuring that the chip package meets design requirements.
[0145] Specifically, step 1038 includes steps 10381 to 10387:
[0146] Step 10381: Obtain four diagonal points corresponding to the current packaging area;
[0147] In the current package area, the four diagonal points of the package area must first be identified, which is usually a rectangular or similar area. By locating these diagonal points, the spatial position and shape of the package area can be determined.
[0148] Step 10382: Extract two preset feature points corresponding to the printed pattern in the current packaging area;
[0149] The printed pattern area contains specific logos, QR codes, or other design elements, which can be located using "preset feature points." These feature points have distinct geometric characteristics within the pattern and can be used to determine whether the pattern has been printed correctly. These feature points are extracted to further analyze their distribution within the package area.
[0150] Specifically, step 10382 includes steps A1 to A6:
[0151] Step A1: Obtaining a standard feature matrix corresponding to the preset feature points;
[0152] In this step, a predefined standard feature matrix is required. This is a feature matrix that represents an ideal pattern (such as a printed pattern, logo, or QR code). The standard feature matrix can be a local image segment that contains information about the logo, pattern, or other feature points. It serves as a benchmark for comparison with the image of the current package area.
[0153] Step A2: extracting a pixel matrix around each current pixel in the current encapsulation area, with the current pixel as the center; wherein the pixel matrix has the same matrix size as the standard feature matrix;
[0154] Within the current encapsulation area, a pixel is selected as the "center pixel" each time, and then the pixels around it are extracted to form a matrix. The size of this extracted matrix is consistent with the standard feature matrix, that is, the size of the pixel matrix to be extracted completely matches the standard feature matrix.
[0155] For example, if the standard feature matrix is a 3x3 region, then a 3x3 matrix of pixels will be extracted with each pixel as the center in the current packing area. These matrices are used for comparison with the standard feature matrix.
[0156] Here, it is specified that the size of the extracted pixel matrix is consistent with the size of the standard feature matrix. This ensures that the structure and size of the two matrices are exactly matched when compared, thus allowing for effective similarity calculation.
[0157] Step A3: calculating second differences between the pixel value of the current pixel and the pixel values of other pixels in the pixel matrix respectively;
[0158] The core of this step is calculating the difference between the current pixel and its surrounding pixels. For the currently selected "center pixel," the difference between its pixel value and the values of the other pixels in the surrounding pixel matrix needs to be calculated. These differences are called "second differences" and represent the difference in brightness, color, and other information between the center pixel and its neighboring pixels.
[0159] In this way, the difference in pixel values within a local area can be quantified for subsequent comparison and analysis.
[0160] Step A4: replacing the pixel values of other pixels in the pixel matrix with the second difference value to obtain a current feature matrix;
[0161] After calculating the "second differences," these differences are substituted into the original pixel matrix, generating a new matrix called the "current feature matrix." Each pixel's value is replaced by its difference from the central pixel, resulting in a matrix that reflects the differences within a local area relative to the central pixel. This process allows for further analysis of the distribution of these differences across the entire image.
[0162] It can be understood that the process of generating the standard feature matrix is similar to the process of generating the current feature matrix.
[0163] Step A5: Calculate the similarity between each current feature matrix and the standard feature matrix;
[0164] After obtaining the current feature matrix, the system needs to compare it with the standard feature matrix. Calculating similarity is to assess the degree of match between the current feature matrix and the standard feature matrix. Calculating similarity helps the system determine whether the current matrix closely matches the standard matrix, thereby confirming whether it meets the expected printing pattern or feature mode.
[0165] Step A6: taking the current pixel corresponding to the current feature matrix corresponding to the maximum similarity as the preset feature point.
[0166] After comparing all current feature matrices with the standard feature matrix, multiple similarity values are obtained. The "center pixel" corresponding to the current feature matrix with the maximum similarity value is the preset feature point to be extracted. This is because the maximum similarity indicates that a pixel in the current package area has the highest match with the standard pattern, which usually means that this location is a key feature point.
[0167] In the embodiments corresponding to steps A1 through A6, the pixel matrices surrounding each pixel in the current packaging area are extracted, compared with a standard feature matrix, and similarity is calculated to locate the preset feature points. By calculating the difference between each pixel and its surrounding pixels to generate a new feature matrix, and then comparing the similarity with the standard matrix, the preset feature points in the current packaging area that are consistent with the standard pattern can be efficiently and accurately identified. This method, through detailed local pixel comparison, helps accurately identify key information in the packaging area and ensures the normality of the packaging pattern.
[0168] Step 10383: Calculate a first distance between each preset feature point and the four diagonal points;
[0169] Next, the system calculates the distances from the extracted pre-defined feature points to the four diagonal points of the package area. These distances are key parameters for evaluating the relationship between the package area geometry and the printed pattern distribution. Calculating these distances helps determine the relative positions of the feature points and the package area, thereby confirming the correctness of the printed pattern.
[0170] Step 10384: Acquire multiple second distances corresponding to the standard packaging area; the multiple second distances are distances between a preset feature point and four diagonal points in the standard packaging area;
[0171] The standard packaging area contains the same geometric features and printed patterns as the current packaging area. It provides a reference for correct, defect-free packaging. Within the standard packaging area, there are also a set of preset distances between feature points and four diagonal points (i.e., "second distances"). These second distances represent the standard positional relationship between the feature points and the diagonal points under ideal conditions.
[0172] Definition of the second distance: It is the actual distance between the feature point and the four diagonal points in the standard packaging area. These standard distances are used as the basis for comparison with the distance of the current packaging area.
[0173] Step 10385: Calculate a first difference between the first distance and the second distance corresponding to the same point;
[0174] In this step, the system compares the first and second distances between the current package area and the standard package area at the same points (i.e., the same combination of feature points and corner points). Specifically, the system calculates the actual distance difference between each pair of feature points and diagonal points to obtain the "first difference." The goal of this step is to quantify the geometric differences between the current package area and the standard package area and determine whether these differences exceed the preset tolerance range.
[0175] Step 10386: If the first differences are all smaller than the third threshold, confirming that there is no printing pattern abnormality in the current packaging area;
[0176] If all calculated first differences are less than a set threshold (i.e., the "third threshold"), it means that the geometry and printing pattern of the current package area are very close to those expected for the standard package area, and there are no obvious anomalies. This indicates that there is no deviation in the printing pattern and the printed portion within the package area is normal.
[0177] The third threshold is a key parameter used to determine whether the pattern deviation between the current packaging area and the standard packaging area exceeds the acceptable range. Assume the length of the packaging area is 10mm, and the standard distance between the preset feature points of the standard packaging area and the four diagonal points is 3mm. Due to production errors, the deviation of the packaging area is usually between 0.1mm and 0.3mm. In this case, the third threshold can be set to 0.2mm, meaning that when the pattern deviation is greater than 0.2mm, it is considered an abnormality.
[0178] Step 10387: If the first difference is not smaller than the third threshold, it is confirmed that there is a printing pattern abnormality in the current packaging area.
[0179] If at least one of the first differences is found to be greater than the third threshold value during the comparison process, it can be determined that the printed pattern in the current packaging area is abnormal. In other words, the distribution of the printed pattern is significantly different from that of the standard packaging area. This abnormality may be caused by printing offset, scaling issues, or other processing problems.
[0180] In the embodiment corresponding to steps 10381 through 10387, the printed pattern is checked for normality by comparing the geometric relationships between the feature points and diagonal points of the current packaging area and the standard packaging area. This method relies on precise geometric comparison and distance calculation to accurately identify anomalies in the printed pattern. In this way, printing defects can be discovered promptly, ensuring that packaging quality meets standard requirements.
[0181] Step 104: When it is determined that the current package area does not have defects, determine whether pin defects occur in the current pin areas according to the current package area; the pin defects include pin offset defects, pin unevenness defects, and pin missing defects;
[0182] Once the package area is confirmed to be free of defects, the system proceeds to inspect the chip's pin area. The inspection of the pin area is mainly to determine whether there are defects in the pins. Pin defects include:
[0183] Pin offset defect: The pin position is inaccurate and deviates from its original position;
[0184] Pin unevenness defect: The surface of the pin is uneven, which may cause poor electrical contact;
[0185] Pin missing defect: Some pins are completely missing or broken, which may cause the chip to not work properly.
[0186] Specifically, step 104 includes steps 1041 to 1045:
[0187] Step 1041: When it is determined that the current package area does not have defects, obtaining a preset first package pin ratio relationship and a second package pin ratio relationship; the first package pin ratio relationship refers to a ratio between a first length of the standard package area and a second length of a single standard pin area, and the second package pin ratio relationship refers to a ratio between a first length of the standard package area and a first width of the single standard pin area;
[0188] Before starting pin defect analysis, first confirm that there are no other defects in the current package area. Then, the system needs to obtain two preset proportional relationships:
[0189] The first package pin ratio is the ratio between the first length of the standard package area and the second length of a single standard pin area. This ratio reflects the proportional relationship between the standard package area and the pin area, helping to infer the pin area length from the current package area length in subsequent analysis.
[0190] The second package pin ratio is the ratio of the first length of the standard package area to the first width of the single standard pin area. This ratio provides a proportional relationship between the length of the standard package area and the width of the pin area, helping to infer the width of the pin area from the length of the current package area.
[0191] In this step, the definitions of the first and second proportional relationships are clarified. The first length of the standard package area is a critical dimension, representing the total length or other major geometric dimension of the package area. Using these two proportional relationships, the corresponding pin area dimensions can be calculated based on the current package area dimensions.
[0192] Step 1042: Obtain a third length of the current encapsulation area;
[0193] Within the current footprint, a third length is required. This length typically refers to a specific length within the footprint. For example, this could be the total length of the footprint, the longest side, or another length to be analyzed. This length, along with the proportional relationship, serves as an input parameter to help calculate the dimensions associated with the pin area.
[0194] Step 1043: Calculating a fourth length corresponding to the pin area according to the first package pin ratio and the third length;
[0195] By using the first package pin ratio and the third length, the fourth length of the pin area can be calculated. The core of this step is to use the ratio to determine the corresponding size of the pin area given the current package area size. In other words, the fourth length of the pin area can be calculated by multiplying the third length by the first ratio.
[0196] Step 1044: Calculate a third width corresponding to the pin area according to the second package pin ratio and the third length;
[0197] Similar to the calculation of the fourth length, the third width of the lead area is calculated using the second package pin ratio and the third length. By multiplying the third length by the second ratio, the width of the lead area can be calculated. These two calculations (the fourth length and the third width) are key steps in identifying defects in the lead area.
[0198] Step 1045: Determine whether pin defects occur in the plurality of current pin areas based on the third length, the fourth length, and the third width.
[0199] Finally, the system checks whether the geometric characteristics of the current lead area meet the expected standards based on the third length, fourth length, and third width. If these calculated values match the corresponding dimensions of the standard package area, the current lead area is free of defects. If they do not match, the system deems the current lead area defective. Defects can be defined as substandard dimensions, abnormal shapes, or other factors.
[0200] In the embodiment corresponding to steps 1041 through 1045, the relevant dimensions of the pin area (such as length and width) are calculated based on several proportional relationships and the geometric dimensions of the current package area. By comparing the deviations of these calculated dimensions with the preset standard dimensions, it is possible to detect whether the pins in the current package area are defective. Specifically, the system first calculates the expected dimensions of the pin area and then compares them with the actual dimensions to determine whether any anomalies exist. This method accurately determines pin defects in the package area through geometric calculations, avoiding the errors of manual inspection.
[0201] Specifically, step 1045 includes steps 10451 to 10458:
[0202] Step 10451: Obtain the fifth length corresponding to each of the plurality of current pin regions;
[0203] At this stage, the system needs to obtain the fifth length of the current pin region. This fifth length is a measurement related to the geometric characteristics of the current pin region. It may be related to the pin length, position, or other standard parameters. By obtaining the fifth lengths of multiple pin regions, further analysis of their differences and potential defects can be performed.
[0204] Step 10452: Calculate a third difference between the fourth length and the fifth length;
[0205] Next, the difference between the fourth and fifth lengths needs to be calculated. This is called the "third difference." This difference reflects the difference between the expected lead area length (calculated from the fourth length) and the actual lead area length (calculated from the fifth length). A smaller difference indicates relatively consistent lead area dimensions, while a larger difference may indicate a dimensional anomaly or defect.
[0206] Step 10453: If the third difference is less than a fourth threshold, obtaining the second width of each of the plurality of sampling points in the current pin region;
[0207] If the calculated third difference is less than a preset fourth threshold, the system further analyzes the current pin region. This involves obtaining the second widths of multiple sampling points within the current pin region. These sampling points represent key locations within the region, allowing for a more accurate analysis of the pin region's width characteristics.
[0208] The fourth threshold represents a tolerance or standard tolerance range, derived from experimental data or empirical standards. It determines the permissible difference between the fourth and fifth lengths. The specific data support may be based on empirical data, such as 0.1mm or 0.2mm. If the difference is less than this threshold, the dimensional error in the pin area is within an acceptable range, and further testing can proceed.
[0209] Step 10454: Calculate a fourth difference between the third width and a plurality of the second widths;
[0210] Next, the difference between the third width (the calculated width of the current area) and the multiple second widths (the widths corresponding to the sampling points) is calculated. This "fourth difference" reflects the difference between the width of the current pin area and the width of the sampling point. By calculating the fourth difference across multiple sampling points, we can further determine whether the pin area's shape is normal.
[0211] Step 10455: If the fifth differences between the plurality of second widths in the same current pin region are all smaller than the fourth threshold, and the plurality of fourth differences are all smaller than the fifth threshold, then it is determined that the current pin region does not have a defect;
[0212] At this stage, the stability of the pin area needs to be further verified. If the difference between the second widths of multiple sampling points in the same pin area (i.e., the fifth difference) is less than the fourth threshold, and the fourth difference of these sampling points is also less than the fifth threshold, it indicates that the size of the pin area is uniform and stable within a certain range, meeting the standard requirements, and it can be confirmed that the area is defect-free.
[0213] The fifth threshold represents the tolerance for pin area size variations. These thresholds are derived from manufacturing process standards, experimental data, or industry specifications. For example, 0.1mm might be a common length tolerance, while 0.05mm might be a width tolerance. However, the actual values will depend on the specific production process and quality control standards.
[0214] Step 10456: If the third difference is not less than a fourth threshold, it is determined that a pin shift defect exists in the current pin area;
[0215] If the third difference is greater than or equal to the fourth threshold, it indicates that the size of the pin area has a significant deviation, which may be due to the pin position shifting. In this case, the system will determine that the pin area has a pin shift defect.
[0216] Step 10457: If the fifth difference is less than the fourth threshold or the fourth difference is less than the fifth threshold, it is determined that a pin unevenness defect exists in the current pin area;
[0217] If the fifth difference between the second widths within the same lead region fails to consistently remain below the fourth threshold, or if the fourth difference is not uniformly below the fifth threshold, this indicates a potential unevenness defect in the lead region. This defect indicates that the lead shape or surface does not meet expected standards, potentially impacting the overall quality and functionality of the package.
[0218] Step 10458: If the number of the current pin area is less than the preset number, it is confirmed that the current pin area has a pin missing defect.
[0219] Finally, if the number of pins in the inspected area is less than the pre-set number, it indicates that there is a pin missing defect in the current package area. This may be because some pins are not formed correctly, not identified, or are omitted, resulting in insufficient pin count.
[0220] In the embodiment corresponding to steps 10451 through 10458, the current pin area is analyzed layer by layer through multiple threshold difference comparisons to determine whether different types of defects exist. Specifically, pin offset defects are determined by comparing the difference between the fourth and fifth lengths; pin unevenness defects are determined by analyzing the width differences at multiple sampling points; and pin missing defects are confirmed by checking whether the number of pin areas meets preset requirements. The determination of each defect is refined through the comparison of multiple differences and thresholds, thereby improving detection precision and accuracy.
[0221] Step 105: When it is determined that the current pin region does not have defects, determine whether there are position distribution defects between the package region and the pin regions based on the current package region and the multiple current pin regions.
[0222] If there are no defects in the package area and the pin area, the system also needs to check whether there are any abnormalities in the relative position between the package area and the pin area. For example, the matching position of the chip's package area and the pin area must meet specific geometric requirements to ensure that the pins can properly connect to the external circuit. If there are positional distribution defects between the package and the pins (such as the position of the package area and the pin area does not match, which may cause electrical connection problems or poor pin contact), these also need to be detected.
[0223] Specifically, step 105 includes steps 1051 to 1059:
[0224] Step 1051: Acquire an angle fluctuation range corresponding to a standard reference image; the angle fluctuation range is used to describe a distribution relationship between multiple pin regions;
[0225] First, the system acquires a standard reference image. This image represents a typical pin distribution. Angle fluctuation range is extracted from this image, describing the distribution relationship between the relative positions of the pin regions. This fluctuation range is used in subsequent steps to determine whether the current pin region deviates from the standard position distribution. It can be understood as the range of angular differences between pins within the standard distribution.
[0226] Specifically, step 1051 includes steps 10511 to 10519:
[0227] Step 10511: Acquire a standard reference image, and extract a standard package area and multiple standard pin areas in the standard reference image;
[0228] In this step, you first need to obtain a standard reference image that represents the ideal package and pin layout. The image contains a standard package area and multiple standard pin areas.
[0229] From this image, the standard package area (i.e., the boundary between the pins and the package in the image) and multiple standard pin areas (i.e., the location area of each pin) are extracted, which will be used for subsequent calculations.
[0230] Step 10512: extracting the third center of the standard package area, and extracting the fourth centers of the plurality of standard pin areas;
[0231] The third center of the standard package area is the geometric center or centroid of the package area in the standard reference image, which is usually the symmetry center of the package.
[0232] The fourth center of the plurality of standard pin areas refers to the geometric center or centroid of each pin area, that is, the center point of each pin.
[0233] Step 10513: Establish a second coordinate system with the third center as the coordinate origin;
[0234] At this stage, a second coordinate system is established with the third center of the standard package area as the origin of the new coordinate system. In this way, all subsequent calculations will be based on this new coordinate system.
[0235] Step 10514: Obtain second coordinate positions of the plurality of fourth centers in the second coordinate system;
[0236] After the second coordinate system is established, the coordinates of the fourth center of each standard pin area (ie, the center of each pin area) are obtained and converted into the second coordinate system to obtain the coordinate position of each pin area.
[0237] Step 10515: extracting a plurality of second line segments formed between the plurality of second coordinate positions and the third center;
[0238] By connecting the third center of the standard package area with the fourth center of each standard pin area, a series of line segments are obtained, which represent the lines from the center of the package area to the center of each pin area, and are called second line segments.
[0239] Step 10516: Extracting the second minimum distance line segment corresponding to each second line segment from the plurality of second line segments; wherein the second minimum distance line segment refers to the line segment with the shortest distance from the second line segment;
[0240] For each second line segment, the shortest distance between the line segment and other line segments needs to be further analyzed. Through calculation, the line segment with the minimum distance between each second line segment and other line segments is extracted, which is called the second minimum distance line segment.
[0241] This step is mainly to determine the geometric relationship between each line segment and other line segments and find out their relative positions.
[0242] Step 10517: Calculate the second angle between the second line segment and the second minimum distance line segment respectively;
[0243] The angles between each second line segment and its corresponding second minimum distance line segment are calculated. These angles reflect the angular distribution relationship of each pin area in the package area.
[0244] This angle can be used to describe the stability and symmetry of the pin distribution within the standard package area.
[0245] Step 10518: Count the first fluctuation range formed by multiple second angles;
[0246] After calculating the angle between each second line segment and its corresponding second minimum distance line segment, it is necessary to count all calculated angles to obtain an angle fluctuation range (ie, the fluctuation range of all angles).
[0247] The first fluctuation range is a statistical result of these angles, indicating the range between the maximum and minimum values of all angles. It is used to describe the angular variation of the standard pin area distribution.
[0248] Step 10519: Based on a preset redundancy coefficient, the first fluctuation range is expanded to obtain the angle fluctuation range.
[0249] In this step, the first fluctuation range is expanded by introducing a redundancy factor. The redundancy factor is used to adjust the tolerance of the angle fluctuation range to cope with minor changes that may occur in the actual production process.
[0250] Through this expansion process, an angle fluctuation range is obtained, which represents the tolerance range of the angle between the standard pin area and the package area, and provides a standard reference basis for subsequent defect detection.
[0251] In the embodiment corresponding to steps 10511 to 10519, an angle fluctuation range is derived to describe the stability of the pin area distribution through the following steps: extracting the package area and pin area from a standard reference image; establishing a coordinate system with the center of the package area as the origin; calculating the geometric relationship between the center of the package area and the pin area; calculating the angle between the line segments and calculating the angle fluctuation range; and expanding this fluctuation range based on the redundancy coefficient to obtain a standard angle fluctuation range. This method helps set an ideal pin distribution range for comparison with the actual pin distribution during inspection to determine whether defects exist.
[0252] Step 1052: extracting a first center of the current package area and extracting second centers of multiple current pin areas;
[0253] At this stage, two center points need to be extracted from the current package area and the pin area:
[0254] The first center is the geometric center of the current package area.
[0255] The second center is the geometric center of each pin in the plurality of pin regions, that is, the center point of each pin region.
[0256] Step 1053: Establishing a first coordinate system with the first center as the coordinate origin;
[0257] At this stage, a first coordinate system is established with the first center of the package area as the origin of the coordinate system. This coordinate system provides a unified reference frame for all subsequent calculations.
[0258] Step 1054: Obtain first coordinate positions of a plurality of second centers in the first coordinate system;
[0259] Next, the second centers of the plurality of pin regions (ie, the center point of each pin) are mapped to the first coordinate system to obtain their coordinate positions. These coordinate values represent the specific position of each pin center relative to the center of the package region.
[0260] Step 1055: extracting a plurality of first line segments formed between the plurality of first coordinate positions and the first center;
[0261] According to the coordinate positions obtained in step 1054, each pin center point is connected to the first center of the package area to form a plurality of first line segments. Each first line segment represents a line from the center of the package area to the center of a pin area.
[0262] Step 1056: Extracting a first minimum distance line segment corresponding to each of the plurality of first line segments; wherein the first minimum distance line segment refers to a line segment having the shortest distance from the first line segment;
[0263] The relative position of each segment within these lines needs to be further analyzed, specifically the distance between each segment and the others. To do this, the minimum distance between each first segment and the others is calculated, and the shortest segment is extracted. This segment is called the first minimum distance segment. This represents the minimum distance from one pin to the others and is crucial for calculating the angle.
[0264] Step 1057: Calculate the first angle between the first line segment and the first minimum distance line segment respectively;
[0265] Next, the angle between each first line segment and its corresponding first minimum distance line segment is calculated. By calculating the angle between each pair of line segments, the angular relationship between the pin regions can be determined. This angle reflects the position distribution of the pins in the package area.
[0266] Step 1058: If the plurality of first angles are all within the angle fluctuation range, it is determined that there is no position distribution defect between the package area and the pin area;
[0267] At this stage, the system checks whether all calculated first angles fall within the standard angle fluctuation range. If every angle is within this range, it means that the pin area distribution meets the standard requirements and there are no position distribution defects.
[0268] Step 1059: If the plurality of first angles are not uniformly within the angle fluctuation range, it is determined that there is a position distribution defect between the packaging area and the pin area.
[0269] If part or most of the calculated angle is outside the angle fluctuation range, it means that the position distribution of the pin area does not meet the standard and there is a deviation. In this case, the system will determine that there is a position distribution defect between the package area and the pin area.
[0270] In the embodiment corresponding to steps 1051 through 1059, the positional distribution between the package area and the pin area is analyzed in detail through the following geometric steps: using a standard reference image to set an angle fluctuation range; extracting the coordinates of the center of the package area and the center of the pin area; calculating the relative positions of the pins in the coordinate system to form connecting lines; calculating the angle between these connecting lines; and determining whether these angles fall within the standard range, thereby determining whether there are positional distribution defects. This method, which determines whether the pin distribution is normal through geometric analysis, is a precise defect detection method.
[0271] In the embodiments corresponding to steps 101 to 105, by extracting the standard package area and comparing it with the current package area, package defects can be effectively identified. Package defects include missing packages, damaged packages, and abnormal printed patterns, and these defects have a direct impact on the function and reliability of the chip. Traditional detection methods often have difficulty accurately distinguishing different types of package defects. However, the present invention can accurately locate package defects by comparing and analyzing the standard package area with the current package area, avoiding missed detections and false detections. The present invention further determines that the package area is free of defects and can identify various pin defects such as pin offset, pin unevenness, and missing pins through a comprehensive analysis of the current package area and the current pin area. These pin defects often have a direct impact on the electrical performance of the chip, while traditional detection methods can generally only detect some defect types. The method of the present invention can comprehensively detect and accurately identify various defects in the pin area, improving the comprehensiveness and accuracy of detection. In addition to defect detection in the package area and the pin area, the present invention can further determine whether there are position distribution defects by analyzing the position distribution between the package area and the pin area. Traditional detection methods usually only focus on local defects and ignore the relative position relationship between the package and the pin area, which may cause some small but serious defects to go undetected. By detecting position distribution defects, the detection accuracy of the overall chip quality can be improved and chip failures caused by position errors can be reduced. In summary, the chip defect detection method provided by the present invention provides a comprehensive and accurate detection solution in terms of package defects, pin defects, position distribution defects, etc., greatly improving the quality control level of chip production and solving many shortcomings in traditional detection methods.
[0272] like Figure 2 The present invention provides a chip defect detection device, see Figure 2 , Figure 2 A schematic diagram of a chip defect detection device provided by the present invention is shown. Figure 2 A chip defect detection device includes:
[0273] An acquisition unit 21 is used to acquire an image to be recognized collected by a visual module;
[0274] An extraction unit 22 is configured to extract a chip image region from the image to be identified, and to extract a current package region and a plurality of current pin regions from the chip image region;
[0275] The first judgment unit 23 is configured to obtain a standard packaging area and determine whether the current packaging area has a packaging defect based on the standard packaging area and the current packaging area; the packaging defect includes a missing package, a damaged package, or an abnormal printed pattern;
[0276] The second judgment unit 24 is configured to determine, when it is determined that the current package area does not have defects, whether pin defects occur in the plurality of current pin areas according to the current package area; the pin defects include pin offset defects, pin unevenness defects, and pin missing defects;
[0277] The third judgment unit 25 is configured to determine whether there is a position distribution defect between the packaging area and the pin area based on the current packaging area and the multiple current pin areas when it is determined that the current pin area does not have a defect.
[0278] The present invention provides a chip defect detection device that can effectively identify packaging defects by extracting a standard packaging area and comparing it with the current packaging area. Packaging defects include missing packaging, damaged packaging, and abnormal printed patterns, which have a direct impact on the function and reliability of the chip. Traditional detection methods often have difficulty accurately distinguishing different types of packaging defects. However, the present invention can accurately locate packaging defects by comparing and analyzing the standard packaging area with the current packaging area, avoiding missed detections and false detections. The present invention further determines that the packaging area is free of defects and can identify various pin defects such as pin offset, pin unevenness, and pin missing through a comprehensive analysis of the current packaging area and the current pin area. These pin defects often have a direct impact on the electrical performance of the chip, while traditional detection methods can usually only detect some types of defects. The method of the present invention can comprehensively detect and accurately identify various defects in the pin area, improving the comprehensiveness and accuracy of detection. In addition to defect detection in the packaging area and the pin area, the present invention can also further determine whether there are position distribution defects by analyzing the position distribution between the packaging area and the pin area. Traditional detection methods usually only focus on local defects and ignore the relative position relationship between the package and the pin area, which may cause some small but serious defects to go undetected. By detecting position distribution defects, the detection accuracy of the overall chip quality can be improved and chip failures caused by position errors can be reduced. In summary, the chip defect detection method provided by the present invention provides a comprehensive and accurate detection solution in terms of package defects, pin defects, position distribution defects, etc., greatly improving the quality control level of chip production and solving many shortcomings in traditional detection methods.
[0279] Figure 3 FIG. 1 is a schematic diagram of a terminal device provided by an embodiment of the present invention. Figure 3 As shown, a terminal device 3 of this embodiment includes: a processor 30, a memory 31, and a computer program 32 stored in the memory 31 and executable on the processor 30, such as a chip defect detection program. When the processor 30 executes the computer program 32, the steps of each of the above-mentioned chip defect detection method embodiments are implemented, such as Figure 1 Alternatively, when the processor 30 executes the computer program 32, the functions of each unit in the above-mentioned device embodiments are realized, for example, Figure 2 Function of the unit shown.
[0280] Exemplarily, the computer program 32 may be divided into one or more units, which are stored in the memory 31 and executed by the processor 30 to implement the present invention. The one or more units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program 32 in the terminal device 3. For example, the specific functions of each unit of the computer program 32 are as follows:
[0281] An acquisition unit, used to acquire the image to be recognized collected by the visual module;
[0282] an extraction unit, configured to extract a chip image region from the image to be identified, and extract a current package region and a plurality of current pin regions from the chip image region;
[0283] A first judgment unit is configured to obtain a standard packaging area and determine whether the current packaging area has a packaging defect based on the standard packaging area and the current packaging area; the packaging defect includes a missing package, a damaged package, or an abnormal printed pattern;
[0284] A second judgment unit is configured to determine, when it is determined that the current packaging area does not have defects, whether pin defects occur in the plurality of current pin areas according to the current packaging area; the pin defects include pin offset defects, pin unevenness defects, and pin missing defects;
[0285] The third judgment unit is configured to determine whether there is a position distribution defect between the packaging area and the pin area based on the current packaging area and the multiple current pin areas when it is determined that there is no defect in the current pin area.
[0286] The terminal device includes but is not limited to a processor 30 and a memory 31. Those skilled in the art will understand that Figure 3 It is only an example of a terminal device 3 and does not constitute a limitation on a terminal device 3. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the terminal device may also include input and output devices, network access devices, buses, etc.
[0287] The processor 30 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.
[0288] The memory 31 may be an internal storage unit of the terminal device 3, such as a hard disk or memory of the terminal device 3. The memory 31 may also be an external storage device of the terminal device 3, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the terminal device 3. Furthermore, the memory 31 may include both an internal storage unit of the terminal device 3 and an external storage device. The memory 31 is used to store the computer program and other programs and data required by the roaming control device. The memory 31 may also be used to temporarily store data that has been output or is to be output.
[0289] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.
[0290] It should be noted that the information interaction, execution process, etc. between the above-mentioned devices / units are based on the same concept as the embodiment of the method of the present invention. Their specific functions and technical effects can be found in the method embodiment part and will not be repeated here.
[0291] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present invention. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.
[0292] An embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in the above-mentioned various method embodiments can be implemented.
[0293] An embodiment of the present invention provides a computer program product. When the computer program product is run on a mobile terminal, the mobile terminal can implement the steps in the above-mentioned method embodiments when executing the computer program product.
[0294] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the process in the above-mentioned embodiment method by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by a processor, it can implement the steps of each of the above-mentioned method embodiments. The computer program includes computer program code, which can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium can at least include: any entity or device that can carry the computer program code to the camera / terminal device, recording medium, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal and software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disk.
[0295] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.
[0296] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.
[0297] In the embodiments provided by the present invention, it should be understood that the disclosed devices / network equipment and methods can be implemented in other ways. For example, the device / network equipment embodiments described above are merely illustrative. For example, the division of the modules or units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.
[0298] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, and may be located in one place or distributed across multiple network units.
[0299] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.
[0300] It will also be understood that the term "and / or" used in the present description and appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
[0301] As used in the present specification and the appended claims, the term "if" may be interpreted as "when" or "upon" or "in response to determining" or "in response to monitoring," depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is monitored" may be interpreted as meaning "upon determination" or "in response to determining" or "upon monitoring [described condition or event]" or "in response to monitoring [described condition or event]," depending on the context.
[0302] In addition, in the description of the present specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.
[0303] References to "one embodiment" or "some embodiments" in the present specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present invention. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in yet other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.
[0304] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the scope of protection of the present invention.
Claims
1. A chip defect detection method, characterized in that: The chip defect detection method includes: Obtain the image to be recognized collected by the visual module; Extracting a chip image area in the image to be identified, and extracting a current package area and a plurality of current pin areas in the chip image area; Obtaining a standard packaging area, and confirming whether the current packaging area has a packaging defect based on the standard packaging area and the current packaging area; the packaging defect includes packaging missing, packaging damage, or abnormal printing pattern; When it is determined that the current packaging area does not have defects, determining whether pin defects occur in the plurality of current pin areas according to the current packaging area; the pin defects include pin offset defects, pin unevenness defects, and pin missing defects; When it is determined that the current pin region does not have defects, it is determined whether there are position distribution defects between the packaging region and the pin regions based on the current packaging region and the multiple current pin regions.
2. The chip defect detection method according to claim 1, wherein: The step of extracting a chip image area in the image to be identified, and extracting a current package area and a plurality of current pin areas in the chip image area comprises: Obtain a first color distribution range corresponding to the base and a second color distribution range corresponding to the pin; Acquire a plurality of first pixel points corresponding to the first color distribution range in the image to be identified; Eliminating a plurality of continuous first pixel points in the image to be identified to obtain the chip image area; Acquire a plurality of second pixel points corresponding to the second color distribution range in the chip image area; Acquire multiple image regions consisting of multiple consecutive second pixel points, and use the multiple image regions as multiple current pin regions; A plurality of continuous second pixel points in the chip image area are eliminated to obtain the current packaging area.
3. The chip defect detection method according to claim 1, wherein: The step of obtaining a standard packaging area and confirming whether the current packaging area has a packaging defect based on the standard packaging area and the current packaging area includes: Obtain a third color distribution range corresponding to the packaging material; Extracting a plurality of third pixel points corresponding to a third color distribution range in the current encapsulation area; using an image area formed by a plurality of third pixel points as a first packaging material area; Acquire a second packaging material area in the standard packaging area; Aligning the first encapsulation material area with the second encapsulation material area, and calculating a pixel difference between each identical pixel position; If the pixel difference corresponding to the plurality of consecutive pixel positions is greater than a first threshold, and the number of the plurality of consecutive pixel positions exceeds a second threshold, it is determined that there is package missing or package damaged in the current package area; If the pixel difference corresponding to the plurality of consecutive pixel positions is not greater than the first threshold or the number of the plurality of consecutive pixel positions does not exceed the second threshold, it is determined that there is no package missing or package damage in the current package area; According to the distribution relationship between the four diagonal points corresponding to the current packaging area and the preset feature points, it is confirmed whether there is any printing pattern abnormality in the current packaging area.
4. The chip defect detection method according to claim 3, wherein: The step of confirming whether there is a printing pattern abnormality in the current packaging area according to the distribution relationship between the four diagonal points corresponding to the current packaging area and the preset feature points includes: Obtain the four diagonal points corresponding to the current packaging area; Extracting two preset feature points corresponding to the printed pattern in the current packaging area; Calculating a first distance between each preset feature point and the four diagonal points; Acquire multiple second distances corresponding to the standard packaging area; the multiple second distances are distances between a preset feature point and four diagonal points in the standard packaging area; Calculating a first difference between the first distance and the second distance corresponding to the same point; If the first differences are all smaller than a third threshold, it is determined that there is no printing pattern abnormality in the current packaging area; If the first difference is not smaller than a third threshold, it is determined that a printing pattern abnormality exists in the current packaging area.
5. The chip defect detection method according to claim 4, wherein: The step of extracting two preset feature points corresponding to the printed pattern in the current packaging area includes: Obtaining a standard feature matrix corresponding to the preset feature points; Extracting a pixel matrix around each current pixel in the current encapsulation area, with the current pixel as the center; wherein the pixel matrix has the same matrix size as the standard feature matrix; Calculating second differences between the pixel value of the current pixel and the pixel values of other pixels in the pixel matrix respectively; Replacing the pixel values of other pixels in the pixel matrix with the second difference value to obtain a current feature matrix; Calculating the similarity between each current feature matrix and the standard feature matrix; The current pixel point corresponding to the current feature matrix corresponding to the maximum similarity is used as the preset feature point.
6. The chip defect detection method according to claim 1, wherein: When it is determined that the current packaging area does not have defects, the step of determining whether pin defects occur in the plurality of current pin areas according to the current packaging area includes: When it is determined that the current package area does not have defects, a preset first package pin ratio relationship and a second package pin ratio relationship are obtained; the first package pin ratio relationship refers to a ratio between a first length of the standard package area and a second length of the single standard pin area, and the second package pin ratio relationship refers to a ratio between the first length of the standard package area and a first width of the single standard pin area; Obtaining a third length of the current encapsulation area; Calculating a fourth length corresponding to the pin area according to the first package pin ratio relationship and the third length; Calculating a third width corresponding to the pin area according to the second package pin ratio relationship and the third length; It is determined whether pin defects occur in the plurality of current pin areas according to the third length, the fourth length, and the third width.
7. The chip defect detection method according to claim 6, wherein: The step of determining whether pin defects occur in the plurality of current pin areas based on the third length, the fourth length, and the third width includes: Obtaining a fifth length corresponding to each of the plurality of current pin regions; calculating a third difference between the fourth length and the fifth length; If the third difference is less than a fourth threshold, obtaining a second width of a plurality of sampling points in each of the current pin regions; calculating a fourth difference between the third width and a plurality of the second widths; If the fifth differences between the plurality of second widths in the same current pin region are all smaller than the fourth threshold, and the plurality of fourth differences are all smaller than the fifth threshold, then it is determined that the current pin region does not have a defect; If the third difference is not less than a fourth threshold, it is determined that a pin shift defect exists in the current pin area; If the fifth difference is less than the fourth threshold or the fourth difference is less than the fifth threshold, it is determined that there is a pin unevenness defect in the current pin area; If the number of the current pin area is less than the preset number, it is determined that the current pin area has a pin missing defect.
8. The chip defect detection method according to claim 1, wherein: When it is determined that the current pin region does not have defects, the step of determining whether there are position distribution defects between the package region and the pin regions based on the current package region and the multiple current pin regions includes: Obtaining an angle fluctuation range corresponding to a standard reference image; the angle fluctuation range is used to describe a distribution relationship between multiple pin regions; Extracting a first center of the current package area and extracting second centers of a plurality of current pin areas; Establishing a first coordinate system with the first center as the coordinate origin; In the first coordinate system, obtaining first coordinate positions of a plurality of second centers; Extracting a plurality of first line segments formed between a plurality of first coordinate positions and a first center; Extracting a first minimum distance line segment corresponding to each first line segment from the plurality of first line segments; wherein the first minimum distance line segment refers to a line segment with the shortest distance from the first line segment; respectively calculating first angles between the first line segment and the first minimum distance line segment; If the plurality of first angles are all within the angle fluctuation range, it is determined that there is no position distribution defect between the packaging area and the pin area; If the plurality of first angles are not all within the angle fluctuation range, it is determined that there is a position distribution defect between the packaging area and the pin area.
9. The chip defect detection method according to claim 8, wherein: The step of obtaining the angle fluctuation range corresponding to the standard reference image includes: Acquire a standard reference image, and extract a standard package area and a plurality of standard pin areas in the standard reference image; Extracting a third center of the standard package area and extracting a fourth center of the plurality of standard pin areas; Establishing a second coordinate system with the third center as the coordinate origin; In the second coordinate system, obtaining second coordinate positions of the plurality of fourth centers; extracting a plurality of second line segments formed between the plurality of second coordinate positions and the third center; Extracting the second minimum distance line segment corresponding to each second line segment from the plurality of second line segments; wherein the second minimum distance line segment refers to the line segment with the shortest distance from the second line segment; respectively calculating a second angle between the second line segment and the second minimum distance line segment; Counting a first fluctuation range formed by a plurality of the second angles; Based on a preset redundancy coefficient, the first fluctuation range is expanded to obtain the angle fluctuation range.
10. A chip defect detection device, characterized in that: The chip defect detection device includes: An acquisition unit, used to acquire the image to be recognized collected by the visual module; an extraction unit, configured to extract a chip image region from the image to be identified, and extract a current package region and a plurality of current pin regions from the chip image region; A first judgment unit is configured to obtain a standard packaging area and determine whether the current packaging area has a packaging defect based on the standard packaging area and the current packaging area; the packaging defect includes a missing package, a damaged package, or an abnormal printed pattern; A second judgment unit is configured to determine, when it is determined that the current packaging area does not have defects, whether pin defects occur in the plurality of current pin areas according to the current packaging area; the pin defects include pin offset defects, pin unevenness defects, and pin missing defects; The third judgment unit is configured to determine whether there is a position distribution defect between the packaging area and the pin area based on the current packaging area and the multiple current pin areas when it is determined that there is no defect in the current pin area.
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