Method for preparing functional layer in semiconductor device and semiconductor device

Abstract

The application discloses a functional layer preparation method in a semiconductor device and the semiconductor device, and applies to the semiconductor field, and comprises the following steps: selecting a preset substrate mesa in a substrate, preparing a bottom photoresist and an intermediate layer photoresist which completely fill adjacent grooves and are flush with the preset substrate mesa on all inner surfaces of the adjacent grooves of the preset substrate mesa in sequence, preparing a patterned top photoresist which completely exposes the preset substrate mesa, and preparing a functional layer; the bottom photoresist and the patterned top photoresist are both negative stripping photoresists, and the intermediate layer photoresist is a positive stripping photoresist. According to the metal layer preparation method in the semiconductor device provided by the application, the bottom photoresist and the intermediate layer photoresist are used to fill the grooves adjacent to the preset substrate mesa, then the patterned top photoresist which completely exposes the preset substrate mesa is prepared, the accurate alignment between the patterned top photoresist and the preset substrate mesa does not need to be considered, and the overlaying precision of the functional layer and the bottom structure can be ensured.

Description

Technical Field

[0001] This invention relates to the field of semiconductors, and in particular to a method for fabricating a functional layer in a semiconductor device and the semiconductor device itself. Background Technology

[0002] In the field of semiconductor chip manufacturing technology, it is often necessary to prepare conductive layers in designated areas to enable electron flow. Taking a structure with grooves formed in a wafer, top mesa formed between adjacent grooves, and a metal layer to be prepared on the top mesa as an example, the current method for preparing the metal layer in designated areas is to use metal lift-off. This mainly involves using photolithography to coat, expose, and develop a patterned photoresist. Traditionally, fine overlay operations are required to ensure that the patterned photoresist accurately covers the areas that do not require metal coating. However, due to limitations in overlay precision and wafer warpage, the patterned photoresist cannot actually accurately cover the corresponding areas on a wafer.

[0003] Existing metal stripping technology has two main drawbacks. First, the shape of the metal layer pattern is entirely dependent on the photomask pattern, leading to misalignment issues between the machine and human alignment. This discrepancy is amplified by wafer surface warping, often resulting in the final metal pattern position differing from the designed position by several micrometers. Second, the metal layer serves as a medium for electron transport. Designs aim to direct electrons only to the conductive layers of the chip. However, existing metal stripping processes, due to alignment accuracy discrepancies, cannot deposit metal solely on the conductive layers. Excess metal deposits form parasitic capacitances on the chip surface, hindering electron transport and consequently affecting chip performance.

[0004] Therefore, how to propose a method for fabricating functional layers in semiconductor devices that can improve the overlay accuracy between the functional layer and the underlying structure and avoid deviations in the fabrication area is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a method for fabricating a functional layer in a semiconductor device and a semiconductor device, which solves the problem that the overlay accuracy between the functional layer and the underlying structure is limited by the accuracy of photoresist fabrication in the prior art.

[0006] To address the aforementioned technical problems, this invention provides a method for fabricating a functional layer in a semiconductor device, comprising:

[0007] A substrate is provided; a groove is formed on one side surface of the substrate, and a substrate mesa is formed between adjacent grooves;

[0008] Select the substrate mesa to be prepared as the preset substrate mesa. On all the inner surfaces of the adjacent trenches of the preset substrate mesa, prepare the bottom layer photoresist and the middle layer photoresist that completely fill the adjacent trenches and are flush with the preset substrate mesa, as the first processing substrate.

[0009] A patterned top layer photoresist is prepared on the surface of the first processing substrate on which the preset substrate mesa is formed, serving as the second processing substrate; the patterned top layer photoresist is completely exposed on the preset substrate mesa.

[0010] A functional layer is prepared on the side of the second processing substrate where the patterned top layer photoresist is formed;

[0011] Remove the patterned top layer photoresist, the intermediate layer photoresist, and the bottom layer photoresist to complete the fabrication of the functional layer on the preset substrate mesa; the bottom layer photoresist and the patterned top layer photoresist are both negative stripping photoresists, and the intermediate layer photoresist is a positive stripping photoresist.

[0012] Optionally, the step of selecting the substrate mesa to be fabricated as the preset substrate mesa, and sequentially fabricating the bottom layer photoresist and the intermediate layer photoresist that completely fill the adjacent trenches and are flush with the preset substrate mesa on all the inner surfaces of the adjacent trenches of the preset substrate mesa, as the first processing substrate, includes:

[0013] Select the substrate mesa to be fabricated as the preset substrate mesa, and sequentially prepare the bottom layer photoresist and the intermediate layer photoresist that completely fill the entire inner surface of the trench on the surface of the substrate where the preset substrate mesa is formed.

[0014] The mask is aligned with the first preset area, and the photoresist on the surface of the substrate is exposed and developed to remove the intermediate layer photoresist and the bottom layer photoresist outside the first preset area, which is used as the substrate to be processed; the first preset area includes a portion of the substrate mesa and a portion of the trench, the portion of the substrate mesa includes at least the preset substrate mesa, and the portion of the trench includes only the adjacent trench.

[0015] Dry etching is performed on the surface of the substrate to be processed, on which the preset substrate mesa is formed, until the substrate to be processed is exposed to the preset substrate mesa, thus obtaining the first processed substrate.

[0016] Optionally, the surface of the substrate to be processed on which the preset substrate mesa is formed is subjected to dry etching until the substrate to be processed exposes the preset substrate mesa, thereby obtaining the first processed substrate, including:

[0017] The surface of the substrate to be processed, on which the preset substrate mesa is formed, is etched using a reactive ion etching process until the preset substrate mesa is exposed, thus obtaining the first processed substrate.

[0018] Optionally, a patterned top layer photoresist is prepared on the surface of the first processing substrate where the preset substrate mesa is formed, serving as the second processing substrate, including:

[0019] A top layer photoresist is prepared on the surface of the first processing substrate on which the preset substrate mesa is formed; the top layer photoresist is a negative stripping photoresist with undercut.

[0020] The mask is aligned with the second preset area, and the top layer photoresist on the surface of the first processing substrate is exposed and developed to remove the top layer photoresist in the second preset area, thereby completing the preparation of the patterned top layer photoresist and obtaining the second processing substrate; the second preset area includes all the preset substrate mesa.

[0021] Optionally, on the side of the second processing substrate where the patterned top layer photoresist is formed, a functional layer is prepared, including:

[0022] A metal layer is deposited on the side of the second processing substrate where the patterned top layer photoresist is formed;

[0023] Accordingly, prior to the deposition of the metal layer, the process further includes:

[0024] The preset substrate mesa is cleaned by using plasma through chemical reaction and physical bombardment to remove residual photoresist from the preset substrate mesa.

[0025] The natural oxide layer formed on the substrate due to contact with air is removed by rinsing with acidic solvents in order to activate the preset substrate mesa.

[0026] Optionally, on the side of the second processing substrate where the patterned top layer photoresist is formed, a metal layer is deposited, including:

[0027] On the side of the second processing substrate where the patterned top layer photoresist is formed, the metal layer is deposited by vapor deposition.

[0028] Optionally, after preparing the underlying photoresist, the underlying photoresist is subjected to a soft baking process;

[0029] After preparing the intermediate layer photoresist, the intermediate layer photoresist is subjected to a soft baking process.

[0030] Optionally, the substrate provided includes:

[0031] Provides substrates for both wet and dry surface cleaning.

[0032] The present invention also provides a semiconductor device, comprising:

[0033] A substrate, wherein a groove is formed on one side surface of the substrate, and a substrate mesa is formed between adjacent grooves, and the substrate mesa includes a preset substrate mesa for the functional layer to be prepared.

[0034] The functional layer is fabricated on the mesa of the preset substrate; the functional layer is fabricated on the mesa of the preset substrate by means of a bottom layer photoresist, an intermediate layer photoresist and a patterned top layer photoresist.

[0035] The bottom layer photoresist and the intermediate layer photoresist are photoresists that are formed sequentially on all the inner surfaces of adjacent trenches on the preset substrate mesa, completely filling the adjacent trenches and being flush with the preset substrate mesa; the patterned top layer photoresist is a patterned photoresist formed on the surfaces of the bottom layer photoresist, the intermediate layer photoresist and the substrate, completely exposing the preset substrate mesa.

[0036] The bottom layer photoresist and the patterned top layer photoresist are both negative stripping photoresists, while the intermediate layer photoresist is a positive stripping photoresist.

[0037] Optionally, the patterned top layer photoresist is a negative stripping photoresist with undercut.

[0038] As can be seen, the method for fabricating a functional layer in a semiconductor device provided by the present invention includes providing a substrate, wherein trenches are formed on one side surface of the substrate, and substrate mesas are formed between adjacent trenches; selecting the substrate mesas where the functional layer to be fabricated is selected as a preset substrate mesas; on all inner surfaces of adjacent trenches on the preset substrate mesas, a bottom layer photoresist and an intermediate layer photoresist are sequentially fabricated to completely fill the adjacent trenches and are flush with the preset substrate mesas, serving as a first processing substrate; on the surface of the first processing substrate where the preset substrate mesas are formed, a patterned top layer photoresist is fabricated, serving as a second processing substrate, wherein the patterned top layer photoresist is completely exposed on the preset substrate mesas; on the side of the second processing substrate where the patterned top layer photoresist is formed, a functional layer is fabricated; the patterned top layer photoresist, the intermediate layer photoresist, and the bottom layer photoresist are removed to complete the fabrication of the functional layer on the preset substrate mesas; the bottom layer photoresist and the patterned top layer photoresist are both negative stripping photoresists, and the intermediate layer photoresist is a positive stripping photoresist.

[0039] The technical effect achieved by this invention is as follows: By filling the trenches adjacent to the pre-set substrate mesas with bottom layer photoresist and intermediate layer photoresist, and then preparing a patterned top layer photoresist that completely exposes the pre-set substrate mesas, both the bottom layer photoresist and the patterned top layer photoresist are set as negative stripping photoresists, and the intermediate layer photoresist is set as a positive stripping photoresist. After the functional layer is prepared, the functional layer in the area outside the pre-set substrate mesas can be removed by removing the photoresist. There is no need to consider the precise alignment between the patterned top layer photoresist and the pre-set substrate mesas, which can ensure the overlay accuracy between the functional layer and the bottom layer structure and improve device performance.

[0040] In addition, the present invention also provides a semiconductor device that has the same beneficial effects as described above. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0042] Figure 1 A flowchart illustrating a method for fabricating a functional layer in a semiconductor device, provided by an embodiment of the present invention;

[0043] Figure 2 This is a schematic diagram of the substrate structure in a method for fabricating a functional layer in a semiconductor device according to an embodiment of the present invention;

[0044] Figure 3 This is a schematic diagram of a structure in which a bottom layer photoresist is prepared on the surface of a substrate, according to an embodiment of the present invention.

[0045] Figure 4 This is a schematic diagram of a structure in which a bottom layer photoresist and an intermediate layer photoresist are prepared on the surface of a substrate, according to an embodiment of the present invention.

[0046] Figure 5 This is a schematic diagram of a structure in which photoresist is retained only in a first preset region, as provided in an embodiment of the present invention.

[0047] Figure 6 This is a schematic diagram of the structure of a device after under-etching of the photoresist, provided in an embodiment of the present invention;

[0048] Figure 7 This is a schematic diagram of a device with a top layer of photoresist provided in an embodiment of the present invention;

[0049] Figure 8 This is a schematic diagram of a structure for fabricating a patterned top layer photoresist in a device, provided by an embodiment of the present invention.

[0050] Figure 9 This is a schematic diagram of a structure for fabricating a metal layer in a device according to an embodiment of the present invention;

[0051] Figure 10 This is a schematic diagram of the completed fabrication of a functional layer in a semiconductor device according to an embodiment of the present invention;

[0052] Figure 11 This is a schematic diagram of the structure of a semiconductor device provided in an embodiment of the present invention;

[0053] The attached diagram is described below:

[0054] 1-Trench, 2-Substrate mesa, 3-Ridge waveguide mesa, 4-Preset substrate mesa, 10-Wafer substrate, 11-Substrate, 20-Bottom layer photoresist, 30-Intermediate layer photoresist, 40-Top layer photoresist, 41-Patterned top layer photoresist, 50-Metal layer, 51-Functional layer. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0056] The existing process for preparing a metal layer using a metal lift-off process includes: coating a photoresist and performing soft baking to cure the photoresist layer; after exposure and development using a mask, forming grooves in the desired area to expose the substrate; preparing a Ti (titanium) / Pt (platinum) / Au (gold) metal layer using a physical vapor deposition process, where Ti is the adhesion layer, Pt is used to improve corrosion resistance, and Au is used to provide high conductivity. The metal thickness needs to be less than the photoresist thickness to facilitate subsequent lift-off; immersing the workpiece in a PRS3000 lift-off solution heated to 50-70 degrees Celsius to dissolve the photoresist and peel off the metal layer covering the photoresist surface. If necessary, ultrasonic assistance or slow stirring can be used to accelerate the lift-off; finally, rinsing the device with deionized water and drying the device with nitrogen gas.

[0057] Existing metal stripping technologies have two main drawbacks: First, the metal pattern is entirely dependent on the photomask pattern, leading to misalignment issues between the machine and the operator. This discrepancy is amplified by wafer surface warping, resulting in the final metal pattern often deviating from the design by several micrometers – a significant bottleneck in chip design. Second, the metal layer serves as a medium for electron transport. Designs aim to direct electrons only to the conductive layers of the chip. Current metal stripping processes, due to misalignment, cannot achieve this, preventing the fabrication of metal solely on the conductive layers. Excess metal areas create parasitic capacitance within the device, hindering electron transport and consequently impacting chip performance.

[0058] This invention utilizes a bottom layer photoresist and an intermediate layer photoresist to fill trenches adjacent to a pre-defined substrate mesas. Then, a patterned top layer photoresist is prepared that completely exposes the pre-defined substrate mesas. Both the bottom layer and the patterned top layer photoresist are set as negative stripping photoresists, while the intermediate layer photoresist is set as a positive stripping photoresist. After fabricating the functional layer, the functional layer outside the pre-defined substrate mesas can be removed by removing the photoresist. Precise alignment between the patterned top layer photoresist and the pre-defined substrate mesas is not required, ensuring the overlay accuracy between the functional layer and the bottom layer structure and improving device performance.

[0059] Please refer to Figure 1 , Figure 1 This is a flowchart illustrating a method for fabricating a functional layer in a semiconductor device, as provided in an embodiment of the present invention. The method may include:

[0060] S101: Provide a substrate; a groove is formed on one side surface of the substrate, and a substrate mesa is formed between adjacent grooves.

[0061] The execution subject of this embodiment is a functional layer fabrication device for semiconductor devices. The substrate provided in this embodiment only needs to have trenches formed on one surface, with substrate mesas formed between adjacent trenches. This embodiment does not limit the type of substrate, as long as it has the above-described substrate structure. For example, the substrate provided in this embodiment can be a wafer on which a metal functional layer needs to be fabricated on a specific substrate mesas, or it can be any other structure on which a functional layer needs to be fabricated on a specific substrate mesas. The depth and width of the trenches in this embodiment can be adjusted according to specific application requirements; for example, the depth can be set to 1-10 micrometers, and the width can be set to 0.5-5 micrometers. Furthermore, the substrate material in this embodiment can be silicon, glass, ceramic, or other materials suitable for semiconductor processes.

[0062] Furthermore, to ensure the performance of the fabricated semiconductor device, the substrate provided above may include:

[0063] Provides substrates that can be cleaned using both wet and dry methods.

[0064] The substrate provided in this embodiment is a substrate that has undergone both wet and dry surface cleaning to ensure that contaminants are removed during the subsequent preparation of photoresist and functional layers. These contaminants may include particulate contaminants and organic residues to improve the surface energy of the device, enhance the adhesion of subsequent thin films, reduce surface defects, and improve device performance.

[0065] S102: Select the substrate mesa to be prepared as the preset substrate mesa. On all the inner surfaces of the adjacent trenches of the preset substrate mesa, prepare the bottom layer photoresist and the intermediate layer photoresist that completely fill the adjacent trenches and are flush with the preset substrate mesa, as the first processing substrate.

[0066] In this embodiment, the prepared bottom layer photoresist and intermediate layer photoresist are flush with the preset substrate mesa. This means that the prepared bottom layer photoresist and intermediate layer photoresist just fill the adjacent trenches of the preset substrate mesa. In fact, it is not required that the upper surface of the prepared bottom layer photoresist and intermediate layer photoresist be completely flat, as long as it does not affect the preparation of the subsequent patterned top layer photoresist and the preparation of the functional layer.

[0067] In this embodiment, the substrate mesa on which the functional layer needs to be fabricated is used as the preset substrate mesa. It should be noted that the functional layer fabricated in this embodiment can be a conductive functional layer, such as a metal layer, or other structural layers with specific functions. In this embodiment, the entire inner surface of the adjacent trenches of the preset substrate mesa includes the sidewall surfaces and bottom surfaces of the adjacent trenches of the preset substrate mesa. Therefore, during fabrication, a bottom layer photoresist is first fabricated on the sidewall surfaces and bottom surfaces of the adjacent trenches of the preset substrate mesa. Then, an intermediate layer photoresist is fabricated on the sidewall surfaces and bottom surfaces of the bottom layer photoresist fabricated in the adjacent trenches of the preset substrate mesa. The bottom layer photoresist and the intermediate layer photoresist fabricated in the adjacent trenches of the preset substrate mesa just fill the adjacent trenches, that is, the bottom layer photoresist and the intermediate layer photoresist completely fill the adjacent trenches of the preset substrate mesa, and their tops are flush with the preset substrate mesa. This embodiment is not limited to the specific method of preparing the bottom layer photoresist and intermediate layer photoresist in the adjacent trenches of the preset substrate mesa. For example, the bottom layer photoresist and intermediate layer photoresist can be precisely controlled to completely fill the adjacent trenches of the preset substrate mesa. Alternatively, the bottom layer photoresist and intermediate layer photoresist can be prepared to completely fill the adjacent trenches of the preset substrate mesa, with some overflowing the adjacent trenches. Then, the photoresist outside the adjacent trenches can be removed by etching or other removal methods to complete the preparation of the bottom layer photoresist and intermediate layer photoresist in the adjacent trenches of the preset substrate mesa, thus obtaining the first processed substrate. It should be further noted that in this embodiment, completely filling the adjacent trenches of the preset substrate mesa means that the adjacent trenches are completely filled by the bottom layer photoresist and intermediate layer photoresist.

[0068] In this embodiment, the bottom layer photoresist is set as a negative stripping photoresist. Its function is to fill the trenches and provide a flat surface, and to isolate the intermediate layer photoresist from the substrate, facilitating the patterning etching of the intermediate layer photoresist and its subsequent removal. The intermediate layer photoresist is set as a positive stripping photoresist. Its function is to cover the bottom layer photoresist and encapsulate the trenches, facilitating subsequent patterning processing. When preparing the patterned top layer photoresist, it avoids affecting the photoresist in adjacent trenches of the preset substrate mesas, thereby preventing the subsequent large-area fabrication of functional layers in adjacent trenches of the preset substrate mesas.

[0069] Furthermore, to ensure the precise fabrication of the aforementioned bottom layer photoresist and intermediate layer photoresist, and to ensure the successful fabrication of the first processing substrate, the aforementioned selection of the substrate mesa to be fabricated as the preset substrate mesa, and the sequential fabrication of the bottom layer photoresist and intermediate layer photoresist that completely fill the adjacent trenches and are flush with the preset substrate mesa on all the inner surfaces of the adjacent trenches of the preset substrate mesa, as the first processing substrate, may include the following steps:

[0070] Step S11: Select the substrate mesa to be prepared as the preset substrate mesa. On the surface of the substrate where the preset substrate mesa is formed, prepare the bottom layer photoresist and the intermediate layer photoresist to completely fill all the inner surfaces of the trench in sequence.

[0071] Step S12: Align the mask with the first preset area, expose and develop the photoresist on the substrate surface to remove the intermediate layer photoresist and the bottom layer photoresist outside the first preset area, and use it as the substrate to be processed; the first preset area includes a portion of the substrate mesa and a portion of the trench, the portion of the substrate mesa includes at least the preset substrate mesa, and the portion of the trench includes only the adjacent trench.

[0072] Step S13: Dry etching is performed on the surface of the substrate to be processed where a preset substrate mesa is formed until the substrate to be processed is exposed to the preset substrate mesa, thus obtaining the first processed substrate.

[0073] It should be noted that in this embodiment, on the surface of the substrate where a preset substrate mesa is formed, a bottom layer photoresist and an intermediate layer photoresist are sequentially prepared to completely fill all the inner surfaces of the trench. At this time, the bottom layer photoresist and the intermediate layer photoresist are not only formed in the trench. For example, in the process of preparing photoresist by coating, the bottom layer photoresist and the intermediate layer photoresist are formed on all the surfaces of the substrate where the preset substrate mesa is formed. This also includes coating the bottom layer photoresist and the intermediate layer photoresist on the preset substrate mesa. This step achieves complete filling of the entire inner surface of the trench with the bottom layer photoresist and the intermediate layer photoresist without increasing the fabrication complexity. Subsequently, in this embodiment, a mask can be used for self-alignment with the first preset area, or the mask can be used for manual overlay alignment with the first preset area. The first preset area includes a portion of the substrate mesa and a portion of the trenches. To ensure that only the bottom layer photoresist and intermediate layer photoresist remain in the adjacent trenches of the substrate mesa, the aforementioned portion of the trenches can be configured to include only the adjacent trenches of the preset substrate mesa. The bottom layer photoresist and intermediate layer photoresist located on the substrate mesa can be removed together in the step of removing the intermediate layer photoresist and the substrate mesa. Therefore, the aforementioned portion of the substrate mesa at least includes the preset substrate mesa, or it can further include a portion of the substrate mesa outside the adjacent trenches of the preset substrate mesa, so as to avoid affecting the bottom layer photoresist and intermediate layer photoresist in the adjacent trenches of the preset substrate mesa, and ensure that the first processed substrate is successfully prepared.

[0074] In this embodiment, the photoresist on the substrate surface is exposed and developed to remove the intermediate and bottom layer photoresist outside the first preset area, forming the substrate to be processed. Then, the surface of the substrate to be processed with the preset substrate mesa is dry-etched until the substrate to be processed is exposed. At this point, only the bottom and intermediate layer photoresist remain in the adjacent trenches of the substrate mesa, while all other bottom and intermediate layer photoresist is removed. In this embodiment, the size of the mask is larger than the preset substrate mesa and the total size of the adjacent trenches formed by the substrate mesa. Furthermore, it should be noted that the aforementioned partial substrate mesa in this embodiment may include multiple substrate mesas, or it may include multiple substrate mesas while further including a portion of a single substrate mesa; correspondingly, the aforementioned partial trenches only include all adjacent trenches of the preset substrate mesa.

[0075] Furthermore, in order to ensure that all photoresist on all substrate mesas in the first processing substrate is removed and to improve the yield of the first processing substrate, the above-mentioned dry etching is performed on the surface of the substrate to be processed where the preset substrate mesas are formed until the substrate to be processed is exposed to obtain the first processing substrate, which may include:

[0076] The surface of the substrate to be processed, which has a preset substrate mesa, is etched using reactive ion etching until the substrate to be processed is exposed above the preset substrate mesa, thus obtaining the first processed substrate.

[0077] It should be noted that this embodiment uses reactive ion etching (RIE) to dry-etch the substrate, ensuring etching accuracy and thus guaranteeing no photoresist residue outside the trenches of the prepared first substrate. To ensure that the RIE process removes only the photoresist outside the trenches, the etching operation must be stopped immediately after exposing a predetermined substrate mesa. This embodiment does not limit the method for determining whether to stop the RIE process. For example, changes in the intensity of a specific wavelength signal can be monitored using optical emission spectroscopy (OES), or the etching depth can be detected using laser interferometry to determine whether to stop the etching operation. Specifically, in this embodiment, if the particle density of surface contaminants after etching the substrate mesa is less than a predetermined value, it is determined that the photoresist at the substrate mesa has been completely removed. This predetermined value can be set to 0.1 / square micrometer. This embodiment uses RIE to perform the dry etching, which differs from dry etching combined with inductively coupled plasma (ICP) and from composite dry etching combining ICP and RIE.

[0078] Furthermore, in order to ensure the stability of the shape after the photoresist is prepared, and thus improve the accuracy of the subsequent functional layer preparation, the bottom photoresist is subjected to a soft baking process after the preparation of the bottom photoresist.

[0079] After preparing the intermediate layer photoresist, the intermediate layer photoresist is subjected to soft baking treatment.

[0080] In this embodiment, the photoresist is partially cured by heating after coating, which removes the solvent from the photoresist, improves the stability of the photoresist, improves the uniformity and adhesion of the photoresist, increases the mechanical strength of the photoresist, reduces the deformation or flow of the photoresist in subsequent processes, and thus ensures the accuracy of subsequent functional layer fabrication.

[0081] S103: A patterned top layer photoresist is prepared on the surface of the first processing substrate on which a preset substrate mesa is formed, serving as the second processing substrate; the patterned top layer photoresist is completely exposed on the preset substrate mesa.

[0082] In this embodiment, a patterned top layer photoresist is prepared on the same side surface of a preset substrate mesas in the first processing substrate, and a patterned top layer photoresist is prepared that completely exposes the preset substrate mesas. In this embodiment, it is necessary to ensure that the patterned top layer photoresist is completely exposed on the preset substrate mesas. This can be achieved by setting the area of ​​the exposed area of ​​the patterned top layer photoresist to be larger than the area of ​​the preset substrate mesas, and placing the preset substrate mesas within the area of ​​the exposed area of ​​the patterned top layer photoresist. This ensures that even with errors, the patterned top layer photoresist is still completely exposed on the preset substrate mesas. The difference between the area of ​​the exposed area of ​​the patterned top layer photoresist and the area of ​​the preset substrate mesas can be set based on factors such as the fabrication error of the patterned top layer photoresist and errors caused by substrate warping.

[0083] It should be further explained that in this embodiment, the patterned top layer photoresist is completely exposed above the pre-defined substrate mesa to facilitate the subsequent fabrication of functional layers. Even if the functional layers are located on the surface of the bottom or intermediate photoresist layers adjacent to the pre-defined substrate mesa, the functional layers outside the pre-defined substrate mesa can be removed by subsequently removing the bottom and intermediate photoresist layers in the adjacent trenches beside the pre-defined substrate mesa. In this embodiment, the patterned top layer photoresist is set as a negative stripping photoresist to define the patterned area of ​​the functional layers.

[0084] Furthermore, to ensure the successful fabrication of the patterned top layer photoresist and to ensure that the functional layer on the surface of the subsequent patterned top layer photoresist is functionally discontinuous with the surface of the first processing substrate, facilitating the removal of the functional layer in areas other than the preset substrate mesas, the aforementioned fabrication of the patterned top layer photoresist on the surface of the first processing substrate where the preset substrate mesas are formed, as the second processing substrate, may include:

[0085] Step S21: On the surface of the first processing substrate where a preset substrate mesa is formed, a top layer photoresist is prepared; the top layer photoresist is a negative stripping photoresist with undercut.

[0086] Step S22: Align the mask with the second preset area, expose and develop the top layer photoresist on the surface of the first processing substrate to remove the top layer photoresist in the second preset area, complete the preparation of the patterned top layer photoresist, and obtain the second processing substrate; the second preset area includes all preset substrate mesa surfaces.

[0087] In this embodiment, the top layer photoresist is set as a negative stripping photoresist with undercut. The prepared top layer photoresist is then developed. During the preparation of the patterned top layer photoresist, the sidewalls of the patterned top layer photoresist pattern taper inwards at the bottom, forming a sloping structure. It should be further noted that the formation of this inward-tapering sloping structure on the sidewalls of the patterned top layer photoresist is closely related to factors such as the photoresist formulation, the properties of the developer, and the development process parameters. In this embodiment, the top layer photoresist is set as a negative stripping photoresist with undercut, meaning that the sidewalls of the vias exposed on the preset substrate mesa in the patterned top layer photoresist are funnel-shaped. Especially during the deposition of functional layers, the functional layers deposited on the surface of the patterned top layer photoresist are not connected to the functional layers deposited on the surface of the preset substrate mesa, facilitating the subsequent removal of the functional layers. In this embodiment, a mask can be used for self-alignment with the second preset region, or the mask can be manually aligned with the second preset region through overlay.

[0088] S104: On the side of the second processing substrate where the patterned top layer photoresist is formed, a functional layer is prepared.

[0089] In this embodiment, after the preparation of the bottom layer photoresist, intermediate layer photoresist, and patterned top layer photoresist, a functional layer can be prepared on the side of the second processing substrate where the patterned top layer photoresist is formed. At this time, the functional layer is prepared only on the preset substrate mesa, and the remaining functional layers are prepared on the surfaces of the bottom layer photoresist, the intermediate layer photoresist, and the patterned top layer photoresist. This embodiment does not limit the material of the functional layer. For example, the material of the functional layer can be a metal, such as copper or aluminum, or a semiconductor material, such as silicon or gallium nitride, or a dielectric material, such as silicon dioxide or silicon nitride. The specific material can be selected according to the application requirements. In addition, the preparation method of the above-mentioned functional layer can be physical vapor deposition (PVD), chemical vapor deposition (CVD), electroplating, or other suitable thin film deposition technology, as long as it can prepare the functional layer on the substrate surface only on the exposed preset substrate mesa.

[0090] Furthermore, to facilitate the subsequent removal of the functional layer outside the pre-defined substrate mesa and to improve the stability of the fabricated functional layer, the functional layer is fabricated on the side of the second processing substrate where the patterned top layer photoresist is formed. This fabrication may include:

[0091] A metal layer is deposited on the side of the second processing substrate where a patterned top layer photoresist is formed;

[0092] Accordingly, prior to depositing the metal layer, the process may also include:

[0093] Plasma is used to clean the pre-set substrate mesa through chemical reaction and physical bombardment, removing residual photoresist from the pre-set substrate mesa.

[0094] The natural oxide layer formed on the substrate due to contact with air is removed by rinsing with acidic solvents in order to activate the pre-set substrate mesa.

[0095] It should be noted that in this embodiment, a metal layer is deposited on the side of the second processing substrate where a patterned top layer photoresist is formed. Plasma is used to clean the pre-set substrate mesa through chemical reaction and physical bombardment. An acidic solvent is then used to rinse and activate the pre-set substrate mesa, thereby improving the adhesion of the metal layer. This embodiment uses a metal layer as the functional layer, but the actual functional layer can also be a conductive layer, an insulating layer, a semiconductor layer, etc., depending on the application scenario. The specific material of the functional layer can be selected based on its conductivity, corrosion resistance, and other properties. For example, the metal layer can be made of copper, aluminum, titanium, etc. The specific method of depositing the metal layer in this embodiment is not limited; for example, physical vapor deposition (PVD) or chemical vapor deposition (CVD) can be used. The focus of this embodiment is on removing the natural oxide layer formed on the pre-set substrate mesa due to contact with air.

[0096] Furthermore, to improve the adaptability of the prepared metal layer and reduce the thermal impact on the substrate, depositing a metal layer on the side of the second processed substrate where the patterned top layer photoresist is formed may include:

[0097] On the side of the second processing substrate where a patterned top layer of photoresist is formed, a metal layer is deposited by vapor deposition.

[0098] In this embodiment, the evaporation deposition process can specifically be thermal evaporation or electron beam evaporation. In this embodiment, the patterned top layer photoresist, intermediate layer photoresist, and bottom layer photoresist are used together as a mask to define the metal layer to be prepared. When removing the photoresist later, the metal layer deposited on the photoresist surface is also removed. At this time, only the metal layer remains at the preset substrate mesa, thus completing the preparation of the metal layer on the preset substrate mesa of the semiconductor device.

[0099] This invention is applicable to structures with ridge waveguides formed in semiconductor chips, where the metal layer needs to be fabricated on the surface of the ridge waveguide. This embodiment enables precise alignment of the metal layer, preventing the metal layer from being deposited outside the ridge waveguide area, and solving the problem of parasitic capacitance in the device caused by excessive metal layer coverage.

[0100] S105: Remove the patterned top layer photoresist, intermediate layer photoresist, and bottom layer photoresist to complete the fabrication of the functional layer on the preset substrate mesa; the bottom layer photoresist and the patterned top layer photoresist are both negative stripping photoresists, and the intermediate layer photoresist is a positive stripping photoresist.

[0101] In this embodiment, when removing the top, middle, and bottom patterned photoresist, the functional layer fabricated on the photoresist surface is also removed. This allows the functional layer to be fabricated only on a predetermined substrate mesa, achieving precise functional layer placement without excessive consideration for the alignment accuracy of the patterned photoresist. This avoids placing the functional layer outside the designated area, especially avoiding fabricating it within adjacent trenches on the predetermined substrate mesa, thus ensuring device performance and completing self-aligned functional layer stripping. This embodiment does not limit the specific method of final photoresist removal. For example, wet etching or dry etching can be used, depending on the type of photoresist and the material of the functional layer. Furthermore, the bottom and top patterned photoresist are negative stripping photoresists, while the middle layer photoresist is a positive stripping photoresist. The combination of different types of photoresists achieves high-precision patterning. In this embodiment, the intermediate layer photoresist is used to avoid over-etching of the photoresist in adjacent trenches of the preset substrate mesa when preparing the patterned top layer photoresist.

[0102] In this embodiment, the patterned top layer photoresist, intermediate layer photoresist and bottom layer photoresist are used together as a mask, and the photoresist in the designated area is removed by combining the self-aligned metal stripping process to define the prepared metal pattern. The designated area is where the above-mentioned photoresist is prepared.

[0103] The method for fabricating a functional layer in a semiconductor device according to the embodiments of the present invention includes providing a substrate, wherein trenches are formed on one side surface of the substrate, and substrate mesas are formed between adjacent trenches; selecting the substrate mesas where the functional layer to be fabricated is selected as a preset substrate mesas; on all inner surfaces of adjacent trenches of the preset substrate mesas, a bottom layer photoresist and an intermediate layer photoresist are sequentially fabricated to completely fill the adjacent trenches and are flush with the preset substrate mesas, serving as a first processing substrate; on the surface of the first processing substrate where the preset substrate mesas are formed, a patterned top layer photoresist is fabricated, serving as a second processing substrate, wherein the patterned top layer photoresist is completely exposed on the preset substrate mesas; on the side of the second processing substrate where the patterned top layer photoresist is formed, a functional layer is fabricated; the patterned top layer photoresist, the intermediate layer photoresist, and the bottom layer photoresist are removed to complete the fabrication of the functional layer on the preset substrate mesas; the bottom layer photoresist and the patterned top layer photoresist are both negative stripping photoresists, and the intermediate layer photoresist is a positive stripping photoresist.

[0104] This invention utilizes a bottom layer photoresist and an intermediate layer photoresist to fill trenches adjacent to a pre-defined substrate mesas. Then, a patterned top layer photoresist is prepared that completely exposes the pre-defined substrate mesas. Both the bottom layer and the patterned top layer photoresist are set as negative stripping photoresists, while the intermediate layer photoresist is set as a positive stripping photoresist. After fabricating the functional layer, the functional layer outside the pre-defined substrate mesas can be removed by removing the photoresist. Precise alignment between the patterned top layer photoresist and the pre-defined substrate mesas is not required, ensuring the overlay accuracy between the functional layer and the bottom layer structure and improving device performance.

[0105] Furthermore, by providing a substrate that has undergone both wet and dry surface cleaning, the performance of the fabricated semiconductor device is ensured. On the surface of the substrate with a predetermined substrate mesa, a bottom layer photoresist and an intermediate layer photoresist are sequentially prepared to completely fill the inner surfaces of the trenches. The mask is aligned with a first predetermined area, and the photoresist on the substrate surface is exposed and developed, followed by dry etching. This ensures the precise preparation of the bottom and intermediate layer photoresists, guaranteeing the successful fabrication of the first processed substrate. The use of reactive ion etching to etch the surface of the substrate with the predetermined substrate mesa improves the yield of the first processed substrate. By performing a soft baking process on the bottom photoresist after its preparation, and during the fabrication process… After preparing the intermediate layer photoresist, a soft baking process is performed on the intermediate layer photoresist to improve its uniformity and adhesion, and enhance its mechanical strength. By setting the top layer photoresist as a negative stripping photoresist with undercut, and then developing the prepared top layer photoresist, an inwardly contracting slope structure is formed at the bottom of the sidewall of the patterned top layer photoresist, which improves the ease of subsequent removal of the functional layer on the photoresist surface. A metal layer is prepared by deposition, and the pre-set substrate mesa is cleaned by plasma through chemical reaction and physical bombardment. The pre-set substrate mesa is then activated by rinsing with an acidic solvent to improve the adhesion of the prepared metal layer. The metal layer is prepared by vapor deposition, which improves the adaptability of the prepared metal layer and reduces the thermal impact on the substrate.

[0106] In one feasible embodiment, the method for fabricating the functional layer in the above-mentioned semiconductor device may specifically include the following steps:

[0107] Step S1, Wafer Pre-processing:

[0108] A wafer substrate 10 for completing the ridge waveguide process is provided; a trench 1 is formed on one side surface of the wafer substrate, and a substrate mesa 2 is formed between adjacent trenches 1.

[0109] The wafer substrate 10 provided in this embodiment can be referenced. Figure 2 , Figure 2This is a schematic diagram of the substrate structure in a method for fabricating a functional layer in a semiconductor device according to an embodiment of the present invention.

[0110] The wafer substrate 10 is cleaned using both wet and dry methods.

[0111] Step S2, Photoresist Coating of the Bottom and Intermediate Layers:

[0112] The wafer substrate 10 is heated using a hot plate to complete the prebake process of the wafer substrate 10.

[0113] On one side surface of the wafer substrate 10 where the substrate mesa 2 is formed, a negative lift-off resist (LOR) is spin-coated as the bottom photoresist 20.

[0114] The structure after preparing the underlying photoresist 20 in this embodiment can be referred to... Figure 3 , Figure 3 This is a schematic diagram of a structure in which a bottom layer photoresist is prepared on the surface of a substrate, as provided in an embodiment of the present invention.

[0115] Soft bake the underlying photoresist 20.

[0116] Spin-coating positive stripping photoresist as intermediate layer photoresist 30;

[0117] The structure after preparing the intermediate photoresist layer 30 in this embodiment can be referred to... Figure 4 , Figure 4 This is a schematic diagram of a structure in which a bottom layer photoresist and an intermediate layer photoresist are prepared on the surface of a substrate, as provided in an embodiment of the present invention.

[0118] The intermediate layer photoresist 30 is soft-baked.

[0119] Step S3, Exposure and Masking:

[0120] The mask is aligned with the first preset area. The intermediate layer photoresist 30 is a positive stripping photoresist, so the first preset area will retain the photoresist structure. The first preset area includes a portion of the substrate mesa 2 and a portion of the trench 1. The portion of the substrate mesa 2 includes at least a ridge waveguide mesa 3, and the portion of the trench 1 includes only the adjacent trenches of the ridge waveguide mesa 3. The ridge waveguide mesa 3 is the mesa on which the metal layer 50 needs to be formed.

[0121] A development process is performed to remove the bottom layer photoresist 20 and the intermediate layer photoresist 30 outside the first preset area;

[0122] The device structure obtained after development in this embodiment can be referenced. Figure 5 , Figure 5This is a schematic diagram of a structure in which photoresist is retained only in a first preset area, as provided in an embodiment of the present invention.

[0123] The intermediate layer photoresist 30 is hard baked to cure it.

[0124] Step S4, under-etching of photoresist:

[0125] The remaining bottom layer photoresist 20 and intermediate layer photoresist 30 are dry etched using reactive ion etching until the ridge waveguide mesa 3 is exposed. The bottom layer photoresist 20 and intermediate layer photoresist 30 are retained in the adjacent trenches of the ridge waveguide mesa 3 and are flush with the ridge waveguide mesa 3.

[0126] The device structure obtained after photoresist under-etching in this embodiment can be referenced. Figure 6 , Figure 6 This is a schematic diagram of the structure of a device after under-etching of the photoresist, provided as an embodiment of the present invention.

[0127] Step S5, photoresist coating of the photosensitive layer:

[0128] Perform photoresist pre-bake on the photosensitive layer.

[0129] Spin-coating a negative stripping photoresist with an undercut is used as the top layer photoresist 40; this top layer photoresist 40 is the photosensitive layer photoresist.

[0130] The device structure after the top layer photoresist 40 is fabricated in this embodiment can be referred to... Figure 7 , Figure 7 This is a schematic diagram of a device with a top layer of photoresist provided in an embodiment of the present invention.

[0131] The top layer photoresist 40 is subjected to a soft bake process.

[0132] Step S6, Double Exposure:

[0133] The mask is aligned with the area where the ridge waveguide mesa 3 is located. The top layer photoresist 40 is a negative stripping photoresist, so the photoresist in the area where the ridge waveguide mesa 3 is located will be removed in the subsequent development and exposure processes to obtain the patterned top layer photoresist 41.

[0134] The top layer photoresist 40 is subjected to a post-exposure bake (PEB) process;

[0135] A development process is performed to remove the photoresist in the area where the ridge waveguide mesa 3 is located, ensuring that there is no photoresist residue on the ridge waveguide mesa 3.

[0136] The structure of the patterned top layer photoresist 41 prepared after development in this embodiment can be referred to as follows: Figure 8 , Figure 8 This is a schematic diagram of a structure for fabricating a patterned top layer photoresist in a device, as provided in an embodiment of the present invention.

[0137] Step S7, Pre-plating treatment:

[0138] Plasma was used to clean the ridge waveguide mesa 3 to remove residual photoresist;

[0139] The substrate is rinsed with acidic solvents to remove the natural oxide layer formed by contact with air, thereby activating the ridge waveguide mesa 3.

[0140] Step S8, Gold Plating and Stripping:

[0141] A metal layer 50 was prepared by deposition using a vapor deposition process.

[0142] The device structure after the metal layer 50 is fabricated in this embodiment can be referred to... Figure 9 , Figure 9 This is a schematic diagram of a structure for fabricating a metal layer in a device, as provided in an embodiment of the present invention.

[0143] The metal stripping process is completed by removing the photoresist, thereby achieving self-aligned metal stripping.

[0144] The semiconductor device finally fabricated in this embodiment can be referenced. Figure 10 , Figure 10 This is a schematic diagram of the completed fabrication of a functional layer in a semiconductor device, provided as an embodiment of the present invention.

[0145] The process method described in this embodiment can overcome the limitations of lithography machines and manual alignment, enabling the introduction of a metal layer onto the ridge waveguide contact layer without metal overflow and the generation of parasitic capacitance. The use of a three-layer photoresist in this invention compensates for the insufficient precision of lithography machines or manual alignment, as well as the alignment deviation caused by wafer warping. This ensures that the metal layer completely covers the ridge waveguide contact layer without generating excess metal patterns, thus reducing parasitic capacitance.

[0146] The semiconductor device provided in the embodiments of the present invention will be described below. The semiconductor device described below and the method for fabricating the functional layer in the semiconductor device described above can be referred to each other.

[0147] Please refer to the details. Figure 11 , Figure 11 A schematic diagram of the structure of a semiconductor device provided in an embodiment of the present invention may include:

[0148] The substrate 11 has a groove formed on one side surface and a substrate mesa formed between adjacent grooves. The substrate mesa includes a preset substrate mesa 4 for the functional layer to be prepared.

[0149] Functional layers 51 are fabricated at four locations on the pre-defined substrate mesa. The functional layers 51 are fabricated at four locations on the pre-defined substrate mesa by means of bottom photoresist 20, intermediate photoresist 30 and patterned top photoresist 41.

[0150] The bottom layer photoresist 20 and the intermediate layer photoresist 30 are photoresists that completely fill the adjacent trenches and are flush with the preset substrate mesa 4, formed sequentially on all the inner surfaces of the adjacent trenches of the preset substrate mesa 4; the patterned top layer photoresist 41 is a patterned photoresist formed on the surface of the bottom layer photoresist 20, the intermediate layer photoresist 30 and the substrate 11, completely exposing the preset substrate mesa 4.

[0151] Both the bottom layer photoresist 20 and the patterned top layer photoresist 41 are negative stripping photoresists, while the intermediate layer photoresist 30 is a positive stripping photoresist.

[0152] It should be noted that, Figure 11 This is a schematic diagram of a semiconductor device structure. The dashed lines do not represent the final semiconductor device structure, but rather the photoresist structure used as a mask, namely the bottom photoresist 20, intermediate photoresist 30, and patterned top photoresist 41 mentioned in the above method embodiment. In this embodiment, the bottom photoresist 20, intermediate photoresist 30, and patterned top photoresist 41 are used together as a mask so that the substrate 11 only exposes the preset substrate mesa 4. In this embodiment, the patterned top photoresist 41 has a height difference from the bottom photoresist 20 and intermediate photoresist 30. In this embodiment, the bottom photoresist 20 and patterned top photoresist 41 are set as negative stripping photoresists, and the intermediate photoresist 30 is set as a positive stripping photoresist. When preparing the patterned top photoresist 41, the opposite properties of the intermediate photoresist 30 can be used as an etch stop layer, improving the simplicity of the preparation.

[0153] Furthermore, in order to facilitate the removal of the functional layer on the photoresist, the patterned top layer photoresist 41 can be set as a negative stripping photoresist with undercut.

[0154] In this embodiment, an opening is provided in the patterned top layer photoresist 41 that exposes the preset substrate mesa 4. The sidewalls of the opening form an inverted funnel-shaped structure. When the functional layer 51 is prepared by the deposition process, the functional layer 51 will not be deposited on the sidewalls of the opening of the patterned top layer photoresist 41. When the functional layer 51 on the photoresist surface is removed in the subsequent process, it is easy to remove and avoids all the photoresist being coated together.

[0155] The semiconductor device provided by the embodiments of the present invention includes a substrate 11. A trench is formed on one side surface of the substrate 11, and a substrate mesa is formed between adjacent trenches. The substrate mesa includes a preset substrate mesa 4 for which a functional layer 51 is to be prepared. A functional layer 51 is prepared at the preset substrate mesa 4. The functional layer 51 is prepared at the preset substrate mesa 4 by a bottom photoresist 20, an intermediate photoresist 30, and a patterned top photoresist 41. The bottom photoresist 20 and the intermediate photoresist 30 are photoresists that completely fill adjacent trenches and are flush with the preset substrate mesa 4, formed sequentially on all inner surfaces of adjacent trenches of the preset substrate mesa 41. The patterned top photoresist 41 is a patterned photoresist formed on the surface of the bottom photoresist 20, the intermediate photoresist 30, and the substrate 11, completely exposing the preset substrate mesa 4. The bottom photoresist 20 and the patterned top photoresist 41 are both negative stripping photoresists, and the intermediate photoresist 30 is a positive stripping photoresist.

[0156] This invention utilizes a bottom layer photoresist 20 and an intermediate layer photoresist 30 to fill trenches adjacent to a preset substrate mesa 4, and then prepares a patterned top layer photoresist 41 that completely exposes the preset substrate mesa 4. Both the bottom layer photoresist 20 and the patterned top layer photoresist 41 are set as negative stripping photoresists, and the intermediate layer photoresist 30 is set as a positive stripping photoresist. After preparing the functional layer 51, the functional layer 51 in areas other than the preset substrate mesa 4 can be removed by removing the photoresist. There is no need to consider the precise alignment between the patterned top layer photoresist 41 and the preset substrate mesa 4, which can ensure the overlay accuracy between the functional layer 51 and the bottom layer structure and improve device performance.

[0157] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the semiconductor devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0158] Furthermore, it should be noted that in this document, relationships such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations are intended to cover non-exclusive inclusion.

[0159] The present invention has provided a detailed description of a method for fabricating a functional layer in a semiconductor device and the semiconductor device itself. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for fabricating a functional layer in a semiconductor device, characterized in that, include: Provide substrate; A groove is formed on one side surface of the substrate, and a substrate mesa is formed between adjacent grooves. A substrate mesa to be fabricated is selected as a preset substrate mesa. A bottom layer photoresist is prepared on all the inner surfaces of the adjacent trenches of the preset substrate mesa, that is, on the sidewall surfaces and bottom surfaces of the adjacent trenches of the preset substrate mesa. Then, an intermediate layer photoresist is prepared on the sidewall surfaces and bottom surfaces of the bottom layer photoresist prepared in the adjacent trenches of the preset substrate mesa, forming the bottom layer photoresist and the intermediate layer photoresist that completely fill the adjacent trenches and are flush with the preset substrate mesa, which serves as the first processing substrate. A patterned top layer photoresist is prepared on the surface of the first processing substrate on which the preset substrate mesa is formed, serving as the second processing substrate. The patterned top layer photoresist completely exposes the preset substrate mesa; A functional layer is prepared on the side of the second processing substrate where the patterned top layer photoresist is formed; Remove the patterned top layer photoresist, the intermediate layer photoresist, and the bottom layer photoresist to complete the fabrication of the functional layer on the preset substrate mesa; Both the bottom layer photoresist and the patterned top layer photoresist are negative stripping photoresists, while the intermediate layer photoresist is a positive stripping photoresist.

2. The method for fabricating a functional layer in a semiconductor device according to claim 1, characterized in that, The selected substrate mesa for the functional layer to be fabricated is used as the preset substrate mesa. On the entire inner surface of adjacent trenches on the preset substrate mesa, a bottom layer photoresist and an intermediate layer photoresist, completely filling the adjacent trenches and flush with the preset substrate mesa, are sequentially fabricated as the first processing substrate, comprising: Select the substrate mesa to be fabricated as the preset substrate mesa, and sequentially prepare the bottom layer photoresist and the intermediate layer photoresist that completely fill the entire inner surface of the trench on the surface of the substrate where the preset substrate mesa is formed. The mask is aligned with the first preset area, and the photoresist on the surface of the substrate is exposed and developed to remove the intermediate layer photoresist and the bottom layer photoresist outside the first preset area, which is used as the substrate to be processed; the first preset area includes a portion of the substrate mesa and a portion of the trench, the portion of the substrate mesa includes at least the preset substrate mesa, and the portion of the trench includes only the adjacent trench. Dry etching is performed on the surface of the substrate to be processed, on which the preset substrate mesa is formed, until the substrate to be processed is exposed to the preset substrate mesa, thus obtaining the first processed substrate.

3. The method for fabricating a functional layer in a semiconductor device according to claim 2, characterized in that, Dry etching is performed on the surface of the substrate to be processed, on which the preset substrate mesa is formed, until the substrate to be processed is exposed to obtain the first processed substrate, comprising: The surface of the substrate to be processed, on which the preset substrate mesa is formed, is etched using a reactive ion etching process until the preset substrate mesa is exposed, thus obtaining the first processed substrate.

4. The method for fabricating a functional layer in a semiconductor device according to claim 1, characterized in that, A patterned top layer photoresist is prepared on the surface of the first processing substrate where the preset substrate mesa is formed, serving as the second processing substrate, including: A top layer photoresist is prepared on the surface of the first processing substrate on which the preset substrate mesa is formed; the top layer photoresist is a negative stripping photoresist with undercut. The mask is aligned with the second preset area, and the top layer photoresist on the surface of the first processing substrate is exposed and developed to remove the top layer photoresist in the second preset area, thereby completing the preparation of the patterned top layer photoresist and obtaining the second processing substrate; the second preset area includes all the preset substrate mesa.

5. The method for fabricating a functional layer in a semiconductor device according to claim 1, characterized in that, On the side of the second processing substrate where the patterned top layer photoresist is formed, a functional layer is prepared, including: A metal layer is deposited on the side of the second processing substrate where the patterned top layer photoresist is formed; Accordingly, prior to the deposition of the metal layer, the process further includes: The preset substrate mesa is cleaned by using plasma through chemical reaction and physical bombardment to remove residual photoresist from the preset substrate mesa. The natural oxide layer formed on the substrate due to contact with air is removed by rinsing with acidic solvents in order to activate the preset substrate mesa.

6. The method for fabricating a functional layer in a semiconductor device according to claim 5, characterized in that, On the side of the second processing substrate where the patterned top layer photoresist is formed, a metal layer is deposited, including: On the side of the second processing substrate where the patterned top layer photoresist is formed, the metal layer is deposited by vapor deposition.

7. The method for fabricating a functional layer in a semiconductor device according to claim 1, characterized in that, After preparing the underlying photoresist, the underlying photoresist is subjected to a soft baking process; After preparing the intermediate layer photoresist, the intermediate layer photoresist is subjected to a soft baking process.

8. The method for fabricating a functional layer in a semiconductor device according to claim 1, characterized in that, The substrate provided includes: Provides substrates for both wet and dry surface cleaning.

9. A semiconductor device, characterized in that, include: A substrate, wherein a groove is formed on one side surface of the substrate, and a substrate mesa is formed between adjacent grooves, and the substrate mesa includes a preset substrate mesa for the functional layer to be prepared. The functional layer is prepared on the mesa of the preset substrate; The functional layer is fabricated on the mesa of the preset substrate by means of a bottom layer photoresist, an intermediate layer photoresist, and a patterned top layer photoresist. The bottom layer photoresist and the intermediate layer photoresist are photoresists that are formed sequentially on all the inner surfaces of adjacent trenches on the preset substrate mesa, completely filling the adjacent trenches and being flush with the preset substrate mesa. The patterned top layer photoresist is formed on the surface of the bottom layer photoresist, the intermediate layer photoresist and the substrate, completely exposing the preset substrate mesa. The bottom layer photoresist and the patterned top layer photoresist are both negative stripping photoresists, and the intermediate layer photoresist is a positive stripping photoresist.

10. The semiconductor device according to claim 9, characterized in that, The patterned top layer photoresist is a negative stripping photoresist with undercut.

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