An S-box, a data processing method, a computer program product, an apparatus, and a medium.

Abstract

This invention discloses an S-box, a data processing method, a computer program product, an apparatus, and a medium, relating to the field of cryptography. The S-box includes an input calculation module, an intermediate calculation module, an output calculation module, and a first register group. The input calculation module reads input data, a first matrix, and a first vector from the first register group, performs operations on the input data, the first matrix, and the first vector, obtains a first calculation result, and stores it in the first register group. The intermediate calculation module reads the first calculation result from the first register group, performs an inverse operation on the first calculation result to obtain a second calculation result, and stores it in the first register group. The output calculation module reads the second calculation result, a second matrix, and a second vector from the first register group, performs operations on the second calculation result, the second matrix, and the second vector, obtains an output result, and stores it in the first register group. This allows all modules to perform parallel calculations, improving computational performance.

Description

Technical Field

[0001] This invention relates to the field of cryptography, and more specifically, to an S-box, a data processing method, a computer program product, an apparatus, and a medium. Background Technology

[0002] In cryptography, the S-box (Substitution-box) is the fundamental structure for performing permutation calculations in symmetric-key algorithms. The S-box structure can be configured as needed; for example, an S-box can include five sub-circuit units: an input Boolean circuit, a head module, a middle module, a tail module, and an output Boolean circuit. The input Boolean circuit performs a first mapping on the input data to obtain mapped input data. The head module performs a first inverse operation on the mapped input data to obtain first data. The middle module performs a second inverse operation on the first data to obtain second data. The tail module performs a third inverse operation on the mapped input data and second data to obtain mapped output data. The output Boolean circuit performs a second mapping on the mapped output data to obtain the target output data.

[0003] However, this type of S-box performs calculations sequentially through cascaded input Boolean circuits, head modules, middle modules, tail modules, and output Boolean circuits, resulting in low computational performance.

[0004] In conclusion, improving the computational performance of the S-box is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide an S-box that can, to a certain extent, solve the technical problem of how to improve the computing performance of the S-box. This invention also provides a data processing method, a computer program product, an electronic device, and a computer-readable storage medium.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] In one aspect, an S-box is provided, comprising an input calculation module, an intermediate calculation module, an output calculation module, and a first register group;

[0008] The input calculation module is used to read input data, a first matrix, and a first vector from the first register group, perform operations on the input data, the first matrix, and the first vector, obtain a first operation result, and store it in the first register group.

[0009] The intermediate calculation module is used to read the first operation result from the first register group, perform an inverse operation on the first operation result to obtain a second operation result, and store it into the first register group;

[0010] The output calculation module is used to read the second operation result, the second matrix, and the second vector from the first register group, perform operations on the second operation result, the second matrix, and the second vector, obtain the output result of the input data, and store it in the first register group.

[0011] On the other hand, the first register group includes an input register group, a first arithmetic register group, a second arithmetic register group, and an output register group;

[0012] The input register group is used to store and access the input data;

[0013] The first arithmetic register group is used to store and retrieve the result of the first arithmetic operation;

[0014] The second arithmetic register group is used to store and retrieve the result of the second arithmetic operation;

[0015] The output register group is used to store the output results.

[0016] On the other hand, the input calculation module, the intermediate calculation module, and the output calculation module are constructed through lookup tables and / or composite domain calculations.

[0017] On the other hand, the intermediate calculation module includes a first isomorphic mapping module, a first multiply-accumulate calculation module, an inversion calculation module, a second multiply-accumulate calculation module, and a second isomorphic mapping module;

[0018] The first isomorphic mapping module is used to map the first operation result from the first finite field to the second finite field to obtain the first mapping result;

[0019] The first multiplication-addition calculation module is used to perform multiplication and addition operations on the first mapping result to obtain the first sub-operation result;

[0020] The inverse calculation module is used to perform an inverse operation on the result of the first sub-operation to obtain the result of the second sub-operation.

[0021] The second multiplication and addition module is used to perform multiplication and addition operations on the result of the second sub-operation to obtain the result of the third sub-operation;

[0022] The second isomorphic mapping module is used to map the result of the third sub-operation from the second finite field back to the first finite field to obtain the second operation result.

[0023] On the other hand, the intermediate calculation module includes a second register group, which is used to store and retrieve the first mapping result, the first sub-operation result, the second sub-operation result, and the third sub-operation result for the first isomorphic mapping module, the first multiply-accumulate calculation module, the inversion calculation module, the second multiply-accumulate calculation module, and the second isomorphic mapping module.

[0024] On the other hand, the second register group includes a first mapping register group, a first multiply-accumulate register group, an inversion register group, and a second multiply-accumulate register group;

[0025] The first mapping register group is used to access the first mapping result;

[0026] The first multiply-accumulate register group is used to store the result of the first suboperation;

[0027] The inversion register group is used to store the result of the second suboperation;

[0028] The second multiply-accumulate register group is used to store the result of the third suboperation.

[0029] On the other hand, the inverse calculation module is built based on a lookup table; the first isomorphic mapping module, the first multiply-accumulate calculation module, the second multiply-accumulate calculation module, and the second isomorphic mapping module are built based on algebraic calculation.

[0030] On the other hand, the input calculation module performs operations on the input data, the first matrix, and the first vector to obtain a first calculation result, including:

[0031] The input calculation module performs calculations on the input data, the first matrix, and the first vector according to the input calculation formula to obtain a first calculation result;

[0032] The input calculation formula includes:

[0033] y1 = x * A1 + B1;

[0034] Where y1 represents the first operation result; x represents the input data; A1 represents the first matrix; and B1 represents the first vector.

[0035] On the other hand, the intermediate calculation module performs an inverse operation on the first calculation result to obtain a second calculation result, including:

[0036] The intermediate calculation module performs an inverse operation on the first calculation result according to the inverse operation formula to obtain the second calculation result;

[0037] The inverse operation formula includes:

[0038] y2 = I(y1);

[0039] Where y2 represents the result of the second operation; I represents the inverse operation.

[0040] On the other hand, the output calculation module performs operations on the second calculation result, the second matrix, and the second vector to obtain the output result of the input data, including:

[0041] The output calculation module performs calculations on the second calculation result, the second matrix, and the second vector according to the output calculation formula to obtain the output result of the input data;

[0042] The output calculation formula includes:

[0043] y3 = y2 * A2 + B2;

[0044] Where y3 represents the output result; A2 represents the second matrix; and B2 represents the second vector.

[0045] Secondly, a data processing method is provided, including:

[0046] Acquire input data and store the input data into the first register group of the S-box;

[0047] The input calculation module of the S-box is invoked to read input data, the first matrix, and the first vector from the first register group;

[0048] The input calculation module of the S-box is invoked to perform operations on the input data, the first matrix, and the first vector to obtain a first operation result and store it in the first register group;

[0049] The intermediate calculation module of the S-box is invoked to read the first operation result from the first register group;

[0050] The intermediate calculation module of the S-box is invoked to perform an inverse operation on the first calculation result to obtain a second calculation result, which is then stored in the first register group.

[0051] The output calculation module of the S-box is invoked to read the second operation result, the second matrix, and the second vector from the first register group;

[0052] The input calculation module of the S-box is invoked to perform calculations on the second operation result, the second matrix, and the second vector to obtain the output result of the input data and store it in the first register group.

[0053] On the other hand, it also includes:

[0054] Determine the computational power consumption and computational efficiency requirements of the S-box;

[0055] Determine the performance resources allocated to the S-box;

[0056] Obtain test data;

[0057] The data processing performance of the input calculation module, the intermediate calculation module and the output calculation module is tested based on the test data to obtain test results. The data processing performance includes the performance of processing a single piece of data and the performance of processing multiple pieces of data in parallel.

[0058] Based on the test results, the amount of data processed by each of the input calculation module, the intermediate calculation module, and the output calculation module is combined to obtain an initial combination result;

[0059] In the initial combination result, the combination result that makes the S-box satisfy the computing power consumption requirement, the computing efficiency requirement, and the performance resources is determined as the target combination result;

[0060] The number of registers occupied by the input calculation module, the intermediate calculation module, and the output calculation module in the first register group is determined based on the target combination result.

[0061] Thirdly, a computer program product is provided, including a computer program / instructions that, when executed by a processor, implement the steps of any of the data processing methods described above.

[0062] Fourthly, an electronic device is provided, comprising:

[0063] Memory, used to store computer programs;

[0064] A processor for implementing the steps of any of the above-described data processing methods when executing the computer program.

[0065] Fifthly, a computer-readable storage medium is provided, wherein a computer program is stored therein, and when executed by a processor, the computer program implements the steps of any of the data processing methods described above.

[0066] This invention provides an S-box, comprising an input calculation module, an intermediate calculation module, an output calculation module, and a first register group. The input calculation module reads input data, a first matrix, and a first vector from the first register group, performs calculations on the input data, the first matrix, and the first vector to obtain a first calculation result, which is then stored in the first register group. The intermediate calculation module reads the first calculation result from the first register group, performs an inverse operation on the first calculation result to obtain a second calculation result, which is then stored in the first register group. The output calculation module reads the second calculation result, a second matrix, and a second vector from the first register group, performs calculations on the second calculation result, the second matrix, and the second vector to obtain an output result of the input data, which is then stored in the first register group. The beneficial effects of this invention are: by setting up a first register group in the S-box, the input calculation module, intermediate calculation module, and output calculation module can use the first register group for data storage and retrieval. This eliminates the need for each module to read data from other modules, allowing all modules to perform calculations in parallel, shortening the time consumed by data transmission between modules, and improving the computational performance of the S-box. The data processing method, computer program product, electronic device, and computer-readable storage medium provided by this invention also solve the corresponding technical problems. Attached Figure Description

[0067] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0068] Figure 1 A schematic diagram of a known S-box;

[0069] Figure 2 This is a schematic diagram of the structure of an S-box provided in an embodiment of the present invention;

[0070] Figure 3 This is a schematic diagram of the intermediate computing module.

[0071] Figure 4 A flowchart of a data processing method provided in an embodiment of the present invention;

[0072] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention;

[0073] Figure 6 This is another structural schematic diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0074] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0075] In cryptography, the S-box is the fundamental structure for performing permutation calculations in symmetric-key algorithms. The S-box structure can be configured as needed; for example, an S-box can include five sub-circuit units: an input Boolean circuit, a head module, a middle module, a tail module, and an output Boolean circuit, such as... Figure 1 As shown, the input Boolean circuit performs a first mapping on the input data to obtain mapped input data. The head module performs a first inverse operation on the mapped input data to obtain first data. The middle module performs a second inverse operation on the first data to obtain second data. The tail module performs a third inverse operation on the mapped input data and second data to obtain mapped output data. The output Boolean circuit performs a second mapping on the mapped output data to obtain the target output data. However, this S-box performs calculations sequentially through cascaded input Boolean circuits, head modules, middle modules, tail modules, and output Boolean circuits, resulting in low computational performance. To improve the computational performance of the S-box, this invention provides an S-box and a data processing scheme.

[0076] Please see Figure 2 , Figure 2 This is a schematic diagram of the structure of an S-box provided in an embodiment of the present invention.

[0077] An S-box provided in this embodiment of the invention may include an input calculation module 101, an intermediate calculation module 102, an output calculation module 103, and a first register group 104;

[0078] The input calculation module is used to read input data, a first matrix, and a first vector from the first register group, perform operations on the input data, the first matrix, and the first vector, obtain a first operation result, and store it in the first register group.

[0079] The intermediate calculation module is used to read the first operation result from the first register group, perform the inverse operation on the first operation result to obtain the second operation result, and store it into the first register group;

[0080] The output calculation module is used to read the second operation result, the second matrix, and the second vector from the first register group, perform operations on the second operation result, the second matrix, and the second vector, obtain the output result of the input data, and store it into the first register group.

[0081] It should be noted that the number of registers set in the first register group can be flexibly determined according to actual needs. Furthermore, a single register can be used by only one module among the input calculation module, intermediate calculation module, or output calculation module, or it can be used jointly by the input calculation module, intermediate calculation module, and output calculation module. This invention does not impose specific limitations on this. In addition, the output data, the first matrix, the first vector, the second matrix, the second vector, and the output result can be flexibly set according to the application scenario of the S-box.

[0082] In an exemplary embodiment, to facilitate data access by each module, the S-box provided by this invention includes a first register group that may include an input register group, a first arithmetic register group, a second arithmetic register group, and an output register group. The input register group is used to access input data; the first arithmetic register group is used to access the result of a first arithmetic operation; the second arithmetic register group is used to access the result of a second arithmetic operation; and the output register group is used to access the result of an output operation. The number of registers in the input register group, the first arithmetic register group, the second arithmetic register group, and the output register group can be flexibly determined according to actual needs, and each register group in the input register group, the first arithmetic register group, the second arithmetic register group, and the output register group includes at least one register.

[0083] In this way, the S-box provided by the present invention can access input data by means of the input register group, access the first operation result by means of the first operation register group, access the second operation result by means of the second operation register group, and access the output result by means of the output register group. When the input calculation module, intermediate calculation module, or output calculation module needs data, it only needs to access it from the corresponding register group. There is no need to define the data ownership when sharing register groups with other modules. It is equivalent to dividing the S-box into a multi-stage pipeline to realize parallel computing. This can improve the convenience and efficiency of the input calculation module, intermediate calculation module, or output calculation module in accessing data, thereby improving the calculation efficiency of the input calculation module, intermediate calculation module, or output calculation module.

[0084] It should be noted that the first matrix and the first vector can also be stored in the input register group, and the second matrix and the second vector can be stored in the second operation register group. Of course, the first matrix, the first vector, the second matrix, and the second vector can also be stored using separate register groups.

[0085] In an exemplary embodiment, considering that the S-box lookup table implementation has a fast calculation speed but consumes more computing resources and has a larger area, while the composite domain calculation implementation consumes fewer resources and has a smaller area, in order to improve the applicability of the S-box in this invention, the input calculation module, intermediate calculation module, and output calculation module in the S-box provided by this invention are constructed through lookup tables and / or composite domain calculations, and the number of S-boxes constructed through lookup tables and / or composite domain calculations can be comprehensively determined according to the requirements of resource consumption and area. In the algebraic calculation implementation, multiple logic gates, such as AND gates, OR gates, and NOT gates, can be combined to form arithmetic logic units, thereby realizing calculations such as addition and multiplication. Among them, algebraic calculations can include composite domain calculations. In the lookup table implementation, the input value can be used as an index to access storage units, such as RAM (Random Access Memory) or ROM (Read-Only Memory), to obtain the output result.

[0086] In an exemplary embodiment, to improve the computational efficiency of the intermediate computing module, the S-box provided by this invention includes, for example... Figure 3 As shown, the intermediate calculation module may include a first isomorphic mapping module, a first multiply-accumulate calculation module, an inversion calculation module, a second multiply-accumulate calculation module, and a second isomorphic mapping module;

[0087] The first isomorphic mapping module is used to map the first operation result from the first finite field to the second finite field to obtain the first mapping result;

[0088] The first multiplication and addition calculation module is used to perform multiplication and addition operations on the first mapping result to obtain the first sub-operation result;

[0089] The inverse calculation module is used to invert the result of the first sub-operation to obtain the result of the second sub-operation.

[0090] The second multiplication and addition module is used to perform multiplication and addition operations on the result of the second sub-operation to obtain the result of the third sub-operation.

[0091] The second isomorphic mapping module is used to map the result of the third sub-operation from the second finite field back to the first finite field to obtain the second operation result.

[0092] In this way, each function of the intermediate computing module can be implemented through a separate module, avoiding the integration of operations under a single multi-functional module, making each function of the intermediate computing module more flexible, controllable, and applicable.

[0093] It should be noted that the first and second finite fields can be flexibly set according to the application scenario of the S-box. For example, the first finite field can be GF(2). 8 The second finite field can be GF(2) 4Domains, etc.

[0094] In specific application scenarios, the intermediate calculation module may include a second register set, such as Figure 3 The registers shown are used to store and retrieve the first mapping result, the first sub-operation result, the second sub-operation result, and the third sub-operation result for the first isomorphic mapping module, the first multiply-accumulate calculation module, the inversion calculation module, the second multiply-accumulate calculation module, and the second isomorphic mapping module.

[0095] In specific application scenarios, the second register group may include the first mapping register group, the first multiply-accumulate register group, the inversion register group, and the second multiply-accumulate register group;

[0096] The first mapping register group is used to access the first mapping result;

[0097] The first multiply-accumulate register group is used to store the result of the first suboperation;

[0098] The inverse register set is used to store the result of the second suboperation;

[0099] The second multiply-add register group is used to store the result of the third suboperation.

[0100] In this way, the S-box provided by the present invention can access the first mapping result by means of the first mapping register group, access the first sub-operation result by means of the first multiply-add register group, access the second sub-operation result by means of the first multiply-add register group, and access the third sub-operation result by means of the second multiply-add register group. When the first isomorphic mapping module, the first multiply-add calculation module, the inversion calculation module, the second multiply-add calculation module, and the second isomorphic mapping module need data, they only need to access it from the corresponding register group. There is no need to define the data ownership when sharing register groups with other modules. It is equivalent to dividing the intermediate calculation module into a multi-stage pipeline to realize parallel computing. This can improve the convenience and efficiency of the first isomorphic mapping module, the first multiply-add calculation module, the inversion calculation module, the second multiply-add calculation module, and the second isomorphic mapping module in accessing data, thereby improving the operation efficiency of the first isomorphic mapping module, the first multiply-add calculation module, the inversion calculation module, the second multiply-add calculation module, and the second isomorphic mapping module, and thus improving the operation efficiency of the intermediate calculation module. Furthermore, it facilitates precise control of the start-up, pause, and emptying operations of each stage of the hybrid S-box pipeline through efficient pipeline control logic.

[0101] In specific application scenarios, the inversion calculation module can be built based on a lookup table; the first isomorphic mapping module, the first multiplication-addition calculation module, the second multiplication-addition calculation module, and the second isomorphic mapping module can be built based on algebraic calculations. Of course, there are other ways to build the first isomorphic mapping module, the first multiplication-addition calculation module, the inversion calculation module, the second multiplication-addition calculation module, and the second isomorphic mapping module; you can simply set them flexibly according to actual needs.

[0102] In an exemplary embodiment, the operation process of the S-box can be flexibly determined according to the application scenario. For example, the S-box can be used for the SM4 algorithm or the AES algorithm. For ease of understanding, in the S-box provided by this invention, it is assumed that in the composite domain calculation, the calculation formula of the S-box is: SBox(x) = I(x·A1+B1)·A2+B2; then, in the process of the input calculation module performing operations on the input data, the first matrix, and the first vector to obtain the first operation result, the input calculation module can perform operations on the input data, the first matrix, and the first vector according to the input operation formula to obtain the first operation result; the input operation formula includes: y1 = x*A1+B1; where y1 represents the first operation result; x represents the input data; A1 represents the first matrix; and B1 represents the first vector.

[0103] Correspondingly, during the process of the intermediate calculation module inverting the first operation result to obtain the second operation result, the intermediate calculation module can perform the inversion operation on the first operation result to obtain the second operation result according to the inversion operation formula. The inversion operation formula includes: y2=I(y1); where y2 represents the second operation result; I represents the inversion operation. Correspondingly, during the process of the output calculation module performing operations on the second operation result, the second matrix, and the second vector to obtain the output result of the input data, the output calculation module can perform operations on the second operation result, the second matrix, and the second vector according to the output operation formula. The output operation formula includes: y3=y2*A2+B2; where y3 represents the output result; A2 represents the second matrix; and B2 represents the second vector.

[0104] In an exemplary embodiment, the performance requirements of the encryption / decryption algorithm can be determined first, based on the application scenario of the S-box, then the performance requirements of the S-box, and finally the hardware implementation of the S-box. For example, in determining the performance requirements of the encryption / decryption algorithm based on the application scenario, the performance of the device in which the S-box is located can be considered. For instance, embedded systems typically have limited hardware resources, requiring the encryption / decryption algorithm to not only ensure low power consumption during execution but also perform efficient encryption / decryption operations within limited storage space. Therefore, the hardware implementation of the encryption / decryption algorithm needs a streamlined architecture, prioritizing power optimization and resource conservation. Similarly, in data centers, encryption / decryption algorithms are used for encrypting and decrypting large-scale data, where computational speed and throughput become critical requirements. The hardware implementation of the encryption / decryption algorithm needs efficient computing units to support the concurrent execution of multiple encryption / decryption tasks, minimizing latency during the encryption / decryption process. Correspondingly, the S-box is the only non-linear computation in the encryption / decryption algorithm, exhibiting high complexity and significantly impacting the algorithm's performance. Therefore, for high-performance encryption / decryption algorithm hardware implementations, the performance requirements of the S-box hardware implementation are also high, thus determining the performance requirements of the S-box based on the performance requirements of the encryption / decryption algorithm. Finally, within the performance requirements, the pipeline stages, algebraic computation, or lookup table implementation methods of the input computation module, intermediate computation module, and output computation module of the hybrid S-box are designed. The computation speed and area of ​​the hybrid S-box under different pipeline stages, algebraic computation, or lookup table implementation methods are evaluated, and a suitable hybrid S-box hardware implementation is selected comprehensively.

[0105] This invention provides an S-box, comprising an input calculation module, an intermediate calculation module, an output calculation module, and a first register group. The input calculation module reads input data, a first matrix, and a first vector from the first register group, performs calculations on the input data, the first matrix, and the first vector to obtain a first calculation result, which is then stored in the first register group. The intermediate calculation module reads the first calculation result from the first register group, performs an inverse operation on the first calculation result to obtain a second calculation result, which is then stored in the first register group. The output calculation module reads the second calculation result, a second matrix, and a second vector from the first register group, performs calculations on the second calculation result, the second matrix, and the second vector to obtain an output result of the input data, which is then stored in the first register group. The beneficial effects of this invention are: by setting up a first register group in the S-box, the input calculation module, intermediate calculation module, and output calculation module can use the first register group for data storage and retrieval. This eliminates the need for each module to read data from other modules, allowing all modules to perform calculations in parallel, shortening the time consumed by data transmission between modules, and improving the computational performance of the S-box.

[0106] Based on the S-box provided in the above embodiments, the present invention also provides a data processing scheme. Please refer to... Figure 4 , Figure 4A flowchart of a data processing method provided in an embodiment of the present invention.

[0107] An embodiment of the present invention provides a data processing method that may include the following steps:

[0108] Step S101: Obtain the input data and store it in the first register group of the S box.

[0109] Step S102: Call the input calculation module of the S-box to read the input data, the first matrix, and the first vector from the first register group.

[0110] Step S103: Call the input calculation module of the S box to perform operations on the input data, the first matrix and the first vector, obtain the first operation result and store it in the first register group.

[0111] Step S104: Call the intermediate calculation module of the S box to read the first operation result from the first register group.

[0112] Step S105: Call the intermediate calculation module of the S box to perform the inverse operation on the first operation result to obtain the second operation result and store it in the first register group.

[0113] Step S106: Call the output calculation module of the S box to read the second operation result, the second matrix, and the second vector from the first register group.

[0114] Step S107: Call the input calculation module of the S box to perform operations on the second operation result, the second matrix and the second vector, obtain the output result of the input data and store it in the first register group.

[0115] The relevant descriptions of the data processing method provided in this embodiment can be found in the corresponding embodiments of the S-box described above, and will not be repeated here.

[0116] In an exemplary embodiment, considering that when the number of registers in the register group is small, the module cannot perform sufficient calculations, and when the number of registers in the register group is large, the module cannot fully utilize the registers, resulting in resource waste, how to set a reasonable number of registers is a problem that needs to be solved when setting up the S-box. To solve this problem, the data processing method provided in this embodiment of the invention can also determine the computational power consumption requirements and computational efficiency requirements of the S-box; determine the performance resources allocated to the S-box; obtain test data; and test the data processing performance of the input calculation module, intermediate calculation module, and output calculation module based on the test data to obtain test results. The data processing performance includes the performance of processing a single data and the performance of processing multiple data in parallel. Since the data processing performance includes the performance of processing a single data and the performance of processing multiple data in parallel, and the power consumption of the S-box and Efficiency is determined by the amount of data processed in parallel by the S-box. Therefore, based on the test results, the amount of data processed by the input calculation module, intermediate calculation module, and output calculation module can be combined to obtain an initial combination result. From this initial combination result, the combination that satisfies the S-box's power consumption, efficiency, and performance resource requirements is determined as the target combination result. Finally, based on the target combination result, the number of registers occupied by each of the input, intermediate, and output calculation modules in the first register group can be determined. For example, if the target combination result indicates that the input calculation module processes 3 data points at a time, the intermediate calculation module processes 4 data points at a time, and the output calculation module processes 3 data points at a time, then the input calculation module occupies 3 registers, the intermediate calculation module occupies 4 registers, and the output calculation module occupies 3 registers. Of course, the register data occupied by each module in the intermediate calculation module in the second register group can be further configured.

[0117] In this way, after determining the power consumption and efficiency requirements of the S-box and the performance resources allocated to it, the present invention acquires test data and tests the data processing performance of the input computing module, intermediate computing module, and output computing module based on the test data. The test results reflect the module's performance in processing a single data point and its performance in processing multiple data points in parallel. Since data processing performance includes both the performance in processing a single data point and the performance in processing multiple data points in parallel, and the performance of the S-box is determined by the amount of data it processes in parallel, the test results can be used to evaluate the performance of each module. The initial combination result is obtained by combining the number of data to be processed. Then, in the initial combination result, the combination result that makes the S-box meet the requirements of computing power consumption, computing efficiency, and performance resources is determined as the target combination result. Finally, the number of registers occupied by the input computing module, intermediate computing module, and output computing module in the first register group is determined according to the target combination result. This realizes the ability to test the data processing performance of the S-box based on test data, and then combine the configuration that meets the requirements of computing power consumption, computing efficiency, and performance resources based on the test results. This makes the configuration process of the S-box no longer a black box and ensures the configuration efficiency and rationality of the S-box.

[0118] This invention provides a data processing method that includes: acquiring input data and storing it in the first register group of an S-box; calling the input calculation module of the S-box to read the input data, a first matrix, and a first vector from the first register group; calling the input calculation module of the S-box to perform operations on the input data, the first matrix, and the first vector to obtain a first operation result and storing it in the first register group; calling the intermediate calculation module of the S-box to read the first operation result from the first register group; calling the intermediate calculation module of the S-box to perform an inversion operation on the first operation result to obtain a second operation result and storing it in the first register group; calling the output calculation module of the S-box to read the second operation result, a second matrix, and a second vector from the first register group; and calling the input calculation module of the S-box to perform operations on the second operation result, the second matrix, and the second vector to obtain an output result of the input data and storing it in the first register group. The beneficial effects of this invention are: a first register group is set in the S-box, which can be used by the input calculation module, intermediate calculation module and output calculation module to access data. In this way, each module does not need to read data from other modules, so that all modules can perform calculations in parallel, shortening the time spent on data transmission between modules, and improving the calculation performance with the help of the S-box.

[0119] The present invention also provides an electronic device and a computer-readable storage medium, both of which have the corresponding effects of the data processing method provided in the embodiments of the present invention. Please refer to [link / reference]. Figure 5 , Figure 5This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention.

[0120] An electronic device provided by an embodiment of the present invention includes a memory 201 and a processor 202. The memory 201 stores a computer program, and the processor 202 executes the computer program to implement the steps of the data processing method described in any of the above embodiments.

[0121] Please see Figure 6 Another electronic device provided in this embodiment of the invention may further include: an input port 203 connected to the processor 202 for transmitting commands input from the outside to the processor 202; a display unit 204 connected to the processor 202 for displaying the processing results of the processor 202 to the outside; and a communication module 205 connected to the processor 202 for enabling communication between the electronic device and the outside. The display unit 204 may be a display panel, a laser scanner, or the like; the communication method used by the communication module 205 includes, but is not limited to, Mobile High-Definition Link (MHL), Universal Serial Bus (USB), High-Definition Multimedia Interface (HDMI), wireless connectivity: Wireless Fidelity (WiFi), Bluetooth communication technology, Bluetooth Low Energy communication technology, and communication technology based on IEEE 802.11s.

[0122] The present invention provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the data processing method described in any of the above embodiments.

[0123] The computer-readable storage media involved in this invention include random access memory (RAM), memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs (compact disc read-only memory), or any other form of storage media known in the art.

[0124] The present invention provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of the data processing method described in any of the above embodiments.

[0125] For descriptions of relevant parts in the data processing method, computer program product, electronic device, and computer-readable storage medium provided in this embodiment of the invention, please refer to the detailed description of the corresponding part in the S-box provided in this embodiment of the invention, which will not be repeated here. Furthermore, parts of the technical solutions provided in this embodiment of the invention that are consistent with the implementation principles of corresponding technical solutions in the prior art have not been described in detail to avoid excessive elaboration.

[0126] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0127] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An S-box, characterized in that, It includes an input calculation module, an intermediate calculation module, an output calculation module, and a first register group; The input calculation module is used to read input data, a first matrix, and a first vector from the first register group, perform operations on the input data, the first matrix, and the first vector, obtain a first operation result, and store it in the first register group. The intermediate calculation module is used to read the first operation result from the first register group, perform an inverse operation on the first operation result to obtain a second operation result, and store it into the first register group; The output calculation module is used to read the second operation result, the second matrix, and the second vector from the first register group, perform operations on the second operation result, the second matrix, and the second vector, obtain the output result of the input data, and store it in the first register group; The intermediate calculation module includes a first isomorphic mapping module, a first multiply-accumulate calculation module, an inversion calculation module, a second multiply-accumulate calculation module, and a second isomorphic mapping module. The first isomorphic mapping module is used to map the first operation result from the first finite field to the second finite field to obtain the first mapping result; The first multiplication-addition calculation module is used to perform multiplication and addition operations on the first mapping result to obtain the first sub-operation result; The inverse calculation module is used to perform an inverse operation on the result of the first sub-operation to obtain the result of the second sub-operation. The second multiplication and addition module is used to perform multiplication and addition operations on the result of the second sub-operation to obtain the result of the third sub-operation; The second isomorphic mapping module is used to map the third sub-operation result from the second finite field back to the first finite field to obtain the second operation result; The intermediate calculation module includes a second register group, which is used to store and retrieve the first mapping result, the first sub-operation result, the second sub-operation result, and the third sub-operation result for the first isomorphic mapping module, the first multiply-accumulate calculation module, the inversion calculation module, the second multiply-accumulate calculation module, and the second isomorphic mapping module.

2. The S-box according to claim 1, characterized in that, The first register group includes an input register group, a first arithmetic register group, a second arithmetic register group, and an output register group; The input register group is used to store and access the input data; The first arithmetic register group is used to store and retrieve the result of the first arithmetic operation; The second arithmetic register group is used to store and retrieve the result of the second arithmetic operation; The output register group is used to store the output results.

3. The S-box according to claim 1, characterized in that, The input calculation module, the intermediate calculation module, and the output calculation module are constructed using lookup tables and / or composite domain calculations.

4. The S-box according to claim 1, characterized in that, The second register group includes a first mapping register group, a first multiply-accumulate register group, an inverse register group, and a second multiply-accumulate register group; The first mapping register group is used to access the first mapping result; The first multiply-accumulate register group is used to store the result of the first suboperation; The inversion register group is used to store the result of the second suboperation; The second multiply-accumulate register group is used to store the result of the third suboperation.

5. The S-box according to claim 1, characterized in that, The inverse calculation module is built based on a lookup table; the first isomorphic mapping module, the first multiply-accumulate calculation module, the second multiply-accumulate calculation module, and the second isomorphic mapping module are built based on algebraic calculation.

6. The S-box according to any one of claims 1 to 5, characterized in that, The input calculation module performs operations on the input data, the first matrix, and the first vector to obtain a first calculation result, including: The input calculation module performs calculations on the input data, the first matrix, and the first vector according to the input calculation formula to obtain a first calculation result; The input calculation formula includes: ； Where y1 represents the first calculation result; x represents the input data; Represents the first matrix; This represents the first vector.

7. The S-box according to claim 6, characterized in that, The intermediate calculation module performs an inverse operation on the first calculation result to obtain a second calculation result, including: The intermediate calculation module performs an inverse operation on the first calculation result according to the inverse operation formula to obtain the second calculation result; The inverse operation formula includes: ； Where y2 represents the result of the second operation; I represents the inverse operation.

8. The S-box according to claim 7, characterized in that, The output calculation module performs operations on the second calculation result, the second matrix, and the second vector to obtain the output result of the input data, including: The output calculation module performs calculations on the second calculation result, the second matrix, and the second vector according to the output calculation formula to obtain the output result of the input data; The output calculation formula includes: ； Where y3 represents the output result; Represents the second matrix; This represents the second vector.

9. A data processing method, characterized in that, include: Acquire input data and store the input data into the first register group of the S-box; The input calculation module of the S-box is invoked to read input data, the first matrix, and the first vector from the first register group; The input calculation module of the S-box is invoked to perform operations on the input data, the first matrix, and the first vector to obtain a first operation result and store it in the first register group; The intermediate calculation module of the S-box is invoked to read the first operation result from the first register group; The intermediate calculation module of the S-box is invoked to perform an inverse operation on the first calculation result to obtain a second calculation result, which is then stored in the first register group. The output calculation module of the S-box is invoked to read the second operation result, the second matrix, and the second vector from the first register group; The input calculation module of the S-box is invoked to perform operations on the second operation result, the second matrix, and the second vector to obtain the output result of the input data and store it in the first register group; The intermediate calculation module includes a first isomorphic mapping module, a first multiply-accumulate calculation module, an inversion calculation module, a second multiply-accumulate calculation module, and a second isomorphic mapping module. The first isomorphic mapping module is used to map the first operation result from the first finite field to the second finite field to obtain the first mapping result; The first multiplication-addition calculation module is used to perform multiplication and addition operations on the first mapping result to obtain the first sub-operation result; The inverse calculation module is used to perform an inverse operation on the result of the first sub-operation to obtain the result of the second sub-operation. The second multiplication and addition module is used to perform multiplication and addition operations on the result of the second sub-operation to obtain the result of the third sub-operation; The second isomorphic mapping module is used to map the third sub-operation result from the second finite field back to the first finite field to obtain the second operation result; The intermediate calculation module includes a second register group, which is used to store and retrieve the first mapping result, the first sub-operation result, the second sub-operation result, and the third sub-operation result for the first isomorphic mapping module, the first multiply-accumulate calculation module, the inversion calculation module, the second multiply-accumulate calculation module, and the second isomorphic mapping module.

10. The data processing method according to claim 9, characterized in that, Also includes: Determine the computational power consumption and computational efficiency requirements of the S-box; The performance resources allocated to the S-box are determined; Obtain test data; The data processing performance of the input calculation module, the intermediate calculation module and the output calculation module is tested based on the test data to obtain test results. The data processing performance includes the performance of processing a single piece of data and the performance of processing multiple pieces of data in parallel. Based on the test results, the amount of data processed by each of the input calculation module, the intermediate calculation module, and the output calculation module is combined to obtain an initial combination result; In the initial combination result, the combination result that makes the S-box satisfy the computing power consumption requirement, the computing efficiency requirement, and the performance resources is determined as the target combination result; The number of registers occupied by the input calculation module, the intermediate calculation module, and the output calculation module in the first register group is determined based on the target combination result.

11. A computer program product, comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the data processing method of claim 9 or 10.

12. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the data processing method of claim 9 or 10 when executing the computer program.

13. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the data processing method of claim 9 or 10.

Images