Neuromorphic device based on ion migration type gate dielectric layer and application

Abstract

The invention belongs to the related technical field of two-dimensional material devices, and discloses a neuromorphic device based on an ion migration type gate dielectric layer and an image noise reduction preprocessing method. The device comprises a substrate layer, a conducting layer, a gate dielectric layer, a semiconductor layer, a source electrode, a drain electrode and a grid electrode, the conducting layer is arranged on the substrate layer, the grid electrode and the gate dielectric layer are arranged on the conducting layer, the semiconductor layer serves as a channel and is arranged on the gate dielectric layer, and the source electrode and the drain electrode are arranged on the semiconductor layer; the gate dielectric layer is made of Sb4O5Cl2, and pulse voltage is applied to the gate to change the migration direction of chloride ions in the Sb4O5Cl2, so that the chloride ion concentration of an interface between the gate dielectric layer and the semiconductor layer is changed, and the carrier concentration in the semiconductor layer is changed. According to the invention, functions of image noise reduction and storage classification can be realized on a device level.

Description

Technical Field

[0001] The present invention belongs to the technical field related to two-dimensional material devices, and more specifically, relates to a neuromorphic device based on an ion migration type gate dielectric layer and its application. Background Art

[0002] With the rapid development of artificial intelligence and big data technologies, neuromorphic computing has gradually become a key direction for improving computing efficiency and reducing energy consumption. Traditional storage-computing separation architectures are limited by the frequent migration of data between storage and computing units, leading to the increasingly prominent "von Neumann bottleneck" problem. Neuromorphic devices based on two-dimensional materials have become an important candidate for breaking through this bottleneck due to their unique advantages such as atomic-level thickness, high mobility, immunity to short-channel effects, and easily tunable energy bands. However, in practical applications, the performance of two-dimensional neuromorphic devices is still limited by the defects of existing materials and structures, making it difficult to fully realize their potential.

[0003] At present, traditional two-dimensional transistors mostly use floating gate structures or ferroelectric polarization layers to realize neuromorphic storage and computing functions, but these methods have obvious shortcomings. Due to the limitation of the thickness of the tunneling layer, the floating gate structure will lead to increased electron leakage and leakage current as the device size decreases, making it impossible to effectively store charge. Although the ferroelectric polarization layer has a certain degree of retention, its operating voltage is high, and its polarization performance drops sharply when the thickness is reduced, making it difficult to meet the requirements of high-density integration and low power consumption. These structural designs are complex, further increasing the process difficulty and energy consumption of the device, and limiting the large-scale development in practical applications. In addition, traditional neuromorphic devices are usually limited to a single current modulation mode, making it difficult to expand the multi-modal functions that integrate pre-processing, storage and classification on a single device. Summary of the Invention

[0004] In response to the above-mentioned defects or improvement needs of the prior art, the present invention provides a neuromorphic device based on an ion migration gate dielectric layer and its application to solve the problem of a single current modulation mode in the existing devices.

[0005] To achieve the above objectives, according to one aspect of the present invention, a neuromorphic device based on an ion migration type gate dielectric layer is provided. The neuromorphic device includes a substrate layer, a conductive layer, a gate dielectric layer, a semiconductor layer, a source electrode, a drain electrode, and a gate electrode, wherein:

[0006] The conductive layer is arranged on the base layer, the gate and the gate dielectric layer are arranged on the conductive layer, the semiconductor layer is arranged as a channel on the node layer, and the source and the drain are arranged on the semiconductor layer;

[0007] The material of the gate dielectric layer is Sb4O5Cl2. Applying a pulsed gate voltage on the gate changes the migration direction of chloride ions in Sb4O5Cl2, thereby changing the chloride ion concentration at the interface between the gate dielectric layer and the semiconductor layer, thereby changing the carrier concentration in the semiconductor layer, that is, changing the conductivity.

[0008] Further preferably, the thickness of the gate dielectric layer is 20 nm to 300 nm.

[0009] Further preferably, the semiconductor layer is molybdenum disulfide and has a thickness of 5 nm to 10 nm.

[0010] Further preferably, the conductive layer is a few-layer graphite with a thickness of 5 nm to 15 nm.

[0011] Further preferably, the operating voltage of the neuromorphic device is less than 1V.

[0012] According to another aspect of the present invention, a neuromorphic device array system is provided, wherein the aforementioned neuromorphic device is used as a module, and the array system includes a plurality of modules distributed in an array.

[0013] According to another aspect of the present invention, a method for image noise reduction preprocessing using the neuromorphic device is provided, the method comprising the following steps:

[0014] Mapping each pixel of the image to be processed into a gate voltage pulse amplitude;

[0015] Applying the gate voltage pulse amplitude corresponding to each pixel point to the gate of the neuromorphic device, measuring the current between the source and the drain of the neuromorphic device, and obtaining the current corresponding to each pixel point;

[0016] The current is mapped into image pixels, thereby updating the pixel value of each pixel point, thereby achieving image processing.

[0017] Further preferably, the formula for mapping each pixel of the image to be processed to the gate voltage pulse amplitude is as follows:

[0018]

[0019] Among them, V is the gate voltage amplitude after mapping, P is the pixel value of each pixel point on the image to be processed, and P min and P max are the minimum and maximum grayscale values on the image, V min and V max are the minimum and maximum gate voltages applied to the device, respectively.

[0020] Further preferably, the formula used to update the pixel value of each pixel point is as follows:

[0021]

[0022] Among them, P 新 is the updated image pixel value, and I is the current corresponding to the pixel point obtained by measurement.

[0023] According to another aspect of the present invention, a method for constructing neural network weights using the aforementioned neuromorphic device is provided, the method comprising the following steps:

[0024] Acquire the actual current between the source and drain of a neuromorphic device;

[0025] The weight of the neural network is calculated using the actual current according to the following formula:

[0026] PSC 实际 –PSC min =k(W–W min )

[0027]

[0028] Among them, PSC 实际 is the current value actually measured on the device, PSC min With PSC max are the minimum and maximum currents that can be achieved on the device, W min and W max are the minimum and maximum values of the weights in the neural network, W is the weight of the neural network, and k is the mapping coefficient.

[0029] In general, the above technical solutions conceived by the present invention have the following beneficial effects compared with the prior art:

[0030] 1. The present invention utilizes Sb4O5Cl2 material in the gate dielectric layer, which has excellent ion migration characteristics. When different pulse gate voltages are applied to the device, the migration direction of chloride ions in Sb4O5Cl2 can be changed, thereby changing the concentration of carriers in the two-dimensional material channel, that is, achieving current modulation on the device. Specifically, when pulse gate voltages of different amplitudes are applied, a nonlinear current modulation mode can be obtained; when different numbers of pulse gate voltages are applied, a near-linear current modulation mode can be obtained, effectively enriching the current modulation mode of the device.

[0031] 2. The present invention utilizes the ion migration barrier of Sb4O5Cl2 material. Ions migrate under the action of the gate voltage electric field. After the pulse gate voltage is removed, the certain ion migration barrier in the material prevents the ions from migrating back to the initial area and remains in the area after migration, thereby achieving non-volatile characteristics.

[0032] 3. The thickness of the gate dielectric layer used in the present invention is 20nm to 300nm. If the thickness is too small, the pulse gate voltage will easily break down the gate dielectric layer, resulting in poor dielectric properties of the device. If the thickness is too high, the pulse gate voltage will not be conducive to regulating the ion migration in the gate dielectric layer, and thus will not be conducive to the realization of rich current modulation modes.

[0033] 4. The device provided by the present invention has an operating voltage of less than 1V, which significantly reduces energy consumption. At the same time, it avoids the performance loss caused by leakage current or polarization degradation in traditional floating gate and ferroelectric structures, and solves the problems of leakage current and high operating voltage in traditional floating gate and ferroelectric structures.

[0034] 5. The device provided by the present invention realizes a variety of current modulation modes through a single device, namely, nonlinear current control is obtained by programming the pulse gate voltage amplitude, and linear current control is obtained by programming the number of pulses. In addition, due to the certain ion migration barrier in the material, it has non-volatile modulation characteristics. After the device is used in a computer system, it can realize the integrated functions of image preprocessing, storage and classification.

[0035] 6. The linear current modulation mode of the device in the present invention can be used to construct the weights of a neural network, and the nonlinear current modulation mode can be used in image background noise reduction preprocessing. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 is a cross-sectional view of a neuromorphic device constructed according to a preferred embodiment of the present invention;

[0037] Figure 2 is an optical microscope image of a neuromorphic device constructed according to a preferred embodiment of the present invention;

[0038] Figure 3 The device current curves under different gate voltage amplitude control constructed according to the preferred embodiment of the present invention;

[0039] Figure 4 This is an example of achieving image noise reduction effect by using nonlinear control according to a preferred embodiment of the present invention;

[0040] Figure 5 It is the nearly linear polymorphic characteristics of the device constructed according to the preferred embodiment of the present invention under gate voltage pulses;

[0041] Figure 6 The process and architecture of three-layer neural network classification after image denoising preprocessing constructed according to the preferred embodiment of the present invention;

[0042] Figure 7 The MNIST classification accuracy-training number curve based on the pulse-controlled linear conductivity simulation network weights constructed according to the preferred embodiment of the present invention. DETAILED DESCRIPTION

[0043] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely for the purpose of explaining the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

[0044] A neuromorphic device based on an ion migration gate dielectric layer, such as Figure 1 As shown, the device includes a base layer, a conductive layer, a gate dielectric layer, a semiconductor layer, a source, a drain and a gate, wherein: the conductive layer is arranged on the base layer, the source, the drain and the gate dielectric layer are arranged on the conductive layer, the semiconductor layer is arranged as a channel on the node layer, and the gate electrode is arranged on the semiconductor layer; the material of the gate dielectric layer is Sb4O5Cl2, and a pulse voltage is applied to the gate to change the migration direction of the chloride ions in the Sb4O5Cl2, thereby changing the chloride ion concentration at the interface between the gate dielectric layer and the semiconductor layer, thereby changing the carrier concentration in the semiconductor layer.

[0045] The present invention uses Sb4O5Cl2 as the gate dielectric material. Its van der Waals structure and excellent ion mobility provide an ideal platform for precise control of channel carriers in the semiconductor layer. By leveraging the ion mobility characteristics of Sb4O5Cl2 and regulating the distribution and migration direction of chloride ions, multi-level storage states can be achieved, thus meeting the multi-value storage requirements of neuromorphic computing.

[0046] Preferably, two-dimensional materials (such as molybdenum disulfide, tungsten disulfide, etc.) are selected as the material of the semiconductor layer channel and combined with the Sb4O5Cl2 gate dielectric layer to give full play to the advantages of high mobility and excellent electronic properties of two-dimensional materials, thereby improving device performance and subsequently improving computing efficiency and response speed.

[0047] Preferably, indium or few-layer graphene is used as the contact electrode. The device has good conductivity control and carrier transport performance, which can significantly improve the stability and response speed of the device and support efficient signal processing and classification tasks.

[0048] The device provided by the present invention can directly utilize the ion migration characteristics and realize the image noise reduction function based on the nonlinear conductivity state switching of the pulse amplitude. The noise reduction operation is completed by weighted modulation of the input signal, and the optimized image data is directly stored in the device without the participation of additional computing units.

[0049] A. Leveraging the ion mobility properties of Sb4O5Cl2, linear weight adjustment is achieved through pulse modulation, effectively simulating changes in synaptic weights in neural networks. This pulse-based weight adjustment method exhibits excellent linearity and repeatability, laying the foundation for building efficient neuromorphic computing systems.

[0050] The neural network structure is as follows: During the forward propagation, the preprocessed image is first flattened and then nonlinearly transformed using the ReLU activation function: h′=max(0,x), thereby obtaining the output h′ of the hidden layer. Subsequently, the hidden layer output is processed by the Softmax activation function to obtain the final probability distribution: The classification error is evaluated using the cross entropy loss function: Where C = 10 represents the total number of categories, y i is the one-hot encoding representation of the true label, p i is the probability predicted by the model.

[0051] It is worth noting that all neural network weights are mapped to current values to follow the linear current characteristics of the device that depend on the number of gate voltage pulses, thereby ensuring compliance with the physical characteristics of the device. The mapping formula between current and weight is:

[0052] PSC 实际 –PSC min =k(W–W min )

[0053]

[0054] PSC 实际 is the current value actually measured on the device, PSC min With PSC max are the minimum and maximum currents that can be achieved on the device, W min and W max are the minimum and maximum values of the weights in the neural network, respectively.

[0055] When a certain number of negative gate voltage pulses are applied to the device, the PSC 实际 Increase, it simulates the process of weight increase in the neural network; conversely, when a certain number of positive gate voltage pulses are applied to the device, the PSC 实际 Decreases, which simulates the process of weight reduction in the neural network.

[0056] B. The realization of multi-level conductance state can be achieved by one of the following methods:

[0057] (1) By applying pulse signals of different amplitudes to the gate and utilizing the nonlinear conductivity and retention characteristics of the device, a multi-level conductivity state suitable for image preprocessing and storage is achieved;

[0058] (2) While keeping the gate voltage unchanged, the chloride ion concentration distribution is regulated by increasing the number of gate voltage pulses, making the conductivity state tend to be linear and exhibit polymorphism, which is suitable for weight mapping in artificial neural networks and used for hardware implementation of recognition and classification functions.

[0059] The high-resolution characterization method KPFM is used to monitor the migration level of chloride ions, and the chloride ion concentration distribution is adjusted through voltage optimization to improve the accuracy and stability of conductivity state switching.

[0060] An image processing method, the specific steps are as follows:

[0061] (1) Mapping each pixel of the image to be processed to the gate voltage pulse amplitude of the device;

[0062] Pixel value mapping: linearly maps the pixel value (0-255) of the input image data to the gate voltage pulse amplitude range (-5V to -9V). The mapping formula is as follows:

[0063]

[0064] Among them, V is the gate voltage amplitude after mapping, P is the original pixel value, and P min =0,P max =255, V min =-9V, V max =-5V.

[0065] (2) applying the mapped gate voltage pulse amplitude to the device, measuring the current between the source and the drain of the neuromorphic device, and obtaining the current corresponding to each pixel point to update the pixel value of each pixel point;

[0066] The formula for updating pixel values based on device current is:

[0067]

[0068] P 新 For the updated image pixel values, the above-mentioned linear mapping, ion migration regulation and updated pixel value processing are used to complete the noise reduction preprocessing of the input image data, effectively reducing random noise while retaining the main feature information of the image, providing high-quality input for subsequent storage and classification.

[0069] The above-mentioned device can be used as a module to construct a 3×3 array system. Through flexible address selection and parallel computing capabilities, image processing and data classification functions are realized at the analog device level, showing excellent scalability and reliability. In the array system, each module regulates ion migration and realizes multi-level conductivity storage and computing functions.

[0070] The present invention will be further described below with reference to specific embodiments.

[0071] like Figure 2 As shown, the neuromorphic device of the present invention utilizes a structure based on an ion-migration-type gate dielectric layer, Sb4O5Cl2. Composed of an In / Au or graphite bottom gate, a Sb4O5Cl2 gate dielectric, a molybdenum disulfide channel layer, and In / Au source and drain electrodes, the device exhibits high-performance non-volatile performance. The device's clear structure and smooth surface demonstrate the high quality and uniformity of the Sb4O5Cl2 gate dielectric layer, demonstrating the superior fabrication process and materials used.

[0072] like Figure 3 It shows that the nonlinearity of the device remains stable in the time range of 0-300 seconds, has excellent nonlinear regulation characteristics, and the nonlinearity remains stable.

[0073] like Figure 4 As shown in FIG, the device is used to perform nonlinear regulation at different amplitudes, and image noise reduction is achieved by simulating a neural network. Figure 4 The device was used to perform noise reduction on an image of the letters "HUST" containing random background noise of σ=0.6. After being controlled by the device, the noise of the image was effectively removed, and the effect remained stable for 300 seconds, verifying the stability and efficiency of the device in image noise reduction.

[0074] like Figure 5 As shown, the device exhibits near-linear polymorphic characteristics under a certain gate voltage amplitude. The symmetry and tunability of this conductance state enable it to simulate the weights between neurons in neural networks, and thus be applied to the training and calculation of hardware neural networks. The results show that the device has symmetrical and continuously adjustable conductance states, which enables the device to simulate the weights between neurons in hardware neural networks. This device has good tunability and polymorphism, making it suitable for neural network calculation and optimization.

[0075] like Figure 6 As shown, the device successfully applied to a three-layer neural network classification task after image denoising preprocessing using amplitude nonlinearity. The figure shows the process and network architecture for three-layer neural network classification after image denoising preprocessing using amplitude nonlinearity. The neural network consists of 28×28 input neurons, 100 hidden layer neurons, and 10 output neurons, demonstrating the data preprocessing effect of the device after image denoising.

[0076] Figure 7The accuracy-training number curve of the neural network before and after nonlinear noise reduction processing on the MNIST library with σ=0.6 random background noise is shown. After noise reduction, the recognition accuracy reached 99.3% at epoch=20, while the image without noise reduction processing required 45 epochs to achieve the same accuracy, further demonstrating the excellent effect of this device in neural network training.

[0077] It will be easily understood by those skilled in the art that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A neuromorphic device based on an ion migration gate dielectric layer, characterized in that: The neuromorphic device includes a substrate layer, a conductive layer, a gate dielectric layer, a semiconductor layer, a source electrode, a drain electrode, and a gate electrode, wherein: The conductive layer is arranged on the base layer, the gate and the gate dielectric layer are arranged on the conductive layer, the semiconductor layer is arranged as a channel on the node layer, and the source and the drain are arranged on the semiconductor layer; The material of the gate dielectric layer is Sb4O5Cl2. Applying a pulsed gate voltage on the gate changes the migration direction of chloride ions in Sb4O5Cl2, thereby changing the chloride ion concentration at the interface between the gate dielectric layer and the semiconductor layer, thereby changing the carrier concentration in the semiconductor layer, that is, changing the conductivity.

2. The ion migration gate dielectric neuromorphic device according to claim 1, wherein: The thickness of the gate dielectric layer is 20 nm to 300 nm.

3. The ion migration gate dielectric neuromorphic device according to claim 1 or 2, characterized in that: The semiconductor layer is molybdenum disulfide and has a thickness of 5nm to 10nm.

4. The ion migration gate dielectric neuromorphic device according to claim 3, wherein: The conductive layer is a few-layer graphite with a thickness of 5nm to 15nm.

5. The ion migration gate dielectric neuromorphic device according to claim 4, characterized in that: The operating voltage of the neuromorphic device is less than 1V.

6. A neuromorphic device array system, characterized in that: The neuromorphic device according to any one of claims 1 to 5 is taken as a module, and the array system includes a plurality of modules distributed in an array.

7. A method for image noise reduction preprocessing using the neuromorphic device according to any one of claims 1 to 5, characterized in that: The method comprises the following steps: Mapping each pixel of the image to be processed into a gate voltage pulse amplitude; Applying the gate voltage pulse amplitude corresponding to each pixel point to the gate of the neuromorphic device, measuring the current between the source and the drain of the neuromorphic device, and obtaining the current corresponding to each pixel point; The current is mapped into image pixels, thereby updating the pixel value of each pixel point, thereby achieving image processing.

8. The method according to claim 7, wherein The formula for mapping each pixel of the image to be processed to the gate voltage pulse amplitude is as follows: Among them, V is the gate voltage amplitude after mapping, P is the pixel value of each pixel point on the image to be processed, and P min and P max are the minimum and maximum grayscale values on the image, V min and V max are the minimum and maximum gate voltages applied to the device, respectively.

9. The method according to claim 8, wherein The formula used to update the pixel value of each pixel is as follows: Among them, P 新 is the updated image pixel value, and I is the current corresponding to the pixel point obtained by measurement.

10. A method for constructing neural network weights using the neuromorphic device according to any one of claims 1 to 5, characterized in that: The method comprises the following steps: Acquire the actual current between the source and drain of a neuromorphic device; The weight of the neural network is calculated using the actual current according to the following formula: PSC 实际 –PSC min =k(W–W min ) Among them, PSC 实际 is the current value actually measured on the device, PSC min With PSC max are the minimum and maximum currents that can be achieved on the device, W min and W max are the minimum and maximum values of the weights in the neural network, W is the weight of the neural network, and k is the mapping coefficient.

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