Intelligent wheel speed sensor signal processing circuit, electronic device and vehicle
The combination of the signal processing module and the timing trigger module solves the resource consumption problem when discrete circuits process AK protocol WSS signals, achieves efficient WSS signal analysis, reduces costs and improves flexibility.
Patent Information
- Application Number
- CN202510933634.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-08
- Publication Date
- 2025-10-10
- Estimated Expiration
- 2045-07-08
AI Technical Summary
In the prior art, when discrete circuits are used to process AK protocol WSS signals, huge consumption of single-chip microcomputer resources is caused, and dedicated chips have the problems of redundant functions and weak substitutability.
A combination of signal processing module, timing trigger module and single-chip microcomputer is adopted to convert the wheel speed sensor signal into a level signal recognizable by the single-chip microcomputer through resistors, amplifiers and comparators. Hardware decoding is realized by using timer and negative edge trigger to reduce the resource consumption of single-chip microcomputer.
It realizes efficient analysis of AK protocol WSS signals, reduces costs, improves flexibility and versatility, and reduces microcontroller resource consumption.
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Figure CN120446525B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of vehicles, and in particular relates to an intelligent wheel speed sensor signal processing circuit, electronic equipment and a vehicle. Background Art
[0002] Wheel speed sensors (WSS) are core components of a vehicle's electronic stability system (ESS). They monitor wheel speed in real time and transmit this data to the control unit to ensure driving safety. Active WSSs are categorized by signal output type: standard, PWM (Pulse Width Modulation) intelligent, and AK intelligent.
[0003] WSS signal processing is typically done with dedicated WSS signal processing chips or discrete circuits. These chips integrate not only the WSS signal processing module but also other functional modules, resulting in redundant functionality, increased product costs, and limited application flexibility. Discrete circuits, on the other hand, require frequent interrupt capture of rising and falling edges and software decoding, consuming significant microcontroller resources. Summary of the Invention
[0004] An object of the present invention is to provide an intelligent wheel speed sensor signal processing circuit, electronic equipment and vehicle, which can solve the technical problem of huge consumption of single chip resources when using discrete circuits to process AK protocol type WSS signals in the prior art.
[0005] According to a first aspect of the present invention, there is provided an intelligent wheel speed sensor signal processing circuit, comprising a signal processing module, a timing trigger module and a single chip microcomputer;
[0006] The signal processing module is used to receive a wheel speed sensor signal of the AK protocol type, wherein the wheel speed sensor signal is a current signal, and the wheel speed sensor signal includes a state wave and a signal wave, wherein the signal wave is a current wave of 7 mA and 28 mA in the wheel speed sensor signal, and the state wave is a current wave of 7 mA and 14 mA in the wheel speed sensor signal;
[0007] The signal processing module is used to output the high and low level signals after the signal wave conversion to the first pulse edge capture channel of the single chip microcomputer, and output the high and low level signals after the state wave conversion to the timing trigger module;
[0008] The timer trigger module is used to determine the trigger time according to the high and low level signals after the state wave conversion, and output the high and low level signals after the state wave conversion to the second pulse edge capture channel of the single chip microcomputer at the trigger time;
[0009] The single chip microcomputer is used to execute a corresponding interrupt service function according to the captured pulse edge.
[0010] Optionally, the signal processing module includes a resistor, an amplifier, a first comparator and a second comparator;
[0011] The first end of the resistor is connected to the input end of the amplifier, and the output end of the amplifier is connected to the first input end of the first comparator and the first input end of the second comparator respectively;
[0012] The second input terminal of the first comparator is connected to the first reference voltage signal, and the output terminal of the first comparator is connected to the first pulse edge capture channel of the single chip microcomputer;
[0013] The second input terminal of the second comparator is connected to a second reference voltage signal, and the output terminal of the second comparator is connected to the timing trigger module.
[0014] Optionally, the resistor is used to convert the wheel speed sensor signal into a voltage signal;
[0015] The amplifier is used to amplify the voltage signal and output an amplified voltage signal;
[0016] The first comparator is used to output the high and low level signals after the signal wave is converted according to the voltage amplification signal and the first reference voltage signal;
[0017] The second comparator is used to output high and low level signals after state wave conversion according to the voltage amplification signal and the second reference voltage signal.
[0018] Optionally, the timing trigger module includes a timer and a negative edge trigger;
[0019] The Trigger pin of the timer is connected to the GPIO2 pin of the microcontroller, the Out pin of the timer is respectively connected to the CLK pin of the negative edge trigger and the second pulse edge capture channel of the microcontroller, the Q pin of the negative edge trigger is connected to the GPIO1 pin of the microcontroller, and the D pin of the negative edge trigger is connected to the output end of the second comparator.
[0020] Optionally, the single chip microcomputer provides a falling edge pulse to the Trigger pin of the timer via the GPIO2 pin;
[0021] After receiving the falling edge pulse provided by the single chip microcomputer, the timer outputs a high level pulse through the Out pin of the timer, and the duration of the high level pulse is determined according to the cycle time of the state wave of the wheel speed sensor signal;
[0022] After the high level pulse duration ends, the Out pin of the timer outputs a falling edge pulse to the CLK pin of the negative edge trigger and the second pulse edge capture channel of the single chip microcomputer respectively;
[0023] The Q pin of the negative edge trigger receives the high and low level signals after the state wave is converted and output by the second comparator;
[0024] When the CLK pin of the negative edge trigger receives the falling edge pulse output by the Out pin of the timer, the negative edge trigger feeds back the high and low level signals after the state wave conversion to the GPIO1 pin of the microcontroller through the Q pin of the negative edge trigger.
[0025] Optionally, when the second pulse edge capture channel of the single chip microcomputer captures a falling edge signal, a falling edge interrupt service function is entered;
[0026] In the falling edge interrupt service function, the pin level is recorded and put into the variable DataValue in sequence. The GPIO2 pin of the microcontroller outputs a falling edge pulse to the timer, and the interruption number DataNum is recorded.
[0027] Optionally, the first pulse edge capture channel of the single chip microcomputer captures the edge signal, enters the falling edge interrupt service function when a falling edge interrupt occurs, and the GPIO2 pin of the single chip microcomputer outputs a falling edge pulse to the timer.
[0028] Optionally, the first pulse edge capture channel of the single chip microcomputer captures the edge signal and enters the rising edge interrupt service function when a rising edge interrupt occurs;
[0029] In the rising edge interrupt service function, the timestamp is recorded, the wheel speed is calculated, the data DataValue and the interruption number DataNum are saved, the state wave data is obtained, and the GPIO2 pin of the single chip microcomputer is kept outputting a high level.
[0030] According to a second aspect of the present invention, an electronic device is provided, comprising the intelligent wheel speed sensor signal processing circuit according to the first aspect of the present invention.
[0031] According to a third aspect of the present invention, a vehicle is provided, comprising the electronic device according to the second aspect of the present invention.
[0032] The present invention has the following beneficial effects: it uses discrete circuits to implement AK protocol WSS signal parsing, resulting in high versatility and addressing the inflexibility and substitutability issues inherent in dedicated chips for WSS signal processing. By combining a trigger, a timer, and a single-chip microcontroller, the present invention implements hardware decoding of the AK protocol WSS signal status wave, significantly reducing MCU resource consumption. Furthermore, it allows WSS signal parsing without the need for a separate single-chip microcontroller, reducing costs. Furthermore, the timer delay can be adjusted to accommodate different status wave cycle times. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 is a schematic diagram of three different types of wheel speed sensor signals.
[0034] Figure 2 It is a schematic diagram of a wheel speed sensor signal processing solution in the prior art.
[0035] Figure 3 This is a schematic diagram of the AK protocol wheel speed sensor signal.
[0036] Figure 4 Schematic diagram of an intelligent wheel speed sensor signal processing circuit in an embodiment of the present invention.
[0037] Figure 5 Schematic diagram of a signal processing module in an embodiment of the present invention.
[0038] Figure 6 Schematic diagram of a timing trigger module in an embodiment of the present invention.
[0039] Figure 7 This is a schematic diagram of an intelligent wheel speed sensor signal processing circuit in an embodiment of the present invention.
[0040] Figure 8 This is a flow chart of wheel speed sensor signal processing in an embodiment of the present invention. DETAILED DESCRIPTION
[0041] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that unless otherwise specifically stated, the relative arrangement of components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention.
[0042] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
[0043] Techniques, methods, and apparatus known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and apparatus should be considered part of the specification. In all examples shown and discussed herein, any specific values should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.
[0044] It should be noted that like reference numerals and letters refer to like items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.
[0045] In the present description, references to features referred to as "first" or "second" may explicitly or implicitly include one or more of these features. In the present description, unless otherwise specified, "plurality" means two or more. Furthermore, the term "and / or" in this specification refers to at least one of the connected entities, and the character " / " generally indicates an "or" relationship between the connected entities.
[0046] Different types of wheel speed sensor signal output forms such as Figure 1 Type 1 is standard, type 2 is intelligent, and type 3 is AK protocol. Figure 2 As shown, for WSS signal processing, a dedicated WSS signal processing chip or a discrete circuit is generally used to process the WSS signal. However, the use of a dedicated WSS signal processing chip or a discrete circuit to process the WSS signal has the following problems:
[0047] (1) In addition to the WSS signal processing module, the dedicated chip also integrates other functional modules, which has redundant functions, resulting in increased product costs and inflexible applications;
[0048] (2) Specialized chips are not easily replaceable;
[0049] (3) AK protocol has stateful waves, such as Figure 3 As shown, the tp time is 50us, and the status wave conforms to the Manchester encoding rule. When implemented with a discrete circuit, it is necessary to frequently enter the interrupt to capture the rising and falling edges, and software decoding is required, which consumes a huge amount of microcontroller resources. Generally, a separate microcontroller is added for AK protocol WSS signal processing.
[0050] like Figure 4 As shown, this embodiment introduces an intelligent wheel speed sensor signal processing circuit, which includes a signal processing module, a timing trigger module and a single chip microcomputer.
[0051] The signal processing module is used to receive a wheel speed sensor signal of the AK protocol type. The wheel speed sensor signal is a current signal. The wheel speed sensor signal includes a state wave and a signal wave. The signal wave is the current wave of 7mA and 28mA in the wheel speed sensor signal, and the state wave is the current wave of 7mA and 14mA in the wheel speed sensor signal.
[0052] The signal processing module is used to output the high and low level signals after the signal wave conversion to the first pulse edge capture channel of the single chip microcomputer, and output the high and low level signals after the state wave conversion to the timing trigger module.
[0053] The timer trigger module is used to determine the trigger time according to the high and low level signals after the state wave conversion, and output the high and low level signals after the state wave conversion to the second pulse edge capture channel of the single chip microcomputer at the trigger time.
[0054] The single chip microcomputer is used to execute a corresponding interrupt service function according to the captured pulse edge.
[0055] like Figure 4 As shown, the signal processing module converts the 7mA / 14mA / 28mA current signals of the AK protocol WSS into TTL level signals that can be recognized by the microcontroller and the timing trigger module, such as 0 / 3.3V or 0 / 5V.
[0056] The present invention needs to use the function of capturing pulse edges of the single chip microcomputer and the input and output functions of the common IO port, such as Figure 4 As shown in the figure, the MCU's CAP1 is the first pulse edge capture channel, and CAP2 is the second pulse edge capture channel. CAP1 can capture both rising and falling edges. When a rising or falling edge pulse is detected, the MCU enters the interrupt service routine to handle the relevant task. CAP2 only captures falling edges. When a falling edge pulse is detected, the MCU enters the interrupt service routine to handle the relevant task. GPIO1 and GPIO2 are the general-purpose input and output pins of the MCU.
[0057] like Figure 5 As shown, the signal processing module includes a resistor, an amplifier, a first comparator and a second comparator.
[0058] The first end of the resistor is connected to the input end of the amplifier, and the output end of the amplifier is connected to the first input end of the first comparator and the first input end of the second comparator respectively.
[0059] The second input terminal of the first comparator is connected to a first reference voltage signal, and the output terminal of the first comparator is connected to a first pulse edge capture channel of the single chip microcomputer.
[0060] The second input terminal of the second comparator is connected to a second reference voltage signal, and the output terminal of the second comparator is connected to the timing trigger module.
[0061] The resistor is used to convert the wheel speed sensor signal into a voltage signal.
[0062] The amplifier is used to amplify the voltage signal and output a voltage amplified signal.
[0063] The first comparator is used to output a high / low level signal converted from the signal wave according to the voltage amplified signal and the first reference voltage signal.
[0064] The second comparator is used to output a high / low level signal converted from the state wave according to the voltage amplified signal and the second reference voltage signal.
[0065] As shown in Figure 5 , a wheel speed sensor outputs a current signal, which is converted into a voltage signal U WSS under the action of a resistor R1, and an input terminal of an amplifier OP1 receives the voltage signal U WSS . The voltage signal U WSS is amplified by the amplifier OP1 to obtain a voltage amplified signal U Gain .
[0066] The voltage amplified signal U Gain is given to a first comparator CMP1 and a second comparator CMP2, and the voltage amplified signal U Gain is converted into an H / L level signal by the first comparator CMP1 and the second comparator CMP2. H represents a high level, which is 3.3V or 5V. L represents a low level, which is 0V.
[0067] By adjusting the first reference voltage signal Vref1 and the second reference voltage signal Vref2, the first comparator CMP1 ignores the state wave signal, the output terminal CMP1_OUT of the first comparator CMP1 only outputs the H / L level signal converted from the signal wave, and the output terminal CMP2_OUT of the second comparator CMP2 can output the H / L level signal converted from the state wave. CMP1_OUT is output to a first edge pulse capture channel CAP1 of a single-chip microcomputer, and CAM2_OUT is output to a timing trigger module. The first comparator CMP1 is a signal wave comparator, and the second comparator CMP2 is a state wave comparator.
[0068] As shown in Figure 6 , the timing trigger module includes a timer and a negative edge trigger.
[0069] The Trigger pin of the timer is connected to the GPIO2 pin of the microcontroller, the Out pin of the timer is respectively connected to the CLK pin of the negative edge trigger and the second pulse edge capture channel of the microcontroller, the Q pin of the negative edge trigger is connected to the GPIO1 pin of the microcontroller, and the D pin of the negative edge trigger is connected to the output end of the second comparator.
[0070] The single chip microcomputer provides a falling edge pulse to the Trigger pin of the timer via the GPIO2 pin.
[0071] After receiving the falling edge pulse provided by the single chip microcomputer, the timer outputs a high level pulse through the Out pin of the timer. The duration of the high level pulse is determined according to the cycle time of the state wave of the wheel speed sensor signal.
[0072] After the high level pulse duration ends, the Out pin of the timer outputs a falling edge pulse to the CLK pin of the negative edge trigger and the second pulse edge capture channel of the single chip microcomputer respectively;
[0073] The Q pin of the negative edge trigger receives the high and low level signals after the state wave is converted and output by the second comparator;
[0074] When the CLK pin of the negative edge trigger receives the falling edge pulse output by the Out pin of the timer, the negative edge trigger feeds back the high and low level signals after the state wave conversion to the GPIO1 pin of the microcontroller through the Q pin of the negative edge trigger.
[0075] like Figure 6 As shown in the figure, the MCU provides a falling edge pulse to the Trigger pin of timer TIM1 via the GPIO2 pin. After receiving the falling edge pulse, timer TIM1 outputs a high-level pulse through its Out pin. The duration of this high-level pulse, tD, is determined by the cycle of the WSS state wave and is generally between 1 and 1.5 state wave cycles. After this high-level pulse lasts for tD, the Out pin of timer TIM1 outputs a falling edge to the CLK pin of the negative-edge trigger TRG1 and the second-edge pulse capture channel CAP2 of the MCU. When the CLK pin of the negative-edge trigger TRG1 receives the falling edge pulse, the negative-edge trigger TRG1 feeds the CMP_OUT2 level signal back to the GPIO1 pin of the MCU via its Q pin.
[0076] The intelligent wheel speed sensor signal processing circuit of the present invention is as follows Figure 7 shown.
[0077] In this embodiment, when the second pulse edge capture channel of the single chip microcomputer captures a falling edge signal, a falling edge interrupt service function is entered.
[0078] In the falling edge interrupt service function, the pin level is recorded and put into the variable DataValue in sequence. The GPIO2 pin of the microcontroller outputs a falling edge pulse to the timer, and the interruption number DataNum is recorded.
[0079] The first pulse edge capture channel of the single chip microcomputer captures the edge signal, enters the falling edge interrupt service function when a falling edge interrupt occurs, and the GPIO2 pin of the single chip microcomputer outputs a falling edge pulse to the timer.
[0080] The first pulse edge capture channel of the single chip microcomputer captures the edge signal and enters the rising edge interrupt service function when a rising edge interrupt occurs.
[0081] In the rising edge interrupt service function, the timestamp is recorded, the wheel speed is calculated, the data DataValue and the interruption number DataNum are saved, the state wave data is obtained, and the GPIO2 pin of the single chip microcomputer is kept outputting a high level.
[0082] The process of wheel speed sensor signal processing is as follows: Figure 8 As shown. AK protocol type WSS current signal input signal processing module, converted into voltage signal U through resistor R1 WSS Voltage signal U WSS After being amplified by amplifier OP1, it is converted into U Gain .
[0083] U Gain It enters the state wave comparator, is converted into an H / L level signal, and is output to the data channel D of the negative edge trigger TRG1 through CMP2_OUT.
[0084] U Gain It enters the signal wave comparator, is converted into an H / L level signal, and is output to the CAP1 channel of the microcontroller through CMP1_OUT.
[0085] The microcontroller's pulse edge capture channel CAP1 captures the edge signal and generates an interrupt. For a falling-edge interrupt, the falling-edge interrupt service routine causes the microcontroller's GPIO2 port to output a falling-edge pulse. Timer TIM1 outputs a high-level pulse through its OUT pin for a duration of tD. After tD, timer TIM1 outputs a low-level pulse through its OUT pin to the microcontroller's CAP2 pin and the CLK pin of the negative-edge trigger TRG1.
[0086] After the CLK pin of the negative edge trigger TRG1 receives a falling edge pulse, the negative edge trigger TRG1 inputs the signal acquired by the data channel D to the GPIO1 channel of the single-chip microcomputer through the Q pin.
[0087] The pulse edge capture channel CAP2 of the single-chip microcomputer captures a falling edge signal and enters an interrupt. In a falling edge service function, the pin level is recorded and sequentially put into an array or other variable DataValue, so that the GPIO2 port of the single-chip microcomputer outputs a falling edge pulse, and the number of interrupts DataNum is recorded.
[0088] The pulse edge capture channel CAP1 of the single-chip microcomputer captures an edge signal and enters an interrupt. In a rising edge interrupt service function, a time stamp is recorded, the wheel speed size is calculated, the data DataValue and the number of interrupts DataNum are saved, the state wave data is obtained, and the GPIO2 port of the single-chip microcomputer is kept outputting a high level.
[0089] The AK protocol type WSS signal is realized by discrete circuits, and the application has strong universality, solves the problems of insufficient flexibility and weak replaceability of a dedicated chip in processing WSS signals, and realizes hardware decoding of AK protocol WSS signal state waves through the combination of a trigger, a timer and a single-chip microcomputer, greatly reduces the resource consumption of an MCU (Microcontroller Unit), and can realize WSS signal analysis without separately adding a single-chip microcomputer, reduces the cost, and can adjust the delay time of the timer to adapt to different state wave cycle times.
[0090] The embodiment introduces an electronic device, which comprises the intelligent wheel speed sensor signal processing circuit according to any one of the embodiments.
[0091] The embodiment introduces a vehicle, which comprises the electronic device according to the above embodiments.
[0092] Although some specific embodiments of the application have been described in detail through examples, those skilled in the art should understand that the above examples are only for illustration, and are not intended to limit the scope of the application. Those skilled in the art should understand that the above embodiments can be modified without departing from the scope and spirit of the application.
[0093] Those skilled in the art can clearly understand that the modules and algorithm steps described in combination with the embodiments disclosed herein can be implemented by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.
[0094] Those skilled in the art can clearly understand that, for the convenience and brevity of the description, the specific working process of the above-described devices and equipment can refer to the corresponding process in the foregoing method embodiments, which will not be repeated here.
[0095] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. In actual implementation, another division mode can be used. For example, a plurality of modules or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the shown or discussed modules can be indirect coupling or communication connection through some interface, device or module, which can be electrical, mechanical or other form.
[0096] The modules described as separate components can or can not be physically separated, and the components shown as modules can or can not be physical modules, i.e. they can be located in one place or distributed on a plurality of network modules. Some or all of the modules can be selected according to actual needs to achieve the purpose of the embodiment of the present application.
[0097] In addition, the functional modules in the embodiments of the present application can be integrated into one processing module, or each module can exist physically independently, or two or more modules can be integrated into one module.
[0098] If the functions are realized in the form of software function modules and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application or the part of the technical solutions that essentially contribute to the prior art can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method of the embodiments of the present application. The foregoing storage medium includes: U disk, mobile hard disk, ROM, RAM, magnetic disk or optical disk, etc. Various program codes that can be stored.
[0099] The above description is merely a preferred embodiment of the present application and an illustration of the technical principles employed. Those skilled in the art should understand that the scope of the invention herein is not limited to the technical solutions formed by the specific combination of the above-mentioned technical features, but also encompasses other technical solutions formed by any combination of the above-mentioned technical features or their equivalents without departing from the inventive concept. For example, a technical solution formed by replacing the above-mentioned features with (but not limited to) technical features having similar functions disclosed in this application.
[0100] It should be understood that the size of the serial numbers of the steps in the content of the invention and the embodiments of the present invention does not absolutely mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention. The foregoing description of the implementation of the present disclosure has been given for the purpose of example and description. The foregoing description is not exhaustive and is not intended to limit the present disclosure to the exact form disclosed. Various variations and modifications may exist based on the above teachings, or various variations and modifications may be obtained from the practice of the present disclosure. These embodiments are selected and described in order to illustrate the principles of the present disclosure and its practical application, so that those skilled in the art can utilize the present disclosure in various embodiments and various modifications suitable for the specific purpose conceived.
Claims
1. An intelligent wheel speed sensor signal processing circuit, characterized in that: Including signal processing module, timing trigger module and single chip microcomputer; The signal processing module is used to receive a wheel speed sensor signal of the AK protocol type, wherein the wheel speed sensor signal is a current signal, and the wheel speed sensor signal includes a state wave and a signal wave, wherein the signal wave is a current wave of 7 mA and 28 mA in the wheel speed sensor signal, and the state wave is a current wave of 7 mA and 14 mA in the wheel speed sensor signal; The signal processing module is used to output the high and low level signals after the signal wave conversion to the first pulse edge capture channel of the single chip microcomputer, and output the high and low level signals after the state wave conversion to the timing trigger module; The timing trigger module includes a timer and a negative edge trigger; The single chip microcomputer is used to execute a corresponding interrupt service function according to the captured pulse edge; The first pulse edge capture channel of the single chip microcomputer captures the edge signal, enters the falling edge interrupt service function when a falling edge interrupt occurs, and the GPIO2 pin of the single chip microcomputer outputs a falling edge pulse to the timer; After receiving the falling edge pulse provided by the single chip microcomputer, the timer outputs a high level pulse through the Out pin of the timer, and the duration of the high level pulse is determined according to the cycle time of the state wave of the wheel speed sensor signal; After the high level pulse duration ends, the Out pin of the timer outputs a falling edge pulse to the CLK pin of the negative edge trigger and the second pulse edge capture channel of the single chip microcomputer respectively; When the CLK pin of the negative edge trigger receives the falling edge pulse output by the Out pin of the timer, the negative edge trigger feeds back the high and low level signals after the state wave conversion to the GPIO1 pin of the microcontroller through the Q pin of the negative edge trigger.
2. The intelligent wheel speed sensor signal processing circuit according to claim 1, characterized in that: The signal processing module includes a resistor, an amplifier, a first comparator and a second comparator; The first end of the resistor is connected to the input end of the amplifier, and the output end of the amplifier is connected to the first input end of the first comparator and the first input end of the second comparator respectively; The second input terminal of the first comparator is connected to the first reference voltage signal, and the output terminal of the first comparator is connected to the first pulse edge capture channel of the single chip microcomputer; The second input terminal of the second comparator is connected to a second reference voltage signal, and the output terminal of the second comparator is connected to the timing trigger module.
3. The intelligent wheel speed sensor signal processing circuit according to claim 2, characterized in that: The resistor is used to convert the wheel speed sensor signal into a voltage signal; The amplifier is used to amplify the voltage signal and output an amplified voltage signal; The first comparator is used to output the high and low level signals after the signal wave is converted according to the voltage amplification signal and the first reference voltage signal; The second comparator is used to output high and low level signals after state wave conversion according to the voltage amplification signal and the second reference voltage signal.
4. The intelligent wheel speed sensor signal processing circuit according to claim 3, characterized in that: The Trigger pin of the timer is connected to the GPIO2 pin of the microcontroller, the Out pin of the timer is respectively connected to the CLK pin of the negative edge trigger and the second pulse edge capture channel of the microcontroller, the Q pin of the negative edge trigger is connected to the GPIO1 pin of the microcontroller, and the D pin of the negative edge trigger is connected to the output end of the second comparator.
5. The intelligent wheel speed sensor signal processing circuit according to claim 4, characterized in that: When the second pulse edge capture channel of the single chip microcomputer captures the falling edge signal, entering the falling edge interrupt service function; In the falling edge interrupt service function, the pin level is recorded and put into the variable DataValue in sequence. The GPIO2 pin of the microcontroller outputs a falling edge pulse to the timer, and the interruption number DataNum is recorded.
6. The intelligent wheel speed sensor signal processing circuit according to claim 5, characterized in that: The first pulse edge capture channel of the single chip microcomputer captures the edge signal and enters the rising edge interrupt service function when a rising edge interrupt occurs; In the rising edge interrupt service function, the timestamp is recorded, the wheel speed is calculated, the data DataValue and the interruption number DataNum are saved, the state wave data is obtained, and the GPIO2 pin of the single chip microcomputer is kept outputting a high level.
7. An electronic device, characterized in that: The invention comprises an intelligent wheel speed sensor signal processing circuit as claimed in any one of claims 1 to 6.
8. A vehicle, characterized in that: The vehicle includes the electronic device according to claim 7.
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