Board card test system and board card test method
Through the board test system that automatically controls the HIL equipment, the problems of low efficiency and large errors of manual excitation testing are solved, and efficient and accurate board tests are achieved.
Patent Information
- Application Number
- CN202510577674.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-06
- Publication Date
- 2025-08-08
AI Technical Summary
The manual incentive test scheme in existing HIL tests is inefficient and has large errors, resulting in wasted testing resources and inaccurate results.
The board and card testing system is adopted, and the signal boards in the HIL device are automatically controlled by the upper computer, and the channel gate is controlled and the test instrument is automatically switched through commands to realize automatic excitation testing.
It improves testing efficiency, reduces test errors, reduces artificial operation steps, and improves the accuracy and reliability of the test.
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Figure CN120446718A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of power electronics technology, and in particular to a board test system and a board test method. Background Art
[0002] Hardware-in-the-Loop (HIL) simulation testing is a testing and verification technology that allows for repeatable testing of embedded control units (ECUs) in a laboratory environment. It combines hardware components and software models to simulate the behavior of a system or subsystem in a real or simulated environment. This technology is widely used in automotive, aerospace, industrial control, and other fields that require accurate simulation of complex systems. In particular, HIL testing has become a key factor in ensuring system reliability in electric and autonomous driving systems.
[0003] Currently, HIL testing typically uses manual stimulation testing, whereby humans manually and collaboratively stimulate the IO (Input / Output) signal boards within HIL cabinets / equipment. By monitoring and recording test instrument readings, the HIL board functionality and performance are tested. However, this manual stimulation testing approach utilizes relatively low personnel utilization, resulting in low test efficiency and the potential for test errors due to the extensive manual operation.
[0004] Based on this, the industry is still in urgent need of a new type of automated HIL board stimulus testing solution to solve the problems of low test efficiency and test errors in the above-mentioned manual stimulus testing solution. Summary of the Invention
[0005] The embodiments of the present application provide a board test system and a board test method, which can more efficiently and accurately implement HIL board automated stimulus testing, thereby effectively improving the overall board test efficiency and reducing test errors.
[0006] In a first aspect, an embodiment of the present application provides a board test system, which includes a host computer, a hardware-in-the-loop (HIL) device, a fault injection board, and a signal test module; the HIL device includes at least one signal board;
[0007] The host computer is configured to obtain a HIL device signal list document, the HIL device signal list document including an excitation signal and a test signal type corresponding to each signal board in at least one signal board; based on the HIL device signal list document, send a corresponding target excitation signal to the test signal board in at least one signal board; based on current test channel information of the test signal board, send a channel selection instruction to the fault injection board; based on the target test signal type corresponding to the target excitation signal, send a test switching instruction to the signal test module;
[0008] The HIL device is electrically connected to the fault injection board, and the signal board to be tested in the HIL device is used to output a corresponding target response signal in response to the target stimulus signal;
[0009] a fault injection board, configured to connect a target channel between the HIL device and the signal test module in response to a channel selection instruction;
[0010] The signal testing module is used to access the target test instrument corresponding to the target signal type to be tested in response to the test switching instruction, so that the target test instrument tests the target response signal; and transmit the test result of the target response signal to the host computer until the stimulus test of each signal board in the HIL device is completed in a traversal manner.
[0011] In some possible implementations, the HIL device is electrically connected to the fault injection board via an optical distribution unit (ODU) connector;
[0012] The host computer is further configured to determine the signal board to be tested associated with the current interface name to be tested according to the current interface name to be tested of the ODU connector.
[0013] In some possible implementations, the signal testing module includes a switch unit and N testing instruments, the N testing instruments include a target testing instrument, and N is a positive integer;
[0014] The switch switching unit is electrically connected to N test instruments respectively;
[0015] The switch switching unit is used to respond to the test switching instruction and enable the pin electrically connected to the target test instrument, so that the target test instrument is connected and tests the target response signal.
[0016] In some possible implementations, the switch unit is an RS485 relay;
[0017] The N test instruments include at least one of a six-and-a-half-digit multimeter, a DC regulated power supply, a high-precision oscilloscope, and a signal generator test tool.
[0018] In some possible implementations, the fault injection board is specifically configured to connect a pin corresponding to a target channel to an effective gating potential terminal in response to a channel gating instruction, so as to achieve gating of the target channel.
[0019] In some possible implementations, the host computer is further configured to receive engineering configuration instructions to pre-configure the test board engineering environment in the test management software;
[0020] Among them, the test management software is adapted to the HIL equipment.
[0021] In some possible implementations, the signal testing module is electrically connected to the host computer via a universal serial bus (USB) serial port;
[0022] The host computer is used to read the test results obtained by the target test instrument in the form of a serial port.
[0023] In some possible implementations, the host computer is further configured to send an operation instruction to the target test instrument through the USB serial port, so that the target test instrument tests the target response signal according to a specified action.
[0024] In some possible implementations, the signal board to be tested includes a plurality of signal channels to be tested;
[0025] The host computer is used to send corresponding target stimulus signals to multiple signal channels to be tested in sequence based on the HIL device signal list document.
[0026] Based on the same inventive concept, in a second aspect, an embodiment of the present application provides a board card testing method, which is applied to a board card testing system provided in any embodiment of the first aspect of the present application; the board card testing method includes:
[0027] Obtaining a HIL device signal list document, the HIL device signal list document including an excitation signal corresponding to each signal board in at least one signal board and a type of a signal to be measured;
[0028] Based on the HIL device signal list document, a corresponding target stimulus signal is sent to a signal board to be tested in at least one signal board;
[0029] Based on the current test channel information of the signal board to be tested, a channel gating instruction is sent to the fault injection board to enable the fault injection board to conduct the target channel between the HIL device and the signal test module;
[0030] Based on the target signal type to be tested corresponding to the target excitation signal, a test switching instruction is sent to the signal test module to enable the signal test module to access the target test instrument corresponding to the target signal type to be tested, and receive the test results obtained by the target test instrument for testing the target response signal corresponding to the target excitation signal, until the excitation test of each signal board in the HIL device is completed in a traversal manner.
[0031] From the above description, it can be seen that an embodiment of the present application provides a board test system and a board test method, wherein the board test system includes a host computer, a HIL device, a fault injection board, and a signal test module. The host computer can obtain a HIL device signal list document, and send a corresponding target excitation signal to the signal board to be tested according to the HIL device signal list document, and control the target channel selection in the fault injection board by sending instructions, and control the signal test module to access the target test instrument to measure the target response signal, and the target test instrument outputs the test results to the host computer, and repeats this process until the automated excitation test of the board in the HIL device is achieved. Compared with the manual excitation test scheme in the related art, the board test system and board test method of the embodiment of the present application utilize the host computer to automatically control the signal board in the HIL device, and obtain the test results of the signal board to be tested through command control channel selection and automatic switching of the test instrument. Since the above-mentioned overall automated board test process avoids manual excitation test operations to a great extent, it can realize the automated excitation test of the HIL board more efficiently and accurately, thereby effectively improving the overall board test efficiency and reducing test errors. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0033] Figure 1 This is a structural diagram of a board test system provided in an embodiment of the present application;
[0034] Figure 2 This is another structural diagram of the board test system provided in an embodiment of the present application;
[0035] Figure 3 This is another structural diagram of the board test system provided in an embodiment of the present application;
[0036] Figure 4 This is a flow chart of a board card testing method provided in an embodiment of the present application. DETAILED DESCRIPTION
[0037] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is merely to provide a better understanding of the present application by illustrating the examples of the present application.
[0038] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, the elements defined by the phrase "comprising..." do not exclude the presence of other identical elements in the process, method, article, or device comprising the elements.
[0039] In the embodiments of the present application, the term “electrically connected” may refer to a direct electrical connection between two components, or may refer to an electrical connection between two components via one or more other components.
[0040] It will be apparent to those skilled in the art that various modifications and variations can be made in this application without departing from the spirit or scope of this application. Therefore, this application is intended to cover modifications and variations of this application that fall within the scope of the corresponding claims (technical solutions claimed for protection) and their equivalents. It should be noted that the embodiments provided in the examples of this application can be combined with each other without contradiction.
[0041] As described in the background technology section, current manual excitation testing schemes have a relatively low utilization rate of personnel, resulting in low test efficiency and test errors easily caused by a large amount of manual operation. Specifically, the above-mentioned manual excitation testing schemes consume human resources, and because the board excitation testing steps are often low-tech and repetitive, they result in wasted staff time and low staff utilization. Secondly, when a large number of boards need to be tested or staff are under high work pressure, due to the repetitive excitation testing steps of the HIL board, operational errors are likely to occur when testing a certain channel, resulting in incorrect test results. Thirdly, during the excitation testing process, staff rely on visual observation of the results, but the test instrument display value jumps flexibly, so only estimated values can be read, which may result in low excitation test accuracy. Therefore, how to solve the problems of low test efficiency and test errors easily caused by a large amount of manual operation when testing boards in HIL equipment in the related art has become a technical problem that needs to be solved by those skilled in the art.
[0042] In view of the above, and to address the problems of the prior art, the embodiments of the present application provide a board test system and a board test method to address the problems of low test efficiency and test errors in the above-mentioned manual stimulus test scheme. It should be noted that the embodiments provided in this application are not intended to limit the scope of the disclosure of this application.
[0043] The following first introduces the board test system provided in the embodiment of the present application.
[0044] Figure 1 FIG. 1 shows a schematic diagram of a structure of a board test system provided in an embodiment of the present application. Figure 1 As shown, the board testing system 1000 in the embodiment of the present application includes a host computer 100, a hardware-in-the-loop (HIL) device 200, a fault injection board 300, and a signal testing module 400. The HIL device 200 includes at least one signal board, which includes at least one signal channel. The fault injection board 300 can simulate hardware faults to achieve other states, such as automatic short circuit and open circuit, of the board channel.
[0045] The host computer 100 may be a mobile electronic device or a non-mobile electronic device. For example, the mobile electronic device may be a mobile phone, a tablet computer, a laptop computer, a PDA, or an ultra-mobile personal computer (UMPC), and the non-mobile electronic device may be a server, a network attached storage (NAS), or a personal computer (PC).
[0046] Alternatively, in some cases, the host computer 100 may be implemented as an analog chip, a DSP (Digital Signal Process) chip, an MCU (Microcontroller Unit) chip or other chip with control functions, which is not strictly limited here.
[0047] The host computer 100 is configured to obtain a HIL device signal list document, which includes an excitation signal and a test signal type corresponding to each signal board in at least one signal board; based on the HIL device signal list document, send a corresponding target excitation signal to the test signal board in at least one signal board; based on the current test channel information of the test signal board, send a channel selection instruction to the fault injection board 300; and based on the target test signal type corresponding to the target excitation signal, send a test switching instruction to the signal testing module 400.
[0048] The HIL device 200 is electrically connected to the fault injection board 300 . The signal board to be tested in the HIL device 200 is configured to output a corresponding target response signal in response to a target stimulus signal.
[0049] The fault injection board 300 is configured to connect a target channel between the signal HIL device 200 and the signal testing module 400 in response to a channel selection instruction.
[0050] The signal testing module 400 is used to access the target test instrument corresponding to the target signal type to be tested in response to the test switching instruction, so that the target test instrument tests the target response signal; and transmit the test result of the target response signal to the host computer 100 until the stimulus test of each signal board in the HIL device 200 is completed in a traversal manner.
[0051] like Figure 1 As shown, when the board test system 1000 is connected to each part, the host computer 100 is electrically connected to the HIL device 200, the fault injection board 300 and the signal test module 400 respectively, the HIL device 200 is electrically connected to the fault injection board 300, and the signal test module 400 is electrically connected to the fault input board.
[0052] Specifically, the host computer 100 may be pre-configured with a corresponding test board engineering environment, so that the host computer 100 can normally control the signal board in the test HIL device 200. The host computer 100 receives the input of the HIL cabinet signal list document and performs corresponding document parsing.
[0053] The HIL cabinet signal list document contains a description of all harness signal flows within the HIL device 200. Specifically, the HIL cabinet signal list document may include board-related information corresponding to each signal board in the HIL device 200, such as the excitation signal corresponding to the signal board and the type of signal to be tested.
[0054] Examples of the aforementioned excitation signals include analog signals, digital signals, communication signals, and PWM (Pulse Width Modulation) signals. The signal type of the response signal corresponding to the excitation signal is the aforementioned type of the signal to be measured, such as an analog signal type or a PWM signal type. Different boards may output the same or different response signals in response to different excitation signals, and different test instruments are required to test different signal types.
[0055] After obtaining the HIL device signal list document, the host computer 100 searches the document for information related to the signal board under test, thereby determining the corresponding stimulus signal and the type of signal under test. Based on the searched information, the host computer 100 sends the target stimulus signal to the signal board under test. Upon receiving the target stimulus signal, the signal board under test generates a target response signal corresponding to the target stimulus signal based on the board's performance.
[0056] Furthermore, when specifically conducting the target channel between the signal HIL device 200 and the signal testing module 400, the host computer 100 may send a channel gating instruction to the fault injection board 300. The channel gating instruction may be used to instruct the fault injection board 300 to perform gating control on the target channel. The instruction format of the channel gating instruction complies with the communication protocol between the host computer 100 and the fault injection board 300 and is not described in detail here. In order to facilitate the fault injection board 300 to correctly gate based on the channel gating instruction, the channel gating instruction may specifically include relevant identification information of the target channel, such as the name, number, or identification code of the target channel, etc., which is not strictly limited here.
[0057] After receiving the channel selection instruction, the fault injection board 300 responds to the channel selection instruction and turns on the target channel between the signal HIL device 200 and the signal test module 400. The target channel is the output channel of the target response signal, and the target channel corresponds to the current test channel in the signal board to be tested.
[0058] Furthermore, to enable the use of appropriate test instruments to effectively measure the target response signal, the host computer 100 also determines the target test signal type corresponding to the target stimulus signal based on the HIL device signal list document. Based on the target test signal type, it sends a corresponding test switching instruction to the signal testing module 400. Upon receiving the test switching instruction, the signal testing module 400 connects to the target test instrument based on the current test requirements to effectively collect the target response signal on the target channel.
[0059] For example, if the target signal type to be measured is a PWM signal type, the target test instrument to be connected may be an oscilloscope. The target signal type to be measured here is the signal type of the target response signal.
[0060] After acquiring the test results corresponding to the target response signal, the target test instrument transmits the test results to the host computer 100. Upon receiving the test results, the host computer 100 can automatically compare and analyze them with the expected results to assess whether the HIL board performance meets the requirements. Alternatively, the host computer 100 can aggregate the test results of different boards to generate a stimulus test report, etc., which is then displayed and output. This embodiment does not impose strict restrictions on how the host computer 100 processes and applies these test results.
[0061] From the above description, it can be seen that an embodiment of the present application provides a board test system 1000, which includes a host computer 100, a HIL device 200, a fault injection board 300, and a signal test module 400. The host computer 100 can obtain a HIL device signal list document, and send a corresponding target stimulus signal to the signal board to be tested according to the HIL device signal list document, and control the target channel selection in the fault injection board 300 by sending instructions, and control the signal test module 400 to access the target test instrument to measure the target response signal, and the target test instrument outputs the test result to the host computer 100, and repeats this process until the automated stimulus test of the board in the HIL device 200 is achieved.
[0062] Compared with the manual excitation test scheme in the related art, the board test system 1000 of the embodiment of the present application utilizes the host computer 100 to automatically control the signal board in the test HIL device 200, and controls the channel selection and automatic switching of the test instrument through instructions to obtain the test results of the signal board to be tested. Since the above-mentioned overall automated board test process avoids manual excitation test operations to a great extent, it can realize the automated excitation test of the HIL board more efficiently and accurately, thereby effectively improving the overall board test efficiency and reducing test errors.
[0063] See below Figure 2 , Figure 2 This is another structural diagram of the board test system provided in the embodiment of the present application. Figure 2 As shown, according to some embodiments of the present application, optionally, in order to more reasonably implement the stimulus test of the signal board to be tested, the above-mentioned HIL device 200 and the fault injection board 300 are electrically connected through an ODU (Optical Distribution Unit) connector.
[0064] The host computer 100 is further configured to determine the signal board to be tested associated with the current interface name to be tested according to the current interface name to be tested of the ODU connector 500 .
[0065] For ease of understanding, the following is a detailed description using examples. In this embodiment, the HIL device 200 may be provided with multiple ODU interfaces, such as ODU1 interface, ODU2 interface, ODU3 interface, etc. Different ODU interfaces correspond to different signal boards.
[0066] For example, the signal boards corresponding to the ODU1 interface are signal board 1 and signal board 2, and the signal boards corresponding to the ODU2 interface are signal board 3 and signal board 4. For another example, the signal board corresponding to the ODU1 interface is signal board 1, and the signal board corresponding to the ODU2 interface is signal board 2. This embodiment does not impose a strict limitation on this.
[0067] In a further example, when the ODU interface into which the ODU connector 500 is inserted on the HIL device 200 is ODU1, the name of the current interface to be tested of the ODU connector 500 can be determined to be ODU1. The host computer 100 can obtain the name of the current interface to be tested of the ODU connector 500, ODU1, through external input or feedback from the HIL device 200, and determine the signal board to be tested associated with the current interface to be tested, ODU1, such as signal board 1, based on a pre-set correspondence between the ODU interface and the board in the HIL device 200.
[0068] In this way, the host computer 100 automatically determines the signal board to be tested through the interface name of the HIL device 200 connected to the ODU connector 500, and then searches for the relevant information of the signal board to be tested based on the HIL device signal list document to perform board excitation testing, further improving the board excitation test automation process in the embodiment of the present application and fully improving the test efficiency.
[0069] It should be added that when there are multiple signal boards to be tested associated with the current interface name to be tested of the above-mentioned ODU connector 500, the multiple signal boards to be tested can be stimulated and tested in sequence according to a preset test sequence, etc. This embodiment does not impose strict restrictions on this.
[0070] According to some embodiments of the present application, more specifically, the signal board under test includes multiple signal channels under test. The host computer 100 can be configured to determine target stimulus signals corresponding to the multiple signal channels under test of the signal board under test based on a HIL device signal list document, and sequentially send the corresponding target stimulus signals to the multiple signal channels under test, thereby completing automated stimulus testing of the entire signal board under test.
[0071] Furthermore, in a more specific embodiment, for a same signal board to be tested, different signal channels to be tested in the board have different channels corresponding to the fault injection modules.
[0072] See below Figure 3 , Figure 3 This is another structural diagram of the board test system provided in the embodiment of the present application. Figure 3 As shown, according to some embodiments of the present application, optionally, in order to more fully and reasonably implement the access of the target test instrument, the signal test module 400 specifically includes a switch unit 10 and N test instruments 20, where the N test instruments 20 include the target test instrument, and N is a positive integer;
[0073] The switch unit 10 is electrically connected to N test instruments 20 respectively;
[0074] The switch unit 10 is used to respond to a test switching instruction and enable the pin electrically connected to the target test instrument, so that the target test instrument is connected and tests the target response signal.
[0075] In this embodiment, Figure 3 As shown, the switching unit 10 can be provided between the target channel to be enabled in the fault injection board 300 and the N test instruments 20. The switching unit 10 is electrically connected to the host computer 100 and can receive a test switching instruction sent by the host computer 100 to control the pin corresponding to the target test instrument among the N test instruments 20 to be enabled and the pins corresponding to the remaining test instruments to be disabled, thereby achieving effective access to the target test instrument alone.
[0076] The N test instruments 20 mentioned above can all be electrically connected to the host computer 100 , so that any test instrument 20 among the N test instruments 20 can transmit the collected test results to the host computer 100 when needed.
[0077] In some more specific embodiments, in actual application, the switch unit 10 may be an RS485 relay. The N test instruments 20 include at least one of a 6.5-digit multimeter, a DC regulated power supply, a high-precision oscilloscope, and a signal generator test tool.
[0078] In one example, a signal board excitation test in the HIL device 200 requires a 6.5-digit multimeter, a DC regulated power supply, a high-precision oscilloscope, and a signal generator test tool, with an RS485 relay as the switch unit 10. In this way, the host computer 100 controls the switching of the RS485 relay to achieve automatic test instrument switching.
[0079] For example, when the target signal type to be tested is a PWM signal type, the RS485 relay enables the pin corresponding to the connection of the above-mentioned high-precision oscilloscope so that the high-precision oscilloscope is connected to the target channel for outputting the target response signal, thereby realizing the test result collection of the target response signal of the PWM signal type.
[0080] It should be added that, in addition to the RS485 relay, the above-mentioned switch switching unit 10 can also be a relay of other types, or in some feasible embodiments, the above-mentioned switch switching unit 10 can also be a plurality of transistors to realize the switching access function of different test instruments. This embodiment is not strictly limited here.
[0081] According to some embodiments of the present application, optionally, in order to facilitate accurate measurement of the target response signal generated by the signal board to be tested, the above-mentioned fault injection board 300 can be specifically used to respond to a channel selection instruction and connect the pin corresponding to the target channel to the effective selection potential end to achieve target channel selection.
[0082] In this embodiment, the fault injection board 300 includes a target channel (composed of pins PIN) corresponding to the channel in the aforementioned signal board to be tested. The fault injection board 300 may be provided with an effective strobe potential terminal, which may be, for example, a battery voltage potential terminal (VBAT) and / or a ground terminal (GND).
[0083] In a specific implementation, the fault injection board 300 can achieve gating of the target channel by connecting one or more pins corresponding to the target channel to the above-mentioned valid gating potential terminal. It should be supplemented that other idle channel pins in the fault injection board 300 can be left floating. Alternatively, the fault injection board 300 is provided with a non-valid gating potential terminal (such as a COM reference potential terminal), and the output or input signals of the signal board under test other than the above-mentioned target response signal can flow into the COM reference potential terminal to avoid affecting the measurement of the current target response signal.
[0084] According to some embodiments of the present application, optionally, in order to more fully ensure the reliability of the automated stimulus test of the signal board in the HIL device 200, the host computer 100 is further configured to receive an engineering configuration instruction to pre-configure the test board engineering environment in the test management software;
[0085] The test management software is adapted to the HIL device 200 .
[0086] In this embodiment, considering actual test scenarios, the experiment management software adapted to the HIL device 200 is, for example, NI Veristand. The NI Veristand software platform can be used to configure a test board engineering environment so that the host computer 100 can subsequently effectively implement automated stimulus testing of the signal board in the HIL device 200 based on the test board engineering environment.
[0087] According to some embodiments of the present application, optionally, in order to ensure that the test result of the target response signal can be effectively transmitted to the host computer 100, the above-mentioned signal testing module 400 is electrically connected to the host computer 100 via a universal serial bus (USB) serial port.
[0088] The host computer 100 is used to read the test results obtained by the target test instrument in the form of a serial port.
[0089] Furthermore, in combination with the above embodiment, the signal testing module 400 includes a switch unit 10 and N test instruments 20, and the test instruments can be connected to the host computer 100 via a USB cable. In this way, the test instruments can reliably transmit the corresponding test results to the host computer 100 via the USB serial port.
[0090] According to some embodiments of the present application, optionally, considering that the test instrument often needs to adjust parameters such as test accuracy and cursor position when conducting tests, in order to fully ensure that the target response signal can be accurately measured based on the target test instrument and to ensure that the host computer 100 can effectively control the measurement action of the test instrument, the host computer 100 can also be used to send operation instructions to the target test instrument through the USB serial port, so that the target test instrument can test the target response signal according to the specified action.
[0091] Thus, through the serial port connection, the host computer 100 can search for the corresponding serial port information and send the corresponding operation instructions to the target test instrument, so that the target test instrument can test the target response signal according to the specified action. After the target test instrument tests and obtains the test results, the host computer 100 can also obtain the measurement readings of the test instrument through the serial port connection.
[0092] In summary of the above embodiments, in a complete embodiment, when implementing automated stimulus testing of boards in a HIL device 200 based on the aforementioned board test system 1000, the present application first installs the test management software NI Veristand on the host computer and configures the test board engineering environment within the test management software NI Veristand, enabling the host computer 100 to properly control the signal boards in the HIL device under test. Furthermore, the present application utilizes an ODU connector 500 to cascade the HIL device 200 with the fault injection board 300, forming a closed-loop connection for the entire test system.
[0093] When performing automated stimulus testing, the HIL cabinet signal list document is used as input to the host computer 100. The signal board to be tested associated with the current ODU connector 500 is automatically determined based on the name of the current test interface of the ODU connector 500. The relevant information in the HIL cabinet signal list document is searched based on the signal board to be tested. In this way, the host computer 100 automatically controls the NI Veristand software to send the target stimulus signal corresponding to the signal board to be tested based on the searched relevant information, and sends a channel selection instruction to the fault injection board 300 based on the current test channel information in the signal board to be tested, so that the corresponding target channel in the fault injection board 300 is turned on. In addition, the host computer automatically controls the switching of the RS485 relay to connect to the corresponding target test instrument based on the test signal type of the target response signal corresponding to the target stimulus signal, thereby realizing the output signal reading or external signal reading, and completing the stimulus test of all channels in the ODU in a traversal manner.
[0094] Finally, the host computer 100 obtains the test data value of the test instrument via the serial port, automatically fills it into the stimulus test report, and compares the error between the actual measurement result and the expected result to evaluate whether the performance of the signal board in the HIL device 200 meets the standard.
[0095] In general, the board test system 1000 provided by the present application converts the manual stimulus test process into an automatic execution by a machine system. Compared with the traditional HIL board stimulus test solution, it can effectively get rid of the manual operation steps and reduce the personnel requirements, greatly improve work efficiency, and reduce the stimulus test time. At the same time, in this embodiment, the host computer can read the test instrument value based on the serial port form, and the host computer can adopt a certain average processing, thereby making the read value more accurate. In addition, considering that the stimulus test has many repeated test steps, the board test system 1000 provided by the present application is used to automatically execute the stimulus test steps, which is conducive to fully reducing human errors and can improve test reliability. Finally, in the traditional manual stimulus test solution, the test data value needs to be manually filled in the stimulus test report. The automated stimulus test method proposed in the present application can realize the automatic filling of the stimulus test report by reading the test instrument measurement value, which is more automated and intelligent.
[0096] Based on the same inventive concept, an embodiment of the present application provides a board card testing method, which is applied to a board card testing system provided by any of the aforementioned embodiments of the present application, and can be specifically implemented by a host computer in the card testing system.
[0097] See below Figure 4 , Figure 4 This is a flow chart of the board test method provided in the embodiment of the present application. Figure 4 As shown, the board test method includes:
[0098] S410, obtaining a HIL device signal list document, where the HIL device signal list document includes an excitation signal corresponding to each signal board in at least one signal board and a type of a signal to be measured;
[0099] S420, based on the HIL device signal list document, sending a corresponding target stimulus signal to a signal board to be tested in at least one signal board;
[0100] S430, based on the current test channel information of the signal board to be tested, sending a channel gating instruction to the fault injection board, so that the fault injection board switches on the target channel between the HIL device and the signal test module;
[0101] S440, based on the target test signal type corresponding to the target excitation signal, sends a test switching instruction to the signal test module, so that the signal test module is connected to the target test instrument corresponding to the target test signal type, and receives the test result obtained by the target test instrument for testing the target response signal corresponding to the target excitation signal, until the excitation test of each signal board in the HIL device is completed in a traversal manner.
[0102] From the above description, it can be seen that a board card testing method of an embodiment of the present application obtains a HIL device signal list document, and sends a corresponding target excitation signal to the signal board card to be tested according to the HIL device signal list document, and controls the target channel selection in the fault injection board card by sending instructions, and controls the signal test module to access the target test instrument to measure the target response signal, and the target test instrument outputs the test result to the host computer, and repeats this process until the automated excitation test of the board card in the HIL device is realized.
[0103] Compared with the manual excitation test scheme in the related art, the board card testing method of the embodiment of the present application can automatically control the signal board card in the HIL device based on the HIL device signal list document, and obtain the test results of the signal board card to be tested through instruction control channel selection and automatic switching of the test instrument. Since the above-mentioned overall automated board card testing process greatly avoids manual excitation test operations, it can realize the automated excitation test of the HIL board card more efficiently and accurately, thereby effectively improving the overall board card testing efficiency and reducing test errors.
[0104] It should be understood that, for the sake of brevity, the specific implementation process of the above steps 410 to 440 can refer to the corresponding description part above, and this embodiment will not be repeated here.
[0105] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium that can store or transmit information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROMs, flash memories, erasable ROMs (EROMs), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.
[0106] It should be noted that, in this article, the terms "comprises", "includes" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or apparatus that includes a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements that are inherent to such process, method, article or apparatus.
[0107] It should be understood that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. According to the embodiments described above in accordance with the present application, these embodiments do not describe all the details in detail, nor do they limit the application to only the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can make good use of the present application and modifications based on the present application. The present application is limited only by the claims and their full scope and equivalents.
[0108] This article uses specific examples to illustrate the principles and implementation methods of this application. The above examples are only used to help understand the method and core ideas of this application. The above are only preferred implementation methods of this application. It should be pointed out that due to the limitations of textual expression, there are objectively infinite specific structures. For ordinary technicians in this technical field, without departing from the principles of this application, they can make several improvements, modifications or changes, and can also combine the above technical features in an appropriate manner; these improvements, modifications, changes or combinations, or the direct application of the concept and technical solution of this application to other occasions without improvement, should be regarded as the scope of protection of this application.
Claims
1. A board test system, characterized in that: The board test system includes a host computer, a hardware-in-the-loop (HIL) device, a fault injection board, and a signal test module; the HIL device includes at least one signal board; The host computer is configured to obtain a HIL device signal list document, wherein the HIL device signal list document includes an excitation signal corresponding to each signal board in the at least one signal board and a type of a signal to be tested; and based on the HIL device signal list document, send a corresponding target excitation signal to the signal board to be tested in the at least one signal board; Sending a channel gating instruction to the fault injection board based on the current test channel information of the signal board to be tested; Sending a test switching instruction to the signal testing module based on the target signal to be tested type corresponding to the target excitation signal; The HIL device is electrically connected to the fault injection board, and the signal board to be tested in the HIL device is used to output a corresponding target response signal in response to the target stimulus signal; The fault injection board is configured to connect a target channel between the HIL device and the signal testing module in response to the channel gating instruction; The signal testing module is configured to access a target testing instrument corresponding to the target signal type to be tested in response to the test switching instruction, so that the target testing instrument tests the target response signal; And, the test result of the target response signal is transmitted to the host computer until the stimulus test of each signal board in the HIL device is completed in a traversal manner.
2. The board test system according to claim 1, wherein: The HIL device is electrically connected to the fault injection board via an optical distribution unit (ODU) connector; The host computer is further configured to determine the signal board to be tested associated with the current interface name to be tested according to the current interface name to be tested of the ODU connector.
3. The board test system according to claim 1, wherein: The signal testing module includes a switch unit and N testing instruments, wherein the N testing instruments include the target testing instrument, and N is a positive integer; The switch switching units are electrically connected to the N test instruments respectively; The switch switching unit is used to respond to the test switching instruction and enable the pin electrically connected to the target test instrument, so that the target test instrument is connected and tests the target response signal.
4. The board test system according to claim 3, characterized in that: The switch switching unit is an RS485 relay; The N test instruments include at least one of a six-and-a-half-digit multimeter, a DC regulated power supply, a high-precision oscilloscope, and a signal generator test tool.
5. The board test system according to claim 1, wherein: The fault injection board is specifically configured to connect the pin corresponding to the target channel to the effective gating potential terminal in response to the channel gating instruction, so as to realize gating of the target channel.
6. The board test system according to claim 1, wherein: The host computer is also used to receive engineering configuration instructions to pre-configure the test board engineering environment in the test management software; The test management software is adapted to the HIL equipment.
7. The board test system according to claim 1, wherein: The signal test module is electrically connected to the host computer via a universal serial bus (USB) serial port; The host computer is used to read the test result obtained by the target test instrument in a serial port format.
8. The board test system according to claim 7, characterized in that: The host computer is further configured to send an operation instruction to the target test instrument through the USB serial port, so that the target test instrument tests the target response signal according to a specified action.
9. The board test system according to claim 1, wherein: The signal board to be tested includes a plurality of signal channels to be tested; The host computer is used to sequentially send the corresponding target excitation signals to the multiple signal channels to be tested based on the HIL device signal list document.
10. A board testing method, characterized in that: The method is applied to the board test system according to any one of claims 1 to 9, and the method includes: Obtaining a HIL device signal list document, wherein the HIL device signal list document includes an excitation signal corresponding to each signal board of at least one signal board and a type of a signal to be measured; Based on the HIL device signal list document, sending a corresponding target stimulus signal to a signal board to be tested in the at least one signal board; Based on the current test channel information of the signal board to be tested, a channel gating instruction is sent to the fault injection board to enable the fault injection board to conduct the target channel between the HIL device and the signal test module; Based on the target signal type to be tested corresponding to the target excitation signal, a test switching instruction is sent to the signal test module to enable the signal test module to access the target test instrument corresponding to the target signal type to be tested, and receive the test result obtained by the target test instrument when testing the target response signal corresponding to the target excitation signal, until the excitation test of each signal board in the HIL device is completed in a traversal manner.
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