Integrated circuit

By adjusting the state of the internal capacitor array in the electronic pen and measuring the alternating magnetic field, the problem of resonant frequency deviation is solved, efficient reference resonant frequency matching is achieved, and the manufacturing efficiency and accuracy of the electronic pen are improved.

CN120447755APending Publication Date: 2025-08-08WACOM CO LTD
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Patent Information

Application Number
CN202510438817.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2019-12-13
Publication Date
2025-08-08

AI Technical Summary

Technical Problem

In the prior art, the resonance frequency adjustment of the electronic pen depends on the rating value of the capacitor, resulting in a reference resonance frequency deviation caused by manufacturing errors, resulting in a failure of adjustment or inefficiency.

Method used

By adjusting the status of some capacitor elements in the internal capacitor array in the electronic pen, combining the measurement of the alternating magnetic field, accurately adjusting the resonant frequency to match the standard value, the capacitor of the capacitor array is adjusted using an external device.

Benefits of technology

It realizes efficiently adjusting the reference resonance frequency while taking into account manufacturing errors, and improves the manufacturing efficiency and accuracy of the electronic pen.

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Abstract

The invention provides an integrated circuit. An integrated circuit for an electronic pen includes: an internal capacitor array including a first portion of a capacitive element and a second portion of the capacitive element, in which a state of the first portion of the capacitive element can be changed by a predetermined process, in which the second portion of the capacitive element and a coil constitute a resonance circuit; and a circuit coupled to the internal capacitor array, and the circuit, in operation, controls the electronic pen to transmit a signal using the resonant circuit.
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Description

[0001] This application is a divisional application of the application with PCT application number PCT / JP2019 / 049062, international application date December 13, 2019, Chinese application number 201980100860.3, and invention name “Method for adjusting the resonant frequency of the resonant circuit included in the electronic pen, electronic pen and method for producing an electronic pen”, which entered the Chinese national phase on March 29, 2022. Technical Field

[0002] The present invention relates to a method for adjusting the resonant frequency of a resonant circuit included in an electronic pen, the electronic pen, and a method for producing the electronic pen. Background Art

[0003] An electronic pen used in an electromagnetic resonance (EMR) input system includes an LC resonant circuit consisting of a coil excited by a magnetic field transmitted from a sensor coil of a position detection device and a capacitor connected in parallel with the coil (see, for example, Patent Documents 1 and 2). When this resonant circuit enters the magnetic field, an induced electromotive force is generated in the coil, thereby accumulating power in the resonant circuit. The electronic pen is configured to use this power to transmit pen information, including pen pressure information and side switch information.

[0004] Specific methods for transmitting pen information include methods that transmit the pen information as digital information by turning on or off the signal supply to the resonant circuit according to the content of the pen information, and methods that transmit the pen information as a shift in the resonant frequency by changing the resonant frequency of the resonant circuit according to the content of the pen information. Hereinafter, the resonant frequency of the resonant circuit in the former case and the resonant frequency serving as the reference for the shift in the latter case will be collectively referred to as the "reference resonant frequency."

[0005] In order for the position detection device to accurately receive pen information transmitted by the electronic pen, the resonant circuit's reference resonant frequency must be equal to a predetermined standard value. However, due to manufacturing variations in the coil's inductance and capacitor's capacitance, deviations in the reference resonant frequency are unavoidable immediately after the resonant circuit is assembled. Therefore, during the electronic pen manufacturing process, multiple capacitors are pre-arranged in parallel. After assembling the resonant circuit, the reference resonant frequency is measured. Based on the measurement result, the wiring is cut with a laser to disconnect several capacitors from the circuit, thereby subsequently aligning the reference resonant frequency with the standard value. Patent Document 1 discloses an example of an electronic pen configured to perform such reference resonant frequency matching.

[0006] Prior art literature

[0007] Patent Literature

[0008] Patent Document 1: Japanese Patent No. 6320231

[0009] Patent Document 2: International Publication No. 2016 / 056299 Summary of the Invention

[0010] Problems to be solved by the invention

[0011] However, conventionally, matching the reference resonant frequency is based on the rated capacitance values of the multiple capacitors within the resonant circuit. Specifically, the reference resonant frequency after wiring is cut is predicted based on the rated capacitance values of each capacitor, and the capacitors to be cut are selected based on this prediction.

[0012] However, actual capacitor capacitance values have manufacturing variations and are not always the same as the rated values. Consequently, if capacitors to be disconnected are selected based on their rated values as described above, there is a risk of over-disconnection leading to failure in adjusting the reference resonant frequency, and the adjustment process, such as capacitor selection and wiring disconnection, must be repeated multiple times, degrading efficiency.

[0013] Therefore, one object of the present invention is to provide a method for adjusting the resonant frequency of a resonant circuit included in an electronic pen, which can appropriately adjust a reference resonant frequency, an electronic pen, and a method for producing the electronic pen.

[0014] Technical solutions to problems

[0015] The method of the present invention is a method for adjusting the resonant frequency of a resonant circuit included in an electronic pen, wherein the electronic pen includes: a coil; an external capacitor; and an integrated circuit, including an internal capacitor array composed of a plurality of capacitor elements connected in parallel, the resonant circuit being composed of the coil, the external capacitor, and the internal capacitor array, the method including the following steps using an adjustment unit for adjusting the capacitance of the internal capacitor array and a measurement unit for measuring the alternating magnetic field generated by the resonant circuit: (1) a state changing step of changing the state of a predetermined portion of the plurality of capacitor elements constituting the internal capacitor array; and (2) an adjustment step of changing the state of a portion or all of one or more capacitor elements other than the portion of the plurality of capacitor elements constituting the internal capacitor array according to the amount of change in the reference resonant frequency of the resonant circuit changed by the change.

[0016] The electronic pen of the present invention includes: a coil; an external capacitor; and an integrated circuit, including an internal capacitor array composed of multiple capacitor elements connected in parallel, the internal capacitor array being composed of a mixture of a portion of capacitor elements whose states have been changed by a prescribed process and the remaining capacitor elements whose states have not been changed, and the electronic pen is configured to send signals using a resonant circuit composed of the coil, the external capacitor, and the remaining capacitor elements.

[0017] The method for producing an electronic pen of the present invention is a method for producing the electronic pen described above by executing the method described above.

[0018] Effects of the Invention

[0019] According to the present invention, the reference resonant frequency can be adjusted based on the estimation of the capacitance change amount of each of the plurality of capacitive elements, and thus the reference resonant frequency can be adjusted appropriately. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 1 is a diagram showing the appearance of the electronic pen 1 according to the first embodiment of the present invention.

[0021] Figure 2 Is configured in Figure 1 A top view of the structure in the housing 2 is shown.

[0022] Figure 3 1 is a diagram showing the circuit configuration of the electronic pen 1 and the integrated circuit 6 according to the first embodiment of the present invention.

[0023] Figure 4 is the minimum capacitance unit C MIN Schematic cross-sectional view of .

[0024] Figure 5 (a) represents the capacitor array C 1ARRAY FIG. 1 is a diagram showing a specific example of the structure of FIG. 1 , (b) is a diagram showing the capacitor C shown in (a) aTB 、C a1 ~C a9 Graph showing an example of the rated value, maximum value, minimum value, and manufacturing error of the capacitance change (=|C1-C0|) caused by application of the potential Vc for each of the electrodes.

[0025] Figure 6 (a) represents the capacitance of each capacitor C a Graph (b) shows the relationship between the rated value of the capacitance change caused by application of the potential Vc and the actual capacitance change caused by application of the potential Vc. (b) is an enlarged view of the vicinity of the origin of (a).

[0026] Figure 73 is a flowchart showing a process of adjusting the reference resonant frequency of the first resonant circuit performed by the external device 30 .

[0027] Figure 8 It means in Figure 7 Flowchart showing details of the reference resonant frequency adjustment process executed in step S6.

[0028] Figure 9 The minimum capacitance unit C of the modification of the first embodiment of the present invention is MIN Schematic cross-sectional view of .

[0029] Figure 10 1 is a diagram showing the circuit configuration of the electronic pen 1 and the integrated circuit 6 according to the second embodiment of the present invention.

[0030] Figure 11 This is a diagram showing the circuit configuration of the electronic pen 1 and the integrated circuit 6 according to the third embodiment of the present invention. DETAILED DESCRIPTION

[0031] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0032] Figure 1 This figure shows the appearance of a digital pen 1 according to the first embodiment of the present invention. As shown in this figure, the digital pen 1 comprises a cylindrical housing 2, a pen tip 3 disposed at one end of the housing 2 in its longitudinal direction, and an operating switch 4 provided on the surface of the housing 2. The operating switch 4 is referred to as a side switch when located on the side of the housing 2, and as a tail switch when located at the end of the housing 2.

[0033] The user of the electronic pen 1 moves the electronic pen 1 while holding the housing 2 with one hand and placing the pen tip 3 in contact with the touch surface of a position detection device (not shown), thereby inputting information into the position detection device. During input, the electronic pen 1 and the position detection device communicate using the aforementioned electromagnetic resonance (EMR) method. Through this communication, the electronic pen 1 transmits pen information, which includes pen pressure information indicating the pressure applied to the pen tip 3 and switch information indicating the on / off status of the operation switch 4. As will be described in detail later, the electronic pen 1 changes the resonant frequency of the resonant circuit based on the contents of the pen information, thereby transmitting the pen information as a shift in the resonant frequency.

[0034] Figure 2 Is configured in Figure 1 The figure also shows an external device 30 used to adjust the reference resonant frequency of the resonant circuit of the electronic pen 1. Figure 3 1 is a diagram showing the circuit configuration of the electronic pen 1 and the integrated circuit 6 .

[0035] like Figure 2 As shown, a substrate 5 is arranged in the housing 2, on the upper surface of which, in addition to Figure 1 In addition to the operation switch 4 shown, an integrated circuit 6, a variable capacitance capacitor VC, a fixed capacitance capacitor C B1 、C B2 And a plurality of pads 7. In addition, a coil L is arranged between the substrate 5 and the pen tip member 3. Although not shown, they are electrically connected by wiring etc. provided on the substrate 5. Variable capacitance capacitor VC, fixed capacitance capacitor C B1 、C B2 It is an external capacitor in the sense of being arranged outside the integrated circuit 6 .

[0036] Depend on Figure 3 It can be seen that the variable capacitance capacitor VC and the fixed capacitance capacitor C B1 、C B2 Together with the coil L, a resonant circuit (LC resonant circuit) of the electronic pen 1 is formed. In addition, a fixed-capacity capacitor C is provided. B1 、C B2 This is because only the capacitor array C provided in the integrated circuit 6 1ARRAY 、C 2ARRAY (described later) capacitance, the capacitance of the resonant circuit is insufficient, and in the future it will be possible to make the capacitor array C 1ARRAY 、C 2ARRAY When the capacitance is increased, it is not necessary to set the fixed capacitance capacitor C B1 、C B2 .

[0037] The external device 30 includes a measuring device 31 (measuring unit) for measuring the alternating magnetic field generated at the tip of the electronic pen 1 (the alternating magnetic field generated by the resonant circuit in the electronic pen 1); an adjusting device 32 (adjusting unit) for adjusting the capacitor array C 1ARRAY 、C 2ARRAY and a probe 33, connected to the integrated circuit 6 via a plurality of pads 7. The external device 30 is used in part of the manufacturing process of the electronic pen 1 in order to perform the capacitor array C 1ARRAY 、C 2ARRAY The device is installed in the electronic pen 1 after adjusting the capacitance, and is removed from the electronic pen 1 after the adjustment is completed.

[0038] Typically, the measurement device 31 is a tablet terminal that includes a CPU, memory, a touch sensor for detecting the position of the electronic pen 1, and a sensor controller. Measurement of the alternating magnetic field by such a measurement device 31 is performed as follows. First, the measurement device 31 causes a predetermined current to flow through the touch sensor, thereby generating a magnetic field on the upper surface of the touch sensor. When the coil L enters this magnetic field, an induced current is generated in the coil L, causing the resonant circuit within the electronic pen 1 to resonate. This generates an alternating magnetic field, and a current corresponding to the magnitude of the alternating magnetic field is generated in the touch sensor. The measurement device 31 measures the alternating magnetic field by measuring this current. Furthermore, as will be described in detail later, the electronic pen 1 is exclusively provided with two resonant circuits (the first and second resonant circuits described below) having different reference resonant frequencies. The active resonant circuit is switched by operating the operation switch 4. Therefore, when measuring the reference resonant frequency, it is preferable to appropriately operate the operation switch 4 depending on which of the two resonant circuits is being measured.

[0039] The measuring device 31 is further configured such that the CPU reads and executes a program stored in the memory, thereby being able to perform various processes required for setting the electronic pen 1. Such processes include obtaining the current value of the reference resonant frequency of the resonant circuit within the electronic pen 1 based on the measurement results of the alternating magnetic field, and adjusting the capacitor array C via the adjusting device 32 and the integrated circuit 6 based on the obtained current value and the reference value. 1ARRAY 、C 2ARRAY The capacitance of the electronic pen 1 is adjusted to adjust the reference resonant frequency of the resonant circuit in the electronic pen 1. Figures 5 to 8 Provide detailed explanation.

[0040] The adjustment device 32 is a device composed of electronic components included in a printed circuit assembly (PCA) board, and is connected to the integrated circuit 6 via a probe 33. The adjustment device 32 receives a signal including a capacitor array C from the measuring device 31. 1ARRAY 、C 2ARRAY The specific adjustment content of the capacitance (capacitance adjustment setting instruction) is indicated, and the capacitor bit area (described later) in the integrated circuit 6 is written according to the instruction, thereby performing the capacitor array C 1ARRAY 、C 2ARRAY Capacitor adjustment.

[0041] Focusing on the interior of the electronic pen 1 again, the variable capacitance capacitor VC is a capacitor whose capacitance changes according to the writing pressure applied to the pen tip member 3. B1 、C B2 They are respectively connected in parallel to variable capacitance capacitors VC, and play a role in adjusting the reference resonance frequency of the resonance circuit of the electronic pen 1 during the design stage.

[0042] The integrated circuit 6 is configured to include: a control circuit 10 including a memory 11; a switch 12; and two capacitor arrays C 1ARRAY 、C 2ARRAY (internal capacitor array); terminals C1P, C1M, C2P, C2M connected to the resonant circuit; and various pins for receiving voltage, current, signals, and instructions from the external device 30 (external adjustment unit). Figure 2 The multiple pads 7 shown are connected one-to-one, and typically include: a power supply terminal VPP, which receives the supply of potential VPP from the external device 30; a power supply terminal VDD, which receives the supply of potential VDD (<VPP) from the external device 30; a ground terminal GND, which receives the supply of ground potential GND (<VDD) from the external device 30; a data terminal SDAT, which receives the supply of arbitrary data SDAT (current) including instructions from the external device 30; a clock terminal SCLK, which receives the supply of action clock signal SCLK from the external device 30; and a preparation terminal PIO. In addition, the preparation terminal PIO can be connected to the external device 30 or to other devices not shown. In addition, each terminal (including pin) provided on the integrated circuit 6 is preferably an I according to the specification of the serial bus. 2 C terminal.

[0043] The terminal C1P is connected to one end of the variable capacitance capacitor VC and the fixed capacitance capacitor C outside the integrated circuit 6. B1 、C B2 One end of each is connected to one end of the coil L. In addition, the terminal C2P is short-circuited with the terminal C1P outside the integrated circuit 6. The terminal C1M is connected to the other end of the variable capacitance capacitor VC and the fixed capacitance capacitor C outside the integrated circuit 6. B1 The other end of the coil L and one end of the operating switch 4 are connected together. Terminal C2M is connected to the fixed capacitance capacitor C outside the integrated circuit 6. B2 The other end of and the other end of the operation switch 4 are connected together.

[0044] For the purpose of explanation, it is assumed that the terminals C1P and C1M and the terminals C2P and C2M in the integrated circuit 6 are open. When the operating switch 4 is off, the variable capacitance capacitor VC and the fixed capacitance capacitor C B1 The first resonant circuit is connected in parallel with the coil L, and the combined capacitance of these components and the coil L forms a resonant circuit. Hereinafter, this resonant circuit will sometimes be referred to as the "first resonant circuit." Because it includes the variable capacitance capacitor VC, the resonant frequency of the first resonant circuit changes according to the writing pressure. Therefore, using the first resonant circuit, the writing pressure is transmitted as a shift in the resonant frequency.

[0045] On the other hand, when the operation switch 4 is turned on, the variable capacitance capacitor VC and the fixed capacitance capacitor C B1 and fixed capacity capacitor C B2 This is connected in parallel with coil L, and the combined capacitance of these components and coil L forms a resonant circuit. Hereinafter, this resonant circuit will sometimes be referred to as the "second resonant circuit." Because it includes a variable-capacitance capacitor VC, the resonant frequency of the second resonant circuit also changes according to the writing pressure. Therefore, using the second resonant circuit also enables the transmission of writing pressure as a shift in the resonant frequency.

[0046] In addition, the second resonant circuit is a circuit in which a fixed-capacity capacitor C is added to the first resonant circuit. B2 Due to the structure, the second resonant circuit and the first resonant circuit have different ranges of resonant frequency shifts corresponding to writing pressure. Therefore, by switching the first and second resonant circuits based on the on / off state of the operation switch 4, it is possible to transmit the switching information as a resonant frequency shift.

[0047] Capacitor array C 1ARRAY The structure is formed by connecting a plurality of capacitor elements CD in parallel between the terminals C1P and C1M. The plurality of capacitor elements CD are connected by switches S a , capacitor C a and switch S b Each capacitor C is connected in series. a The capacitor array C is connected in parallel between the terminals C1P and C1M. 1ARRAY It constitutes a part of each of the first and second resonant circuits.

[0048] In addition, the capacitor array C 2ARRAY The structure is formed by connecting a plurality of capacitor elements CD in parallel between the terminals C2P and C2M. The plurality of capacitor elements CD are connected by switches S a , capacitor C a and switch S b Each capacitor C is connected in series. a The capacitor array C is connected in parallel between the terminals C2P and C2M. 2ARRAY Forms part of the second resonant circuit.

[0049] More specifically, the capacitor array C 1ARRAY 、C 2ARRAY Each capacitor C a By respectively combining a plurality of capacitors of predetermined capacitance (hereinafter referred to as "minimum capacitance unit C MIN ”) is connected in parallel. Therefore, each capacitor C a The capacitance value becomes the minimum capacitance unit CMIN The capacitance value of each minimum capacitance unit C MIN They are formed on the same substrate using the same process and therefore can be considered to have the same physical properties.

[0050] Figure 4 is the minimum capacitance unit C MIN As shown in the figure, the minimum capacitance unit C MIN It has a structure in which an insulating film 21, a floating gate 22, and a gate electrode 23 are sequentially stacked on a substrate 20. This structure is similar to a floating gate flash memory, but differs from a flash memory in that it may or may not have a source and a drain.

[0051] The substrate 20 is made of an n-type semiconductor such as a silicon substrate doped with n-type impurities. The insulating film 21 is made of an insulating material such as silicon oxide or silicon nitride. The gate electrode 23 is made of a conductive material such as a conductive metal.

[0052] The floating gate 22 is made of an n-type semiconductor such as polysilicon doped with n-type impurities. However, before adjusting the resonant frequency, the floating gate 22 is depleted and is in a state where no charge is injected (initial state). Therefore, when the minimum capacitance unit C is MIN When the electrostatic capacitance of is set to C0, C0 is expressed by the following formula (1). OX is the electrostatic capacitance of the insulating film 21 .

[0053] [Formula 1]

[0054] In addition, switch S a The structure is to have: a capacitor C corresponding to the structure a More than one minimum capacitance unit C MIN The common terminal to which the respective gate electrodes 23 are connected; the first selection terminal connected to the terminal C1P or the terminal C2P; and the second selection terminal to which the potential Vc is supplied. b The structure is to have: a capacitor C corresponding to the structure a More than one minimum capacitance unit C MIN The common terminal connected to each substrate 20 (so-called back gate); the first selection terminal connected to the terminal C1M or the terminal C2M; and the second selection terminal supplied with the ground potential GND. In this embodiment, the potential Vc is a potential higher than the ground potential GND. Each switch S a 、S b In the initial state, the common terminal and the first selection terminal are connected.

[0055] return Figure 3The control circuit 10 adjusts the capacitor array C according to the instruction from the external device 30. 1ARRAY 、C 2ARRAY Specifically, according to the instruction from the external device 30, the capacitor array C is changed by using the control signal BC1. 1ARRAY The state of each capacitive element CD in the capacitor array C is adjusted 1ARRAY The reference resonant frequencies of the first and second resonant circuits are adjusted by adjusting the capacitance of the capacitor array C and the reference resonant frequencies of the first and second resonant circuits. The capacitor array C is changed by using the control signal BC2 according to the instruction from the external device 30. 2ARRAY The state of each capacitive element CD in the capacitor array C is adjusted 2ARRAY The capacitance of the second resonant circuit is adjusted by adjusting the reference resonant frequency of the second resonant circuit. The capacitance element CD is a control unit for the state change of the control circuit 10. In this embodiment, the state of each capacitance element CD is changed by changing one or more minimum capacitance units C constituting the capacitance element CD. MIN The capacitance of each capacitor is changed from the aforementioned C0 (initial state) to C1 (changed state) described later. Details of the changed state will be described later.

[0056] In the memory 11 of the control circuit 10, a capacitor bit area is provided for each capacitor element CD, which stores a value indicating whether its state should be changed. This value is written into the capacitor bit area by the external device 30 using the above-mentioned data SDAT. The control circuit 10 is configured to generate control signals BC1 and BC2 based on the values stored in the capacitor bit area and supply them to the capacitor array C. 1ARRAY 、C 2ARRAY .

[0057] Furthermore, the control circuit 10 is configured to have a function of generating a potential Vc based on a potential VPP or a potential VDD supplied from an external device 30. When the control circuit 10 starts changing the reference resonant frequency, it starts to supply the generated potential Vc to each switch S. a The second selection terminal is supplied, and with respect to each switch S b The second selection terminal of is connected to the ground potential GND supplied from the external device 30.

[0058] When the reference resonant frequency is changed, the control circuit 10 controls the capacitor array C 1ARRAY Among the plurality of capacitance elements CD included, the capacitance element CD storing the value indicating the change state in the capacitor bit region generates a value for switching the corresponding switch S. a 、S b The control signal BC1 is switched to the second selection terminal side and supplied to the corresponding switch S a 、S bThen, after a specified time, a signal is generated to turn on the corresponding switch S a 、S b The control signal BC1 is switched to the first selection terminal side and supplied to the corresponding switch S a 、S b .

[0059] In addition, the control circuit 10 controls the capacitor array C 2ARRAY Among the plurality of capacitance elements CD included, the capacitance element CD storing the value indicating the change state in the capacitor bit region generates a value for switching the corresponding switch S. a 、S b The control signal BC2 is switched to the second selection terminal side and supplied to the corresponding switch S a 、S b Then, after a specified time, a signal is generated to turn on the corresponding switch S a 、S b The control signal BC2 is switched to the first selection terminal side and supplied to the corresponding switch S a 、S b .

[0060] The control circuit 10 generates and supplies the control signals BC1 and BC2 as described above, thereby controlling the capacitor C in the capacitance element CD storing a value indicating a changed state in the capacitor bit region. a , apply potential Vc within a specified time.

[0061] Here again, refer to Figure 4 When the potential Vc is applied, the electrons in the substrate 20 are attracted to the vicinity of the boundary with the insulating film 21, and some of them move to the floating gate 22 due to the tunnel effect. The electrons thus accumulated in the floating gate 22 remain in the floating gate 22 even after the application of the potential Vc ends. In other words, the floating gate 22 is in a state of being injected with charge. As a result, a depletion layer is formed in the floating gate 22. Therefore, if the electrostatic capacitance of this depletion layer is represented by C D , then the minimum capacitance unit C MIN The capacitance change is a value C1 represented by the following formula (2). In this way, the state of the capacitive element CD is changed.

[0062] [Formula 2]

[0063] From the formula (2), we know that the value C1 is the electrostatic capacitance C with the insulating film 21. OX and the electrostatic capacitance C of the depletion layer D The value corresponding to the series connection. In addition, the electrostatic capacitance C of the depletion layer DThe potential Vc varies depending on the width of the depletion layer, but can eventually be stabilized at a constant value by injecting sufficient charge to completely deplete the floating gate 22. Therefore, it is preferable to continue applying the potential Vc until the floating gate 22 is completely depleted.

[0064] As mentioned above, the capacitor array C 1ARRAY Therefore, by forming a portion of each of the first and second resonant circuits, the capacitor array C 1ARRAY Each capacitor C a More than one minimum capacitance unit C MIN Electrons are individually injected into the floating gates 22 , thereby individually switching the state of each capacitive element CD from the aforementioned initial state to the aforementioned changed state, thereby changing the reference resonant frequencies of the first and second resonant circuits.

[0065] In addition, as mentioned above, the capacitor array C 2ARRAY Therefore, the reference resonant frequency of the second resonant circuit is also changed as follows: As described above, the reference resonant frequency of the second resonant circuit is changed to the capacitor array C 2ARRAY Each capacitor C a More than one minimum capacitance unit C MIN Electrons are individually injected into the respective floating gates 22 , thereby individually switching the state of each capacitor element CD from the aforementioned initial state to the aforementioned changed state.

[0066] Other processing performed by the control circuit 10 will be described. The control circuit 10 also has a function of controlling the validity / invalidity of the operating switch 4 based on an instruction from the external device 30 supplied using the above-mentioned data SDAT. Specifically, first, the switch 12 is connected between the terminal C1M and the terminal C2M. When the control circuit 10 is instructed to invalidate the operating switch 4, it generates an enable signal SSWEN that turns on the switch 12 and supplies it to the switch 12. As a result, the terminal C1M and the terminal C2M are short-circuited inside the integrated circuit 6, and the operating switch 4 becomes invalid. In addition, when the control circuit 10 is instructed to validate the operating switch 4, it generates an enable signal SSWEN that turns off the switch 12 and supplies it to the switch 12. As a result, the terminal C1M and the terminal C2M are disconnected inside the integrated circuit 6, and the operating switch 4 becomes valid.

[0067] The free area within the memory 11 is used to store the pen ID and other information used to distinguish the electronic pen 1 from other electronic pens. The information stored in the free area is also written by the external device 30 using the aforementioned data SDAT. Furthermore, the electronic pen 1 can transmit the pen ID stored in the free area within the memory 11 to the position detection device as part of the pen information. This allows the position detection device to perform different processing for each electronic pen 1 (for example, processing to change the drawing color for each electronic pen 1).

[0068] Next, refer to Figures 5 to 8 The processing performed by the external device 30 to adjust the reference resonant frequencies of the first and second resonant circuits will be described in detail. 1ARRAY The case of adjusting the reference resonant frequency of the first resonant circuit by adjusting the capacitance value will be described.

[0069] Figure 5 (a) represents the capacitor array C 1ARRAY The capacitor array C shown in the figure is a specific example of the structure. 1ARRAY The structure is composed of 10 capacitors C aTB 、C a1 ~C a9 As capacitor C a In addition, Figure 5 In (a), only Figure 3 The structure of the electronic pen 1 shown in FIG. 1ARRAY The relevant parts are extracted, but the actual structure is as follows Figure 3 shown.

[0070] Figure 5 (b) represents the capacitor C aTB 、C a1 ~ Ca9 The figure shows an example of the rated value, maximum value, minimum value and manufacturing error of the capacitance change (= |C1-C0|) caused by the application of the potential Vc. In the example of this figure, the minimum capacitance unit C MIN The capacitance variation is rated at 0.5fF, so the capacitor C aTB 、C a1 ~C a9 The rated value of the capacitance change is an integer multiple of 0.5fF. aTB 、C a1 ~C a9 The respective capacitance change amounts are set to different values.

[0071] More specifically, if Figure 5 As shown in (b), the capacitor Ca(9-k) (k is an integer from 0 to 8) The rated value of the capacitance change is set to the minimum capacitance unit C MIN The value obtained by multiplying the rated value of 0.5fF of the capacitance change by approximately 2 to the power of k. This is to make the capacitor array C as efficient as possible over a wide range. 1ARRAY On the other hand, the capacitor C aTB The rated value of the capacitance change is set as the capacitor C a1 ~C a9 The capacitance change is between the maximum and minimum values (for example, 10fF). The details will be explained below. aTB To estimate the capacitor C a1 ~C a9 The manufacturing error caused by the capacitance variation is reduced by aTB Setting the rated value of to such a value can improve the estimation accuracy.

[0072] Figure 6 (a) represents each capacitor C a A graph showing the relationship between the rated value of the capacitance change caused by the application of the potential Vc and the actual capacitance change caused by the application of the potential Vc. Figure 6 (b) is to Figure 6 This is an enlarged view of the vicinity of the origin in (a). As mentioned above, the capacitor C aTB 、C a1 ~C a9 Each of the minimum capacitor units C is formed on the same substrate 20 by the same process. MIN Therefore, the capacitor C aTB 、C a1 ~C a9 The manufacturing errors generated in each are substantially the same value. For example, if the capacitor C aTB A +15% manufacturing error occurs in the capacitor C. a1 ~C a9 There is also a +15% manufacturing error in each. In addition, for example, in the case of capacitor C aTB A -15% manufacturing error occurs in the capacitor C a1 ~C a9 There is a -15% manufacturing error in each. Figure 6 (a) and Figure 6 As shown in (b), each capacitor C a The relationship between the rated value of the capacitance change caused by the application of the potential Vc and the actual capacitance change caused by the application of the potential Vc is plotted on a straight line having a slope corresponding to the magnitude of the manufacturing error. Hereinafter, the slope of this straight line is referred to as the "capacitance change gradient."

[0073] The external device 30 utilizes such a capacitor C aTB 、C a1 ~C a9 The properties of the capacitor C are estimated with high accuracy a1 ~C a9 The capacitance change amount is estimated, and the reference resonant frequency of the first resonant circuit is adjusted based on the estimated capacitance change amount. The processing performed by the external device 30 will be described in detail below with reference to the processing flow chart.

[0074] Figure 7 1 is a flowchart showing the adjustment process of the reference resonant frequency of the first resonant circuit by the external device 30. This process is performed as part of the manufacturing process of the electronic pen 1. In the following description, the capacitor C may be included. aTB The capacitive element CD is called the "test bit" and will contain capacitors C a1 ~C a9 The multiple capacitive elements CD are respectively called "adjustment bits".

[0075] First, if Figure 7 As shown, the external device 30 measures the reference resonant frequency of the first resonant circuit (step S1. First measurement step). Next, the external device 30 changes the state of the test bit (a predetermined portion of the capacitor element CD) by writing to the capacitor bit area and causing the control circuit 10 to perform a predetermined process (step S2. State change step). In this embodiment, the predetermined process is to apply a potential Vc to the capacitor C included in the capacitor element CD. a The floating gate 22 (refer to Figure 4 ) injects charge, so that the capacitor C a Then, the reference resonant frequency of the first resonant circuit is measured again (step S3. Second measurement step), and the actual capacitance change of the test bit is estimated based on the reference resonant frequencies (reference resonant frequencies before and after the state change of the test bit) measured in steps S1 and S3 (step S4. First estimation step). Specifically, the actual capacitance change C of the test bit is calculated based on the following formula (3). aTBr Where, L in formula (3) is Figure 3 The inductance of the coil L is shown. In addition, f1 is the reference resonant frequency measured in step S1, and f2 is the reference resonant frequency measured in step S3.

[0076] [Formula 3]

[0077] Next, the external device 30 calculates the reference capacitance based on the estimated capacitance change of the test bit and the rated value of the capacitance change of the test bit. Figure 6 The capacitance change gradient described is calculated (i.e., the manufacturing error common to the test bit and the plurality of adjustment bits). For example, if the estimated capacitance change of the test bit is 15% greater than the rated value of the capacitance change of the test bit, the capacitance change gradient is calculated to be 1.15. Then, based on the calculated capacitance change gradient, the actual capacitance change of each adjustment bit is estimated (step S5. Second estimation step). For example, if the calculated capacitance change gradient is 1.15, it is estimated that the capacitor C with a rated capacitance change of 30 fF is included. a3 Capacitor components (refer to Figure 5 The actual capacitance change in (b) is 30×1.15=34.5 fF. The external device 30 then performs a reference resonant frequency adjustment process to adjust the reference resonant frequency of the first resonant circuit based on the actual capacitance change of each adjustment position estimated in step S6 (step S6: adjustment step).

[0078] Figure 8 It means in Figure 7 Flowchart showing details of the reference resonant frequency adjustment process performed in step S6 of the present invention. In this process, the following process is performed by the external device 30: when the difference between the reference resonant frequencies before and after the state change of the test bit is relatively large, one or more capacitor elements CD to be changed in state are selected so that the total rated value of the capacitance change of the one or more capacitor elements CD whose state is changed becomes smaller than when the difference is relatively small, and the state of the selected one or more capacitor elements CD (part or all of the adjustment bits) is changed. Specifically, as Figure 8 As shown, the external device 30 first determines whether the last measured reference resonant frequency falls within the target adjustment range (step S10). The target adjustment range is the range of reference resonant frequency values required for normal communication with the position detection device and is determined by the specifications of the electronic pen. If the determination result in step S10 is positive, the external device 30 returns "Adjustment OK" and the process ends.

[0079] On the other hand, if the determination result in step S10 is negative, the external device 30 determines whether the reference resonant frequency can be adjusted so as to fall within the target adjustment range (step S11). Specifically, the capacitance change for each adjustment bit estimated in step S6 is used to estimate the reference resonant frequency that would be obtained if the potential Vc were applied to all adjustment bits. If the reference resonant frequency measured in step S3 and the estimated reference resonant frequency fall within at least a portion of the target adjustment range, adjustment is determined to be possible; otherwise, adjustment is determined to be impossible. If adjustment is determined to be impossible, the external device 30 returns "Adjustment NG" and terminates the process. In this case, the electronic pen 1 being processed is deemed defective and is discarded.

[0080] The external device 30, which has obtained the result of adjustment being possible in step S11, selects the adjustment bit to be changed in state for rough adjustment based on the capacitance change of each adjustment bit (the value estimated in step S6) and the difference between the last measured reference resonant frequency and the adjustment target (for example, the value closest to the last measured reference resonant frequency among the values included in the adjustment target range) (step S12). This selection is performed, for example, by changing the state of only the adjustment bits with relatively large capacitance change (for example, the values including capacitors C a1 ~C a4 The four capacitive elements CD) are selected as the objects to be selected, and the adjustment is performed in a manner as close to the adjustment target as possible within a range in which the reference resonant frequency does not exceed the adjustment target.

[0081] Next, the external device 30 determines whether one or more adjustment bits whose states have been changed have been selected in step S12 (step S13). If the external device 30 determines that one or more adjustment bits have been selected, it writes data to the capacitor bit region, causing the control circuit 10 to perform the aforementioned predetermined processing, thereby changing the state of the selected adjustment bits (step S14). The reference resonant frequency of the first resonant circuit is then measured again (step S15).

[0082] When step S15 is completed, or when it is determined in step S13 that no adjustment has been selected, the external device 30 selects the adjustment bit to be changed for fine adjustment based on the capacitance change of each adjustment bit (the value estimated in step S6) and the difference between the last measured reference resonant frequency and the adjustment target (step S16). This selection is performed, for example, by changing only the adjustment bits with relatively small capacitance change (for example, each including capacitor C a5 ~C a9The five capacitor elements (CD) are selected as the target and adjusted as close to the target frequency as possible. Furthermore, the coarse adjustment in steps S12 to S14 and the fine adjustment in steps S16 to S18 are performed separately because it is difficult to accurately predict the reference resonant frequency that will be achieved as a result of the change before the capacitor element state is actually changed.

[0083] Next, the external device 30 determines whether one or more adjustment bits whose states have been changed were selected in step S16 (step S17). If it is determined that one or more adjustment bits have been selected, the external device 30 writes data to the capacitor bit region, causing the control circuit 10 to perform the aforementioned predetermined processing, thereby changing the state of the selected adjustment bits (step S18). The reference resonant frequency of the first resonant circuit is then measured again (step S19).

[0084] When step S19 is completed, or when it is determined in step S17 that no one has been selected, the external device 30 returns the process to step S10. Thus, the above-mentioned process is repeated, and the process ends with either adjustment OK or adjustment NG as the result.

[0085] Here, in the description so far, the capacitor array C 1ARRAY The reference resonant frequency of the first resonant circuit is adjusted by adjusting the capacitance value. However, after the adjustment of the reference resonant frequency of the first resonant circuit is completed, the capacitor array C 2ARRAY The same is true for adjusting the reference resonant frequency of the second resonant circuit by adjusting the capacitance value of the capacitor array C. 2ARRAY Multiple minimum capacitance units C MIN The capacitor array C 1ARRAY Multiple minimum capacitance units C MIN Since it is formed on the same substrate using the same process, there is no need to repeat Figure 7 In steps S1 to S5, the reference resonant frequency of the first resonant circuit is adjusted using Figure 7 The capacitance change gradient calculated in step S5 is calculated based on the capacitor array C 2ARRAY Each capacitor element CD is the object of Figure 8 The reference resonant frequency adjustment process shown is sufficient. There is no need to add capacitor array C 2ARRAY However, it is of course possible to set the test bit in the capacitor array C 2ARRAY The test bit is set in the internal circuit to adjust the reference resonant frequency of the second resonant circuit separately from the reference resonant frequency of the first resonant circuit. Figure 7 Steps S1 to S5.

[0086] As described above, according to the manufacturing method of the electronic pen 1 of this embodiment, when the capacitor C having a floating gate is used, a When each capacitive element CD is configured as described above, the reference resonant frequency can be adjusted based on the capacitance change amount of each of the plurality of adjustment bits estimated using the test bit, thereby appropriately adjusting the reference resonant frequencies of the first and second resonant circuits.

[0087] Furthermore, according to the integrated circuit 6 of this embodiment, in the capacitor array C 1ARRAY 、C 2ARRAY The plurality of capacitor elements CD include the capacitor element CD for testing that must be switched to a changed state in the manufacturing stage, and therefore the capacitance change amount of each of the plurality of adjustment bits can be estimated.

[0088] In addition, in this embodiment, the example of forming the floating gate 22 with an n-type semiconductor is described, but the floating gate 22 may be formed with a p-type semiconductor such as polysilicon doped with p-type impurities. Figure 9 Provide explanation.

[0089] Figure 9 The minimum capacitance unit C of the modification of the first embodiment of the present invention is MIN The example shown in this figure is different from the example in that the substrate 20 is composed of a silicon substrate doped with p-type impurities (p-type semiconductor), the floating gate 22 is composed of polysilicon doped with p-type impurities (p-type semiconductor), and the potential Vc is lower than the ground potential GND. Figure 4 The examples shown are different.

[0090] Based on Figure 9 Example of the minimum capacitance unit C MIN As described above, when the potential Vc is applied for a predetermined time, the holes (positive holes) existing in the substrate 20 are attracted to the vicinity of the boundary with the insulating film 21, and part of them move to the floating gate 22 due to the tunnel effect. Moreover, the holes accumulated in the floating gate 22 remain in the floating gate 22 even after the application of the potential Vc ends. Therefore, since the floating gate 22 is depleted, the Figure 4 Example of the minimum capacitance unit C MIN Likewise, the minimum capacitance unit C can be changed by the control circuit 10. MIN In this case, the above-mentioned predetermined process is also to apply the potential Vc to the capacitor C included in the capacitance element CD. a The floating gate 22 injects charge, thereby making the capacitor C a In addition, the capacitance value changes Figure 9In the example, it is also preferable to continue the application of the potential Vc until the floating gate 22 is completely depleted to stabilize the electrostatic capacitance of the depletion layer.

[0091] Alternatively, instead of using a floating gate flash memory, a structure similar to a charge trap flash memory may be used to form the minimum capacitance unit C. MIN In this case, the above-mentioned predetermined process is a process of injecting charge into the charge trap insulating film of the capacitor included in the capacitance element CD by applying a predetermined potential, thereby changing the capacitance value of the capacitor.

[0092] Next, a second embodiment of the present invention will be described. In this embodiment, each capacitor element CD includes a fuse element H instead of a switch S. a 、S b This point is different from the first embodiment, and other points are the same as the first embodiment. Therefore, the same reference numerals are given to the same structures, and the following description focuses on the differences from the first embodiment.

[0093] Figure 10 1 is a diagram showing the circuit configuration of the electronic pen 1 and the integrated circuit 6 of this embodiment. As shown in this diagram, the capacitive element CD of this embodiment includes a capacitor C b and fuse element H are connected in series. Capacitor C b The specific type is not particularly limited, and various capacitors generated in the semiconductor manufacturing process such as MIM (Metal-Insulator-Metal) and MOM (Metal-Oxide-Metal) can be used as capacitor C b .

[0094] In this embodiment, the state of the capacitor element CD is changed by applying a predetermined voltage to the fuse element H included in the capacitor element CD, thereby changing the fuse element H from an uncut state (initial state) to a cut state (changed state). In other words, the predetermined process in this embodiment is a process of cutting the fuse element H included in the capacitor element CD as the processing target.

[0095] Specifically, the external device 30 Figure 7 Step S2, or Figure 8 If the state of a specific capacitor element CD is to be changed in steps S14 and S18, the control circuit 10 is controlled to supply a control signal BC1 for cutting the fuse element H in the capacitor element CD. As a result, the fuse element H is cut, and the corresponding capacitor C bThe state of the corresponding capacitor element CD is changed. The capacitance change of the capacitor element CD caused by the disconnection of the fuse element H becomes the capacitance of the capacitor C. b electrostatic capacitance.

[0096] In this embodiment, the capacitor array C 1ARRAY 、C 2ARRAY Therefore, according to the manufacturing method of the electronic pen 1 of this embodiment, in the case of including the capacitor C b When each capacitive element CD is configured as a series-connected fuse element H, the reference resonant frequency can be adjusted based on the estimated capacitance change of each of the plurality of adjustment bits using the test bit, thereby appropriately adjusting the reference resonant frequencies of the first and second resonant circuits.

[0097] Furthermore, according to the integrated circuit 6 of this embodiment, in the capacitor array C 1ARRAY 、C 2ARRAY The plurality of capacitor elements CD include the capacitor element CD for testing that must be switched to a changed state in the manufacturing stage, and therefore the capacitance change amount of each of the plurality of adjustment bits can be estimated.

[0098] In addition, in this embodiment, the capacitors C b This example shows a fuse element H connected in series, but it can also be applied to other types of elements. For example, the anti-fuse element can be connected to each capacitor C b A MEMS switch such as a MEMS (Micro Electro Mechanical Systems) cantilever may be used for the series connection.

[0099] In contrast to the fuse element H, the anti-fuse element is initially non-conductive but becomes conductive (changed) when a voltage greater than a predetermined value is applied. Therefore, the control circuit 10 can change the state of each capacitor element CD by turning on the anti-fuse element within it. In this case, the aforementioned predetermined processing is performed to turn on the anti-fuse element included in the capacitor element CD being processed.

[0100] A MEMS switch is an element that can be switched on or off by applying a voltage. Alternatively, the initial state of the MEMS switch, either on or off, can be used. The control circuit 10 can change the state of each capacitor element CD by switching the MEMS switch within the capacitor element CD on or off. In this case, the aforementioned predetermined processing becomes a process of switching the MEMS switch included in the capacitor element CD being processed on or off.

[0101] Next, the third embodiment of the present invention will be described. This embodiment differs from the first embodiment in that pen information is transmitted based on the difference between the resonant frequencies of the resonant circuit in the electronic pen 1 and not the resonant frequencies themselves, and in that the capacitance of the variable capacitor can be changed. In other respects, the capacitor array C 1ARRAY 、C 2ARRAY The point that one or more test bits are included is the same as that of the first embodiment. Therefore, the same reference numerals are assigned to the same components below, and the description will focus on the differences from the first embodiment.

[0102] Figure 11 1 is a diagram showing the circuit configuration of the electronic pen 1 and the integrated circuit 6 of this embodiment. As shown in this diagram, the electronic pen 1 of this embodiment is further configured to include a variable capacitance capacitor VC. DPH Variable capacitance capacitor VC DPH Similar to the variable capacitance capacitor VC, the capacitance is changed according to the voltage applied to the pen tip member 3 (see Figure 1 ) of the capacitor. In addition, the integrated circuit 6 is further configured to include switches 13, 14, a fixed capacitance capacitor C MD , terminals DPHC and DPHI connected to the resonant circuit.

[0103] First, focusing on the outside of the integrated circuit 6, the other end of the variable capacitance capacitor VC of this embodiment is not connected to the terminal C1M but to the terminal DPHC. DPH Connect between terminals DPHC and DPHI.

[0104] Next, focusing on the inside of the integrated circuit 6, the switch 13 is provided between the terminal C1M and the common terminal of the switch 14. The switch 14 is configured to have a common terminal connected to one end of the switch 13, a first selection terminal connected to the terminal DPHC, and a fixed capacitance capacitor C1M. MD A second selection terminal connected to the terminal DPHI.

[0105] The control circuit 10 is configured to have the following functions: according to the instruction from the position detection device, it controls the on / off state of the switch 13 through the control signal DPHEN1; according to the instruction from the position detection device, it controls the selection state of the switch 14 through the control signal DPHEN2.

[0106] The position detection device corresponding to the electronic pen 1 of this embodiment is configured to receive pen information transmitted by the electronic pen 1 based on the difference between the resonant frequency of a resonant circuit including a variable capacitor VC (the first and second resonant circuits described above) (hereinafter referred to as the "first resonant frequency") and the resonant frequency of a resonant circuit not including the variable capacitor VC (the resonant circuit obtained by removing the variable capacitor VC from the first and second resonant circuits) (hereinafter referred to as the "second resonant frequency").

[0107] Specifically, the position detection device first instructs the electronic pen 1 to close switch 13 and connect switch 14 to the first selectable terminal. This instruction can be provided, for example, by changing the duration of the magnetic field emitted from the sensor coil (not shown) (for details, see Patent Document 2). If the electronic pen 1 and the position detection device are compatible with other communication means (for example, short-range wireless communication such as Bluetooth (registered trademark)), this communication means can also be used. This also applies to the other instructions described below. After this instruction is issued, the resonant frequency detected by the position detection device becomes the first resonant frequency that reflects the pen pressure and the state of the operation switch 4.

[0108] Next, the position detection device instructs the electronic pen 1 to turn off the switch 13. After this instruction, the resonant frequency detected by the position detection device becomes the second resonant frequency that does not reflect the writing pressure.

[0109] The position detection device obtains the difference between the first and second resonant frequencies detected in this manner and, based on the obtained difference, obtains the pen information. By obtaining the pen information in this manner, even if the reference resonant frequencies of the first and second resonant circuits, which were set to standard values at the time of shipment, fluctuate due to factors such as the proximity of metal, temperature changes, or aging, the fluctuation is offset by the difference obtained, allowing the position detection device to accurately detect the pen information.

[0110] Furthermore, the position detection device corresponding to the digital pen 1 of this embodiment is configured to change the writing pressure curve of the digital pen 1 (a curve indicating the relationship between the writing pressure applied to the pen tip member 3 and the amount of change in the resonant frequency) based on a user operation.

[0111] Specifically, the electronic pen 1 of this embodiment corresponds to a variable capacitance capacitor VC DPH and fixed capacity capacitor C MD The first pen pressure curve corresponding to the state where the first and second resonance circuits are disconnected and the variable capacitance capacitor VC DPH and fixed capacity capacitor C MDThere are two pressure curves: a first pressure curve and a second pressure curve corresponding to the state in which the variable capacitance capacitor VC is connected in series. The position detection device is configured to select one of the first and second pressure curves based on a user operation. If the first pressure curve is selected, the position detection device instructs the electronic pen 1 to close switch 13 and connect switch 14 to the first selection terminal. If the second pressure curve is selected, the position detection device instructs the electronic pen 1 to close switch 13 and connect switch 14 to the second selection terminal. The electronic pen 1 controls the states of switches 13 and 14 in accordance with the instruction. This allows the pressure curve of the electronic pen 1 to be changed in response to user operation, resulting in a two-stage change in the writing feel (drawing sensation) of the electronic pen 1.

[0112] As described above, the integrated circuit 6 and electronic pen 1 of this embodiment achieve the same advantages as those of the first and second embodiments, and further achieve the following advantages: even after the reference resonant frequency has been adjusted, the position detection device can accurately detect pen information even if the reference resonant frequency fluctuates due to the proximity of metal, temperature changes, aging, and other factors. Furthermore, as a result, the accuracy of pen pressure is improved, allowing the position detection device to set a lower threshold (on-load) for determining whether the electronic pen 1 is in contact with the touch surface.

[0113] Furthermore, according to the integrated circuit 6 and the electronic pen 1 of this embodiment, the writing feeling (drawing feeling) of the electronic pen 1 can be changed in two stages according to user operation.

[0114] While preferred embodiments of the present invention have been described above, the present invention is not limited to these embodiments at all, and the present invention can of course be implemented in various forms within the scope of the present invention.

[0115] For example, while the above embodiments illustrate the transmission of pen information through a shift in the resonant frequency, the present invention can also be applied to the transmission of pen information as digital information by switching the signal supply to the resonant circuit on and off according to the content of the pen information. Specifically, in this case, the resonant circuit's base resonant frequency can be varied by pre-preparing multiple capacitive elements connected in parallel with the capacitors that constitute the resonant circuit within the integrated circuit and individually changing the state of each capacitive element.

[0116] Furthermore, in the above-described embodiments, an example in which a tablet terminal is used as the measuring device 31 has been described. However, the measuring device 31 may be configured by one or more other devices such as an oscilloscope, an impedance analyzer, and a personal computer.

[0117] While the above embodiments describe an example in which the present invention is applied to an electronic pen used in an electromagnetic resonance (EMR) input system, it can also be applied to a Near Field Communication (NFC) card or an EM pen that operates a resonant circuit using its own power supply rather than receiving power. When the present invention is applied to an EM pen, a measuring device 31 that does not generate a magnetic field can be used.

[0118] Description of labels

Claims

1. An integrated circuit for an electronic pen, comprising: an internal capacitor array comprising a first portion of capacitive elements and a second portion of capacitive elements, wherein the state of the first portion of the capacitive element can be changed by a predetermined process, wherein the second portion of the capacitive element and the coil form a resonant circuit; as well as A circuit is coupled to the internal capacitor array and is operable to control the electronic pen to transmit a signal using the resonant circuit.

2. The integrated circuit according to claim 1, wherein: The integrated circuit includes one or more pins for receiving input of voltage, current, signal, or command from an external adjustment device, and the external adjustment device is used to adjust the capacitance of the internal capacitor array.

3. The integrated circuit according to claim 1, wherein: The first portions of the capacitive elements each have a different capacitance change amount caused by the prescribed process, and The first portion of the capacitive elements is a unit of state change of the first portion that can be controlled by the predetermined process.

4. The integrated circuit according to claim 3, wherein: The first portion of the capacitive elements includes capacitive elements whose capacitance change amount caused by the prescribed process is not the smallest.

5. The integrated circuit according to claim 1, wherein: The first portions of the capacitive elements each include a capacitor having a floating gate formed above a substrate, and The predetermined process changes the capacitance value of the capacitor by injecting charge into the floating gate of the capacitor included in the capacitive element to be processed.

6. The integrated circuit according to claim 1, wherein: The first portions of the capacitive elements each include a capacitor having a charge trapping insulating film formed above a substrate, and The predetermined process changes the capacitance value of the capacitor by injecting charges into the charge trap insulating film of the capacitor included in the capacitive element to be processed.

7. The integrated circuit according to claim 1, wherein: The first part of the capacitive element comprises a capacitor and a fuse element connected in series, and The predetermined process disconnects the fuse element included in the capacitor element to be processed.

8. The integrated circuit according to claim 1, wherein: The first part of the capacitive element includes a capacitor and an anti-fuse element connected in series, and The predetermined process turns on the anti-fuse element included in the capacitor element to be processed.

9. The integrated circuit according to claim 1, wherein: The first part of the capacitive element comprises a capacitor and a MEMS switch connected in series, respectively, and The predetermined processing switches the on / off state of the micro-electromechanical system switch included in the capacitive element to be processed.

Citation Information

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