Parallel computing method and device for multi-core multi-node system
By building the binding between computing subtasks and processing cores in a multi-core and multi-node system, and using load balancing strategies and mapping rules for data division and calculation, the problems of high programming difficulty and insufficient resource utilization in the existing methods are solved, and efficient parallel computing and load balancing are achieved to adapt to changes in nodes and core counts.
Patent Information
- Application Number
- CN202510357432.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-25
- Publication Date
- 2025-08-08
AI Technical Summary
The existing parallel computing methods of multi-core and multi-node systems have problems such as high programming difficulty, difficulty in scaling the code and load balancing, resulting in insufficient resource utilization.
By building the binding between the computing subtask and the processing core, filtering the target processing nodes based on the load balancing strategy, dividing and sending the computing data, and determining the target processing core for calculation using mapping rules, realizing multi-computing tasks parallelism and load balancing.
It reduces the difficulty of parallel programming in multi-core and multi-node environments, improves system performance and efficiency, and can adapt to the number of processing nodes and cores, and has good scalability.
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Figure CN120448090A_ABST
Abstract
Description
Technical Field
[0001] One or more embodiments of this specification relate to the field of high-performance computing technology, and more particularly, to a parallel computing method and apparatus for multi-core and multi-node systems. Background Art
[0002] With the rapid development of computer technology, multi-core, multi-node systems have been widely used in high-performance processing systems due to their high multi-core parallelism and easy node scalability. However, to fully utilize multi-core, multi-node parallel programming, currently proposed parallel computing methods use message passing models and shared memory models. However, the message passing model is primarily designed for distributed storage multi-computer systems, and its programming model is relatively complex, requiring explicit partitioning and distribution of computing tasks, making it difficult to use. The shared memory model is primarily designed for shared storage multi-processor systems and is difficult to directly apply to distributed multi-node cluster systems. In summary, both existing methods suffer from high parallel programming difficulty, difficulty in code scalability, and load balancing, resulting in ineffective utilization of multi-core, multi-node resources. Summary of the Invention
[0003] The embodiments of this specification provide a parallel computing method and device for a multi-core multi-node system, and the technical solution is as follows: In a first aspect, an embodiment of this specification provides a parallel computing method for a multi-core multi-node system, the method comprising: Constructing at least two computing subtasks based on processing core resources of a target system, and binding each computing subtask to each processing core in the target system according to a preset mapping rule, wherein the target system includes at least two processing nodes, and each processing node includes the same number of processing cores; When the total request computing data is received, a target processing node is selected from the processing nodes according to the load balancing strategy, and each idle computing subtask corresponding to the target processing node is determined based on the global flag bit. The target processing node is used to represent the processing node with the lowest load in the target system; Dividing the total request computing data according to data characteristics of the total request computing data to obtain sub-request computing data, and sending the sub-request computing data to the idle computing subtasks in sequence according to the division order, and determining the target computing subtasks to which the sub-request computing data are allocated; The target processing core corresponding to each target computing subtask is determined based on the mapping rule, and each target processing core is controlled to perform calculations on each sub-request computing data respectively.
[0004] In a second aspect, a parallel computing device for a multi-core multi-node system is provided, the device comprising: a construction module, configured to construct at least two computing subtasks based on the processing core resources of the target system, and bind each of the computing subtasks to each processing core in the target system according to a preset mapping rule, wherein the target system includes at least two processing nodes, and each of the processing nodes includes the same number of processing cores; a determination module configured to, upon receiving total request computing data, screen out a target processing node from among the processing nodes according to a load balancing strategy, and determine, based on a global flag, each idle computing subtask corresponding to the target processing node, wherein the target processing node is used to represent the processing node with the lowest load in the target system; a partitioning module, configured to partition the total request computing data according to data characteristics of the total request computing data to obtain sub-request computing data, and sequentially send the sub-request computing data to the idle computing subtasks in a partitioning order, thereby determining target computing subtasks to which the sub-request computing data are allocated; The computing module is used to determine the target processing core corresponding to each target computing subtask based on the mapping rule, and control each target processing core to perform computing on each sub-request computing data respectively.
[0005] In a third aspect, an electronic device is provided, including a device processor and a memory; The device processor is connected to the memory; The memory is used to store executable program code; The device processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, so as to execute the steps of the method provided in the first aspect or any possible implementation manner of the first aspect.
[0006] In a fourth aspect, a computer-readable storage medium is provided, on which a computer program is stored, and the computer-readable storage medium stores instructions. When the instructions are executed on a computer or device processor, the computer or device processor executes the method provided in the first aspect or any possible implementation of the first aspect.
[0007] The beneficial effects of the technical solutions provided by some embodiments of this specification include at least: In one or more embodiments of this specification, multiple computing subtasks are constructed by processing core resources, and then each computing subtask is bound to each processing core according to the mapping rules. When the total request computing data is received, the target processing node in each processing node is screened out, and each idle computing subtask is determined. Next, the total request computing data is divided, and each sub-request computing data is sent to each idle computing subtask in turn, each target computing subtask is determined, and finally the target processing core corresponding to each target computing subtask is determined, and the target processing core is controlled to calculate each sub-request computing data separately. By constructing computing subtasks, requesting the division and automatic allocation of computing data, parallelizing multiple computing tasks and load balancing, the difficulty of parallel programming in a multi-core and multi-node environment is reduced, the overall performance and efficiency of the system are improved, and it can also automatically adapt to the scenarios where the number of processing nodes and the number of processing cores change, and has good scalability. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0009] Figure 1 A schematic diagram of the system architecture of a parallel computing method for multi-core and multi-node systems provided in an embodiment of this specification; Figure 2 A flowchart of a parallel computing method for a multi-core multi-node system provided in an embodiment of this specification; Figure 3 A schematic diagram of the structure of a parallel computing device for a multi-core multi-node system provided in an embodiment of this specification; Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this specification. DETAILED DESCRIPTION
[0010] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application.
[0011] Throughout this specification, the claims, and the accompanying drawings, the terms "first," "second," "third," and the like are used to distinguish between different items, not to describe a particular order. Furthermore, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements but may optionally include steps or elements not listed, or may include other steps or elements inherent to the process, method, product, or apparatus.
[0012] The following description provides examples and does not limit the scope, applicability, or examples set forth in the claims. Changes may be made to the functions and arrangements of the elements described without departing from the scope of this specification. Various examples may appropriately omit, replace, or add various processes or components. For example, the described methods may be performed in an order different from the order described, and various steps may be added, omitted, or combined. Furthermore, features described with respect to some examples may be combined in other examples.
[0013] See also Figure 1 , Figure 1 A schematic diagram of the system architecture of a parallel computing method for a multi-core multi-node system provided by an embodiment of this specification is shown.
[0014] like Figure 1 As shown, the system architecture of the parallel computing method for multi-core multi-node systems can include at least N multi-core processing nodes, each of which integrates multiple independent processing cores. Each processing core can independently execute instructions and process data, and the nodes are interconnected through a switching network.
[0015] See next Figure 2 , Figure 2 The overall flow chart of a parallel computing method for a multi-core multi-node system provided by an embodiment of this specification is shown. The parallel computing method for a multi-core multi-node system can be used in a server.
[0016] like Figure 2 As shown, the parallel computing method for multi-core multi-node systems may include at least the following steps: Step 201: construct at least two computing subtasks based on the processing core resources of the target system, and bind each computing subtask to each processing core in the target system according to a preset mapping rule.
[0017] The target system includes at least two processing nodes, and each processing node includes the same number of processing cores.
[0018] In the embodiments of this specification, when using the parallel computing method for multi-core, multi-node systems, the number of processing nodes and processing cores may vary in different parallel computing systems. Therefore, it is necessary to first determine the processing core resources in the target system that can be used to calculate the requested data. Each multi-core, multi-node target system can include multiple processing nodes, and each processing node includes multiple processing cores. Each processing core can independently execute instructions and process data. The processing nodes are interconnected via a switching network to form a distributed computing system. In this case, each processing node includes the same number of processing cores. Then, in order to reduce the difficulty of parallel programming in a multi-core, multi-node environment, the processing core resources of the target system can be abstracted and encapsulated in advance to construct multiple computing subtasks. Each processing core resource can carry and run a computing subtask. When a computing data request is received, it is first allocated to each computing subtask, and then the corresponding processing cores are controlled. Furthermore, a mapping rule is preset to bind each computing subtask to each processing core in the target system. According to the determined mapping rule, each computing subtask can be input into it to query the corresponding processing cores.
[0019] As an example, a target system includes 8 processing nodes, each of which includes 8 processing cores. Therefore, the target system has a total of 64 processing core resources. The preset mapping rules are shown in the following table. Each processing core resource corresponds to a computing subtask: In one possible implementation, constructing at least two computing subtasks based on the processing core resources of the target system includes: Determining the number of processing nodes and the number of cores per node in the target system based on the processing core resources of the target system; At least two computing subtasks are constructed based on the number of processing nodes and the number of cores on a single node, and the number of computing subtasks is equal to the product of the number of processing nodes and the number of cores on a single node.
[0020] In the embodiments of this specification, in order to construct a sufficient number of computing subtasks to establish a mapping rule between processing core resources and computing subtasks, it is necessary to determine the total number of computing subtasks to be constructed. The total number of computing subtasks is the same as the total number of processing cores. Therefore, the number of processing nodes and the number of cores per node in the target system are first determined based on the processing core resources of the target system. Next, the product of the number of processing nodes and the number of cores per node is calculated, and the product is determined as the total number of processing cores. Finally, based on this total number of processing cores, multiple computing subtasks of the same number are constructed.
[0021] As an example, the number of processing nodes is determined to be 6 from the processing core resources of a target system, and the number of cores per node is 8. Then, the number of computing subtasks constructed is 6*8=48.
[0022] Step 202: When the total requested computing data is received, a target processing node is selected from the processing nodes according to the load balancing strategy, and each idle computing subtask corresponding to the target processing node is determined based on the global flag. The target processing node is used to represent the processing node with the lowest load in the target system.
[0023] In the embodiment of the present specification, after constructing a plurality of computing subtasks, data computing requests sent by the terminal can be continuously received. When a section of total request computing data is obtained, often only a certain processing node in the target system is required to perform the calculation, and the target system includes multiple processing nodes. It is necessary to first determine which processing node has the lowest load running amount in the current state of the target system according to the load balancing strategy, and define the processing node as the target processing node to ensure load balancing between the processing nodes and make full use of the resources of each processing node. Furthermore, after determining the target processing node, since the target processing node includes multiple processing cores, and each processing core corresponds to a pre-constructed computing subtask, in the actual parallel computing process, the global flag can be used to determine which of the computing subtasks corresponding to the target processing node are in an idle state and which are in a running state, and the computing subtasks in an idle state are defined as idle computing subtasks for subsequent allocation of computing data.
[0024] In one possible implementation, the step of selecting a target processing node from among the processing nodes according to a load balancing strategy includes: Determining the load capacity of each processing node in the current state; The lowest load running amount among the load running amounts is determined according to an extreme value comparison algorithm, and the target processing node corresponding to the lowest load running amount is determined according to a load balancing strategy.
[0025] In the embodiments of this specification, when the target processing node among the processing nodes is screened out through the load balancing strategy, the load capacity of each processing node in the current state can be determined first. Then, each load capacity can be compared one by one through the extreme value comparison algorithm, and only the targets with small values are retained. The comparison process is continuously repeated until all load capacities are compared, and the lowest load capacity among the load capacities is obtained. Furthermore, the processing node corresponding to the lowest load capacity is determined according to the load balancing strategy, and is defined as the target processing node for subsequent processing of computing data requests in the target processing node, thereby ensuring load balancing among the processing nodes and making full use of the resources of each processing node.
[0026] In one possible implementation, determining each idle computing subtask corresponding to the target processing node based on the global flag bit includes: Determine each computing subtask corresponding to the target processing node, and determine a Boolean value corresponding to each computing subtask based on a global flag bit; Count the computing subtasks whose Boolean values are zero to obtain idle computing subtasks.
[0027] In the embodiment of this specification, when determining the idle computing subtasks corresponding to the target processing node through the global flag, it is necessary to first determine the processing cores corresponding to the target processing node, and further query the computing subtasks corresponding to each processing core according to the previously preset mapping rules. Then, the Boolean value corresponding to each computing subtask is determined through the global flag. Among them, when the Boolean value is 0, the global flag indicates that the computing subtask is in an idle state, and when the Boolean value is 1, the global flag indicates that the computing subtask has been assigned and is in a running state. Therefore, it is only necessary to count the computing subtasks with Boolean values of zero to obtain the idle computing subtasks for subsequent processing of computing data requests.
[0028] Step 203: Divide the total request calculation data according to the data characteristics of the total request calculation data to obtain sub-request calculation data, and send the sub-request calculation data to the idle calculation subtasks in sequence according to the division order to determine the target calculation subtasks to which the sub-request calculation data is allocated.
[0029] In the embodiments of this specification, since the total amount of received request computation data is generally large, in order to save processing time and improve parallel computing efficiency, the total request computation data can be first divided according to its data characteristics to obtain multiple sub-request computation data. Furthermore, the received total request computation data is generally arranged in an array format, so the sub-request computation data obtained after division also has a division order. Subsequently, based on the division order, each sub-request computation data is sequentially sent to each of the previously determined idle computation subtasks. Generally, before sending, the total number of idle computation subtasks and the total number of sub-request computation data must be determined. Sequential allocation can only be performed when the total number of idle computation subtasks is greater than the total number of sub-request computation data. Otherwise, it is necessary to wait until other computation subtasks have a running status and, after processing the computation data request, update the status to idle. Therefore, after allocating the sub-request computation data, it is necessary to identify the computation subtasks within the previously identified idle computation subtasks that have been allocated the sub-request computation data and define them as target computation subtasks.
[0030] In one possible implementation, dividing the total request calculation data according to data characteristics of the total request calculation data to obtain each sub-request calculation data includes: Determining a data partitioning method according to data characteristics of the total requested calculation data; The total request calculation data is divided based on the data division method to obtain calculation data of each sub-request.
[0031] In the embodiments of this specification, when partitioning the total request calculation data, it is necessary to first determine a data partitioning method based on the data characteristics of the total request calculation data. Each data characteristic corresponds to a different data partitioning method, or multiple data characteristics may correspond to the same partitioning method. Subsequently, the total request calculation data is partitioned based on the determined data partitioning method to obtain multiple sub-request calculation data.
[0032] The data characteristics may include data distribution uniformity, data scale, or data locality, etc. The data partitioning methods may include block partitioning, cyclic partitioning, block cyclic partitioning, and overall partitioning, etc.
[0033] In one possible implementation, determining the data partitioning method according to the data characteristics of the total request calculation data includes: When the data characteristic of the total requested calculation data is characterized by uniform distribution, the data partitioning method is determined to be partitioning by blocks; When the data characteristic is characterized by non-uniform distribution, the data partitioning method is determined to be cyclic partitioning.
[0034] In the embodiments of this specification, when determining the data partitioning method based on the data characteristics of the total request calculation data, it is possible to first determine whether the data characteristics of the total request calculation data are characterized as uniform distribution. When the data characteristics of the total request calculation data are characterized as uniform distribution, the data partitioning method is determined to be block partitioning, that is, the total request calculation data is evenly divided into several blocks, and the divided blocks are sequentially allocated to each target calculation subtask. When the data characteristics of the total request calculation data are characterized as non-uniform distribution, the data partitioning method is determined to be cyclic partitioning, that is, the total request calculation data is cyclically allocated to each target calculation subtask in the order of increasing request calculation data time.
[0035] Step 204: Determine the target processing core corresponding to each target computing subtask based on the mapping rule, and control each target processing core to perform calculations on each sub-request computing data respectively.
[0036] In the embodiment of this specification, after determining each target computing subtask, the corresponding target processing cores can be determined through pre-set mapping rules, and each target processing core can be further controlled to simultaneously calculate the sub-request computing data assigned to each target computing subtask.
[0037] Among them, before the calculation starts, the target calculation subtask enters the main loop body and is in a blocked state waiting for the activation of the running semaphore. When the calculation is completed, the target calculation subtask releases the recovery semaphore. When the server receives the recovery semaphore, it can represent the target calculation subtask to complete the calculation of the sub-request calculation data and update the status of the target calculation subtask to idle, so as to wait for the execution of other or subsequent request calculation data.
[0038] In one possible implementation, determining the target processing core corresponding to each target computing subtask based on the mapping rule includes: Determine the target processing core sequence number corresponding to each target computing subtask based on the mapping rule; Each target processing core is determined according to the sequence number of each target processing core.
[0039] In the embodiment of this specification, when determining the target processing core corresponding to each target computing subtask based on the mapping rule, it is necessary to first determine the correspondence between the serial numbers of each computing subtask and the serial numbers of each processing core in the mapping rule. As an example, when the preset mapping rule is the following table: When the target computing subtasks are numbered 0, 2, and 4, the target processing cores are numbered 1, 3, and 5 according to the target processing core numbers. The target processing cores further identified according to the numbers are processing core 1, processing core 3, and processing core 5.
[0040] The foregoing description of this specification describes specific embodiments. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in an order different from that described in the embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require the specific order shown or the sequential order to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.
[0041] See next Figure 3 , Figure 3 The following is a schematic diagram showing the structure of a parallel computing device for a multi-core multi-node system provided by an embodiment of this specification. Figure 3 The parallel computing device for multi-core multi-node system shown is used to execute the present application Figure 2For the convenience of explanation, only the part related to the embodiment of the present application is shown. For the specific technical details not disclosed, please refer to the present application. Figure 2 The embodiment shown.
[0042] like Figure 3 As shown, the parallel computing device for multi-core multi-node system may include at least: A construction module 301 is configured to construct at least two computing subtasks based on the processing core resources of the target system, and bind each computing subtask to each processing core in the target system according to a preset mapping rule, wherein the target system includes at least two processing nodes, and each processing node includes the same number of processing cores; Determination module 302 is configured to, upon receiving the total requested computing data, screen out a target processing node from among the processing nodes according to a load balancing strategy, and determine, based on a global flag, each idle computing subtask corresponding to the target processing node, wherein the target processing node represents the processing node with the lowest load in the target system; A partitioning module 303 is configured to partition the total requested computing data according to data characteristics of the total requested computing data to obtain sub-request computing data, and to sequentially send the sub-request computing data to the idle computing subtasks in the partitioning order, thereby determining target computing subtasks to which the sub-request computing data is allocated. The computing module 304 is configured to determine a target processing core corresponding to each target computing subtask based on the mapping rule, and control each target processing core to perform computing on each sub-request computing data.
[0043] In one embodiment, the construction module 301 is specifically configured to: Determining the number of processing nodes and the number of cores per node in the target system based on the processing core resources of the target system; At least two computing subtasks are constructed based on the number of processing nodes and the number of cores on a single node, and the number of computing subtasks is equal to the product of the number of processing nodes and the number of cores on a single node.
[0044] In one embodiment, the determining module 302 is specifically configured to: Determining the load capacity of each processing node in the current state; The lowest load running amount among the load running amounts is determined according to an extreme value comparison algorithm, and the target processing node corresponding to the lowest load running amount is determined according to a load balancing strategy.
[0045] In one embodiment, the determining module 302 is further configured to: Determine each computing subtask corresponding to the target processing node, and determine a Boolean value corresponding to each computing subtask based on a global flag bit; Count the computing subtasks whose Boolean values are zero to obtain idle computing subtasks.
[0046] In one embodiment, the partitioning module 303 is specifically configured to: Determining a data partitioning method according to data characteristics of the total requested calculation data; The total request calculation data is divided based on the data division method to obtain calculation data of each sub-request.
[0047] In one embodiment, the partitioning module 303 is further configured to: When the data characteristic of the total requested calculation data is characterized by uniform distribution, the data partitioning method is determined to be partitioning by blocks; When the data characteristic is characterized by non-uniform distribution, the data partitioning method is determined to be cyclic partitioning.
[0048] In one embodiment, the calculation module 304 is specifically configured to: Determine the target processing core sequence number corresponding to each target computing subtask based on the mapping rule; Each target processing core is determined according to the sequence number of each target processing core.
[0049] Those skilled in the art will clearly understand that the technical solutions of the embodiments of the present application can be implemented with the help of software and / or hardware. "Unit" and "module" in this specification refer to software and / or hardware that can independently perform or cooperate with other components to perform specific functions, where the hardware can be, for example, a field-programmable gate array (FPGA) or an integrated circuit (IC).
[0050] Each processing unit and / or module in the embodiments of the present application may be implemented by an analog circuit that implements the functions described in the embodiments of the present application, or may be implemented by software that executes the functions described in the embodiments of the present application.
[0051] See next Figure 4 , Figure 4 A schematic structural diagram of an electronic device provided in an embodiment of this specification is shown.
[0052] like Figure 4 As shown, the electronic device 400 may include: at least one device processor 401 , at least one network interface 404 , a user interface 403 , a memory 405 and at least one communication bus 402 .
[0053] The communication bus 402 may be used to implement connection and communication among the above components.
[0054] The user interface 403 may include buttons, and the optional user interface may also include a standard wired interface or a wireless interface.
[0055] The network interface 404 may include, but is not limited to, a Bluetooth module, an NFC module, a Wi-Fi module, and the like.
[0056] Among them, the device processor 401 may include one or more processing cores. The device processor 401 uses various interfaces and lines to connect the various parts of the entire electronic device 400, and executes various functions of the electronic device 400 and processes data by running or executing instructions, programs, code sets or instruction sets stored in the memory 405, and calling data stored in the memory 405. Optionally, the device processor 401 can be implemented in at least one hardware form of DSP, FPGA, and PLA. The device processor 401 can integrate one or a combination of CPU, GPU, and modem. Among them, the CPU mainly processes the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing the content to be displayed on the display screen; and the modem is used to handle wireless communications. It is understandable that the above-mentioned modem may not be integrated into the device processor 401, but may be implemented separately through a chip.
[0057] Among them, the memory 405 may include RAM and ROM. Optionally, the memory 405 includes a non-transitory computer-readable medium. The memory 405 can be used to store instructions, programs, codes, code sets or instruction sets. The memory 405 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above-mentioned various method embodiments, etc.; the data storage area may store data involved in the above-mentioned various method embodiments, etc. The memory 405 may also be optionally at least one storage device located away from the aforementioned device processor 401. As Figure 4 As shown, the memory 405 as a computer storage medium may include an operating system, a network communication module, a user interface module, and program instructions.
[0058] Specifically, the device processor 401 may be used to call a parallel computing application for a multi-core multi-node system stored in the memory 405 and perform the following operations: Constructing at least two computing subtasks based on processing core resources of a target system, and binding each computing subtask to each processing core in the target system according to a preset mapping rule, wherein the target system includes at least two processing nodes, and each processing node includes the same number of processing cores; When the total request computing data is received, a target processing node is selected from the processing nodes according to the load balancing strategy, and each idle computing subtask corresponding to the target processing node is determined based on the global flag bit. The target processing node is used to represent the processing node with the lowest load in the target system; Dividing the total request computing data according to data characteristics of the total request computing data to obtain sub-request computing data, and sending the sub-request computing data to the idle computing subtasks in sequence according to the division order, and determining the target computing subtasks to which the sub-request computing data are allocated; The target processing core corresponding to each target computing subtask is determined based on the mapping rule, and each target processing core is controlled to perform calculations on each sub-request computing data respectively.
[0059] As an option in the embodiment of this specification, the constructing of at least two computing subtasks based on the processing core resources of the target system includes: Determining the number of processing nodes and the number of cores per node in the target system based on the processing core resources of the target system; At least two computing subtasks are constructed based on the number of processing nodes and the number of cores on a single node, and the number of computing subtasks is equal to the product of the number of processing nodes and the number of cores on a single node.
[0060] As an optional embodiment of this specification, the step of selecting a target processing node from among the processing nodes according to a load balancing strategy includes: Determining the load capacity of each processing node in the current state; The lowest load running amount among the load running amounts is determined according to an extreme value comparison algorithm, and the target processing node corresponding to the lowest load running amount is determined according to a load balancing strategy.
[0061] As an optional embodiment of this specification, the determining of each idle computing subtask corresponding to the target processing node based on the global flag bit includes: Determine each computing subtask corresponding to the target processing node, and determine a Boolean value corresponding to each computing subtask based on a global flag bit; Count the computing subtasks whose Boolean values are zero to obtain idle computing subtasks.
[0062] As an optional embodiment of this specification, dividing the total request calculation data according to data characteristics of the total request calculation data to obtain each sub-request calculation data includes: Determining a data partitioning method according to data characteristics of the total requested calculation data; The total request calculation data is divided based on the data division method to obtain calculation data of each sub-request.
[0063] As an optional embodiment of this specification, determining the data partitioning method according to the data characteristics of the total request calculation data includes: When the data characteristic of the total requested calculation data is characterized by uniform distribution, the data partitioning method is determined to be partitioning by blocks; When the data characteristic is characterized by non-uniform distribution, the data partitioning method is determined to be cyclic partitioning.
[0064] As an optional embodiment of this specification, determining the target processing core corresponding to each target computing subtask based on the mapping rule includes: Determine the target processing core sequence number corresponding to each target computing subtask based on the mapping rule; Each target processing core is determined according to the sequence number of each target processing core.
[0065] The embodiments of this specification also provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above method. The computer-readable storage medium may include, but is not limited to, any type of disk, including a floppy disk, an optical disk, a DVD, a CD-ROM, a microdrive, a magneto-optical disk, a ROM, a RAM, an EPROM, an EEPROM, a DRAM, a VRAM, a flash memory device, a magnetic or optical card, a nanosystem (including a molecular memory IC), or any other type of medium or device suitable for storing instructions and / or data.
[0066] It should be noted that for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by this application.
[0067] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0068] In the several embodiments provided in this application, it should be understood that the disclosed devices can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some service interface, and the indirect coupling or communication connection of the device or unit can be electrical or other forms.
[0069] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.
[0070] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.
[0071] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a memory and includes a number of instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned memory includes: U disk, read-only memory (ROM), random access memory (RAM), mobile hard disk, magnetic disk, or optical disk, etc., various media that can store program code.
[0072] Those skilled in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable memory, which may include a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.
[0073] The foregoing description of this specification describes specific embodiments. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in an order different from that described in the embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require the specific order shown or the sequential order to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.
Claims
1. A parallel computing method for multi-core multi-node systems, characterized in that: The method comprises: Constructing at least two computing subtasks based on processing core resources of a target system, and binding each computing subtask to each processing core in the target system according to a preset mapping rule, wherein the target system includes at least two processing nodes, and each processing node includes the same number of processing cores; When the total request computing data is received, a target processing node is selected from the processing nodes according to the load balancing strategy, and each idle computing subtask corresponding to the target processing node is determined based on the global flag bit. The target processing node is used to represent the processing node with the lowest load in the target system; Dividing the total request computing data according to data characteristics of the total request computing data to obtain sub-request computing data, and sending the sub-request computing data to the idle computing subtasks in sequence according to the division order, and determining the target computing subtasks to which the sub-request computing data are allocated; The target processing core corresponding to each target computing subtask is determined based on the mapping rule, and each target processing core is controlled to perform calculations on each sub-request computing data respectively.
2. The method according to claim 1, characterized in that The constructing of at least two computing subtasks based on the processing core resources of the target system includes: Determining the number of processing nodes and the number of cores per node in the target system based on the processing core resources of the target system; At least two computing subtasks are constructed based on the number of processing nodes and the number of cores on a single node, and the number of computing subtasks is equal to the product of the number of processing nodes and the number of cores on a single node.
3. The method according to claim 1, characterized in that The step of selecting a target processing node from among the processing nodes according to a load balancing strategy includes: Determining the load capacity of each processing node in the current state; The lowest load running amount among the load running amounts is determined according to an extreme value comparison algorithm, and the target processing node corresponding to the lowest load running amount is determined according to a load balancing strategy.
4. The method according to claim 1, wherein The determining, based on the global flag bit, each idle computing subtask corresponding to the target processing node includes: Determine each computing subtask corresponding to the target processing node, and determine a Boolean value corresponding to each computing subtask based on a global flag bit; Count the computing subtasks whose Boolean values are zero to obtain idle computing subtasks.
5. The method according to claim 1, wherein The dividing the total request calculation data according to the data characteristics of the total request calculation data to obtain each sub-request calculation data includes: Determining a data partitioning method according to data characteristics of the total requested calculation data; The total request calculation data is divided based on the data division method to obtain calculation data of each sub-request.
6. The method according to claim 1, characterized in that The determining of the data partitioning method according to the data characteristics of the total request calculation data includes: When the data characteristic of the total requested calculation data is characterized by uniform distribution, the data partitioning method is determined to be partitioning by blocks; When the data characteristic is characterized by non-uniform distribution, the data partitioning method is determined to be cyclic partitioning.
7. The method according to claim 1, characterized in that The determining the target processing core corresponding to each target computing subtask based on the mapping rule includes: Determine the target processing core sequence number corresponding to each target computing subtask based on the mapping rule; Each target processing core is determined according to the sequence number of each target processing core.
8. A parallel computing device for multi-core multi-node systems, characterized in that: The device comprises: a construction module, configured to construct at least two computing subtasks based on the processing core resources of the target system, and bind each of the computing subtasks to each processing core in the target system according to a preset mapping rule, wherein the target system includes at least two processing nodes, and each of the processing nodes includes the same number of processing cores; a determination module configured to, upon receiving total request computing data, screen out a target processing node from among the processing nodes according to a load balancing strategy, and determine, based on a global flag, each idle computing subtask corresponding to the target processing node, wherein the target processing node is used to represent the processing node with the lowest load in the target system; a partitioning module, configured to partition the total request computing data according to data characteristics of the total request computing data to obtain sub-request computing data, and sequentially send the sub-request computing data to the idle computing subtasks in a partitioning order, thereby determining target computing subtasks to which the sub-request computing data are allocated; The computing module is used to determine the target processing core corresponding to each target computing subtask based on the mapping rule, and control each target processing core to perform computing on each sub-request computing data respectively.
9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.
10. A computer-readable storage medium having a computer program stored thereon, wherein the computer-readable storage medium stores instructions, which, when the instructions are executed on a computer or a processor, cause the computer or processor to execute the steps of the method according to any one of claims 1 to 7.