Packaging structure and packaging method of SiP module based on ceramic material

Abstract

The invention discloses a packaging structure and a packaging method of a SiP module based on a ceramic material, the packaging structure takes the ceramic material as a packaging shell, the position of a substrate part of the shell is designed to be a concave staggered layer structure, so that the assembly of chips and passive devices with different sizes and different heights is facilitated, and because the internal circuit of the SiP module is complicated and the number of interface pins is large, the packaging cost is low. Therefore, a ball grid array pin mode is adopted outside the shell, a metallization layout design is carried out on the ceramic substrate to realize chip assembly bonding pad and partial circuit wiring, and meanwhile, through hole metallization slurry filling is designed between substrates to realize connection of an internal metallization bonding pad and an external ball grid array pin. And a specific chip and a passive device are assembled at different positions, and lead bonding interconnection is assisted, so that a complete packaging process of a specific circuit SiP module is realized. The power distribution cabinet has the advantages of being good in insulation performance, ultrahigh in integration level, ultra-light in weight, fast in heat dissipation, high in reliability and the like, and has very high popularization value.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and in particular to a packaging structure and a packaging method of a SiP module based on ceramic materials. Background Art

[0002] The semiconductor industry is closely intertwined with industries such as defense, the internet, automobiles, and industrial manufacturing. Currently, my country's semiconductor industry is experiencing rapid growth. With the rapid advancement of semiconductor technology, integrated circuits have entered the post-Moore's Law era. Existing processes and equipment make it difficult to bring integrated circuits to new heights. Consequently, semiconductor computing is gradually evolving towards SiP technology. Simultaneously, the packaging requirements for integrated circuits are becoming increasingly stringent. Parts with metal-ceramic hermetic packaging structures are entering the market. Ceramic parts, due to their high strength, low density, high-temperature resistance, and corrosion resistance, are attracting significant attention in the aerospace field and hold broad application prospects. In recent years, SiP products have gained widespread acceptance, with product upgrades often implemented in the form of multi-chip modules (MCMs) and hybrid integrated circuits (HICs), achieving "PCB componentization (deviceization)." However, the development of plastic-encapsulated SiP products is challenging and costly, requiring complex molds and processes, making mass production challenging. This invention primarily provides a packaging structure and method for a SiP module based on ceramic materials. Using ceramic materials as the packaging substrate, it offers advantages such as miniaturization, high performance, short development cycles, high reliability, and reduced costs. The packaging structure has the characteristics of high integration and high reliability. Summary of the Invention

[0003] In order to solve the above technical problems, the present invention provides a packaging structure and packaging method of a SiP module based on ceramic materials to meet the overall requirements of electronic component systematic integration technology in scientific research and production.

[0004] The technical solution of the present invention is a packaging structure for a SiP module based on ceramic materials, comprising a ceramic substrate, the ceramic substrate being stamped from multiple layers of ceramic, the outer shell substrate of the ceramic substrate having a recessed staggered structure for assembling chips of different sizes and heights and passive components; a metallization layout being performed on the ceramic substrate to meet the requirements of chip assembly pads and partial circuit wiring; the metallization areas being composed of multiple layers of metal material, the first layer being tungsten metal, which is printed in a specific shape using a slurry, and then electroplated with nickel as the second metal layer after solidification; and the third and outermost metal layer being electroplated with pure gold; ball grid array pins being applied to the exterior of the ceramic substrate, and lead-free or lead-containing tin balls being melted and solidified on the surface metallization layer; through-holes between the ceramic substrates being filled with metallization slurry to connect the internal metallization pads with the external ball grid array pins, and then, by assembling specific chips and passive components at different positions and interconnecting them with wire bonding, a complete packaging of a SiP module for a specific circuit is achieved.

[0005] Furthermore, the internal metallization includes welding areas, bonding areas and electrical connection traces of active and passive devices. The welding process of the passive devices includes high-temperature solder vacuum sintering and conductive adhesive bonding, and the welding of the active devices includes conductive adhesive bonding and eutectic.

[0006] Furthermore, in the staggered structure of the ceramic substrate, the passive components are welded by soldering.

[0007] Preferably, metallization wiring is performed between internal layers of the ceramic substrate, and then via metallization slurry is designed to fill the vias to achieve connection between the internal metallization pads and the external ball grid array pins.

[0008] The ceramic matrix is alumina ceramic.

[0009] Preferably, a blank space is designed inside the ceramic substrate for a logo or anti-counterfeiting design.

[0010] A packaging method for a SiP module based on ceramic materials, the specific steps are as follows: (1) Wet cleaning and dry cleaning of the package shell in sequence; The wet cleaning process is to soak the shell in an organic solvent for 8-15 minutes, then put it into an ultrasonic cleaning device for cleaning, rinse it with running water for 8-10 minutes, put it into industrial alcohol for dehydration, and then bake it in an inert gas-protected oven to remove excess water vapor; Dry cleaning uses plasma cleaning. Through plasma cleaning equipment, nitrogen, argon or oxygen is used as plasma excitation gas, and cleaning is carried out for 3-5 minutes under its plasma bombardment; (2) Place solder with a melting point of 285°C or above on internal metallization II and internal metallization IV according to assembly requirements, then place passive components on top of the solder, add copper blocks on top of the passive components to increase the weight to reduce solder voids, and place the assembled product into a vacuum sintering furnace for heating and sintering; (3) Before heating the sintering furnace, repeat the vacuuming and nitrogen filling steps twice to replace the atmosphere in the furnace; then perform a step-by-step temperature increase, staying at 150°C, 230°C, and 280°C for 2-5 minutes respectively, and finally perform a melting reaction at a temperature of 320°C-350°C; (4) placing a conductive adhesive on the internal metallization VII, and then placing the active device on the conductive adhesive to form a bond, and curing in an inert gas-protected oven after bonding; (5) Plasma dry cleaning is performed on the sintered and solidified product, and the process steps are consistent with the dry cleaning in step (1); (6) Bond the cleaned product from the chip end to the internal metallization I and internal metallization VIII according to the wire bonding requirements; (7) Chip A4 is sintered on the ceramic substrate 10 through solder A3 and connected to the surface metallization A1 through lead bonding wire A2 to achieve the connection between the chip and the circuit wiring; (8) Finally, the cover plate 12 is placed on the metal sealing ring 9 and sealed by parallel seam welding equipment with a sealing power of 350W and an internal temperature controlled below 180°C.

[0011] In the above step (1), the baking temperature is set to 50-80°C.

[0012] In the above step (4), the product is first baked in an oven at 150°C for 0.5 hours, and then the temperature is raised to 200°C and baked for 1.5 hours.

[0013] In the above step (6), the bonding wire is a 20um-50um gold wire.

[0014] The principle of the present invention is as follows: an alumina ceramic material is used as the package base shell, and part of the shell substrate is designed as a recessed staggered structure to facilitate the assembly of chips and passive devices of different sizes and heights. Since the internal circuit of the SiP module is complex and there are many interface pins, a ball grid array (BGA) pin pattern is adopted on the outside of the shell. By designing a metallization layout on the ceramic substrate, the chip assembly pads and partial circuit wiring are realized. At the same time, through-hole metallization slurry is designed between the substrates to realize the connection between the internal metallization pads and the external ball grid array pins. Then, by assembling specific chips and passive devices at different positions, supplemented by wire bonding interconnection, the complete packaging process of the specific circuit SiP module is realized.

[0015] Beneficial effects of the present invention: The present invention is designed from the perspective of how to reduce parasitic parameters, and comprehensively considers factors such as the product's later functions, performance parameters, packaging technology, and integration. It greatly reduces the impact of parasitic parameters on the product during packaging, and at the same time reduces the process difficulty of the product in the later packaging.

[0016] (2) The present invention uses ceramic materials as the packaging shell, and realizes the assembly of chips and other devices and the routing of some circuits between devices through metallized wiring. The assembly of devices is realized by dispensing, eutectic, welding, etc., and then the complete circuit connection function is realized by wire bonding interconnection using gold wire as the material. The external pins adopt the ball grid array packaging process to ensure the external output interface of 100 pins while improving the product welding reliability. Finally, multiple active and passive electronic components with different functions and other types of chips are assembled in the same package to form a system or subsystem with multiple functions.

[0017] (3) The staggered layer design on the ceramic substrate is mainly for the safe welding of thicker passive components such as resistors and capacitors. Soldering is performed in the pits, and the passive components are physically isolated from the active components. When the passive components are soldered, the excess solder will accidentally overflow into the bonding area of the active components.

[0018] (4) The metallization layout on the ceramic substrate adopts the electroplating nickel-gold process, and the outermost layer is gold, which solves the problem of low resistance and low inductance of ceramic parts wiring, and at the same time facilitates the gold wire bonding process to achieve homogeneous metal bonding, thereby improving the overall reliability.

[0019] (5) A metal frame made of Kovar material is installed on the substrate, and sealed with a cover plate made of the same Kovar material under inert protective gas through a parallel seam welding process to meet the high reliability requirements of airtight packaging.

[0020] This invention features excellent insulation, ultra-high integration, ultra-light weight, rapid heat dissipation, and high reliability. It can be widely used in hybrid integrated products such as functional circuit modules or systems requiring high reliability. This invention has been promoted and applied in a variety of our company's products. Compared with existing plastic packaged products, it offers significant advantages and widespread applicability. It has high promotional value for other products with similar appearance requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is a diagram of the inner cavity of the SiP module package shell; Figure 2 This is the package pin diagram of the SiP module; Figure 3 This is the side structure diagram of the SiP module; Figure 4 It is a partial assembly drawing of the SiP module; Figure 5 This is a schematic diagram of the internal and external connections of the SiP module housing; Figure 6 This is the SiP module housing cover diagram; In the figure: 1-internal metallization I; 2-internal metallization II; 3-internal concave layer; 4-internal metallization IV; 5-metallization interruption; 6-internal blank; 7-internal metallization VII; 8-internal metallization VIII; 9-metal sealing ring; 10-ceramic substrate; 11-ball grid array pin; 12-first pin identification; A1-surface metallization; A2-lead bonding wire; A3-solder; A4-chip; B1-metallization; B2-paste. DETAILED DESCRIPTION

[0022] This embodiment discloses a packaging structure and packaging method of a SiP module based on ceramic materials.

[0023] like Figure 1 、 Figure 2 and Figure 3 As shown, this embodiment discloses a ceramic planar pad array package shell with an outer dimension of 25.0mm×25.0mm×3.0mm and an internal enclosed space of 22.8mm×22.8mm×1.3mm, mainly including a ceramic substrate 10, a metal sealing ring 9, including but not limited to internal metallization, a ball grid array pin 11, and a first pin identifier 12.

[0024] Internal metallization includes the welding area, bonding area and electrical connection lines of active and passive devices. The metallization area is composed of multiple layers of metal materials. The first layer is tungsten metal, which is printed in a specific shape using slurry. After solidification, nickel is electroplated on its surface as the second layer of metal. Finally, the third and outermost layer of metal is electroplated with pure gold.

[0025] The inner concave layer 3 is for assembling chips and passive components of different sizes and heights.

[0026] The metallization interruption 5 is to first electrically connect all the metallized areas to facilitate nickel-gold electroplating. After the nickel-gold electroplating is completed, the parts that cannot be connected are laser interrupted according to the circuit connection requirements to achieve complete circuit wiring.

[0027] The ceramic matrix is alumina ceramic.

[0028] The blank space 6 inside the ceramic matrix is used for a logo or anti-counterfeiting design at the outflow position.

[0029] The metal sealing ring 9 is made of Kovar alloy, brand: 4J42 / 4J29 The ball grid array pins 11 are outside the ceramic substrate, and the lead-free or lead-containing tin balls are melted and solidified on the surface metallization layer, and the surface metallization composition is the same as the metallization inside the ceramic.

[0030] The ceramic substrate 10 is formed by stamping multiple layers of ceramics, with metallization B1 wiring performed between internal layers, and then via metallization paste B2 is designed to fill the vias to achieve connection between the internal metallization pads B1 and the external ball grid array pins 11.

[0031] A packaging method for a SiP module based on ceramic materials, the specific steps are as follows: (1) Wet cleaning and dry cleaning of the package shell in sequence; ① The wet cleaning process steps are to soak the shell in an organic solvent for 8-15 minutes, then place it in an ultrasonic cleaning equipment for 5 minutes of ultrasonic cleaning, then rinse it with running water for 8-10 minutes, place it in industrial alcohol for dehydration, and then bake it in an inert gas-protected oven at a temperature of 50-80°C to remove excess water vapor.

[0032] ② Dry cleaning uses plasma cleaning. Through plasma cleaning equipment, nitrogen, argon or oxygen is used as plasma excitation gas, and cleaning is carried out for 3-5 minutes under its plasma bombardment.

[0033] (2) Place solder with a melting point above 285°C on internal metallization II and internal metallization IV according to assembly requirements, then place passive components on top of the solder, add copper blocks on top of the passive components to increase the weight to reduce solder voids, and place the assembled product into a vacuum sintering furnace for heating and sintering.

[0034] (3) Before heating the sintering furnace, repeat the vacuuming and nitrogen filling steps twice to replace the atmosphere in the furnace. Then, increase the temperature in a stepwise manner, staying at 150℃, 230℃, and 280℃ for 2-5 minutes respectively, and finally carry out the melting reaction at a temperature of 320℃-350℃.

[0035] (4) Place the conductive adhesive on the internal metallization VII, and then place the active device on the conductive adhesive to form a bond. After bonding, cure it in an inert gas protected oven, first bake it at 150°C for 0.5 hours, and then increase the temperature to 200°C and bake it for 1.5 hours.

[0036] (5) The sintered and solidified product is subjected to plasma dry cleaning, and the process steps are consistent with the dry cleaning in step (1).

[0037] (6) According to the wire bonding requirements, the cleaned product is bonded from the chip end to the internal metallization I and internal metallization VIII, and the bonding wire is 20um-50um gold wire.

[0038] (7) Local assembly such as Figure 4 As shown, the chip A4 is sintered on the ceramic substrate 10 through the solder A3, and is connected to the surface metallization A1 through the lead bonding wire A2 to realize the connection between the chip and the circuit wiring.

[0039] (8) Finally, the cover plate 12 is placed on the metal sealing ring 9 and sealed by parallel seam welding equipment with a sealing power of 350W and an internal temperature controlled below 180°C.

Claims

1. A packaging structure of a SiP module based on ceramic materials, characterized by: The invention comprises a ceramic substrate (10), wherein the ceramic substrate (10) is formed by punching multiple layers of ceramics, and a portion of the shell substrate of the ceramic substrate is a recessed staggered structure for assembling chips and passive components of different sizes and heights; a metallization layout is performed on the ceramic substrate, and the metallization layout design is performed on the ceramic substrate to meet the chip assembly pad and partial circuit wiring requirements; the metallization area is composed of multiple layers of metal materials, the first layer of which is metal tungsten, and a specific shape is printed in the form of a slurry, and after solidification, nickel is electroplated on the surface as the second layer of metal, and the third layer, which is also the outermost layer of metal, is electroplated with pure gold; a ball grid array pin (11) is used on the outside of the ceramic substrate, and lead-free or lead-containing tin balls are melted and solidified on the surface metallization layer; Via holes are designed between ceramic substrates to be filled with metallization slurry to achieve the connection between the internal metallization pads and the external ball grid array pins. Specific chips and passive components are then assembled at different positions, supplemented by wire bonding interconnection, to achieve complete packaging of specific circuit SiP modules.

2. The packaging structure of the SiP module based on ceramic material according to claim 1, characterized in that: Internal metallization includes the welding area, bonding area and electrical connection lines of active and passive devices. The welding process of passive devices includes high-temperature solder vacuum sintering and conductive adhesive bonding, and the welding of active devices includes conductive adhesive bonding and eutectic.

3. The packaging structure of the SiP module based on ceramic material according to claim 1, characterized in that: In the staggered structure of the ceramic matrix, the passive components are welded by soldering.

4. The packaging structure of the SiP module based on ceramic material according to claim 1, characterized in that: The ceramic substrate is metallized B1 between internal layers, and then the via metallization paste B2 is designed to fill the via to achieve the connection between the internal metallization pad B1 and the external ball grid array pin 11.

5. The packaging structure of the SiP module based on ceramic material according to claim 1, characterized in that: The ceramic matrix is alumina ceramic.

6. The packaging structure of the SiP module based on ceramic material according to claim 1, characterized in that: The ceramic base is designed with a blank space inside for logo or anti-counterfeiting design.

7. A packaging method for a SiP module based on ceramic materials, characterized in that: The specific steps are as follows: (1) Wet cleaning and dry cleaning of the package shell in sequence; The wet cleaning process is to soak the shell in an organic solvent for 8-15 minutes, then put it into an ultrasonic cleaning device for cleaning, rinse it with running water for 8-10 minutes, put it into industrial alcohol for dehydration, and then bake it in an inert gas-protected oven to remove excess water vapor; Dry cleaning uses plasma cleaning. Through plasma cleaning equipment, nitrogen, argon or oxygen is used as plasma excitation gas, and cleaning is carried out for 3-5 minutes under its plasma bombardment; (2) Place solder with a melting point of 285°C or above on internal metallization II and internal metallization IV according to assembly requirements, then place passive components on top of the solder, add copper blocks on top of the passive components to increase the weight to reduce solder voids, and place the assembled product into a vacuum sintering furnace for heating and sintering; (3) Before heating the sintering furnace, repeat the vacuuming and nitrogen filling steps twice to replace the atmosphere in the furnace; then perform a step-by-step temperature increase, staying at 150°C, 230°C, and 280°C for 2-5 minutes respectively, and finally perform a melting reaction at a temperature of 320°C-350°C; (4) placing a conductive adhesive on the internal metallization VII, and then placing the active device on the conductive adhesive to form a bond, and curing in an inert gas-protected oven after bonding; (5) Plasma dry cleaning is performed on the sintered and solidified product, and the process steps are consistent with the dry cleaning in step (1); (6) Bond the cleaned product from the chip end to the internal metallization I and internal metallization VIII according to the wire bonding requirements; (7) Chip A4 is sintered on the ceramic substrate 10 through solder A3 and connected to the surface metallization A1 through lead bonding wire A2 to achieve the connection between the chip and the circuit wiring; (8) Finally, the cover plate 12 is placed on the metal sealing ring 9 and sealed by parallel seam welding equipment with a sealing power of 350W and an internal temperature controlled below 180°C.

8. The packaging method of a SiP module based on ceramic materials according to claim 7, characterized in that: In step (1), set the baking temperature to 50-80°C.

9. The packaging method of a SiP module based on ceramic materials according to claim 7, characterized in that: In step (4), the product is first baked in an oven at 150°C for 0.5 hours, and then the temperature is raised to 200°C and baked for 1.5 hours.

10. The packaging method of a SiP module based on ceramic materials according to claim 7, characterized in that: In step (6), the bonding wire is a 20um-50um gold wire.

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