IC packaging carrier plate
By using the copper foil layer of copper-clad laminate as electrodes on the IC packaging substrate and attaching aluminum-based bonding pads on it, the high cost and performance issues caused by precious metals are solved, achieving cost reduction and improved bonding performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-06
- Publication Date
- 2026-03-27
AI Technical Summary
The use of precious metals in existing IC packaging substrates leads to high production costs, and the nickel layer may have an adverse effect on electrical performance, while silver is prone to migration under narrow pitch.
Using copper-clad laminate as the substrate, copper foil layer as the electrode, and aluminum-based bonding pads with magnetron sputtering or ion plating aluminum layer attached to its outer surface, it replaces precious metals and provides good bonding performance.
It reduces material costs by 50%-70%, avoids the adverse effects of nickel layers on electrical performance and the risk of silver migration, and improves bonding performance.
Smart Images

Figure CN224054790U_ABST
Abstract
Description
[TECHNICAL FIELD]
[0001] The utility model relates to integrated circuit package especially relates to an IC package board. [BACKGROUND]
[0002] In the manufacturing process of integrated circuit (IC) package board, surface treatment is a key process to ensure the electrical performance and reliability of the product. The traditional surface treatment methods mainly include hot air leveling (HASL), nickel-gold plating (ENIG), organic solderability preservative (OSP), silver plating, and tin plating. For applications that require wire bonding, especially in IC package boards, gold or silver plating processes are usually used to provide good bonding performance.
[0003] The utility model discloses a kind of lead frame for chip package and preparation method and chip package structure. Lead frame includes bearing sheet, first resist ink layer and plurality of unit circuits arranged in matrix, unit circuit includes plurality of electrodes, electrode includes top electrode and bottom electrode;Top electrode is arranged on the top surface of first resist ink layer;Corresponding to each unit circuit, first resist ink layer includes bottom electrode hole corresponding to electrode, bottom electrode is arranged in bottom electrode hole, and the top of bottom electrode is fixed on the bottom surface of top electrode;Bearing sheet is releasably pasted on the bottom surface of first resist ink layer and bottom electrode. Top electrode includes copper foil layer arranged on the top surface of first resist ink layer and solderable metal layer electroplated on the top surface of copper foil layer;The solderable metal layer is copper plating layer, nickel plating layer, tin plating layer, silver plating layer, gold plating layer or composite plating layer of at least two of copper plating layer, nickel plating layer, tin plating layer, silver plating layer and gold plating layer.
[0004] However, the use of precious metals such as gold and silver results in high production costs. At the same time, in the nickel-gold plating process, the presence of the nickel layer can adversely affect the electrical performance of certain special applications, and silver is prone to migration under narrow spacing. [UTILITY MODEL CONTENTS]
[0005] The utility model solves the technical problem to provide a kind of IC package board of bonding surface surface treatment cost lower.
[0006] The utility model solves the technical problem to provide a kind of chip package structure with low cost.
[0007] In order to solve the above technical problems, the utility model provides a technical scheme, which is an IC packaging carrier plate, including a substrate and a plurality of unit circuits, the unit circuit includes at least one wire bonding electrode, the substrate is a copper-clad plate substrate, the wire bonding electrode includes a copper layer, an aluminum-based bonding pad attached to the outer surface of the copper layer and a solder pad on the outer surface of the copper layer, and the copper layer of the wire bonding electrode is part of the copper foil layer of the copper-clad plate.
[0008] The IC packaging carrier plate described above, the aluminum-based bonding pad includes a magnetron sputtering aluminum layer, an ion plating aluminum layer or an evaporation aluminum layer, the magnetron sputtering aluminum layer, the ion plating aluminum layer or the evaporation aluminum layer is attached to the outer surface of the copper layer of the wire bonding electrode; the substrate includes a resin plate, a ceramic plate or a glass plate, or the substrate includes a resin layer and a metal layer.
[0009] The IC packaging carrier plate described above, the copper-clad plate is a single-sided copper-clad plate, the copper layer of the wire bonding electrode is part of the copper foil layer on the top surface of the single-sided copper-clad plate; the aluminum-based bonding pad is attached to the outer surface of the copper layer of the wire bonding electrode; the solder pad of the wire bonding electrode includes a solder layer, and the solder layer of the solder pad of the wire bonding electrode is attached to the outer surface of the copper layer of the wire bonding electrode.
[0010] The IC packaging carrier plate described above, the unit circuit includes a base island for fixing a chip, the base island includes a copper layer and an adhesive disc, or the base island includes an adhesive layer; the copper layer of the base island is part of the copper foil layer on the top surface of the single-sided copper-clad plate, and the adhesive disc of the base island is attached to the top surface of the copper layer of the base island; the adhesive layer of the base island is attached to the top surface of the single-sided copper-clad plate substrate.
[0011] The IC packaging carrier plate described above, the unit circuit includes a vertical chip connection electrode, the vertical chip connection electrode includes a copper layer, a vertical chip bottom electrode pad attached to the outer surface of the copper layer and a solder pad on the outer surface of the copper layer, and the copper layer of the vertical chip connection electrode is part of the copper foil layer on the top surface of the single-sided copper-clad plate.
[0012] The IC packaging carrier plate described above, the wire bonding electrode includes a wire bonding top electrode and a wire bonding bottom electrode, the substrate is a double-sided copper-clad plate or a core plate of a multi-layer plate, and the copper foil layer of the double-sided copper-clad plate or the multi-layer plate includes a top copper foil layer and a bottom copper foil layer; the wire bonding top electrode includes a top copper layer and the aluminum-based bonding pad, the aluminum-based bonding pad is attached to the outer surface of the top copper layer of the wire bonding top electrode, and the wire bonding bottom electrode includes a bottom copper layer and the solder pad on the outer surface of the bottom copper layer; the top copper layer of the wire bonding electrode is part of the top copper foil layer, and the bottom copper layer of the wire bonding electrode is part of the bottom copper foil layer; the wire bonding top electrode and the wire bonding bottom electrode are electrically connected through a conductive copper column or a metallized via hole penetrating through the substrate.
[0013] The IC package board, the unit circuit includes a vertical chip connecting electrode, the vertical chip connecting electrode includes a vertical chip connecting top electrode and a vertical chip connecting bottom electrode, the vertical chip connecting top electrode includes a top copper layer and a vertical chip bottom electrode pad attached to the outer surface of the top copper layer of the vertical chip connecting top electrode, the vertical chip connecting bottom electrode includes a bottom copper layer and a solder pad attached to the outer surface of the bottom copper layer, the top copper layer of the vertical chip connecting top electrode is part of the top copper foil layer, and the bottom copper layer of the vertical chip connecting bottom electrode is part of the bottom copper foil layer; the vertical chip connecting top electrode and the vertical chip connecting bottom electrode are electrically connected through a conductive copper column or a metallized via in the substrate.
[0014] The IC package board, the unit circuit includes a vertical chip connecting electrode, the vertical chip connecting electrode includes a vertical chip connecting top electrode and a vertical chip connecting bottom electrode, the vertical chip connecting top electrode includes a top copper layer and a vertical chip bottom electrode pad attached to the outer surface of the top copper layer of the vertical chip connecting top electrode, the vertical chip connecting bottom electrode includes a bottom copper layer and a solder pad attached to the outer surface of the bottom copper layer, the top copper layer of the vertical chip connecting top electrode is part of the top copper foil layer, and the bottom copper layer of the vertical chip connecting bottom electrode is part of the bottom copper foil layer; the vertical chip connecting top electrode and the vertical chip connecting bottom electrode are electrically connected through a conductive copper column or a metallized via in the substrate.
[0015] The IC package board, the unit circuit includes a vertical chip connecting electrode, the vertical chip connecting electrode includes a vertical chip connecting top electrode and a vertical chip connecting bottom electrode, the vertical chip connecting top electrode includes a top copper layer and a vertical chip bottom electrode pad attached to the outer surface of the top copper layer of the vertical chip connecting top electrode, the vertical chip connecting bottom electrode includes a bottom copper layer and a solder pad attached to the outer surface of the bottom copper layer, the top copper layer of the vertical chip connecting top electrode is part of the top copper foil layer, and the bottom copper layer of the vertical chip connecting bottom electrode is part of the bottom copper foil layer; the vertical chip connecting top electrode and the vertical chip connecting bottom electrode are electrically connected through a conductive copper column or a metallized via in the substrate.
[0016] The IC packaging board described above, the substrate is a double-sided copper-clad plate or a core plate of a multi-layer plate, the copper foil layer of the double-sided copper-clad plate or the multi-layer plate comprises a top copper foil layer and a bottom copper foil layer; the unit circuit comprises a top circuit and a bottom circuit, the top circuit comprises a top base island for fixing a top chip and a plurality of top wire-bonding electrodes, the top base island comprises a top copper layer; a top surface of the top copper layer of the base island is a chip fixing surface, and the top copper layer of the base island is part of the top copper foil layer; the top wire-bonding electrode comprises a copper layer and an aluminum-based bonding pad attached to an outer surface of the copper layer and a solder pad on the outer surface of the copper layer, and the copper layer of the top wire-bonding electrode is part of the top copper foil layer; the bottom circuit comprises a bottom base island for fixing a bottom chip and a plurality of bottom wire-bonding electrodes, and the number of the bottom wire-bonding electrodes is the same as that of the top wire-bonding electrodes; the bottom base island comprises a bottom copper layer; a bottom surface of the bottom copper layer of the base island is a chip fixing surface, and the bottom copper layer of the base island is part of the bottom copper foil layer; the bottom wire-bonding electrode comprises a copper layer and an aluminum-based bonding pad attached to an outer surface of the copper layer, and the copper layer of the bottom wire-bonding electrode is part of the bottom copper foil layer; the bottom wire-bonding electrode and the corresponding top wire-bonding electrode are electrically connected through a conductive copper column or a metallized via hole penetrating through the substrate.
[0017] The copper foil layer of the copper-clad plate is directly used as the copper layer of the electrode, so that material waste and processing steps are reduced; the aluminum-based bonding pad provides good bonding performance and low surface treatment cost, solves the problems of high cost and complex process in the prior art, and brings good technical effects. [SUMMARY]
[0018] The utility model will be made further detailed explanation in combination with the specific embodiment and the drawing.
[0019] Figure 1 It is the structure schematic diagram of chip package body of the utility model embodiment 1.
[0020] Figure 2 It is the structure schematic diagram of chip package body of the utility model embodiment 2.
[0021] Figure 3 It is the structure schematic diagram of chip package body of the utility model embodiment 3.
[0022] Figure 4 It is the structure schematic diagram of chip package body of the utility model embodiment 4.
[0023] Figure 5 It is the structure schematic diagram of chip package body of the utility model embodiment 5.
[0024] Figure 6 It is the structure schematic diagram of chip package body of the utility model embodiment 6.
[0025] Figure 7 is a structural schematic view of the chip package body of the embodiment 7 of the utility model.
[0026] Figure 8 is a structural schematic view of the chip package body of the embodiment 8 of the utility model.
[0027] Figure 9 is a structural schematic view of the chip package body of the embodiment 9 of the utility model. [DETAILED DESCRIPTION]
[0028] The utility model each embodiment below through the chip package body's structure to explain the specific structure of different embodiment IC package board, because the chip package body of sheet making has been cut apart, each chip package body only contains an IC package board one unit circuit, the structure of IC package board one unit circuit is only shown in the drawing of each embodiment chip package body.
[0029] The structure of the chip package body of the embodiment 1 of the utility model is as shown in Figure 1 , including IC package board 100, chip 1, two bonding wires 2 and encapsulation glue 3. IC package board 100 is made of single-sided copper-clad plate 100A, including substrate 10 and unit circuit.
[0030] The unit circuit includes two lead bonding electrodes 20 and base island 30 for fixing chip 1. Substrate 10 is the substrate 100A1 of single-sided copper-clad plate 100A, and the substrate 100A1 can be a resin plate, a ceramic plate or a glass plate. The lead bonding electrode 20 includes a copper layer 21, an aluminum-based bonding pad 22 attached to the outer surface of the copper layer 21, and a solder pad 23 on the outer surface of the copper layer 21. The copper layer 21 of the lead bonding electrode 20 is a part etched from the top copper foil layer 100A2 of the single-sided copper-clad plate 100A.
[0031] The aluminum-based bonding pad 22 is made of a magnetron sputtering aluminum layer (ion plating aluminum layer or evaporated aluminum layer), and the magnetron sputtering aluminum layer (ion plating aluminum layer or evaporated aluminum layer) is attached to the outer surface of the copper layer 21 of the lead bonding electrode 20. The solder pad 23 of the lead bonding electrode 20 includes a solder layer, and the solder layer of the solder pad 23 of the lead bonding electrode 20 is attached to the outer surface of the copper layer 21 of the lead bonding electrode 20.
[0032] The base island 30 of the embodiment 1 includes an adhesive layer, and the adhesive layer of the base island 30 is attached to the top surface of the substrate 10 of the single-sided copper-clad plate 100A.
[0033] The structure of the chip package body of the embodiment 2 of the utility model is as shown in Figure 2As shown in the figure, the difference between example 2 and example 1 is only that the base island 30 includes a copper layer 31 and a bonding pad 32, the copper layer 31 of the base island 30 is part of the top copper foil layer 100A2 etched from the single-sided copper-clad plate 100A, and the bonding pad 32 of the base island 30 is attached to the top surface of the copper layer 21 of the base island 30, and the bonding pad 32 can be made of the same material as the aluminum-based bonding pad 22.
[0034] The structure of the chip package body of the embodiment 3 of the utility model is as shown in the figure, Figure 3 The difference between example 3 and example 1 is that the unit circuit includes a connection electrode 40 of the vertical chip 4, the vertical chip connection electrode 40 includes a copper layer 41 and a vertical chip bottom electrode pad 42 attached to the outer surface of the copper layer 41 and a welding pad 43 on the outer surface of the copper layer 21, and the copper layer 41 of the vertical chip connection electrode 40 is part of the top copper foil layer 100A2 etched from the single-sided copper-clad plate 100A. In addition, the IC packaging board 100 of the present embodiment is used for vertical chip packaging, so only one wire bonding electrode 20 is needed to connect one bonding wire 2.
[0035] The structure of the chip package body of the embodiment 4 of the utility model is as shown in the figure, Figure 4 The difference between example 4 and example 2 is that the IC packaging board 100 is made of a double-sided copper-clad plate 100B, and the wire bonding electrode 20 includes a wire bonding top electrode 20A, a wire bonding bottom electrode 20B, and a conductive copper column or a metallized via 20C passing through the substrate 10 to connect the wire bonding top electrode 20A and the wire bonding bottom electrode 20B. The substrate 10 of the present embodiment is the core plate 100B1 of the double-sided copper-clad plate 100B, which can be a resin plate, a ceramic plate or a glass plate, and the double-sided copper-clad plate 100B includes a top copper foil layer 100B2 and a bottom copper foil layer 100B3. The wire bonding top electrode 20A includes a top copper layer 21A and an aluminum-based bonding pad 22, the magnetron sputtering aluminum layer of the aluminum-based bonding pad 22 is attached to the outer surface of the top copper layer 21A of the wire bonding top electrode 20A, and the wire bonding bottom electrode 20B includes a bottom copper layer 21B and a welding pad 23 located on the outer surface of the bottom copper layer 21B. The top copper layer 21A of the wire bonding electrode 20 is part of the top copper foil layer 100B2 etched, and the bottom copper layer 21B of the wire bonding electrode 20 is part of the bottom copper foil layer 100B3 etched. The wire bonding top electrode 20A and the wire bonding bottom electrode 20B are electrically connected through the conductive copper column or the metallized via 20C.
[0036] The structure of the chip package body of the embodiment 5 of the utility model is as shown in the figure, Figure 5As shown, the difference between Example 5 and Example 3 is that the IC package carrier board 100 is made of double-sided copper-clad board 100B, the connecting electrode 40 of the unit circuit vertical chip 4 includes vertical chip connecting top electrode 40A, vertical chip connecting bottom electrode 40B, and conductive copper column or metallized via hole 40C connecting the vertical chip connecting top electrode 40A and the vertical chip connecting bottom electrode 40B, the vertical chip connecting top electrode 40A includes the top copper layer 41A and the vertical chip bottom electrode pad 42 attached to the outer surface of the top copper layer 41A of the vertical chip connecting top electrode 40A, and the vertical chip connecting bottom electrode 40B includes the bottom copper layer 41B and the solder pad 43 attached to the outer surface of the copper layer 41B. The top copper layer 41A of the vertical chip connecting top electrode 40A is part of the top copper foil layer 100B2 etched, and the bottom copper layer 41B of the vertical chip connecting bottom electrode 40B is part of the bottom copper foil layer 100B3 etched. The vertical chip connecting top electrode 40A and the vertical chip connecting bottom electrode 40B are electrically connected through the conductive copper column or metallized via hole 40C in the substrate 10.
[0037] As shown, the structure of the chip package body of the embodiment 6 of the utility model is Figure 6 As shown, the difference between Example 5 and Example 3 is that the IC package carrier board 100 is made of double-sided copper-clad board 100B, the connecting electrode 40 of the unit circuit vertical chip 4 includes vertical chip connecting top electrode 40A, vertical chip connecting bottom electrode 40B, and conductive copper column or metallized via hole 40C connecting the vertical chip connecting top electrode 40A and the vertical chip connecting bottom electrode 40B, the vertical chip connecting top electrode 40A includes the top copper layer 41A and the vertical chip bottom electrode pad 42 attached to the outer surface of the top copper layer 41A of the vertical chip connecting top electrode 40A, and the vertical chip connecting bottom electrode 40B includes the bottom copper layer 41B and the solder pad 43 attached to the outer surface of the copper layer 41B. The top copper layer 41A of the vertical chip connecting top electrode 40A is part of the top copper foil layer 100B2 etched, and the bottom copper layer 41B of the vertical chip connecting bottom electrode 40B is part of the bottom copper foil layer 100B3 etched. The vertical chip connecting top electrode 40A and the vertical chip connecting bottom electrode 40B are electrically connected through the conductive copper column or metallized via hole 40C in the substrate 10.
[0038] The structure of the chip package of the embodiment 7 is as shown in Figure 7 The difference between the embodiment 7 and the embodiment 4 is that the copper-clad plate 100B adopted by the IC packaging board 100 is a multi-panel, the multi-layer plate includes a top copper foil layer 100B2 and a bottom copper foil layer 100B3, and the part 100B1 between the top copper foil layer 100B2 and the bottom copper foil layer 100B3 is the core plate of the multi-layer plate, that is, the substrate 10 of the IC packaging board 100R in the embodiment.
[0039] The structure of the chip package of the embodiment 8 is as shown in Figure 8 The difference between the embodiment 8 and the embodiment 6 is that the copper-clad plate 100B adopted by the IC packaging board 100 is a multi-panel, the multi-layer plate includes a top copper foil layer 100B2 and a bottom copper foil layer 100B3, and the part 100B1 between the top copper foil layer 100B2 and the bottom copper foil layer 100B3 is the core plate of the multi-layer plate, that is, the substrate 10 of the IC packaging board 100R in the embodiment.
[0040] The structure of the chip package of the embodiment 9 is as shown in Figure 9 The difference between the embodiment 9 and the embodiment 6 is that first, the copper-clad plate 100B adopted by the IC packaging board 100 is a multi-panel, the multi-layer plate includes a top copper foil layer 100B2 and a bottom copper foil layer 100B3, and the part 100B1 between the top copper foil layer 100B2 and the bottom copper foil layer 100B3 is the core plate of the multi-layer plate, that is, the substrate 10 of the IC packaging board 100R in the embodiment.
[0041] In addition, the top surface circuit and the bottom surface circuit of the unit circuit in the embodiment 9 are associated with each other, the top surface lead bonding electrode 20A includes a copper layer 21A and an aluminum-based bonding pad 22A attached to the outer surface of the copper layer 21A and a welding pad 23A on the outer surface of the copper layer 21A, and the bottom surface lead bonding electrode 20B includes a copper layer 21B and an aluminum-based bonding pad 22B attached to the outer surface of the copper layer 21B, but does not have a welding pad 23B. The top surface lead bonding electrode 20 of the top surface circuit is electrically connected to the bottom surface lead bonding electrode 20B of the corresponding bottom surface circuit through a conductive copper column or a metalized via 20C penetrating through the substrate 10.
[0042] The IC packaging board used in the chip package of the above embodiments uses the substrate of the copper-clad plate as the substrate of the IC packaging board, and directly uses the copper foil layer of the copper-clad plate as the copper layer of the electrode, thereby reducing material waste and processing steps; at the electrode part that needs to be bonded, the aluminum-based bonding pad provides good bonding performance, the surface treatment cost is relatively low, and the material cost can be reduced by 50%-70%; the aluminum-based bonding pad avoids the use of nickel metal, reduces the adverse effects on special applications such as high-frequency signal transmission, and at the same time avoids the nickel layer interference and silver migration risk, and has both performance and economic benefits.
Claims
1. An IC package substrate comprising a substrate and a plurality of unit circuits, the unit circuits comprising at least one wire bonding electrode, characterized in that, The substrate is a substrate of a copper-clad plate, the wire-bonding electrode comprises a copper layer and an aluminum-based bonding pad attached to the outer surface of the copper layer and a soldering pad on the outer surface of the copper layer, and the copper layer of the wire-bonding electrode is part of the copper foil layer of the copper-clad plate.
2. The IC package board according to claim 1, wherein, The aluminum-based bonding pad comprises a magnetron sputtering aluminum layer, an ion plating aluminum layer or an evaporation aluminum layer, and the magnetron sputtering aluminum layer, the ion plating aluminum layer or the evaporation aluminum layer is attached to the outer surface of the copper layer of the wire-bonding electrode; the substrate comprises a resin plate, a ceramic plate or a glass plate, or the substrate comprises a resin layer and a metal layer.
3. The IC package board according to claim 1 or 2, wherein, The copper-clad plate is a single-sided copper-clad plate, the copper layer of the wire-bonding electrode is part of the copper foil layer on the top surface of the single-sided copper-clad plate; the aluminum-based bonding pad is attached to the outer surface of the copper layer of the wire-bonding electrode; the soldering pad of the wire-bonding electrode comprises a soldering layer, and the soldering layer of the soldering pad of the wire-bonding electrode is attached to the outer surface of the copper layer of the wire-bonding electrode.
4. The IC package board according to claim 3, wherein, The unit circuit comprises a base island for fixing the chip, the base island comprises a copper layer and an adhesive disc, or the base island comprises an adhesive layer; the copper layer of the base island is part of the copper foil layer on the top surface of the single-sided copper-clad plate, and the adhesive disc of the base island is attached to the top surface of the copper layer of the base island; the adhesive layer of the base island is attached to the top surface of the substrate of the single-sided copper-clad plate.
5. The IC package board according to claim 3, wherein, The unit circuit comprises a vertical chip connecting electrode, the vertical chip connecting electrode comprises a vertical chip connecting top electrode and a vertical chip connecting bottom electrode, the vertical chip connecting top electrode comprises a top copper layer and a vertical chip bottom electrode pad attached to the outer surface of the top copper layer of the vertical chip connecting top electrode, and the vertical chip connecting bottom electrode comprises a bottom copper layer and a soldering pad attached to the outer surface of the bottom copper layer; the top copper layer of the vertical chip connecting top electrode is part of the top copper foil layer, and the bottom copper layer of the vertical chip connecting bottom electrode is part of the bottom copper foil layer; the vertical chip connecting top electrode and the vertical chip connecting bottom electrode are electrically connected through a conductive copper pillar or a metallized via in the substrate.
6. The IC package board according to claim 1 or 2, wherein The wire-bonding electrode comprises a wire-bonding top electrode and a wire-bonding bottom electrode, the substrate is a core plate of a double-sided copper-clad plate or a multi-layer plate, and the copper foil layer of the double-sided copper-clad plate or the multi-layer plate comprises a top copper foil layer and a bottom copper foil layer; the wire-bonding top electrode comprises a top copper layer and the aluminum-based bonding pad, the aluminum-based bonding pad is attached to the outer surface of the top copper layer of the wire-bonding top electrode, and the wire-bonding bottom electrode comprises a bottom copper layer and the soldering pad on the outer surface of the bottom copper layer; the top copper layer of the wire-bonding electrode is part of the top copper foil layer, and the bottom copper layer of the wire-bonding electrode is part of the bottom copper foil layer; the wire-bonding top electrode and the wire-bonding bottom electrode are electrically connected through a conductive copper pillar or a metallized via passing through the substrate.
7. The IC package board according to claim 6, wherein, The unit circuit comprises a vertical chip connecting electrode, the vertical chip connecting electrode comprises a vertical chip connecting top electrode and a vertical chip connecting bottom electrode, the vertical chip connecting top electrode comprises a top copper layer and a vertical chip bottom electrode pad attached to the outer surface of the top copper layer of the vertical chip connecting top electrode, and the vertical chip connecting bottom electrode comprises a bottom copper layer and a soldering pad attached to the outer surface of the bottom copper layer; the top copper layer of the vertical chip connecting top electrode is part of the top copper foil layer, and the bottom copper layer of the vertical chip connecting bottom electrode is part of the bottom copper foil layer; the vertical chip connecting top electrode and the vertical chip connecting bottom electrode are electrically connected through a conductive copper pillar or a metallized via in the substrate.
8. The IC package board according to claim 6, wherein, The unit circuit comprises a base island for fixing the chip and a plurality of the wire-bonding electrodes, the base island is arranged on the top surface of the substrate and comprises a top copper layer; the top surface of the top copper layer of the base island is a chip fixing surface, and the top copper layer of the base island is part of the top copper foil layer.
9. The IC package board according to claim 1, wherein, The substrate is a core board of a double-sided copper-clad plate or a multi-layer plate, the copper foil layer of the double-sided copper-clad plate or the multi-layer plate comprises a top copper foil layer and a bottom copper foil layer; the unit circuit comprises a top circuit and a bottom circuit, the top circuit comprises a top island for fixing a top chip and a plurality of top wire-bonding electrodes, the top island comprises a top copper layer; the top surface of the top island top copper layer is a chip fixing surface, the top copper layer of the top island is part of the top copper foil layer; the top wire-bonding electrode comprises a copper layer and an aluminum-based bonding pad attached to the outer surface of the copper layer and a soldering pad on the outer surface of the copper layer, the copper layer of the top wire-bonding electrode is part of the top copper foil layer; the bottom circuit comprises a bottom island for fixing a bottom chip and a plurality of bottom wire-bonding electrodes, the bottom island comprises a bottom copper layer; the bottom surface of the bottom island bottom copper layer is a chip fixing surface, the bottom copper layer of the bottom island is part of the bottom copper foil layer; the bottom wire-bonding electrode comprises a copper layer and an aluminum-based bonding pad attached to the outer surface of the copper layer, the copper layer of the bottom wire-bonding electrode is part of the bottom copper foil layer; the bottom wire-bonding electrode and the corresponding top wire-bonding electrode are electrically connected through a conductive copper column or a metallized via hole passing through the substrate.
10. The IC package board according to claim 1, wherein, The substrate is a core board of a double-sided copper-clad plate or a multi-layer plate, the copper foil layer of the double-sided copper-clad plate or the multi-layer plate comprises a top copper foil layer and a bottom copper foil layer; the unit circuit comprises a top circuit and a bottom circuit, the top circuit comprises a top island for fixing a top chip and a plurality of top wire-bonding electrodes, the top island comprises a top copper layer; the top surface of the top island top copper layer is a chip fixing surface, the top copper layer of the top island is part of the top copper foil layer; the top wire-bonding electrode comprises a copper layer and an aluminum-based bonding pad attached to the outer surface of the copper layer and a soldering pad on the outer surface of the copper layer, the copper layer of the top wire-bonding electrode is part of the top copper foil layer; the bottom circuit comprises a bottom island for fixing a bottom chip and a plurality of bottom wire-bonding electrodes, the number of the bottom wire-bonding electrodes is the same as that of the top wire-bonding electrodes; the bottom island comprises a bottom copper layer; the bottom surface of the bottom island bottom copper layer is a chip fixing surface, the bottom copper layer of the bottom island is part of the bottom copper foil layer; the bottom wire-bonding electrode comprises a copper layer and an aluminum-based bonding pad attached to the outer surface of the copper layer, the copper layer of the bottom wire-bonding electrode is part of the bottom copper foil layer; the bottom wire-bonding electrode and the corresponding top wire-bonding electrode are electrically connected through a conductive copper column or a metallized via hole passing through the substrate.
Citation Information
Patent Citations
Lead frame for chip packaging, preparation method and chip packaging structure
CN112366197B