Power factor correction circuit, harmonic suppression method, vehicle-mounted charger and charging pile

Abstract

The invention provides a power factor correction circuit, a harmonic suppression method, a vehicle-mounted charger and a charging pile, relates to the technical field of power electronics, and can effectively reduce the harmonic content in current and improve the electric energy quality. The power factor correction circuit comprises a voltage outer loop controller and a current inner loop controller. The voltage outer loop controller is configured to obtain an actual voltage signal and determine a reference current signal of the current inner loop controller based on the actual voltage signal, the reference voltage signal and the hysteresis width; and the current inner loop controller is configured to obtain the actual current signal and adjust the actual current signal based on the reference current signal, so that the actual current signal changes along with the reference current signal.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to a power factor correction circuit, a harmonic suppression method, an on-board charger, and a charging pile. Background Art

[0002] Power factor correctors typically use dual closed-loop control, including a voltage outer loop and a current inner loop, both of which use PI control. However, the dual PI controller causes the DC side voltage to fluctuate at a double frequency. This voltage fluctuation will further affect the reference signal of the input current and superimpose on the grid voltage, causing the input current to generate third harmonics. This harmonic will reduce the efficiency of electric energy production, transmission and utilization, causing electrical equipment to overheat, generate vibration and noise, and then age the insulation, shorten the service life of the equipment, and may even cause equipment failure or burning. Currently, the harmonic suppression methods in the existing technology are relatively complex and the harmonic elimination effect is poor. Summary of the Invention

[0003] The present application provides a power factor correction circuit, a harmonic suppression method, an on-board charger and a charging pile, which can effectively reduce the harmonic content in the current and improve the power quality.

[0004] In a first aspect, a power factor correction circuit is provided, which includes a voltage outer loop controller and a current inner loop controller; the voltage outer loop controller is configured to obtain an actual voltage signal and determine a reference current signal of the current inner loop controller based on the actual voltage signal, a reference voltage signal and a hysteresis band width; the current inner loop controller is configured to obtain an actual current signal and adjust the actual current signal based on the reference current signal so that the actual current signal follows the changes of the reference current signal.

[0005] The power factor correction circuit provided in this application utilizes the coordinated control of an outer voltage loop and an inner current loop. The outer voltage loop controller monitors the actual voltage signal in real time, compares it with a reference voltage signal, and adjusts the reference current signal of the inner current loop based on the hysteresis loop width. The inner current loop controller can quickly adjust the actual current based on the reference current signal, ensuring that the actual current signal closely follows the changes in the reference current signal. This can improve the current waveform and reduce the current harmonic content, thereby improving the utilization efficiency of electric energy and optimizing the power quality.

[0006] Optionally, the voltage outer loop controller is a hysteresis controller.

[0007] Optionally, the current inner loop controller is a PI controller.

[0008] Optionally, the voltage outer loop controller is configured to determine the reference current signal of the current inner loop controller based on the actual voltage signal, the reference voltage signal and the hysteresis band width, including: adjusting the reference current signal based on the difference between the actual voltage signal and the reference voltage signal, and the size relationship between the hysteresis band width.

[0009] Optionally, the voltage outer loop controller is configured to adjust the reference current signal based on the difference between the actual voltage signal and the reference voltage signal and the size relationship between the hysteresis band width, including: when the difference between the actual voltage signal and the reference voltage signal is greater than the upper limit of the hysteresis band width, determining the reference current signal at the current moment based on the difference between the reference current signal at the previous moment and the current amplitude adjustment step; when the difference between the actual voltage signal and the reference voltage signal is less than the lower limit of the hysteresis band width, determining the reference current signal at the current moment based on the sum of the reference current signal at the previous moment and the current amplitude adjustment step; when the difference between the actual voltage signal and the reference voltage signal is within the range of the hysteresis band width, determining the reference current signal at the current moment based on the reference current signal at the previous moment.

[0010] Optionally, the current inner loop controller is configured to adjust the actual current signal based on the reference current signal so that the actual current signal follows the changes of the reference current signal, including: obtaining a current error signal based on the actual current signal and the reference current signal; generating a current control signal based on the current error signal, and the current control signal is used to adjust the switching state of the power device so that the actual current signal follows the changes of the reference current signal.

[0011] Optionally, the power factor correction circuit is a single-phase circuit or a three-phase circuit.

[0012] Optionally, the topology of the power factor correction circuit includes at least one of the following: a full-bridge rectifier circuit, a Boost boost circuit, and a Vienna rectifier circuit.

[0013] In a second aspect, a harmonic suppression method is provided, which is applied to the power factor correction circuit provided in the first aspect. The method includes: obtaining an actual voltage signal, and determining a reference current signal of a current inner loop controller based on the actual voltage signal, a reference voltage signal and a hysteresis band width; obtaining an actual current signal, and adjusting the actual current signal based on the reference current signal so that the actual current signal follows the changes of the reference current signal.

[0014] The harmonic suppression method provided in this application obtains the actual voltage signal and combines it with the reference voltage signal and the hysteresis band width to determine the reference current signal for the current inner loop controller. This method then adjusts the actual current signal so that it closely follows the changes in the reference current signal. This method can effectively reduce the current harmonic content and optimize power quality.

[0015] Optionally, determining the reference current signal of the current inner loop controller based on the actual voltage signal, the reference voltage signal and the hysteresis band width includes: adjusting the reference current signal based on the difference between the actual voltage signal and the reference voltage signal and the size relationship between the hysteresis band width.

[0016] Optionally, the reference current signal is adjusted based on the relationship between the difference between the actual voltage signal and the reference voltage signal and the hysteresis band width, including: when the difference between the actual voltage signal and the reference voltage signal is greater than the upper limit of the hysteresis band width, the reference current signal at the current moment is determined based on the difference between the reference current signal at the previous moment and the current amplitude adjustment step; when the difference between the actual voltage signal and the reference voltage signal is less than the lower limit of the hysteresis band width, the reference current signal at the current moment is determined based on the sum of the reference current signal at the previous moment and the current amplitude adjustment step; when the difference between the actual voltage signal and the reference voltage signal is within the range of the hysteresis band width, the reference current signal at the current moment is determined based on the reference current signal at the previous moment.

[0017] Optionally, the actual current signal is adjusted based on the reference current signal so that the actual current signal follows changes in the reference current signal, including: obtaining a current error signal based on the actual current signal and the reference current signal; generating a current control signal based on the current error signal, and the current control signal is used to adjust the switching state of the power device so that the actual current signal follows changes in the reference current signal.

[0018] In a third aspect, a power factor correction device is provided for implementing the harmonic suppression method provided in the second aspect. The power factor correction device includes: a processing module.

[0019] The processing module is used to obtain the actual voltage signal and determine the reference current signal of the current inner loop controller based on the actual voltage signal, the reference voltage signal and the hysteresis band width; the processing module is also used to obtain the actual current signal and adjust the actual current signal based on the reference current signal so that the actual current signal follows the changes of the reference current signal.

[0020] In some embodiments, the processing module is specifically configured to adjust the reference current signal based on a difference between the actual voltage signal and the reference voltage signal, and a size relationship between the hysteresis band width.

[0021] In some embodiments, the processing module is specifically used to determine the reference current signal at the current moment based on the difference between the reference current signal at the previous moment and the current amplitude adjustment step when the difference between the actual voltage signal and the reference voltage signal is greater than the upper limit of the hysteresis band width; determine the reference current signal at the current moment based on the sum of the reference current signal at the previous moment and the current amplitude adjustment step when the difference between the actual voltage signal and the reference voltage signal is less than the lower limit of the hysteresis band width; and determine the reference current signal at the current moment based on the reference current signal at the previous moment when the difference between the actual voltage signal and the reference voltage signal is within the range of the hysteresis band width.

[0022] In some embodiments, the processing module is specifically used to obtain a current error signal based on the actual current signal and the reference current signal; generate a current control signal based on the current error signal, and the current control signal is used to adjust the switching state of the power device so that the actual current signal follows the reference current signal.

[0023] In a fourth aspect, a vehicle-mounted charger is provided, which includes the power factor correction circuit provided in the first aspect.

[0024] In a fifth aspect, a charging pile is provided, which includes the power factor correction circuit provided in the first aspect.

[0025] In a sixth aspect, a vehicle is provided, comprising the power factor correction circuit provided in the first aspect.

[0026] In a seventh aspect, an electronic device is provided, comprising: a processor and a memory; the memory stores instructions executable by the processor; when the processor is configured to execute the instructions, the electronic device implements the harmonic suppression method provided in the second aspect above.

[0027] In an eighth aspect, a computer-readable storage medium is provided, which includes: computer software instructions; when the computer software instructions are executed in an electronic device, the electronic device implements the power factor correction method provided in the second aspect above.

[0028] In a ninth aspect, a computer program product is provided, which includes a computer program; when the computer program runs in an electronic device, the electronic device implements the power factor correction method provided in the second aspect.

[0029] The beneficial effects of the third to ninth aspects mentioned above refer to the corresponding descriptions of the first and second aspects and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0031] Figure 1 A schematic diagram of a harmonic suppression method involved in the prior art;

[0032] Figure 2 A waveform diagram of a three-phase input current provided by this application;

[0033] Figure 3 This is a waveform diagram of the L1 phase input current and the third harmonic current in the three-phase input current provided by this application;

[0034] Figure 4 This is a waveform diagram of the L2 phase input current and the third harmonic current in the three-phase input current provided by this application;

[0035] Figure 5 This is a waveform diagram of the L3 phase input current and the third harmonic current in the three-phase input current provided by this application;

[0036] Figure 6 A waveform diagram of the third harmonic current in a three-phase input current provided by this application;

[0037] Figure 7 A schematic diagram of a power factor correction circuit provided in an embodiment of the present application;

[0038] Figure 8 A schematic diagram of another power factor correction circuit provided in an embodiment of the present application;

[0039] Figure 9 A topological diagram of a full-bridge rectifier circuit provided in an embodiment of the present application;

[0040] Figure 10 A topological diagram of a Boost circuit provided in an embodiment of the present application;

[0041] Figure 11 A schematic diagram of the structure of a power factor correction system provided in an embodiment of the present application;

[0042] Figure 12 A flowchart of a harmonic suppression method provided in an embodiment of the present application;

[0043] Figure 13 A flowchart of another harmonic suppression method provided in an embodiment of the present application;

[0044] Figure 14 A flowchart of another harmonic suppression method provided in an embodiment of the present application;

[0045] Figure 15 A flowchart of another harmonic suppression method provided in an embodiment of the present application;

[0046] Figure 16 A schematic diagram of the composition of a power factor correction device provided in an embodiment of the present application;

[0047] Figure 17 This is a schematic diagram of the structure of an electronic device provided in this application.

[0048] Reference numerals: power factor correction system 200 , sampling module 201 , control module 202 . DETAILED DESCRIPTION

[0049] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0050] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," "connected," and "connected" should be understood broadly. For example, they may refer to fixed connections, detachable connections, or integral connections. They may be directly connected, indirectly connected through an intermediary, or internally connected between two components. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0051] In the embodiments of the present application, the terms "comprises," "comprising," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, article, or device comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of other identical elements in the process, article, or device comprising the element.

[0052] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be interpreted as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0053] In the description of this specification, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or more embodiments or examples.

[0054] With the development of power electronics technology, a large number of nonlinear loads, such as inverters and rectifiers, have been widely used in industrial, commercial, and residential applications. During operation, these devices rectify and invert the input sinusoidal current, thereby changing the current waveform, causing it to deviate from the sine wave and generating harmonics.

[0055] The presence of harmonics poses multiple risks to power systems and electrical equipment. Harmonics can reduce the efficiency of electricity production, transmission, and utilization, leading to overheating, vibration, and noise in electrical equipment, which in turn degrades insulation, shortens equipment life, and can even cause equipment failure or burnout. Harmonics can also cause localized parallel or series resonance in the power system, amplifying harmonic content and damaging capacitors and other equipment. Furthermore, harmonics can cause malfunctions in relay protection and automatic devices, disrupting energy metering, and interfering with nearby communication systems, reducing communication quality and even threatening communication equipment and personal safety.

[0056] Power factor correction circuits control the input current waveform to keep it in phase with the input voltage waveform, reducing the generation of harmonics. Common power factor correction circuits include passive PFC circuits and active PFC circuits. Passive PFC circuits are suitable for low-power applications, while active PFC circuits are widely used in high-power equipment due to their efficient power factor correction capabilities and excellent harmonic suppression effects.

[0057] Power factor correction circuit plays an important role in modern power electronic equipment. It can not only reduce reactive power and harmonic distortion, but also stabilize the output voltage, improve the operating efficiency and reliability of the equipment, and reduce energy consumption. It is of great significance to achieve green energy saving and sustainable development.

[0058] PFC circuits usually use a dual-loop control method, which is divided into a voltage outer loop and a current inner loop. Both the outer loop and the inner loop use proportional-integral (PI) control (such as Figure 1 As shown, where v o is the DC side voltage, I ref is the reference current, sinωt is the sine value of the phase angle of the grid voltage, i ref is the instantaneous reference current, i inis the grid-side current), that is, both the voltage outer loop and the current inner loop are controlled by PI controllers. However, the traditional dual-PI control method can cause input current distortion, the most significant of which is the generation of third harmonics. When the output voltage changes, the input current will show obvious spikes and fluctuations.

[0059] like Figure 2 The waveform of the three-phase input current is shown. The three-phase input current is divided into L1 phase, L2 phase, and L3 phase. All three phases contain the third harmonic (the waveforms of the input current and the third harmonic current corresponding to L1 phase, L2 phase, and L3 phase are shown in Figure 1). Figure 3 、 Figure 4 、 Figure 5 As shown in the figure, the third harmonics of each phase differ by 120°, so the total phase difference is 360°, that is, the third harmonics in the three phases are in phase. Then, the third harmonics will be superimposed on the neutral line in the same phase (the waveform of the third harmonic current in the three-phase input current after superposition is as shown in the figure below). Figure 6 As shown in the figure, the neutral current is too large, which poses a safety hazard. Therefore, when dealing with harmonic problems, the third harmonic current requires special attention.

[0060] Considering the unity power factor, the input voltage and input current are in phase and do not contain harmonics. Assuming the effective value of the input voltage on the grid side is v in And the effective value of input current i in They are:

[0061]

[0062] Among them, V in is the effective value of the input voltage, I in is the effective value of the input current.

[0063] The input power P can be obtained in for:

[0064] P in =v in i in =V in I in +V in I in cos 2ωt

[0065] DC side power P o for:

[0066]

[0067] Among them, C o is the DC side output capacitance, v o is the DC side voltage, V o is the average voltage on the DC side, Io is the average current on the DC side.

[0068] Assuming that the efficiency of the topology in the power system is 100%, the grid-side input power is equal to the DC-side power, and we get:

[0069]

[0070] It can be solved as follows:

[0071]

[0072] From the above formula, we can see that there is secondary fluctuation in the DC side voltage. In the voltage outer loop of the dual PI control, assuming that the input of the PI controller is e(t) and the output is u(t), the time domain expression of the PI controller is:

[0073] u(t)=K p [e(t)+1 / T i ∫e(τ)dτ]

[0074] Among them, K p is the proportional gain, T i is the integration time constant.

[0075] Since the scaler is the most important parameter in the voltage loop, the input current amplitude reference signal I obtained by the integrator is ignored. in，ref for:

[0076]

[0077] The input current amplitude reference value and the phase angle sine value sinωt of the grid voltage are used to obtain the input current instantaneous reference value i in，ref for:

[0078]

[0079] Expanded to:

[0080]

[0081] It can be seen from the above formula that there is a triple frequency component in the instantaneous reference value of the input current. After passing through the current inner loop control, the third harmonic will be introduced into the input current. The presence of the third harmonic in the input current will reduce the efficiency of electric energy production, transmission and utilization.

[0082] In the prior art, one method to solve the above problem is to calculate the modulation component based on the DC side voltage and the grid side current, solve the modulation wave model to obtain the grid side current fundamental wave, third harmonic current, fifth harmonic current and higher harmonic current, and obtain the corresponding modulation component based on the modulation wave parameters and the phase-locked loop output signal to compensate the modulation wave. However, this method has a complex calculation process and high programming difficulty. Another method is to add the compensation voltage to the DC side output voltage of the single-phase rectifier, feed it back to the input end of the voltage outer loop control, subtract it from the input voltage of the voltage loop control, and use it as the input of the voltage outer loop control to eliminate the AC current harmonics caused by secondary fluctuations. This solution cannot completely prevent low-frequency ripple from entering the controller. After a small amount of low-frequency ripple enters the current inner loop for regulation, the modulation wave will contain too much reactive power and third harmonics, and ultimately the third harmonic of the grid side current will still exist.

[0083] To address the above technical issues, the present application proposes a power factor correction circuit, which includes a voltage outer loop controller and a current inner loop controller. The voltage outer loop controller is configured to obtain an actual voltage signal and determine a reference current signal for the current inner loop controller based on the actual voltage signal, a reference voltage signal, and a hysteresis band width. The current inner loop controller is configured to obtain an actual current signal and adjust the actual current signal based on the reference current signal so that the actual current signal follows the reference current signal. This power factor correction circuit can quickly and accurately make the actual current signal follow the reference current signal, reduce the third harmonic content, and improve the power quality.

[0084] The power factor correction circuit provided in this application is introduced below with reference to the accompanying drawings.

[0085] Figure 7 A schematic diagram of a power factor correction circuit provided in an embodiment of the present application is shown as follows: Figure 7 As shown, the power factor correction circuit provided by the present application includes: a voltage outer loop controller and a current inner loop controller.

[0086] In some embodiments, the voltage outer loop controller is configured to obtain an actual voltage signal and determine a reference current signal of the current inner loop controller based on the actual voltage signal, a reference voltage signal, and a hysteresis band width.

[0087] Among them, the above-mentioned reference voltage signal is the voltage signal that the power factor correction circuit expects to output. The reference voltage signal can be pre-set according to the specific application scenario and the performance requirements of the circuit, and this application does not limit this.

[0088] In some embodiments, the reference voltage signal serves as an input signal of the voltage outer loop.

[0089] In some embodiments, the voltage outer loop controller adjusts the reference current signal based on a difference between the actual voltage signal and the reference voltage signal, and a relationship between the hysteresis band width.

[0090] Furthermore, the voltage outer loop controller adjusts the reference current signal as follows:

[0091] When the difference between the actual voltage signal and the reference voltage signal is greater than the upper limit of the hysteresis band width, the reference current signal at the current moment is determined based on the difference between the reference current signal at the previous moment and the current amplitude adjustment step size;

[0092] When the difference between the actual voltage signal and the reference voltage signal is less than the lower limit of the hysteresis band width, the reference current signal at the current moment is determined based on the sum of the reference current signal at the previous moment and the current amplitude adjustment step size;

[0093] When the difference between the actual voltage signal and the reference voltage signal is within the range of the hysteresis band width, the reference current signal at the current moment is determined based on the reference current signal at the previous moment.

[0094] For example, assume that the actual voltage signal is recorded as v0 and the reference voltage signal is recorded as V ref , the hysteresis loop width is recorded as [-ΔH, ΔH], and the reference current signal at the previous moment is recorded as I ref (n-1), the current amplitude adjustment step is recorded as ΔI, and the reference current signal at the current moment is recorded as I ref (n), the above-mentioned method of adjusting the reference current signal is as follows:

[0095] If v0-V ref >ΔH, then I ref (n) = I ref (n-1)-ΔI;

[0096] If v0-V ref <-ΔH, then I ref (n) = I ref (n-1)+ΔI;

[0097] If -ΔH≤v0-V ref ≤ΔH, then I ref (n)=I ref (n-1).

[0098] In some embodiments, as Figure 8 As shown, the voltage outer loop controller is a hysteresis controller.

[0099] In some embodiments, the current amplitude adjustment step size is a fixed value preset to adjust the reference current signal. The size of the current amplitude adjustment step size determines the sensitivity and accuracy of the reference current signal adjustment. The size of the current amplitude adjustment step size needs to be determined based on actual conditions and is not limited in this application. For example, in application scenarios requiring fast response, a larger current amplitude adjustment step size is selected; in application scenarios requiring higher stability, a smaller current amplitude adjustment step size is selected.

[0100] In some embodiments, the current inner loop controller is configured to obtain an actual current signal and adjust the actual current signal based on a reference current signal so that the actual current signal follows the reference current signal.

[0101] Furthermore, the current inner loop controller obtains a current error signal based on the actual current signal and the reference current signal; then, a current control signal is generated based on the current error signal, and the current control signal is used to adjust the switching state of the power device so that the actual current signal follows the reference current signal.

[0102] In some embodiments, the actual current signal following the change of the reference current signal includes the amplitude and phase of the actual current signal following the change of the amplitude and phase of the reference current signal.

[0103] In some embodiments, if the actual current signal is less than the reference current signal, the inner current loop controller increases the control signal to increase the conduction level of the power device, thereby increasing the actual current signal. If the actual current signal is greater than the reference current signal, the inner current loop controller decreases the control signal to reduce the conduction level of the power device, thereby decreasing the actual current signal.

[0104] In some embodiments, as Figure 8 As shown, the above-mentioned current inner loop controller is a PI controller. The PI controller obtains the actual current signal from the current sensor and the reference current signal from the voltage outer loop controller. By comparing the actual current signal and the reference current signal, when there is a deviation between the actual current signal and the reference current signal, the PI controller combines proportional and integral effects to adjust the control output according to the size and duration of the deviation between the two, and then adjusts the switching state of the power device so that the actual current signal gradually approaches the reference current signal.

[0105] Specifically, the PI controller first performs a proportional operation on the current error signal. The proportional term generates a control signal proportional to the size of the error. The larger the error, the stronger the proportional output, allowing for a rapid response to current changes. Simultaneously, the PI controller integrates the current error signal. The integral term accumulates historical information about the error. Even if the error is small, sufficient control output will be generated over time to eliminate system errors and ensure that the actual current accurately follows the reference current. The PI controller adds the proportional and integral outputs to produce a final current control signal. This control signal is used to adjust the switching state of power devices (such as transistors). By changing parameters such as the duty cycle of the power devices, it controls power transmission and current flow in the circuit, allowing the amplitude and phase of the actual input current to gradually approach the target state indicated by the reference current signal, effectively correcting the power factor.

[0106] In some embodiments, the power factor correction circuit is a single-phase circuit or a three-phase circuit.

[0107] In some embodiments, the topology of the power factor correction circuit includes at least one of the following: a full-bridge rectifier circuit, a Boost circuit, and a Vienna rectifier circuit.

[0108] For example, Figure 9 A topological diagram of a full-bridge rectifier circuit provided in an embodiment of the present application is shown as follows: Figure 9 As shown, the full-bridge rectifier circuit includes an inductor L in , capacitor C o And power devices S1, S2, S3, S4, v in and i in are the voltage and current on the grid side, v o and i o are the voltage and current on the DC side respectively. The circuit obtains v o and i in As the above actual voltage signal and actual current signal respectively, the switching state of the power device S is controlled to realize the control of the actual current signal.

[0109] For example, Figure 10 A topology diagram of a Boost circuit provided in an embodiment of the present application is shown as follows: Figure 10 As shown, the Boost circuit includes L in , capacitor C o , diode D and power device S, v in and i in are the voltage and current on the grid side, v o and i o are the voltage and current on the DC side respectively. The circuit obtains v o and i inAs the above actual voltage signal and actual current signal respectively, the switching state of the power device S is controlled to realize the control of the actual current signal.

[0110] Figure 11 A schematic diagram of the structure of a power factor correction system provided in an embodiment of the present application is shown in FIG. Figure 11 As shown, the power factor correction system 200 includes: a sampling module 201 and a control module 202. The sampling module 201 is in communication with the control module 202.

[0111] In some embodiments, the sampling module 201 is used to sample the actual voltage signal and the actual current signal, and send the actual voltage signal and the actual current signal to the control module 202 .

[0112] For example, the sampling module 201 may be a sensor, including a voltage sensor and a current sensor, which are used to obtain an actual voltage signal and an actual current signal, respectively. The present application does not limit the specific form of the sampling module 201.

[0113] In some embodiments, the control module 202 is configured to determine a reference current signal based on the actual voltage signal, the reference voltage signal, and the hysteresis band width.

[0114] In some embodiments, the control module 202 is further used to obtain a current error signal based on the actual current signal and the reference current signal; generate a current control signal based on the current error signal; and adjust the switching state of the power device based on the current control signal so that the actual current signal follows the reference current signal.

[0115] Exemplarily, the control module 202 may be a microcontroller unit (MCU), and the present application does not limit the specific form of the control module 202 .

[0116] In some embodiments, the power factor correction system can be applied to an on-board charger or charging pile to reduce reactive power loss, improve power conversion efficiency, increase charging rate, and reduce heat generation during charging to protect the battery.

[0117] In some embodiments, the power factor correction system described above can also be applied to vehicles to reduce current fluctuations, improve power quality, reduce grid load, and enhance overall power system stability.

[0118] Figure 12 A flowchart of a harmonic suppression method provided in an embodiment of the present application is applied to Figure 7 In the power factor correction circuit shown, the method includes the following steps:

[0119] S100 , obtaining an actual voltage signal, and determining a reference current signal of a current inner loop controller based on the actual voltage signal, a reference voltage signal, and a hysteresis band width.

[0120] The reference voltage signal is the expected output voltage value of the power factor correction circuit. The reference voltage signal can be determined based on factors such as the specific application scenario and the circuit load characteristics. For example, in an application scenario with high requirements for output voltage accuracy, the reference voltage signal can be set to a stable standard DC voltage value. In an application where the circuit includes a dynamic load, the reference voltage signal can be dynamically adjusted according to changes in the load.

[0121] As a possible implementation, Figure 13 As shown, the above step S100 can be implemented as the following step S110.

[0122] S110 , adjusting the reference current signal based on the difference between the actual voltage signal and the reference voltage signal and the relationship between the hysteresis band width.

[0123] Specifically, the reference current signal is adjusted in the above S110 as follows:

[0124] When the difference between the actual voltage signal and the reference voltage signal is greater than the upper limit of the hysteresis band width, the reference current signal at the current moment is determined based on the difference between the reference current signal at the previous moment and the current amplitude adjustment step size;

[0125] When the difference between the actual voltage signal and the reference voltage signal is less than the lower limit of the hysteresis band width, the reference current signal at the current moment is determined based on the sum of the reference current signal at the previous moment and the current amplitude adjustment step size;

[0126] When the difference between the actual voltage signal and the reference voltage signal is within the range of the hysteresis band width, the reference current signal at the current moment is determined based on the reference current signal at the previous moment.

[0127] It can be understood that the mechanism of adjusting the reference current signal based on the magnitude relationship between the actual voltage signal and the reference voltage signal enables the voltage outer loop controller to respond to changes in the actual voltage in real time and dynamically adjust the reference current signal, thereby providing more accurate guidance for the current inner loop controller and strengthening the precise control of the actual voltage and current.

[0128] S200 , obtaining an actual current signal, and adjusting the actual current signal based on a reference current signal so that the actual current signal follows changes in the reference current signal.

[0129] In some embodiments, the actual current signal following the change of the reference current signal includes the amplitude and phase of the actual current signal following the change of the amplitude and phase of the reference current signal.

[0130] In some embodiments, the actual current signal is acquired, and the actual current signal is adjusted based on the reference current signal at the current moment, so that the actual current signal follows the reference current signal at the current moment.

[0131] In some embodiments, as Figure 14 As shown, the above S200 can be specifically implemented as steps S201-S202:

[0132] S201 : Obtain a current error signal based on an actual current signal and a reference current signal.

[0133] In some embodiments, the current error signal is determined based on a difference between a reference current signal and an actual current signal.

[0134] In some embodiments, a current error signal is obtained based on the actual current signal and a reference current signal at a current moment.

[0135] S202 : Generate a current control signal based on the current error signal.

[0136] The current control signal is used to adjust the switching state of the power device so that the actual current signal follows the reference current signal.

[0137] In some embodiments, the above-mentioned adjustment of the actual current signal based on the reference current signal further includes: multiplying the reference current signal amplitude with the sine value of the phase angle of the grid voltage to obtain a reference current instantaneous signal; and adjusting the actual current signal based on the reference current instantaneous signal.

[0138] In some embodiments, the power factor correction circuit provided in the present application will continuously obtain the actual voltage signal and the actual current signal, and adjust the actual current signal based on the reference voltage signal and the reference current signal to control the actual voltage signal to be within a preset ideal range.

[0139] It is understandable that the harmonic suppression method provided by the present application, based on the existing dual-loop control strategy, uses a hysteresis controller to realize the control of the voltage outer loop, monitors the actual voltage signal in real time based on the hysteresis width and the reference voltage signal, and adjusts the reference current signal by adjusting the reference current signal. Then, based on the reference current signal, the current inner loop controller (PI controller) is used to adjust the actual current signal so that the actual current signal follows the reference current signal. At the same time, PI control can also keep the switching tube frequency constant. The power factor correction circuit and method provided by the present application can control the actual signal to fluctuate within the ideal range, eliminate the influence of the secondary fluctuation generated by the third harmonic on the actual signal, reduce the third harmonic content, and improve the power quality.

[0140] The harmonic suppression method provided by this application is introduced below through a complete embodiment. Figure 15 The figure shows a flow chart of a harmonic suppression method provided by the present application, which includes the following steps:

[0141] S1. Obtain the actual voltage signal.

[0142] S2. Adjust the reference current signal based on the difference between the actual voltage signal and the reference voltage signal, and the size relationship between the hysteresis band width.

[0143] The adjusted reference current signal is the reference current signal at the current moment, and the reference current signal at the current moment is adjusted based on the reference current signal at the previous moment and the current amplitude adjustment step.

[0144] Specifically, assume that the actual voltage signal is recorded as V0 and the reference voltage signal is recorded as V ref , the hysteresis loop width is recorded as [-ΔH, ΔH], and the reference current signal at the previous moment is recorded as I ref (n-1), the current amplitude adjustment step is recorded as ΔI, and the reference current signal at the current moment is recorded as I ref (n), the adjustment process of the reference current signal is as follows:

[0145] If V0-V ref >ΔH, then I ref (n)=I ref (n-1)-ΔI;

[0146] If V0-V ref <-ΔH, then I ref (n)=I ref (n-1)+ΔI;

[0147] If -ΔH≤V0-V ref ≤ΔH, then I ref (n)=I ref (n-1).

[0148] S3. Obtain actual current signal.

[0149] S4. Obtain a current error signal based on the actual current signal and the reference current signal.

[0150] S5. Generate a current control signal based on the current error signal.

[0151] S6. Adjust the switching state of the power device based on the current control signal so that the actual current signal follows the reference current signal.

[0152] After completing the above step S6, Figure 15As shown, the method returns to step S1, and the actual voltage signal is acquired again, and the subsequent process is completed so that the difference between the actual voltage signal and the reference voltage signal remains within the hysteresis band width.

[0153] It can be seen that the above mainly introduces the solution provided by the embodiment of the present application from the perspective of the method. In order to achieve the above functions, the embodiment of the present application provides hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should easily appreciate that, in combination with the modules and algorithm steps of each example described in the embodiment disclosed herein, the embodiment of the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in a hardware or computer software driven hardware manner depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0154] In the embodiment of the present application, the power factor correction device can be divided into functional modules according to the above method example. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above integrated modules can be implemented in the form of hardware or in the form of software functional modules. Optionally, the division of modules in the embodiment of the present application is schematic and is only a logical functional division. In actual implementation, there may be other division methods.

[0155] Figure 16 FIG. 1 is a schematic diagram of a power factor correction device according to an embodiment of the present application, wherein the power factor correction device is used to implement the harmonic suppression method according to the above embodiment. Figure 16 As shown, the power factor correction device 500 includes: a processing module 501.

[0156] The processing module 501 is used to obtain an actual voltage signal and determine a reference current signal of a current inner loop controller based on the actual voltage signal, a reference voltage signal and a hysteresis band width;

[0157] The processing module 501 is further configured to obtain an actual current signal and adjust the actual current signal based on the reference current signal so that the actual current signal follows the reference current signal.

[0158] In some embodiments, the processing module 501 is specifically configured to adjust the reference current signal based on a difference between the actual voltage signal and the reference voltage signal, and a relationship between the hysteresis band width.

[0159] In some embodiments, the processing module 501 is specifically used to determine the reference current signal at the current moment based on the difference between the reference current signal at the previous moment and the current amplitude adjustment step when the difference between the actual voltage signal and the reference voltage signal is greater than the upper limit of the hysteresis band width; determine the reference current signal at the current moment based on the sum of the reference current signal at the previous moment and the current amplitude adjustment step when the difference between the actual voltage signal and the reference voltage signal is less than the lower limit of the hysteresis band width; and determine the reference current signal at the current moment based on the reference current signal at the previous moment when the difference between the actual voltage signal and the reference voltage signal is within the range of the hysteresis band width.

[0160] In some embodiments, the processing module 501 is specifically used to obtain a current error signal based on the actual current signal and the reference current signal; generate a current control signal based on the current error signal, and the current control signal is used to adjust the switching state of the power device so that the actual current signal follows the reference current signal.

[0161] In the case of implementing the functions of the above-mentioned integrated modules in the form of hardware, the embodiment of the present invention provides a possible structural diagram of the electronic device involved in the above-mentioned embodiment. Figure 17 As shown, the electronic device 900 includes: a processor 902 , a communication interface 903 , and a bus 904 . Optionally, the electronic device 900 may further include a memory 901 .

[0162] Processor 902 may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. Processor 902 may be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field-programmable gate array, or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. It may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. Processor 902 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, or a combination of a DSP and a microprocessor.

[0163] The communication interface 903 is used to connect to other devices via a communication network, such as Ethernet, wireless access network, wireless local area network (WLAN), etc.

[0164] The memory 901 may be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto.

[0165] As a possible implementation, memory 901 may exist independently of processor 902. Memory 901 may be connected to processor 902 via bus 904 to store instructions or program codes. When processor 902 calls and executes the instructions or program codes stored in memory 901, the harmonic suppression method provided in the embodiment of the present invention can be implemented.

[0166] In another possible implementation, the memory 901 may also be integrated with the processor 902 .

[0167] The bus 904 may be an extended industry standard architecture (EISA) bus, etc. The bus 904 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 17 Only one thick line is used in the diagram, but this does not mean that there is only one bus or one type of bus.

[0168] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the service calling device can be divided into different functional modules to complete all or part of the functions described above.

[0169] In the description of the embodiments of the present application, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or more embodiments or examples.

[0170] The present application also provides a computer-readable storage medium. All or part of the processes in the above method embodiments may be performed by computer program instructions directed to the relevant hardware. The program may be stored in the computer-readable storage medium. When executed on a computer, the computer program instructions cause the computer to perform the harmonic suppression method described in any of the above embodiments.

[0171] Exemplarily, the above-mentioned computer-readable storage media may include, but are not limited to: magnetic storage devices (e.g., hard disks, floppy disks, or magnetic tapes, etc.), optical disks (e.g., compact disks (CDs), digital versatile disks (DVDs), etc.), smart cards, and flash memory devices (e.g., erasable programmable read-only memories (EPROMs), cards, sticks, or key drives, etc.). The various computer-readable storage media described in the present disclosure may represent one or more devices and / or other machine-readable storage media for storing information. The term "machine-readable storage medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing, and / or carrying instructions and / or data.

[0172] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program product is run on a computer, the computer is enabled to execute any one of the harmonic suppression methods provided in the above embodiments.

[0173] The above are only specific embodiments of the present application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A power factor correction circuit, characterized in that: Including voltage outer loop controller and current inner loop controller; The voltage outer loop controller is configured to obtain an actual voltage signal and determine a reference current signal of the current inner loop controller based on the actual voltage signal, a reference voltage signal and a hysteresis band width; The current inner loop controller is configured to obtain an actual current signal and adjust the actual current signal based on the reference current signal so that the actual current signal follows the reference current signal.

2. The power factor correction circuit according to claim 1, characterized in that: The voltage outer loop controller is a hysteresis controller.

3. The power factor correction circuit according to claim 1, wherein: The current inner loop controller is a PI controller.

4. The power factor correction circuit according to claim 1, characterized in that: The voltage outer loop controller is configured to determine a reference current signal of the current inner loop controller based on the actual voltage signal, the reference voltage signal and the hysteresis band width, including: The reference current signal is adjusted based on a difference between the actual voltage signal and the reference voltage signal and a size relationship between the hysteresis band width.

5. The power factor correction circuit according to claim 4, characterized in that: The voltage outer loop controller is configured to adjust the reference current signal based on the difference between the actual voltage signal and the reference voltage signal and the hysteresis band width, including: When the difference between the actual voltage signal and the reference voltage signal is greater than the upper limit of the hysteresis band width, determining the reference current signal at the current moment based on the difference between the reference current signal at the previous moment and the current amplitude adjustment step; When the difference between the actual voltage signal and the reference voltage signal is less than the lower limit of the hysteresis band width, determining the reference current signal at the current moment based on the sum of the reference current signal at the previous moment and the current amplitude adjustment step; When the difference between the actual voltage signal and the reference voltage signal is within the range of the hysteresis band width, the reference current signal at the current moment is determined based on the reference current signal at the previous moment.

6. The power factor correction circuit according to claim 1, characterized in that: The current inner loop controller is configured to adjust the actual current signal based on the reference current signal so that the actual current signal follows the reference current signal, including: obtaining a current error signal based on the actual current signal and the reference current signal; A current control signal is generated based on the current error signal, and the current control signal is used to adjust the switching state of the power device so that the actual current signal follows the change of the reference current signal.

7. The power factor correction circuit according to claim 1, characterized in that: The power factor correction circuit is a single-phase circuit or a three-phase circuit.

8. The power factor correction circuit according to claim 1, wherein: The topology structure of the power factor correction circuit includes at least one of the following: a full-bridge rectifier circuit, a Boost circuit, and a Vienna rectifier circuit.

9. A harmonic suppression method, characterized in that: The method comprises: Acquire an actual voltage signal, and determine a reference current signal of the current inner loop controller based on the actual voltage signal, a reference voltage signal, and a hysteresis band width; An actual current signal is acquired, and the actual current signal is adjusted based on the reference current signal so that the actual current signal follows the change of the reference current signal.

10. The method according to claim 9, characterized in that The determining of the reference current signal of the current inner loop controller based on the actual voltage signal, the reference voltage signal and the hysteresis band width comprises: The reference current signal is adjusted based on a difference between the actual voltage signal and the reference voltage signal and a size relationship between the hysteresis band width.

11. The method according to claim 10, characterized in that The adjusting the reference current signal based on the difference between the actual voltage signal and the reference voltage signal and the hysteresis band width includes: When the difference between the actual voltage signal and the reference voltage signal is greater than the upper limit of the hysteresis band width, determining the reference current signal at the current moment based on the difference between the reference current signal at the previous moment and the current amplitude adjustment step; When the difference between the actual voltage signal and the reference voltage signal is less than the lower limit of the hysteresis band width, determining the reference current signal at the current moment based on the sum of the reference current signal at the previous moment and the current amplitude adjustment step; When the difference between the actual voltage signal and the reference voltage signal is within the range of the hysteresis band width, the reference current signal at the current moment is determined based on the reference current signal at the previous moment.

12. The method according to claim 9, characterized in that Adjusting the actual current signal based on the reference current signal so that the actual current signal follows the reference current signal, comprising: obtaining a current error signal based on the actual current signal and the reference current signal; A current control signal is generated based on the current error signal, and the current control signal is used to adjust the switching state of the power device so that the actual current signal follows the change of the reference current signal.

13. A vehicle-mounted charger, characterized in that: Comprising the power factor correction circuit according to any one of claims 1 to 8.

14. A charging pile, characterized in that: Comprising the power factor correction circuit according to any one of claims 1 to 8.

15. A vehicle, characterized in that: Comprising the power factor correction circuit according to any one of claims 1 to 8; or, the on-board charger according to claim 13.

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